f71882fg.c 82 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/slab.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/hwmon.h>
  27. #include <linux/hwmon-sysfs.h>
  28. #include <linux/err.h>
  29. #include <linux/mutex.h>
  30. #include <linux/io.h>
  31. #include <linux/acpi.h>
  32. #define DRVNAME "f71882fg"
  33. #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
  34. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  35. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  36. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  37. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  38. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  39. #define SIO_REG_DEVREV 0x22 /* Device revision */
  40. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  41. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  42. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  43. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  44. #define SIO_F71808E_ID 0x0901 /* Chipset ID */
  45. #define SIO_F71808A_ID 0x1001 /* Chipset ID */
  46. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  47. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  48. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  49. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  50. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  51. #define SIO_F71889E_ID 0x0909 /* Chipset ID */
  52. #define SIO_F71889A_ID 0x1005 /* Chipset ID */
  53. #define SIO_F8000_ID 0x0581 /* Chipset ID */
  54. #define SIO_F81865_ID 0x0704 /* Chipset ID */
  55. #define REGION_LENGTH 8
  56. #define ADDR_REG_OFFSET 5
  57. #define DATA_REG_OFFSET 6
  58. #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
  59. #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
  60. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  61. #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
  62. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  63. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  64. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  65. #define F71882FG_REG_FAN_STATUS 0x92
  66. #define F71882FG_REG_FAN_BEEP 0x93
  67. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  68. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  69. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  70. #define F71882FG_REG_TEMP_STATUS 0x62
  71. #define F71882FG_REG_TEMP_BEEP 0x63
  72. #define F71882FG_REG_TEMP_CONFIG 0x69
  73. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  74. #define F71882FG_REG_TEMP_TYPE 0x6B
  75. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  76. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  77. #define F71882FG_REG_PWM_TYPE 0x94
  78. #define F71882FG_REG_PWM_ENABLE 0x96
  79. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  80. #define F71882FG_REG_FAN_FAULT_T 0x9F
  81. #define F71882FG_FAN_NEG_TEMP_EN 0x20
  82. #define F71882FG_FAN_PROG_SEL 0x80
  83. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  84. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  85. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  86. #define F71882FG_REG_START 0x01
  87. #define F71882FG_MAX_INS 9
  88. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  89. static unsigned short force_id;
  90. module_param(force_id, ushort, 0);
  91. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  92. enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71882fg, f71889fg,
  93. f71889ed, f71889a, f8000, f81865f };
  94. static const char *f71882fg_names[] = {
  95. "f71808e",
  96. "f71808a",
  97. "f71858fg",
  98. "f71862fg",
  99. "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
  100. "f71882fg",
  101. "f71889fg", /* f81801u too, same id */
  102. "f71889ed",
  103. "f71889a",
  104. "f8000",
  105. "f81865f",
  106. };
  107. static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
  108. [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1 },
  109. [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1 },
  110. [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
  111. [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  112. [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  113. [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  114. [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  115. [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  116. [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  117. [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
  118. [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  119. };
  120. static const char f71882fg_has_in1_alarm[] = {
  121. [f71808e] = 0,
  122. [f71808a] = 0,
  123. [f71858fg] = 0,
  124. [f71862fg] = 0,
  125. [f71869] = 0,
  126. [f71882fg] = 1,
  127. [f71889fg] = 1,
  128. [f71889ed] = 1,
  129. [f71889a] = 1,
  130. [f8000] = 0,
  131. [f81865f] = 1,
  132. };
  133. static const char f71882fg_fan_has_beep[] = {
  134. [f71808e] = 0,
  135. [f71808a] = 0,
  136. [f71858fg] = 0,
  137. [f71862fg] = 1,
  138. [f71869] = 1,
  139. [f71882fg] = 1,
  140. [f71889fg] = 1,
  141. [f71889ed] = 1,
  142. [f71889a] = 1,
  143. [f8000] = 0,
  144. [f81865f] = 1,
  145. };
  146. static const char f71882fg_nr_fans[] = {
  147. [f71808e] = 3,
  148. [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
  149. [f71858fg] = 3,
  150. [f71862fg] = 3,
  151. [f71869] = 3,
  152. [f71882fg] = 4,
  153. [f71889fg] = 3,
  154. [f71889ed] = 3,
  155. [f71889a] = 3,
  156. [f8000] = 3, /* +1 fan which is monitor only */
  157. [f81865f] = 2,
  158. };
  159. static const char f71882fg_temp_has_beep[] = {
  160. [f71808e] = 0,
  161. [f71808a] = 1,
  162. [f71858fg] = 0,
  163. [f71862fg] = 1,
  164. [f71869] = 1,
  165. [f71882fg] = 1,
  166. [f71889fg] = 1,
  167. [f71889ed] = 1,
  168. [f71889a] = 1,
  169. [f8000] = 0,
  170. [f81865f] = 1,
  171. };
  172. static const char f71882fg_nr_temps[] = {
  173. [f71808e] = 2,
  174. [f71808a] = 2,
  175. [f71858fg] = 3,
  176. [f71862fg] = 3,
  177. [f71869] = 3,
  178. [f71882fg] = 3,
  179. [f71889fg] = 3,
  180. [f71889ed] = 3,
  181. [f71889a] = 3,
  182. [f8000] = 3,
  183. [f81865f] = 2,
  184. };
  185. static struct platform_device *f71882fg_pdev;
  186. /* Super-I/O Function prototypes */
  187. static inline int superio_inb(int base, int reg);
  188. static inline int superio_inw(int base, int reg);
  189. static inline int superio_enter(int base);
  190. static inline void superio_select(int base, int ld);
  191. static inline void superio_exit(int base);
  192. struct f71882fg_sio_data {
  193. enum chips type;
  194. };
  195. struct f71882fg_data {
  196. unsigned short addr;
  197. enum chips type;
  198. struct device *hwmon_dev;
  199. struct mutex update_lock;
  200. int temp_start; /* temp numbering start (0 or 1) */
  201. char valid; /* !=0 if following fields are valid */
  202. char auto_point_temp_signed;
  203. unsigned long last_updated; /* In jiffies */
  204. unsigned long last_limits; /* In jiffies */
  205. /* Register Values */
  206. u8 in[F71882FG_MAX_INS];
  207. u8 in1_max;
  208. u8 in_status;
  209. u8 in_beep;
  210. u16 fan[4];
  211. u16 fan_target[4];
  212. u16 fan_full_speed[4];
  213. u8 fan_status;
  214. u8 fan_beep;
  215. /* Note: all models have max 3 temperature channels, but on some
  216. they are addressed as 0-2 and on others as 1-3, so for coding
  217. convenience we reserve space for 4 channels */
  218. u16 temp[4];
  219. u8 temp_ovt[4];
  220. u8 temp_high[4];
  221. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  222. u8 temp_type[4];
  223. u8 temp_status;
  224. u8 temp_beep;
  225. u8 temp_diode_open;
  226. u8 temp_config;
  227. u8 pwm[4];
  228. u8 pwm_enable;
  229. u8 pwm_auto_point_hyst[2];
  230. u8 pwm_auto_point_mapping[4];
  231. u8 pwm_auto_point_pwm[4][5];
  232. s8 pwm_auto_point_temp[4][4];
  233. };
  234. /* Sysfs in */
  235. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  236. char *buf);
  237. static ssize_t show_in_max(struct device *dev, struct device_attribute
  238. *devattr, char *buf);
  239. static ssize_t store_in_max(struct device *dev, struct device_attribute
  240. *devattr, const char *buf, size_t count);
  241. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  242. *devattr, char *buf);
  243. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  244. *devattr, const char *buf, size_t count);
  245. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  246. *devattr, char *buf);
  247. /* Sysfs Fan */
  248. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  249. char *buf);
  250. static ssize_t show_fan_full_speed(struct device *dev,
  251. struct device_attribute *devattr, char *buf);
  252. static ssize_t store_fan_full_speed(struct device *dev,
  253. struct device_attribute *devattr, const char *buf, size_t count);
  254. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  255. *devattr, char *buf);
  256. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  257. *devattr, const char *buf, size_t count);
  258. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  259. *devattr, char *buf);
  260. /* Sysfs Temp */
  261. static ssize_t show_temp(struct device *dev, struct device_attribute
  262. *devattr, char *buf);
  263. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  264. *devattr, char *buf);
  265. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  266. *devattr, const char *buf, size_t count);
  267. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  268. *devattr, char *buf);
  269. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  270. *devattr, const char *buf, size_t count);
  271. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  272. *devattr, char *buf);
  273. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  274. *devattr, const char *buf, size_t count);
  275. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  276. *devattr, char *buf);
  277. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  278. *devattr, char *buf);
  279. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  280. *devattr, char *buf);
  281. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  282. *devattr, const char *buf, size_t count);
  283. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  284. *devattr, char *buf);
  285. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  286. *devattr, char *buf);
  287. /* PWM and Auto point control */
  288. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  289. char *buf);
  290. static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
  291. const char *buf, size_t count);
  292. static ssize_t show_simple_pwm(struct device *dev,
  293. struct device_attribute *devattr, char *buf);
  294. static ssize_t store_simple_pwm(struct device *dev,
  295. struct device_attribute *devattr, const char *buf, size_t count);
  296. static ssize_t show_pwm_enable(struct device *dev,
  297. struct device_attribute *devattr, char *buf);
  298. static ssize_t store_pwm_enable(struct device *dev,
  299. struct device_attribute *devattr, const char *buf, size_t count);
  300. static ssize_t show_pwm_interpolate(struct device *dev,
  301. struct device_attribute *devattr, char *buf);
  302. static ssize_t store_pwm_interpolate(struct device *dev,
  303. struct device_attribute *devattr, const char *buf, size_t count);
  304. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  305. struct device_attribute *devattr, char *buf);
  306. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  307. struct device_attribute *devattr, const char *buf, size_t count);
  308. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  309. struct device_attribute *devattr, char *buf);
  310. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  311. struct device_attribute *devattr, const char *buf, size_t count);
  312. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  313. struct device_attribute *devattr, char *buf);
  314. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  315. struct device_attribute *devattr, const char *buf, size_t count);
  316. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  317. struct device_attribute *devattr, char *buf);
  318. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  319. struct device_attribute *devattr, const char *buf, size_t count);
  320. /* Sysfs misc */
  321. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  322. char *buf);
  323. static int __devinit f71882fg_probe(struct platform_device * pdev);
  324. static int f71882fg_remove(struct platform_device *pdev);
  325. static struct platform_driver f71882fg_driver = {
  326. .driver = {
  327. .owner = THIS_MODULE,
  328. .name = DRVNAME,
  329. },
  330. .probe = f71882fg_probe,
  331. .remove = f71882fg_remove,
  332. };
  333. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  334. /* Temp attr for the f71858fg, the f71858fg is special as it has its
  335. temperature indexes start at 0 (the others start at 1) */
  336. static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
  337. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  338. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  339. store_temp_max, 0, 0),
  340. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  341. store_temp_max_hyst, 0, 0),
  342. SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
  343. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  344. store_temp_crit, 0, 0),
  345. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  346. 0, 0),
  347. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  348. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  349. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  350. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  351. store_temp_max, 0, 1),
  352. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  353. store_temp_max_hyst, 0, 1),
  354. SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  355. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  356. store_temp_crit, 0, 1),
  357. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  358. 0, 1),
  359. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  360. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  361. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  362. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  363. store_temp_max, 0, 2),
  364. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  365. store_temp_max_hyst, 0, 2),
  366. SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  367. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  368. store_temp_crit, 0, 2),
  369. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  370. 0, 2),
  371. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  372. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  373. };
  374. /* Temp attr for the standard models */
  375. static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
  376. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  377. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  378. store_temp_max, 0, 1),
  379. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  380. store_temp_max_hyst, 0, 1),
  381. /* Should really be temp1_max_alarm, but older versions did not handle
  382. the max and crit alarms separately and lm_sensors v2 depends on the
  383. presence of temp#_alarm files. The same goes for temp2/3 _alarm. */
  384. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  385. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  386. store_temp_crit, 0, 1),
  387. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  388. 0, 1),
  389. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  390. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  391. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  392. }, {
  393. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  394. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  395. store_temp_max, 0, 2),
  396. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  397. store_temp_max_hyst, 0, 2),
  398. /* Should be temp2_max_alarm, see temp1_alarm note */
  399. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  400. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  401. store_temp_crit, 0, 2),
  402. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  403. 0, 2),
  404. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  405. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  406. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  407. }, {
  408. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  409. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  410. store_temp_max, 0, 3),
  411. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  412. store_temp_max_hyst, 0, 3),
  413. /* Should be temp3_max_alarm, see temp1_alarm note */
  414. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  415. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  416. store_temp_crit, 0, 3),
  417. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  418. 0, 3),
  419. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
  420. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  421. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  422. } };
  423. /* Temp attr for models which can beep on temp alarm */
  424. static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
  425. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  426. store_temp_beep, 0, 1),
  427. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  428. store_temp_beep, 0, 5),
  429. }, {
  430. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  431. store_temp_beep, 0, 2),
  432. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  433. store_temp_beep, 0, 6),
  434. }, {
  435. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  436. store_temp_beep, 0, 3),
  437. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  438. store_temp_beep, 0, 7),
  439. } };
  440. /* Temp attr for the f8000
  441. Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
  442. is used as hysteresis value to clear alarms
  443. Also like the f71858fg its temperature indexes start at 0
  444. */
  445. static struct sensor_device_attribute_2 f8000_temp_attr[] = {
  446. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  447. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
  448. store_temp_crit, 0, 0),
  449. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  450. store_temp_max, 0, 0),
  451. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  452. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  453. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  454. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
  455. store_temp_crit, 0, 1),
  456. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  457. store_temp_max, 0, 1),
  458. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  459. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  460. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  461. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
  462. store_temp_crit, 0, 2),
  463. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  464. store_temp_max, 0, 2),
  465. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  466. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  467. };
  468. /* in attr for all models */
  469. static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
  470. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  471. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  472. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  473. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  474. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  475. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  476. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  477. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  478. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  479. };
  480. /* For models with in1 alarm capability */
  481. static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
  482. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  483. 0, 1),
  484. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  485. 0, 1),
  486. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  487. };
  488. /* Fan / PWM attr common to all models */
  489. static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
  490. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  491. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  492. show_fan_full_speed,
  493. store_fan_full_speed, 0, 0),
  494. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  495. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  496. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  497. store_pwm_enable, 0, 0),
  498. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  499. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  500. }, {
  501. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  502. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  503. show_fan_full_speed,
  504. store_fan_full_speed, 0, 1),
  505. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  506. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  507. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  508. store_pwm_enable, 0, 1),
  509. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  510. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  511. }, {
  512. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  513. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  514. show_fan_full_speed,
  515. store_fan_full_speed, 0, 2),
  516. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  517. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  518. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  519. store_pwm_enable, 0, 2),
  520. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  521. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  522. }, {
  523. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  524. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  525. show_fan_full_speed,
  526. store_fan_full_speed, 0, 3),
  527. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  528. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  529. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  530. store_pwm_enable, 0, 3),
  531. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  532. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  533. } };
  534. /* Attr for the third fan of the f71808a, which only has manual pwm */
  535. static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
  536. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  537. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  538. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
  539. show_simple_pwm, store_simple_pwm, 0, 2),
  540. };
  541. /* Attr for models which can beep on Fan alarm */
  542. static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
  543. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  544. store_fan_beep, 0, 0),
  545. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  546. store_fan_beep, 0, 1),
  547. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  548. store_fan_beep, 0, 2),
  549. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  550. store_fan_beep, 0, 3),
  551. };
  552. /* PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
  553. standard models */
  554. static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[] = {
  555. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  556. show_pwm_auto_point_channel,
  557. store_pwm_auto_point_channel, 0, 0),
  558. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  559. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  560. 1, 0),
  561. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  562. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  563. 4, 0),
  564. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  565. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  566. 0, 0),
  567. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  568. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  569. 3, 0),
  570. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  571. show_pwm_auto_point_temp_hyst,
  572. store_pwm_auto_point_temp_hyst,
  573. 0, 0),
  574. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  575. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  576. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  577. show_pwm_auto_point_channel,
  578. store_pwm_auto_point_channel, 0, 1),
  579. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  580. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  581. 1, 1),
  582. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  583. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  584. 4, 1),
  585. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  586. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  587. 0, 1),
  588. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  589. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  590. 3, 1),
  591. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  592. show_pwm_auto_point_temp_hyst,
  593. store_pwm_auto_point_temp_hyst,
  594. 0, 1),
  595. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  596. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  597. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  598. show_pwm_auto_point_channel,
  599. store_pwm_auto_point_channel, 0, 2),
  600. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  601. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  602. 1, 2),
  603. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  604. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  605. 4, 2),
  606. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  607. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  608. 0, 2),
  609. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  610. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  611. 3, 2),
  612. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  613. show_pwm_auto_point_temp_hyst,
  614. store_pwm_auto_point_temp_hyst,
  615. 0, 2),
  616. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  617. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  618. };
  619. /* PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
  620. pwm setting when the temperature is above the pwmX_auto_point1_temp can be
  621. programmed instead of being hardcoded to 0xff */
  622. static struct sensor_device_attribute_2 f71869_auto_pwm_attr[] = {
  623. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  624. show_pwm_auto_point_channel,
  625. store_pwm_auto_point_channel, 0, 0),
  626. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  627. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  628. 0, 0),
  629. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  630. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  631. 1, 0),
  632. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  633. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  634. 4, 0),
  635. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  636. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  637. 0, 0),
  638. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  639. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  640. 3, 0),
  641. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  642. show_pwm_auto_point_temp_hyst,
  643. store_pwm_auto_point_temp_hyst,
  644. 0, 0),
  645. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  646. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  647. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  648. show_pwm_auto_point_channel,
  649. store_pwm_auto_point_channel, 0, 1),
  650. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  651. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  652. 0, 1),
  653. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  654. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  655. 1, 1),
  656. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  657. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  658. 4, 1),
  659. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  660. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  661. 0, 1),
  662. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  663. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  664. 3, 1),
  665. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  666. show_pwm_auto_point_temp_hyst,
  667. store_pwm_auto_point_temp_hyst,
  668. 0, 1),
  669. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  670. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  671. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  672. show_pwm_auto_point_channel,
  673. store_pwm_auto_point_channel, 0, 2),
  674. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  675. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  676. 0, 2),
  677. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  678. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  679. 1, 2),
  680. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  681. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  682. 4, 2),
  683. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  684. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  685. 0, 2),
  686. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  687. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  688. 3, 2),
  689. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  690. show_pwm_auto_point_temp_hyst,
  691. store_pwm_auto_point_temp_hyst,
  692. 0, 2),
  693. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  694. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  695. };
  696. /* PWM attr for the standard models */
  697. static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
  698. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  699. show_pwm_auto_point_channel,
  700. store_pwm_auto_point_channel, 0, 0),
  701. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  702. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  703. 0, 0),
  704. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  705. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  706. 1, 0),
  707. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  708. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  709. 2, 0),
  710. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  711. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  712. 3, 0),
  713. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  714. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  715. 4, 0),
  716. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  717. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  718. 0, 0),
  719. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  720. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  721. 1, 0),
  722. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  723. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  724. 2, 0),
  725. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  726. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  727. 3, 0),
  728. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  729. show_pwm_auto_point_temp_hyst,
  730. store_pwm_auto_point_temp_hyst,
  731. 0, 0),
  732. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  733. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  734. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  735. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  736. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  737. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  738. }, {
  739. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  740. show_pwm_auto_point_channel,
  741. store_pwm_auto_point_channel, 0, 1),
  742. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  743. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  744. 0, 1),
  745. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  746. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  747. 1, 1),
  748. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  749. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  750. 2, 1),
  751. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  752. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  753. 3, 1),
  754. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  755. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  756. 4, 1),
  757. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  758. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  759. 0, 1),
  760. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  761. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  762. 1, 1),
  763. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  764. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  765. 2, 1),
  766. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  767. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  768. 3, 1),
  769. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  770. show_pwm_auto_point_temp_hyst,
  771. store_pwm_auto_point_temp_hyst,
  772. 0, 1),
  773. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  774. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  775. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  776. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  777. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  778. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  779. }, {
  780. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  781. show_pwm_auto_point_channel,
  782. store_pwm_auto_point_channel, 0, 2),
  783. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  784. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  785. 0, 2),
  786. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  787. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  788. 1, 2),
  789. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  790. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  791. 2, 2),
  792. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  793. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  794. 3, 2),
  795. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  796. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  797. 4, 2),
  798. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  799. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  800. 0, 2),
  801. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  802. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  803. 1, 2),
  804. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  805. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  806. 2, 2),
  807. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  808. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  809. 3, 2),
  810. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  811. show_pwm_auto_point_temp_hyst,
  812. store_pwm_auto_point_temp_hyst,
  813. 0, 2),
  814. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  815. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  816. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  817. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  818. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  819. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  820. }, {
  821. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  822. show_pwm_auto_point_channel,
  823. store_pwm_auto_point_channel, 0, 3),
  824. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  825. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  826. 0, 3),
  827. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  828. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  829. 1, 3),
  830. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  831. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  832. 2, 3),
  833. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  834. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  835. 3, 3),
  836. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  837. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  838. 4, 3),
  839. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  840. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  841. 0, 3),
  842. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  843. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  844. 1, 3),
  845. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  846. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  847. 2, 3),
  848. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  849. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  850. 3, 3),
  851. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  852. show_pwm_auto_point_temp_hyst,
  853. store_pwm_auto_point_temp_hyst,
  854. 0, 3),
  855. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  856. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  857. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  858. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  859. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  860. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  861. } };
  862. /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
  863. static struct sensor_device_attribute_2 f8000_fan_attr[] = {
  864. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  865. };
  866. /* PWM attr for the f8000, zones mapped to temp instead of to pwm!
  867. Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
  868. F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0 */
  869. static struct sensor_device_attribute_2 f8000_auto_pwm_attr[] = {
  870. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  871. show_pwm_auto_point_channel,
  872. store_pwm_auto_point_channel, 0, 0),
  873. SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  874. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  875. 0, 2),
  876. SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  877. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  878. 1, 2),
  879. SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  880. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  881. 2, 2),
  882. SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  883. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  884. 3, 2),
  885. SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  886. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  887. 4, 2),
  888. SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
  889. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  890. 0, 2),
  891. SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
  892. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  893. 1, 2),
  894. SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
  895. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  896. 2, 2),
  897. SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
  898. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  899. 3, 2),
  900. SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  901. show_pwm_auto_point_temp_hyst,
  902. store_pwm_auto_point_temp_hyst,
  903. 0, 2),
  904. SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
  905. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  906. SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
  907. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  908. SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
  909. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  910. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  911. show_pwm_auto_point_channel,
  912. store_pwm_auto_point_channel, 0, 1),
  913. SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  914. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  915. 0, 0),
  916. SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  917. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  918. 1, 0),
  919. SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  920. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  921. 2, 0),
  922. SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  923. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  924. 3, 0),
  925. SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  926. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  927. 4, 0),
  928. SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
  929. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  930. 0, 0),
  931. SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
  932. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  933. 1, 0),
  934. SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
  935. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  936. 2, 0),
  937. SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
  938. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  939. 3, 0),
  940. SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  941. show_pwm_auto_point_temp_hyst,
  942. store_pwm_auto_point_temp_hyst,
  943. 0, 0),
  944. SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
  945. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  946. SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
  947. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  948. SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
  949. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  950. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  951. show_pwm_auto_point_channel,
  952. store_pwm_auto_point_channel, 0, 2),
  953. SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  954. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  955. 0, 1),
  956. SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  957. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  958. 1, 1),
  959. SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  960. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  961. 2, 1),
  962. SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  963. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  964. 3, 1),
  965. SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  966. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  967. 4, 1),
  968. SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
  969. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  970. 0, 1),
  971. SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
  972. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  973. 1, 1),
  974. SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
  975. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  976. 2, 1),
  977. SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
  978. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  979. 3, 1),
  980. SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  981. show_pwm_auto_point_temp_hyst,
  982. store_pwm_auto_point_temp_hyst,
  983. 0, 1),
  984. SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
  985. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  986. SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
  987. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  988. SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
  989. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  990. };
  991. /* Super I/O functions */
  992. static inline int superio_inb(int base, int reg)
  993. {
  994. outb(reg, base);
  995. return inb(base + 1);
  996. }
  997. static int superio_inw(int base, int reg)
  998. {
  999. int val;
  1000. val = superio_inb(base, reg) << 8;
  1001. val |= superio_inb(base, reg + 1);
  1002. return val;
  1003. }
  1004. static inline int superio_enter(int base)
  1005. {
  1006. /* Don't step on other drivers' I/O space by accident */
  1007. if (!request_muxed_region(base, 2, DRVNAME)) {
  1008. pr_err("I/O address 0x%04x already in use\n", base);
  1009. return -EBUSY;
  1010. }
  1011. /* according to the datasheet the key must be send twice! */
  1012. outb(SIO_UNLOCK_KEY, base);
  1013. outb(SIO_UNLOCK_KEY, base);
  1014. return 0;
  1015. }
  1016. static inline void superio_select(int base, int ld)
  1017. {
  1018. outb(SIO_REG_LDSEL, base);
  1019. outb(ld, base + 1);
  1020. }
  1021. static inline void superio_exit(int base)
  1022. {
  1023. outb(SIO_LOCK_KEY, base);
  1024. release_region(base, 2);
  1025. }
  1026. static inline int fan_from_reg(u16 reg)
  1027. {
  1028. return reg ? (1500000 / reg) : 0;
  1029. }
  1030. static inline u16 fan_to_reg(int fan)
  1031. {
  1032. return fan ? (1500000 / fan) : 0;
  1033. }
  1034. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  1035. {
  1036. u8 val;
  1037. outb(reg, data->addr + ADDR_REG_OFFSET);
  1038. val = inb(data->addr + DATA_REG_OFFSET);
  1039. return val;
  1040. }
  1041. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  1042. {
  1043. u16 val;
  1044. val = f71882fg_read8(data, reg) << 8;
  1045. val |= f71882fg_read8(data, reg + 1);
  1046. return val;
  1047. }
  1048. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  1049. {
  1050. outb(reg, data->addr + ADDR_REG_OFFSET);
  1051. outb(val, data->addr + DATA_REG_OFFSET);
  1052. }
  1053. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  1054. {
  1055. f71882fg_write8(data, reg, val >> 8);
  1056. f71882fg_write8(data, reg + 1, val & 0xff);
  1057. }
  1058. static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
  1059. {
  1060. if (data->type == f71858fg)
  1061. return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
  1062. else
  1063. return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
  1064. }
  1065. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  1066. {
  1067. struct f71882fg_data *data = dev_get_drvdata(dev);
  1068. int nr_fans = f71882fg_nr_fans[data->type];
  1069. int nr_temps = f71882fg_nr_temps[data->type];
  1070. int nr, reg, point;
  1071. mutex_lock(&data->update_lock);
  1072. /* Update once every 60 seconds */
  1073. if (time_after(jiffies, data->last_limits + 60 * HZ) ||
  1074. !data->valid) {
  1075. if (f71882fg_has_in1_alarm[data->type]) {
  1076. data->in1_max =
  1077. f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
  1078. data->in_beep =
  1079. f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1080. }
  1081. /* Get High & boundary temps*/
  1082. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1083. nr++) {
  1084. data->temp_ovt[nr] = f71882fg_read8(data,
  1085. F71882FG_REG_TEMP_OVT(nr));
  1086. data->temp_high[nr] = f71882fg_read8(data,
  1087. F71882FG_REG_TEMP_HIGH(nr));
  1088. }
  1089. if (data->type != f8000) {
  1090. data->temp_hyst[0] = f71882fg_read8(data,
  1091. F71882FG_REG_TEMP_HYST(0));
  1092. data->temp_hyst[1] = f71882fg_read8(data,
  1093. F71882FG_REG_TEMP_HYST(1));
  1094. }
  1095. /* All but the f71858fg / f8000 have this register */
  1096. if ((data->type != f71858fg) && (data->type != f8000)) {
  1097. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  1098. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  1099. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  1100. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  1101. }
  1102. if (f71882fg_fan_has_beep[data->type])
  1103. data->fan_beep = f71882fg_read8(data,
  1104. F71882FG_REG_FAN_BEEP);
  1105. if (f71882fg_temp_has_beep[data->type])
  1106. data->temp_beep = f71882fg_read8(data,
  1107. F71882FG_REG_TEMP_BEEP);
  1108. data->pwm_enable = f71882fg_read8(data,
  1109. F71882FG_REG_PWM_ENABLE);
  1110. data->pwm_auto_point_hyst[0] =
  1111. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  1112. data->pwm_auto_point_hyst[1] =
  1113. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  1114. for (nr = 0; nr < nr_fans; nr++) {
  1115. data->pwm_auto_point_mapping[nr] =
  1116. f71882fg_read8(data,
  1117. F71882FG_REG_POINT_MAPPING(nr));
  1118. switch (data->type) {
  1119. default:
  1120. for (point = 0; point < 5; point++) {
  1121. data->pwm_auto_point_pwm[nr][point] =
  1122. f71882fg_read8(data,
  1123. F71882FG_REG_POINT_PWM
  1124. (nr, point));
  1125. }
  1126. for (point = 0; point < 4; point++) {
  1127. data->pwm_auto_point_temp[nr][point] =
  1128. f71882fg_read8(data,
  1129. F71882FG_REG_POINT_TEMP
  1130. (nr, point));
  1131. }
  1132. break;
  1133. case f71808e:
  1134. case f71869:
  1135. data->pwm_auto_point_pwm[nr][0] =
  1136. f71882fg_read8(data,
  1137. F71882FG_REG_POINT_PWM(nr, 0));
  1138. /* Fall through */
  1139. case f71862fg:
  1140. data->pwm_auto_point_pwm[nr][1] =
  1141. f71882fg_read8(data,
  1142. F71882FG_REG_POINT_PWM
  1143. (nr, 1));
  1144. data->pwm_auto_point_pwm[nr][4] =
  1145. f71882fg_read8(data,
  1146. F71882FG_REG_POINT_PWM
  1147. (nr, 4));
  1148. data->pwm_auto_point_temp[nr][0] =
  1149. f71882fg_read8(data,
  1150. F71882FG_REG_POINT_TEMP
  1151. (nr, 0));
  1152. data->pwm_auto_point_temp[nr][3] =
  1153. f71882fg_read8(data,
  1154. F71882FG_REG_POINT_TEMP
  1155. (nr, 3));
  1156. break;
  1157. }
  1158. }
  1159. data->last_limits = jiffies;
  1160. }
  1161. /* Update every second */
  1162. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  1163. data->temp_status = f71882fg_read8(data,
  1164. F71882FG_REG_TEMP_STATUS);
  1165. data->temp_diode_open = f71882fg_read8(data,
  1166. F71882FG_REG_TEMP_DIODE_OPEN);
  1167. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1168. nr++)
  1169. data->temp[nr] = f71882fg_read_temp(data, nr);
  1170. data->fan_status = f71882fg_read8(data,
  1171. F71882FG_REG_FAN_STATUS);
  1172. for (nr = 0; nr < nr_fans; nr++) {
  1173. data->fan[nr] = f71882fg_read16(data,
  1174. F71882FG_REG_FAN(nr));
  1175. data->fan_target[nr] =
  1176. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  1177. data->fan_full_speed[nr] =
  1178. f71882fg_read16(data,
  1179. F71882FG_REG_FAN_FULL_SPEED(nr));
  1180. data->pwm[nr] =
  1181. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  1182. }
  1183. /* Some models have 1 more fan with limited capabilities */
  1184. if (data->type == f71808a) {
  1185. data->fan[2] = f71882fg_read16(data,
  1186. F71882FG_REG_FAN(2));
  1187. data->pwm[2] = f71882fg_read8(data,
  1188. F71882FG_REG_PWM(2));
  1189. }
  1190. if (data->type == f8000)
  1191. data->fan[3] = f71882fg_read16(data,
  1192. F71882FG_REG_FAN(3));
  1193. if (f71882fg_has_in1_alarm[data->type])
  1194. data->in_status = f71882fg_read8(data,
  1195. F71882FG_REG_IN_STATUS);
  1196. for (nr = 0; nr < F71882FG_MAX_INS; nr++)
  1197. if (f71882fg_has_in[data->type][nr])
  1198. data->in[nr] = f71882fg_read8(data,
  1199. F71882FG_REG_IN(nr));
  1200. data->last_updated = jiffies;
  1201. data->valid = 1;
  1202. }
  1203. mutex_unlock(&data->update_lock);
  1204. return data;
  1205. }
  1206. /* Sysfs Interface */
  1207. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  1208. char *buf)
  1209. {
  1210. struct f71882fg_data *data = f71882fg_update_device(dev);
  1211. int nr = to_sensor_dev_attr_2(devattr)->index;
  1212. int speed = fan_from_reg(data->fan[nr]);
  1213. if (speed == FAN_MIN_DETECT)
  1214. speed = 0;
  1215. return sprintf(buf, "%d\n", speed);
  1216. }
  1217. static ssize_t show_fan_full_speed(struct device *dev,
  1218. struct device_attribute *devattr, char *buf)
  1219. {
  1220. struct f71882fg_data *data = f71882fg_update_device(dev);
  1221. int nr = to_sensor_dev_attr_2(devattr)->index;
  1222. int speed = fan_from_reg(data->fan_full_speed[nr]);
  1223. return sprintf(buf, "%d\n", speed);
  1224. }
  1225. static ssize_t store_fan_full_speed(struct device *dev,
  1226. struct device_attribute *devattr,
  1227. const char *buf, size_t count)
  1228. {
  1229. struct f71882fg_data *data = dev_get_drvdata(dev);
  1230. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1231. long val;
  1232. err = strict_strtol(buf, 10, &val);
  1233. if (err)
  1234. return err;
  1235. val = SENSORS_LIMIT(val, 23, 1500000);
  1236. val = fan_to_reg(val);
  1237. mutex_lock(&data->update_lock);
  1238. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  1239. data->fan_full_speed[nr] = val;
  1240. mutex_unlock(&data->update_lock);
  1241. return count;
  1242. }
  1243. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  1244. *devattr, char *buf)
  1245. {
  1246. struct f71882fg_data *data = f71882fg_update_device(dev);
  1247. int nr = to_sensor_dev_attr_2(devattr)->index;
  1248. if (data->fan_beep & (1 << nr))
  1249. return sprintf(buf, "1\n");
  1250. else
  1251. return sprintf(buf, "0\n");
  1252. }
  1253. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  1254. *devattr, const char *buf, size_t count)
  1255. {
  1256. struct f71882fg_data *data = dev_get_drvdata(dev);
  1257. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1258. unsigned long val;
  1259. err = strict_strtoul(buf, 10, &val);
  1260. if (err)
  1261. return err;
  1262. mutex_lock(&data->update_lock);
  1263. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  1264. if (val)
  1265. data->fan_beep |= 1 << nr;
  1266. else
  1267. data->fan_beep &= ~(1 << nr);
  1268. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  1269. mutex_unlock(&data->update_lock);
  1270. return count;
  1271. }
  1272. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  1273. *devattr, char *buf)
  1274. {
  1275. struct f71882fg_data *data = f71882fg_update_device(dev);
  1276. int nr = to_sensor_dev_attr_2(devattr)->index;
  1277. if (data->fan_status & (1 << nr))
  1278. return sprintf(buf, "1\n");
  1279. else
  1280. return sprintf(buf, "0\n");
  1281. }
  1282. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  1283. char *buf)
  1284. {
  1285. struct f71882fg_data *data = f71882fg_update_device(dev);
  1286. int nr = to_sensor_dev_attr_2(devattr)->index;
  1287. return sprintf(buf, "%d\n", data->in[nr] * 8);
  1288. }
  1289. static ssize_t show_in_max(struct device *dev, struct device_attribute
  1290. *devattr, char *buf)
  1291. {
  1292. struct f71882fg_data *data = f71882fg_update_device(dev);
  1293. return sprintf(buf, "%d\n", data->in1_max * 8);
  1294. }
  1295. static ssize_t store_in_max(struct device *dev, struct device_attribute
  1296. *devattr, const char *buf, size_t count)
  1297. {
  1298. struct f71882fg_data *data = dev_get_drvdata(dev);
  1299. int err;
  1300. long val;
  1301. err = strict_strtol(buf, 10, &val);
  1302. if (err)
  1303. return err;
  1304. val /= 8;
  1305. val = SENSORS_LIMIT(val, 0, 255);
  1306. mutex_lock(&data->update_lock);
  1307. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  1308. data->in1_max = val;
  1309. mutex_unlock(&data->update_lock);
  1310. return count;
  1311. }
  1312. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  1313. *devattr, char *buf)
  1314. {
  1315. struct f71882fg_data *data = f71882fg_update_device(dev);
  1316. int nr = to_sensor_dev_attr_2(devattr)->index;
  1317. if (data->in_beep & (1 << nr))
  1318. return sprintf(buf, "1\n");
  1319. else
  1320. return sprintf(buf, "0\n");
  1321. }
  1322. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  1323. *devattr, const char *buf, size_t count)
  1324. {
  1325. struct f71882fg_data *data = dev_get_drvdata(dev);
  1326. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1327. unsigned long val;
  1328. err = strict_strtoul(buf, 10, &val);
  1329. if (err)
  1330. return err;
  1331. mutex_lock(&data->update_lock);
  1332. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1333. if (val)
  1334. data->in_beep |= 1 << nr;
  1335. else
  1336. data->in_beep &= ~(1 << nr);
  1337. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  1338. mutex_unlock(&data->update_lock);
  1339. return count;
  1340. }
  1341. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  1342. *devattr, char *buf)
  1343. {
  1344. struct f71882fg_data *data = f71882fg_update_device(dev);
  1345. int nr = to_sensor_dev_attr_2(devattr)->index;
  1346. if (data->in_status & (1 << nr))
  1347. return sprintf(buf, "1\n");
  1348. else
  1349. return sprintf(buf, "0\n");
  1350. }
  1351. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  1352. char *buf)
  1353. {
  1354. struct f71882fg_data *data = f71882fg_update_device(dev);
  1355. int nr = to_sensor_dev_attr_2(devattr)->index;
  1356. int sign, temp;
  1357. if (data->type == f71858fg) {
  1358. /* TEMP_TABLE_SEL 1 or 3 ? */
  1359. if (data->temp_config & 1) {
  1360. sign = data->temp[nr] & 0x0001;
  1361. temp = (data->temp[nr] >> 5) & 0x7ff;
  1362. } else {
  1363. sign = data->temp[nr] & 0x8000;
  1364. temp = (data->temp[nr] >> 5) & 0x3ff;
  1365. }
  1366. temp *= 125;
  1367. if (sign)
  1368. temp -= 128000;
  1369. } else
  1370. temp = data->temp[nr] * 1000;
  1371. return sprintf(buf, "%d\n", temp);
  1372. }
  1373. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  1374. *devattr, char *buf)
  1375. {
  1376. struct f71882fg_data *data = f71882fg_update_device(dev);
  1377. int nr = to_sensor_dev_attr_2(devattr)->index;
  1378. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  1379. }
  1380. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  1381. *devattr, const char *buf, size_t count)
  1382. {
  1383. struct f71882fg_data *data = dev_get_drvdata(dev);
  1384. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1385. long val;
  1386. err = strict_strtol(buf, 10, &val);
  1387. if (err)
  1388. return err;
  1389. val /= 1000;
  1390. val = SENSORS_LIMIT(val, 0, 255);
  1391. mutex_lock(&data->update_lock);
  1392. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  1393. data->temp_high[nr] = val;
  1394. mutex_unlock(&data->update_lock);
  1395. return count;
  1396. }
  1397. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  1398. *devattr, char *buf)
  1399. {
  1400. struct f71882fg_data *data = f71882fg_update_device(dev);
  1401. int nr = to_sensor_dev_attr_2(devattr)->index;
  1402. int temp_max_hyst;
  1403. mutex_lock(&data->update_lock);
  1404. if (nr & 1)
  1405. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  1406. else
  1407. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1408. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  1409. mutex_unlock(&data->update_lock);
  1410. return sprintf(buf, "%d\n", temp_max_hyst);
  1411. }
  1412. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  1413. *devattr, const char *buf, size_t count)
  1414. {
  1415. struct f71882fg_data *data = dev_get_drvdata(dev);
  1416. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1417. ssize_t ret = count;
  1418. u8 reg;
  1419. long val;
  1420. err = strict_strtol(buf, 10, &val);
  1421. if (err)
  1422. return err;
  1423. val /= 1000;
  1424. mutex_lock(&data->update_lock);
  1425. /* convert abs to relative and check */
  1426. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  1427. val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
  1428. data->temp_high[nr]);
  1429. val = data->temp_high[nr] - val;
  1430. /* convert value to register contents */
  1431. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  1432. if (nr & 1)
  1433. reg = (reg & 0x0f) | (val << 4);
  1434. else
  1435. reg = (reg & 0xf0) | val;
  1436. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  1437. data->temp_hyst[nr / 2] = reg;
  1438. mutex_unlock(&data->update_lock);
  1439. return ret;
  1440. }
  1441. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  1442. *devattr, char *buf)
  1443. {
  1444. struct f71882fg_data *data = f71882fg_update_device(dev);
  1445. int nr = to_sensor_dev_attr_2(devattr)->index;
  1446. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  1447. }
  1448. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  1449. *devattr, const char *buf, size_t count)
  1450. {
  1451. struct f71882fg_data *data = dev_get_drvdata(dev);
  1452. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1453. long val;
  1454. err = strict_strtol(buf, 10, &val);
  1455. if (err)
  1456. return err;
  1457. val /= 1000;
  1458. val = SENSORS_LIMIT(val, 0, 255);
  1459. mutex_lock(&data->update_lock);
  1460. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  1461. data->temp_ovt[nr] = val;
  1462. mutex_unlock(&data->update_lock);
  1463. return count;
  1464. }
  1465. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  1466. *devattr, char *buf)
  1467. {
  1468. struct f71882fg_data *data = f71882fg_update_device(dev);
  1469. int nr = to_sensor_dev_attr_2(devattr)->index;
  1470. int temp_crit_hyst;
  1471. mutex_lock(&data->update_lock);
  1472. if (nr & 1)
  1473. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  1474. else
  1475. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1476. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  1477. mutex_unlock(&data->update_lock);
  1478. return sprintf(buf, "%d\n", temp_crit_hyst);
  1479. }
  1480. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  1481. *devattr, char *buf)
  1482. {
  1483. struct f71882fg_data *data = f71882fg_update_device(dev);
  1484. int nr = to_sensor_dev_attr_2(devattr)->index;
  1485. return sprintf(buf, "%d\n", data->temp_type[nr]);
  1486. }
  1487. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  1488. *devattr, char *buf)
  1489. {
  1490. struct f71882fg_data *data = f71882fg_update_device(dev);
  1491. int nr = to_sensor_dev_attr_2(devattr)->index;
  1492. if (data->temp_beep & (1 << nr))
  1493. return sprintf(buf, "1\n");
  1494. else
  1495. return sprintf(buf, "0\n");
  1496. }
  1497. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  1498. *devattr, const char *buf, size_t count)
  1499. {
  1500. struct f71882fg_data *data = dev_get_drvdata(dev);
  1501. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1502. unsigned long val;
  1503. err = strict_strtoul(buf, 10, &val);
  1504. if (err)
  1505. return err;
  1506. mutex_lock(&data->update_lock);
  1507. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  1508. if (val)
  1509. data->temp_beep |= 1 << nr;
  1510. else
  1511. data->temp_beep &= ~(1 << nr);
  1512. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  1513. mutex_unlock(&data->update_lock);
  1514. return count;
  1515. }
  1516. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  1517. *devattr, char *buf)
  1518. {
  1519. struct f71882fg_data *data = f71882fg_update_device(dev);
  1520. int nr = to_sensor_dev_attr_2(devattr)->index;
  1521. if (data->temp_status & (1 << nr))
  1522. return sprintf(buf, "1\n");
  1523. else
  1524. return sprintf(buf, "0\n");
  1525. }
  1526. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  1527. *devattr, char *buf)
  1528. {
  1529. struct f71882fg_data *data = f71882fg_update_device(dev);
  1530. int nr = to_sensor_dev_attr_2(devattr)->index;
  1531. if (data->temp_diode_open & (1 << nr))
  1532. return sprintf(buf, "1\n");
  1533. else
  1534. return sprintf(buf, "0\n");
  1535. }
  1536. static ssize_t show_pwm(struct device *dev,
  1537. struct device_attribute *devattr, char *buf)
  1538. {
  1539. struct f71882fg_data *data = f71882fg_update_device(dev);
  1540. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1541. mutex_lock(&data->update_lock);
  1542. if (data->pwm_enable & (1 << (2 * nr)))
  1543. /* PWM mode */
  1544. val = data->pwm[nr];
  1545. else {
  1546. /* RPM mode */
  1547. val = 255 * fan_from_reg(data->fan_target[nr])
  1548. / fan_from_reg(data->fan_full_speed[nr]);
  1549. }
  1550. mutex_unlock(&data->update_lock);
  1551. return sprintf(buf, "%d\n", val);
  1552. }
  1553. static ssize_t store_pwm(struct device *dev,
  1554. struct device_attribute *devattr, const char *buf,
  1555. size_t count)
  1556. {
  1557. struct f71882fg_data *data = dev_get_drvdata(dev);
  1558. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1559. long val;
  1560. err = strict_strtol(buf, 10, &val);
  1561. if (err)
  1562. return err;
  1563. val = SENSORS_LIMIT(val, 0, 255);
  1564. mutex_lock(&data->update_lock);
  1565. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1566. if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
  1567. (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
  1568. count = -EROFS;
  1569. goto leave;
  1570. }
  1571. if (data->pwm_enable & (1 << (2 * nr))) {
  1572. /* PWM mode */
  1573. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1574. data->pwm[nr] = val;
  1575. } else {
  1576. /* RPM mode */
  1577. int target, full_speed;
  1578. full_speed = f71882fg_read16(data,
  1579. F71882FG_REG_FAN_FULL_SPEED(nr));
  1580. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  1581. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  1582. data->fan_target[nr] = target;
  1583. data->fan_full_speed[nr] = full_speed;
  1584. }
  1585. leave:
  1586. mutex_unlock(&data->update_lock);
  1587. return count;
  1588. }
  1589. static ssize_t show_simple_pwm(struct device *dev,
  1590. struct device_attribute *devattr, char *buf)
  1591. {
  1592. struct f71882fg_data *data = f71882fg_update_device(dev);
  1593. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1594. val = data->pwm[nr];
  1595. return sprintf(buf, "%d\n", val);
  1596. }
  1597. static ssize_t store_simple_pwm(struct device *dev,
  1598. struct device_attribute *devattr,
  1599. const char *buf, size_t count)
  1600. {
  1601. struct f71882fg_data *data = dev_get_drvdata(dev);
  1602. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1603. long val;
  1604. err = strict_strtol(buf, 10, &val);
  1605. if (err)
  1606. return err;
  1607. val = SENSORS_LIMIT(val, 0, 255);
  1608. mutex_lock(&data->update_lock);
  1609. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1610. data->pwm[nr] = val;
  1611. mutex_unlock(&data->update_lock);
  1612. return count;
  1613. }
  1614. static ssize_t show_pwm_enable(struct device *dev,
  1615. struct device_attribute *devattr, char *buf)
  1616. {
  1617. int result = 0;
  1618. struct f71882fg_data *data = f71882fg_update_device(dev);
  1619. int nr = to_sensor_dev_attr_2(devattr)->index;
  1620. switch ((data->pwm_enable >> 2 * nr) & 3) {
  1621. case 0:
  1622. case 1:
  1623. result = 2; /* Normal auto mode */
  1624. break;
  1625. case 2:
  1626. result = 1; /* Manual mode */
  1627. break;
  1628. case 3:
  1629. if (data->type == f8000)
  1630. result = 3; /* Thermostat mode */
  1631. else
  1632. result = 1; /* Manual mode */
  1633. break;
  1634. }
  1635. return sprintf(buf, "%d\n", result);
  1636. }
  1637. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1638. *devattr, const char *buf, size_t count)
  1639. {
  1640. struct f71882fg_data *data = dev_get_drvdata(dev);
  1641. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1642. long val;
  1643. err = strict_strtol(buf, 10, &val);
  1644. if (err)
  1645. return err;
  1646. /* Special case for F8000 pwm channel 3 which only does auto mode */
  1647. if (data->type == f8000 && nr == 2 && val != 2)
  1648. return -EINVAL;
  1649. mutex_lock(&data->update_lock);
  1650. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1651. /* Special case for F8000 auto PWM mode / Thermostat mode */
  1652. if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
  1653. switch (val) {
  1654. case 2:
  1655. data->pwm_enable &= ~(2 << (2 * nr));
  1656. break; /* Normal auto mode */
  1657. case 3:
  1658. data->pwm_enable |= 2 << (2 * nr);
  1659. break; /* Thermostat mode */
  1660. default:
  1661. count = -EINVAL;
  1662. goto leave;
  1663. }
  1664. } else {
  1665. switch (val) {
  1666. case 1:
  1667. /* The f71858fg does not support manual RPM mode */
  1668. if (data->type == f71858fg &&
  1669. ((data->pwm_enable >> (2 * nr)) & 1)) {
  1670. count = -EINVAL;
  1671. goto leave;
  1672. }
  1673. data->pwm_enable |= 2 << (2 * nr);
  1674. break; /* Manual */
  1675. case 2:
  1676. data->pwm_enable &= ~(2 << (2 * nr));
  1677. break; /* Normal auto mode */
  1678. default:
  1679. count = -EINVAL;
  1680. goto leave;
  1681. }
  1682. }
  1683. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1684. leave:
  1685. mutex_unlock(&data->update_lock);
  1686. return count;
  1687. }
  1688. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1689. struct device_attribute *devattr,
  1690. char *buf)
  1691. {
  1692. int result;
  1693. struct f71882fg_data *data = f71882fg_update_device(dev);
  1694. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1695. int point = to_sensor_dev_attr_2(devattr)->nr;
  1696. mutex_lock(&data->update_lock);
  1697. if (data->pwm_enable & (1 << (2 * pwm))) {
  1698. /* PWM mode */
  1699. result = data->pwm_auto_point_pwm[pwm][point];
  1700. } else {
  1701. /* RPM mode */
  1702. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1703. }
  1704. mutex_unlock(&data->update_lock);
  1705. return sprintf(buf, "%d\n", result);
  1706. }
  1707. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1708. struct device_attribute *devattr,
  1709. const char *buf, size_t count)
  1710. {
  1711. struct f71882fg_data *data = dev_get_drvdata(dev);
  1712. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1713. int point = to_sensor_dev_attr_2(devattr)->nr;
  1714. long val;
  1715. err = strict_strtol(buf, 10, &val);
  1716. if (err)
  1717. return err;
  1718. val = SENSORS_LIMIT(val, 0, 255);
  1719. mutex_lock(&data->update_lock);
  1720. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1721. if (data->pwm_enable & (1 << (2 * pwm))) {
  1722. /* PWM mode */
  1723. } else {
  1724. /* RPM mode */
  1725. if (val < 29) /* Prevent negative numbers */
  1726. val = 255;
  1727. else
  1728. val = (255 - val) * 32 / val;
  1729. }
  1730. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1731. data->pwm_auto_point_pwm[pwm][point] = val;
  1732. mutex_unlock(&data->update_lock);
  1733. return count;
  1734. }
  1735. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1736. struct device_attribute *devattr,
  1737. char *buf)
  1738. {
  1739. int result = 0;
  1740. struct f71882fg_data *data = f71882fg_update_device(dev);
  1741. int nr = to_sensor_dev_attr_2(devattr)->index;
  1742. int point = to_sensor_dev_attr_2(devattr)->nr;
  1743. mutex_lock(&data->update_lock);
  1744. if (nr & 1)
  1745. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1746. else
  1747. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1748. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1749. mutex_unlock(&data->update_lock);
  1750. return sprintf(buf, "%d\n", result);
  1751. }
  1752. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1753. struct device_attribute *devattr,
  1754. const char *buf, size_t count)
  1755. {
  1756. struct f71882fg_data *data = dev_get_drvdata(dev);
  1757. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1758. int point = to_sensor_dev_attr_2(devattr)->nr;
  1759. u8 reg;
  1760. long val;
  1761. err = strict_strtol(buf, 10, &val);
  1762. if (err)
  1763. return err;
  1764. val /= 1000;
  1765. mutex_lock(&data->update_lock);
  1766. data->pwm_auto_point_temp[nr][point] =
  1767. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1768. val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
  1769. data->pwm_auto_point_temp[nr][point]);
  1770. val = data->pwm_auto_point_temp[nr][point] - val;
  1771. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1772. if (nr & 1)
  1773. reg = (reg & 0x0f) | (val << 4);
  1774. else
  1775. reg = (reg & 0xf0) | val;
  1776. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1777. data->pwm_auto_point_hyst[nr / 2] = reg;
  1778. mutex_unlock(&data->update_lock);
  1779. return count;
  1780. }
  1781. static ssize_t show_pwm_interpolate(struct device *dev,
  1782. struct device_attribute *devattr, char *buf)
  1783. {
  1784. int result;
  1785. struct f71882fg_data *data = f71882fg_update_device(dev);
  1786. int nr = to_sensor_dev_attr_2(devattr)->index;
  1787. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1788. return sprintf(buf, "%d\n", result);
  1789. }
  1790. static ssize_t store_pwm_interpolate(struct device *dev,
  1791. struct device_attribute *devattr,
  1792. const char *buf, size_t count)
  1793. {
  1794. struct f71882fg_data *data = dev_get_drvdata(dev);
  1795. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1796. unsigned long val;
  1797. err = strict_strtoul(buf, 10, &val);
  1798. if (err)
  1799. return err;
  1800. mutex_lock(&data->update_lock);
  1801. data->pwm_auto_point_mapping[nr] =
  1802. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1803. if (val)
  1804. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1805. else
  1806. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1807. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1808. data->pwm_auto_point_mapping[nr] = val;
  1809. mutex_unlock(&data->update_lock);
  1810. return count;
  1811. }
  1812. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1813. struct device_attribute *devattr,
  1814. char *buf)
  1815. {
  1816. int result;
  1817. struct f71882fg_data *data = f71882fg_update_device(dev);
  1818. int nr = to_sensor_dev_attr_2(devattr)->index;
  1819. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
  1820. data->temp_start);
  1821. return sprintf(buf, "%d\n", result);
  1822. }
  1823. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1824. struct device_attribute *devattr,
  1825. const char *buf, size_t count)
  1826. {
  1827. struct f71882fg_data *data = dev_get_drvdata(dev);
  1828. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1829. long val;
  1830. err = strict_strtol(buf, 10, &val);
  1831. if (err)
  1832. return err;
  1833. switch (val) {
  1834. case 1:
  1835. val = 0;
  1836. break;
  1837. case 2:
  1838. val = 1;
  1839. break;
  1840. case 4:
  1841. val = 2;
  1842. break;
  1843. default:
  1844. return -EINVAL;
  1845. }
  1846. val += data->temp_start;
  1847. mutex_lock(&data->update_lock);
  1848. data->pwm_auto_point_mapping[nr] =
  1849. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1850. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1851. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1852. data->pwm_auto_point_mapping[nr] = val;
  1853. mutex_unlock(&data->update_lock);
  1854. return count;
  1855. }
  1856. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1857. struct device_attribute *devattr,
  1858. char *buf)
  1859. {
  1860. int result;
  1861. struct f71882fg_data *data = f71882fg_update_device(dev);
  1862. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1863. int point = to_sensor_dev_attr_2(devattr)->nr;
  1864. result = data->pwm_auto_point_temp[pwm][point];
  1865. return sprintf(buf, "%d\n", 1000 * result);
  1866. }
  1867. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1868. struct device_attribute *devattr,
  1869. const char *buf, size_t count)
  1870. {
  1871. struct f71882fg_data *data = dev_get_drvdata(dev);
  1872. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1873. int point = to_sensor_dev_attr_2(devattr)->nr;
  1874. long val;
  1875. err = strict_strtol(buf, 10, &val);
  1876. if (err)
  1877. return err;
  1878. val /= 1000;
  1879. if (data->auto_point_temp_signed)
  1880. val = SENSORS_LIMIT(val, -128, 127);
  1881. else
  1882. val = SENSORS_LIMIT(val, 0, 127);
  1883. mutex_lock(&data->update_lock);
  1884. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1885. data->pwm_auto_point_temp[pwm][point] = val;
  1886. mutex_unlock(&data->update_lock);
  1887. return count;
  1888. }
  1889. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  1890. char *buf)
  1891. {
  1892. struct f71882fg_data *data = dev_get_drvdata(dev);
  1893. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  1894. }
  1895. static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
  1896. struct sensor_device_attribute_2 *attr, int count)
  1897. {
  1898. int err, i;
  1899. for (i = 0; i < count; i++) {
  1900. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1901. if (err)
  1902. return err;
  1903. }
  1904. return 0;
  1905. }
  1906. static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
  1907. struct sensor_device_attribute_2 *attr, int count)
  1908. {
  1909. int i;
  1910. for (i = 0; i < count; i++)
  1911. device_remove_file(&pdev->dev, &attr[i].dev_attr);
  1912. }
  1913. static int __devinit f71882fg_probe(struct platform_device *pdev)
  1914. {
  1915. struct f71882fg_data *data;
  1916. struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
  1917. int nr_fans = f71882fg_nr_fans[sio_data->type];
  1918. int nr_temps = f71882fg_nr_temps[sio_data->type];
  1919. int err, i;
  1920. u8 start_reg, reg;
  1921. data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
  1922. if (!data)
  1923. return -ENOMEM;
  1924. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  1925. data->type = sio_data->type;
  1926. data->temp_start =
  1927. (data->type == f71858fg || data->type == f8000) ? 0 : 1;
  1928. mutex_init(&data->update_lock);
  1929. platform_set_drvdata(pdev, data);
  1930. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  1931. if (start_reg & 0x04) {
  1932. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  1933. err = -ENODEV;
  1934. goto exit_free;
  1935. }
  1936. if (!(start_reg & 0x03)) {
  1937. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  1938. err = -ENODEV;
  1939. goto exit_free;
  1940. }
  1941. /* Register sysfs interface files */
  1942. err = device_create_file(&pdev->dev, &dev_attr_name);
  1943. if (err)
  1944. goto exit_unregister_sysfs;
  1945. if (start_reg & 0x01) {
  1946. switch (data->type) {
  1947. case f71858fg:
  1948. data->temp_config =
  1949. f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
  1950. if (data->temp_config & 0x10)
  1951. /* The f71858fg temperature alarms behave as
  1952. the f8000 alarms in this mode */
  1953. err = f71882fg_create_sysfs_files(pdev,
  1954. f8000_temp_attr,
  1955. ARRAY_SIZE(f8000_temp_attr));
  1956. else
  1957. err = f71882fg_create_sysfs_files(pdev,
  1958. f71858fg_temp_attr,
  1959. ARRAY_SIZE(f71858fg_temp_attr));
  1960. break;
  1961. case f8000:
  1962. err = f71882fg_create_sysfs_files(pdev,
  1963. f8000_temp_attr,
  1964. ARRAY_SIZE(f8000_temp_attr));
  1965. break;
  1966. default:
  1967. err = f71882fg_create_sysfs_files(pdev,
  1968. &fxxxx_temp_attr[0][0],
  1969. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  1970. }
  1971. if (err)
  1972. goto exit_unregister_sysfs;
  1973. if (f71882fg_temp_has_beep[data->type]) {
  1974. err = f71882fg_create_sysfs_files(pdev,
  1975. &fxxxx_temp_beep_attr[0][0],
  1976. ARRAY_SIZE(fxxxx_temp_beep_attr[0])
  1977. * nr_temps);
  1978. if (err)
  1979. goto exit_unregister_sysfs;
  1980. }
  1981. for (i = 0; i < F71882FG_MAX_INS; i++) {
  1982. if (f71882fg_has_in[data->type][i]) {
  1983. err = device_create_file(&pdev->dev,
  1984. &fxxxx_in_attr[i].dev_attr);
  1985. if (err)
  1986. goto exit_unregister_sysfs;
  1987. }
  1988. }
  1989. if (f71882fg_has_in1_alarm[data->type]) {
  1990. err = f71882fg_create_sysfs_files(pdev,
  1991. fxxxx_in1_alarm_attr,
  1992. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  1993. if (err)
  1994. goto exit_unregister_sysfs;
  1995. }
  1996. }
  1997. if (start_reg & 0x02) {
  1998. switch (data->type) {
  1999. case f71808e:
  2000. case f71808a:
  2001. case f71869:
  2002. /* These always have signed auto point temps */
  2003. data->auto_point_temp_signed = 1;
  2004. /* Fall through to select correct fan/pwm reg bank! */
  2005. case f71889fg:
  2006. case f71889ed:
  2007. case f71889a:
  2008. reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
  2009. if (reg & F71882FG_FAN_NEG_TEMP_EN)
  2010. data->auto_point_temp_signed = 1;
  2011. /* Ensure banked pwm registers point to right bank */
  2012. reg &= ~F71882FG_FAN_PROG_SEL;
  2013. f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
  2014. break;
  2015. default:
  2016. break;
  2017. }
  2018. data->pwm_enable =
  2019. f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  2020. /* Sanity check the pwm settings */
  2021. switch (data->type) {
  2022. case f71858fg:
  2023. err = 0;
  2024. for (i = 0; i < nr_fans; i++)
  2025. if (((data->pwm_enable >> (i * 2)) & 3) == 3)
  2026. err = 1;
  2027. break;
  2028. case f71862fg:
  2029. err = (data->pwm_enable & 0x15) != 0x15;
  2030. break;
  2031. case f8000:
  2032. err = data->pwm_enable & 0x20;
  2033. break;
  2034. default:
  2035. err = 0;
  2036. break;
  2037. }
  2038. if (err) {
  2039. dev_err(&pdev->dev,
  2040. "Invalid (reserved) pwm settings: 0x%02x\n",
  2041. (unsigned int)data->pwm_enable);
  2042. err = -ENODEV;
  2043. goto exit_unregister_sysfs;
  2044. }
  2045. err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2046. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2047. if (err)
  2048. goto exit_unregister_sysfs;
  2049. if (f71882fg_fan_has_beep[data->type]) {
  2050. err = f71882fg_create_sysfs_files(pdev,
  2051. fxxxx_fan_beep_attr, nr_fans);
  2052. if (err)
  2053. goto exit_unregister_sysfs;
  2054. }
  2055. switch (data->type) {
  2056. case f71808e:
  2057. case f71808a:
  2058. case f71869:
  2059. case f71889fg:
  2060. case f71889ed:
  2061. case f71889a:
  2062. for (i = 0; i < nr_fans; i++) {
  2063. data->pwm_auto_point_mapping[i] =
  2064. f71882fg_read8(data,
  2065. F71882FG_REG_POINT_MAPPING(i));
  2066. if ((data->pwm_auto_point_mapping[i] & 0x80) ||
  2067. (data->pwm_auto_point_mapping[i] & 3) == 0)
  2068. break;
  2069. }
  2070. if (i != nr_fans) {
  2071. dev_warn(&pdev->dev,
  2072. "Auto pwm controlled by raw digital "
  2073. "data, disabling pwm auto_point "
  2074. "sysfs attributes\n");
  2075. goto no_pwm_auto_point;
  2076. }
  2077. break;
  2078. default:
  2079. break;
  2080. }
  2081. switch (data->type) {
  2082. case f71808a:
  2083. err = f71882fg_create_sysfs_files(pdev,
  2084. &fxxxx_auto_pwm_attr[0][0],
  2085. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2086. if (err)
  2087. goto exit_unregister_sysfs;
  2088. err = f71882fg_create_sysfs_files(pdev,
  2089. f71808a_fan3_attr,
  2090. ARRAY_SIZE(f71808a_fan3_attr));
  2091. break;
  2092. case f71862fg:
  2093. err = f71882fg_create_sysfs_files(pdev,
  2094. f71862fg_auto_pwm_attr,
  2095. ARRAY_SIZE(f71862fg_auto_pwm_attr));
  2096. break;
  2097. case f71808e:
  2098. case f71869:
  2099. err = f71882fg_create_sysfs_files(pdev,
  2100. f71869_auto_pwm_attr,
  2101. ARRAY_SIZE(f71869_auto_pwm_attr));
  2102. break;
  2103. case f8000:
  2104. err = f71882fg_create_sysfs_files(pdev,
  2105. f8000_fan_attr,
  2106. ARRAY_SIZE(f8000_fan_attr));
  2107. if (err)
  2108. goto exit_unregister_sysfs;
  2109. err = f71882fg_create_sysfs_files(pdev,
  2110. f8000_auto_pwm_attr,
  2111. ARRAY_SIZE(f8000_auto_pwm_attr));
  2112. break;
  2113. default:
  2114. err = f71882fg_create_sysfs_files(pdev,
  2115. &fxxxx_auto_pwm_attr[0][0],
  2116. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2117. }
  2118. if (err)
  2119. goto exit_unregister_sysfs;
  2120. no_pwm_auto_point:
  2121. for (i = 0; i < nr_fans; i++)
  2122. dev_info(&pdev->dev, "Fan: %d is in %s mode\n", i + 1,
  2123. (data->pwm_enable & (1 << 2 * i)) ?
  2124. "duty-cycle" : "RPM");
  2125. }
  2126. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  2127. if (IS_ERR(data->hwmon_dev)) {
  2128. err = PTR_ERR(data->hwmon_dev);
  2129. data->hwmon_dev = NULL;
  2130. goto exit_unregister_sysfs;
  2131. }
  2132. return 0;
  2133. exit_unregister_sysfs:
  2134. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  2135. return err; /* f71882fg_remove() also frees our data */
  2136. exit_free:
  2137. kfree(data);
  2138. return err;
  2139. }
  2140. static int f71882fg_remove(struct platform_device *pdev)
  2141. {
  2142. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2143. int nr_fans = f71882fg_nr_fans[data->type];
  2144. int nr_temps = f71882fg_nr_temps[data->type];
  2145. int i;
  2146. u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2147. if (data->hwmon_dev)
  2148. hwmon_device_unregister(data->hwmon_dev);
  2149. device_remove_file(&pdev->dev, &dev_attr_name);
  2150. if (start_reg & 0x01) {
  2151. switch (data->type) {
  2152. case f71858fg:
  2153. if (data->temp_config & 0x10)
  2154. f71882fg_remove_sysfs_files(pdev,
  2155. f8000_temp_attr,
  2156. ARRAY_SIZE(f8000_temp_attr));
  2157. else
  2158. f71882fg_remove_sysfs_files(pdev,
  2159. f71858fg_temp_attr,
  2160. ARRAY_SIZE(f71858fg_temp_attr));
  2161. break;
  2162. case f8000:
  2163. f71882fg_remove_sysfs_files(pdev,
  2164. f8000_temp_attr,
  2165. ARRAY_SIZE(f8000_temp_attr));
  2166. break;
  2167. default:
  2168. f71882fg_remove_sysfs_files(pdev,
  2169. &fxxxx_temp_attr[0][0],
  2170. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2171. }
  2172. if (f71882fg_temp_has_beep[data->type]) {
  2173. f71882fg_remove_sysfs_files(pdev,
  2174. &fxxxx_temp_beep_attr[0][0],
  2175. ARRAY_SIZE(fxxxx_temp_beep_attr[0]) * nr_temps);
  2176. }
  2177. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2178. if (f71882fg_has_in[data->type][i]) {
  2179. device_remove_file(&pdev->dev,
  2180. &fxxxx_in_attr[i].dev_attr);
  2181. }
  2182. }
  2183. if (f71882fg_has_in1_alarm[data->type]) {
  2184. f71882fg_remove_sysfs_files(pdev,
  2185. fxxxx_in1_alarm_attr,
  2186. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2187. }
  2188. }
  2189. if (start_reg & 0x02) {
  2190. f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2191. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2192. if (f71882fg_fan_has_beep[data->type]) {
  2193. f71882fg_remove_sysfs_files(pdev,
  2194. fxxxx_fan_beep_attr, nr_fans);
  2195. }
  2196. switch (data->type) {
  2197. case f71808a:
  2198. f71882fg_remove_sysfs_files(pdev,
  2199. &fxxxx_auto_pwm_attr[0][0],
  2200. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2201. f71882fg_remove_sysfs_files(pdev,
  2202. f71808a_fan3_attr,
  2203. ARRAY_SIZE(f71808a_fan3_attr));
  2204. break;
  2205. case f71862fg:
  2206. f71882fg_remove_sysfs_files(pdev,
  2207. f71862fg_auto_pwm_attr,
  2208. ARRAY_SIZE(f71862fg_auto_pwm_attr));
  2209. break;
  2210. case f71808e:
  2211. case f71869:
  2212. f71882fg_remove_sysfs_files(pdev,
  2213. f71869_auto_pwm_attr,
  2214. ARRAY_SIZE(f71869_auto_pwm_attr));
  2215. break;
  2216. case f8000:
  2217. f71882fg_remove_sysfs_files(pdev,
  2218. f8000_fan_attr,
  2219. ARRAY_SIZE(f8000_fan_attr));
  2220. f71882fg_remove_sysfs_files(pdev,
  2221. f8000_auto_pwm_attr,
  2222. ARRAY_SIZE(f8000_auto_pwm_attr));
  2223. break;
  2224. default:
  2225. f71882fg_remove_sysfs_files(pdev,
  2226. &fxxxx_auto_pwm_attr[0][0],
  2227. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2228. }
  2229. }
  2230. platform_set_drvdata(pdev, NULL);
  2231. kfree(data);
  2232. return 0;
  2233. }
  2234. static int __init f71882fg_find(int sioaddr, unsigned short *address,
  2235. struct f71882fg_sio_data *sio_data)
  2236. {
  2237. u16 devid;
  2238. int err = superio_enter(sioaddr);
  2239. if (err)
  2240. return err;
  2241. devid = superio_inw(sioaddr, SIO_REG_MANID);
  2242. if (devid != SIO_FINTEK_ID) {
  2243. pr_debug("Not a Fintek device\n");
  2244. err = -ENODEV;
  2245. goto exit;
  2246. }
  2247. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  2248. switch (devid) {
  2249. case SIO_F71808E_ID:
  2250. sio_data->type = f71808e;
  2251. break;
  2252. case SIO_F71808A_ID:
  2253. sio_data->type = f71808a;
  2254. break;
  2255. case SIO_F71858_ID:
  2256. sio_data->type = f71858fg;
  2257. break;
  2258. case SIO_F71862_ID:
  2259. sio_data->type = f71862fg;
  2260. break;
  2261. case SIO_F71869_ID:
  2262. sio_data->type = f71869;
  2263. break;
  2264. case SIO_F71882_ID:
  2265. sio_data->type = f71882fg;
  2266. break;
  2267. case SIO_F71889_ID:
  2268. sio_data->type = f71889fg;
  2269. break;
  2270. case SIO_F71889E_ID:
  2271. sio_data->type = f71889ed;
  2272. break;
  2273. case SIO_F71889A_ID:
  2274. sio_data->type = f71889a;
  2275. break;
  2276. case SIO_F8000_ID:
  2277. sio_data->type = f8000;
  2278. break;
  2279. case SIO_F81865_ID:
  2280. sio_data->type = f81865f;
  2281. break;
  2282. default:
  2283. pr_info("Unsupported Fintek device: %04x\n",
  2284. (unsigned int)devid);
  2285. err = -ENODEV;
  2286. goto exit;
  2287. }
  2288. if (sio_data->type == f71858fg)
  2289. superio_select(sioaddr, SIO_F71858FG_LD_HWM);
  2290. else
  2291. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  2292. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  2293. pr_warn("Device not activated\n");
  2294. err = -ENODEV;
  2295. goto exit;
  2296. }
  2297. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  2298. if (*address == 0) {
  2299. pr_warn("Base address not set\n");
  2300. err = -ENODEV;
  2301. goto exit;
  2302. }
  2303. *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  2304. err = 0;
  2305. pr_info("Found %s chip at %#x, revision %d\n",
  2306. f71882fg_names[sio_data->type], (unsigned int)*address,
  2307. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  2308. exit:
  2309. superio_exit(sioaddr);
  2310. return err;
  2311. }
  2312. static int __init f71882fg_device_add(unsigned short address,
  2313. const struct f71882fg_sio_data *sio_data)
  2314. {
  2315. struct resource res = {
  2316. .start = address,
  2317. .end = address + REGION_LENGTH - 1,
  2318. .flags = IORESOURCE_IO,
  2319. };
  2320. int err;
  2321. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  2322. if (!f71882fg_pdev)
  2323. return -ENOMEM;
  2324. res.name = f71882fg_pdev->name;
  2325. err = acpi_check_resource_conflict(&res);
  2326. if (err)
  2327. goto exit_device_put;
  2328. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  2329. if (err) {
  2330. pr_err("Device resource addition failed\n");
  2331. goto exit_device_put;
  2332. }
  2333. err = platform_device_add_data(f71882fg_pdev, sio_data,
  2334. sizeof(struct f71882fg_sio_data));
  2335. if (err) {
  2336. pr_err("Platform data allocation failed\n");
  2337. goto exit_device_put;
  2338. }
  2339. err = platform_device_add(f71882fg_pdev);
  2340. if (err) {
  2341. pr_err("Device addition failed\n");
  2342. goto exit_device_put;
  2343. }
  2344. return 0;
  2345. exit_device_put:
  2346. platform_device_put(f71882fg_pdev);
  2347. return err;
  2348. }
  2349. static int __init f71882fg_init(void)
  2350. {
  2351. int err = -ENODEV;
  2352. unsigned short address;
  2353. struct f71882fg_sio_data sio_data;
  2354. memset(&sio_data, 0, sizeof(sio_data));
  2355. if (f71882fg_find(0x2e, &address, &sio_data) &&
  2356. f71882fg_find(0x4e, &address, &sio_data))
  2357. goto exit;
  2358. err = platform_driver_register(&f71882fg_driver);
  2359. if (err)
  2360. goto exit;
  2361. err = f71882fg_device_add(address, &sio_data);
  2362. if (err)
  2363. goto exit_driver;
  2364. return 0;
  2365. exit_driver:
  2366. platform_driver_unregister(&f71882fg_driver);
  2367. exit:
  2368. return err;
  2369. }
  2370. static void __exit f71882fg_exit(void)
  2371. {
  2372. platform_device_unregister(f71882fg_pdev);
  2373. platform_driver_unregister(&f71882fg_driver);
  2374. }
  2375. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  2376. MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
  2377. MODULE_LICENSE("GPL");
  2378. module_init(f71882fg_init);
  2379. module_exit(f71882fg_exit);