fimc-lite.c 43 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
  5. * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/clk.h>
  14. #include <linux/device.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/kernel.h>
  18. #include <linux/list.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/types.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev2.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <media/v4l2-mem2mem.h>
  29. #include <media/videobuf2-core.h>
  30. #include <media/videobuf2-dma-contig.h>
  31. #include <media/s5p_fimc.h>
  32. #include "fimc-core.h"
  33. #include "fimc-lite.h"
  34. #include "fimc-lite-reg.h"
  35. static int debug;
  36. module_param(debug, int, 0644);
  37. static const struct fimc_fmt fimc_lite_formats[] = {
  38. {
  39. .name = "YUV 4:2:2 packed, YCbYCr",
  40. .fourcc = V4L2_PIX_FMT_YUYV,
  41. .depth = { 16 },
  42. .color = FIMC_FMT_YCBYCR422,
  43. .memplanes = 1,
  44. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  45. .flags = FMT_FLAGS_YUV,
  46. }, {
  47. .name = "YUV 4:2:2 packed, CbYCrY",
  48. .fourcc = V4L2_PIX_FMT_UYVY,
  49. .depth = { 16 },
  50. .color = FIMC_FMT_CBYCRY422,
  51. .memplanes = 1,
  52. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  53. .flags = FMT_FLAGS_YUV,
  54. }, {
  55. .name = "YUV 4:2:2 packed, CrYCbY",
  56. .fourcc = V4L2_PIX_FMT_VYUY,
  57. .depth = { 16 },
  58. .color = FIMC_FMT_CRYCBY422,
  59. .memplanes = 1,
  60. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  61. .flags = FMT_FLAGS_YUV,
  62. }, {
  63. .name = "YUV 4:2:2 packed, YCrYCb",
  64. .fourcc = V4L2_PIX_FMT_YVYU,
  65. .depth = { 16 },
  66. .color = FIMC_FMT_YCRYCB422,
  67. .memplanes = 1,
  68. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  69. .flags = FMT_FLAGS_YUV,
  70. }, {
  71. .name = "RAW8 (GRBG)",
  72. .fourcc = V4L2_PIX_FMT_SGRBG8,
  73. .depth = { 8 },
  74. .color = FIMC_FMT_RAW8,
  75. .memplanes = 1,
  76. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  77. .flags = FMT_FLAGS_RAW_BAYER,
  78. }, {
  79. .name = "RAW10 (GRBG)",
  80. .fourcc = V4L2_PIX_FMT_SGRBG10,
  81. .depth = { 10 },
  82. .color = FIMC_FMT_RAW10,
  83. .memplanes = 1,
  84. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  85. .flags = FMT_FLAGS_RAW_BAYER,
  86. }, {
  87. .name = "RAW12 (GRBG)",
  88. .fourcc = V4L2_PIX_FMT_SGRBG12,
  89. .depth = { 12 },
  90. .color = FIMC_FMT_RAW12,
  91. .memplanes = 1,
  92. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  93. .flags = FMT_FLAGS_RAW_BAYER,
  94. },
  95. };
  96. /**
  97. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  98. * @pixelformat: fourcc to match, ignored if null
  99. * @mbus_code: media bus code to match, ignored if null
  100. * @mask: the color format flags to match
  101. * @index: index to the fimc_lite_formats array, ignored if negative
  102. */
  103. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  104. const u32 *mbus_code, unsigned int mask, int index)
  105. {
  106. const struct fimc_fmt *fmt, *def_fmt = NULL;
  107. unsigned int i;
  108. int id = 0;
  109. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  110. return NULL;
  111. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  112. fmt = &fimc_lite_formats[i];
  113. if (mask && !(fmt->flags & mask))
  114. continue;
  115. if (pixelformat && fmt->fourcc == *pixelformat)
  116. return fmt;
  117. if (mbus_code && fmt->mbus_code == *mbus_code)
  118. return fmt;
  119. if (index == id)
  120. def_fmt = fmt;
  121. id++;
  122. }
  123. return def_fmt;
  124. }
  125. /* Called with the media graph mutex held or @me stream_count > 0. */
  126. static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
  127. {
  128. struct media_pad *pad = &me->pads[0];
  129. struct v4l2_subdev *sd;
  130. while (pad->flags & MEDIA_PAD_FL_SINK) {
  131. /* source pad */
  132. pad = media_entity_remote_pad(pad);
  133. if (pad == NULL ||
  134. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  135. break;
  136. sd = media_entity_to_v4l2_subdev(pad->entity);
  137. if (sd->grp_id == GRP_ID_FIMC_IS_SENSOR ||
  138. sd->grp_id == GRP_ID_SENSOR)
  139. return sd;
  140. /* sink pad */
  141. pad = &sd->entity.pads[0];
  142. }
  143. return NULL;
  144. }
  145. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  146. {
  147. struct fimc_source_info *si;
  148. unsigned long flags;
  149. if (fimc->sensor == NULL)
  150. return -ENXIO;
  151. if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
  152. return -EINVAL;
  153. /* Get sensor configuration data from the sensor subdev */
  154. si = v4l2_get_subdev_hostdata(fimc->sensor);
  155. if (!si)
  156. return -EINVAL;
  157. spin_lock_irqsave(&fimc->slock, flags);
  158. flite_hw_set_camera_bus(fimc, si);
  159. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  160. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  161. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  162. flite_hw_set_interrupt_mask(fimc);
  163. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  164. if (debug > 0)
  165. flite_hw_dump_regs(fimc, __func__);
  166. spin_unlock_irqrestore(&fimc->slock, flags);
  167. return 0;
  168. }
  169. /*
  170. * Reinitialize the driver so it is ready to start the streaming again.
  171. * Set fimc->state to indicate stream off and the hardware shut down state.
  172. * If not suspending (@suspend is false), return any buffers to videobuf2.
  173. * Otherwise put any owned buffers onto the pending buffers queue, so they
  174. * can be re-spun when the device is being resumed. Also perform FIMC
  175. * software reset and disable streaming on the whole pipeline if required.
  176. */
  177. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  178. {
  179. struct flite_buffer *buf;
  180. unsigned long flags;
  181. bool streaming;
  182. spin_lock_irqsave(&fimc->slock, flags);
  183. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  184. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  185. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  186. if (suspend)
  187. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  188. else
  189. fimc->state &= ~(1 << ST_FLITE_PENDING |
  190. 1 << ST_FLITE_SUSPENDED);
  191. /* Release unused buffers */
  192. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  193. buf = fimc_lite_pending_queue_pop(fimc);
  194. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  195. }
  196. /* If suspending put unused buffers onto pending queue */
  197. while (!list_empty(&fimc->active_buf_q)) {
  198. buf = fimc_lite_active_queue_pop(fimc);
  199. if (suspend)
  200. fimc_lite_pending_queue_add(fimc, buf);
  201. else
  202. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  203. }
  204. spin_unlock_irqrestore(&fimc->slock, flags);
  205. flite_hw_reset(fimc);
  206. if (!streaming)
  207. return 0;
  208. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  209. }
  210. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  211. {
  212. unsigned long flags;
  213. if (!fimc_lite_active(fimc))
  214. return 0;
  215. spin_lock_irqsave(&fimc->slock, flags);
  216. set_bit(ST_FLITE_OFF, &fimc->state);
  217. flite_hw_capture_stop(fimc);
  218. spin_unlock_irqrestore(&fimc->slock, flags);
  219. wait_event_timeout(fimc->irq_queue,
  220. !test_bit(ST_FLITE_OFF, &fimc->state),
  221. (2*HZ/10)); /* 200 ms */
  222. return fimc_lite_reinit(fimc, suspend);
  223. }
  224. /* Must be called with fimc.slock spinlock held. */
  225. static void fimc_lite_config_update(struct fimc_lite *fimc)
  226. {
  227. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  228. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  229. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  230. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  231. }
  232. static irqreturn_t flite_irq_handler(int irq, void *priv)
  233. {
  234. struct fimc_lite *fimc = priv;
  235. struct flite_buffer *vbuf;
  236. unsigned long flags;
  237. struct timeval *tv;
  238. struct timespec ts;
  239. u32 intsrc;
  240. spin_lock_irqsave(&fimc->slock, flags);
  241. intsrc = flite_hw_get_interrupt_source(fimc);
  242. flite_hw_clear_pending_irq(fimc);
  243. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  244. wake_up(&fimc->irq_queue);
  245. goto done;
  246. }
  247. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  248. clear_bit(ST_FLITE_RUN, &fimc->state);
  249. fimc->events.data_overflow++;
  250. }
  251. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  252. flite_hw_clear_last_capture_end(fimc);
  253. clear_bit(ST_FLITE_STREAM, &fimc->state);
  254. wake_up(&fimc->irq_queue);
  255. }
  256. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  257. goto done;
  258. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  259. test_bit(ST_FLITE_RUN, &fimc->state) &&
  260. !list_empty(&fimc->active_buf_q) &&
  261. !list_empty(&fimc->pending_buf_q)) {
  262. vbuf = fimc_lite_active_queue_pop(fimc);
  263. ktime_get_ts(&ts);
  264. tv = &vbuf->vb.v4l2_buf.timestamp;
  265. tv->tv_sec = ts.tv_sec;
  266. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  267. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  268. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  269. vbuf = fimc_lite_pending_queue_pop(fimc);
  270. flite_hw_set_output_addr(fimc, vbuf->paddr);
  271. fimc_lite_active_queue_add(fimc, vbuf);
  272. }
  273. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  274. fimc_lite_config_update(fimc);
  275. if (list_empty(&fimc->pending_buf_q)) {
  276. flite_hw_capture_stop(fimc);
  277. clear_bit(ST_FLITE_STREAM, &fimc->state);
  278. }
  279. done:
  280. set_bit(ST_FLITE_RUN, &fimc->state);
  281. spin_unlock_irqrestore(&fimc->slock, flags);
  282. return IRQ_HANDLED;
  283. }
  284. static int start_streaming(struct vb2_queue *q, unsigned int count)
  285. {
  286. struct fimc_lite *fimc = q->drv_priv;
  287. int ret;
  288. fimc->frame_count = 0;
  289. ret = fimc_lite_hw_init(fimc, false);
  290. if (ret) {
  291. fimc_lite_reinit(fimc, false);
  292. return ret;
  293. }
  294. set_bit(ST_FLITE_PENDING, &fimc->state);
  295. if (!list_empty(&fimc->active_buf_q) &&
  296. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  297. flite_hw_capture_start(fimc);
  298. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  299. fimc_pipeline_call(fimc, set_stream,
  300. &fimc->pipeline, 1);
  301. }
  302. if (debug > 0)
  303. flite_hw_dump_regs(fimc, __func__);
  304. return 0;
  305. }
  306. static int stop_streaming(struct vb2_queue *q)
  307. {
  308. struct fimc_lite *fimc = q->drv_priv;
  309. if (!fimc_lite_active(fimc))
  310. return -EINVAL;
  311. return fimc_lite_stop_capture(fimc, false);
  312. }
  313. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  314. unsigned int *num_buffers, unsigned int *num_planes,
  315. unsigned int sizes[], void *allocators[])
  316. {
  317. const struct v4l2_pix_format_mplane *pixm = NULL;
  318. struct fimc_lite *fimc = vq->drv_priv;
  319. struct flite_frame *frame = &fimc->out_frame;
  320. const struct fimc_fmt *fmt = frame->fmt;
  321. unsigned long wh;
  322. int i;
  323. if (pfmt) {
  324. pixm = &pfmt->fmt.pix_mp;
  325. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
  326. wh = pixm->width * pixm->height;
  327. } else {
  328. wh = frame->f_width * frame->f_height;
  329. }
  330. if (fmt == NULL)
  331. return -EINVAL;
  332. *num_planes = fmt->memplanes;
  333. for (i = 0; i < fmt->memplanes; i++) {
  334. unsigned int size = (wh * fmt->depth[i]) / 8;
  335. if (pixm)
  336. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  337. else
  338. sizes[i] = size;
  339. allocators[i] = fimc->alloc_ctx;
  340. }
  341. return 0;
  342. }
  343. static int buffer_prepare(struct vb2_buffer *vb)
  344. {
  345. struct vb2_queue *vq = vb->vb2_queue;
  346. struct fimc_lite *fimc = vq->drv_priv;
  347. int i;
  348. if (fimc->out_frame.fmt == NULL)
  349. return -EINVAL;
  350. for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
  351. unsigned long size = fimc->payload[i];
  352. if (vb2_plane_size(vb, i) < size) {
  353. v4l2_err(&fimc->vfd,
  354. "User buffer too small (%ld < %ld)\n",
  355. vb2_plane_size(vb, i), size);
  356. return -EINVAL;
  357. }
  358. vb2_set_plane_payload(vb, i, size);
  359. }
  360. return 0;
  361. }
  362. static void buffer_queue(struct vb2_buffer *vb)
  363. {
  364. struct flite_buffer *buf
  365. = container_of(vb, struct flite_buffer, vb);
  366. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  367. unsigned long flags;
  368. spin_lock_irqsave(&fimc->slock, flags);
  369. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  370. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  371. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  372. list_empty(&fimc->active_buf_q)) {
  373. flite_hw_set_output_addr(fimc, buf->paddr);
  374. fimc_lite_active_queue_add(fimc, buf);
  375. } else {
  376. fimc_lite_pending_queue_add(fimc, buf);
  377. }
  378. if (vb2_is_streaming(&fimc->vb_queue) &&
  379. !list_empty(&fimc->pending_buf_q) &&
  380. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  381. flite_hw_capture_start(fimc);
  382. spin_unlock_irqrestore(&fimc->slock, flags);
  383. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  384. fimc_pipeline_call(fimc, set_stream,
  385. &fimc->pipeline, 1);
  386. return;
  387. }
  388. spin_unlock_irqrestore(&fimc->slock, flags);
  389. }
  390. static const struct vb2_ops fimc_lite_qops = {
  391. .queue_setup = queue_setup,
  392. .buf_prepare = buffer_prepare,
  393. .buf_queue = buffer_queue,
  394. .wait_prepare = vb2_ops_wait_prepare,
  395. .wait_finish = vb2_ops_wait_finish,
  396. .start_streaming = start_streaming,
  397. .stop_streaming = stop_streaming,
  398. };
  399. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  400. {
  401. unsigned long flags;
  402. spin_lock_irqsave(&fimc->slock, flags);
  403. memset(&fimc->events, 0, sizeof(fimc->events));
  404. spin_unlock_irqrestore(&fimc->slock, flags);
  405. }
  406. static int fimc_lite_open(struct file *file)
  407. {
  408. struct fimc_lite *fimc = video_drvdata(file);
  409. struct media_entity *me = &fimc->vfd.entity;
  410. int ret;
  411. mutex_lock(&me->parent->graph_mutex);
  412. mutex_lock(&fimc->lock);
  413. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  414. ret = -EBUSY;
  415. goto unlock;
  416. }
  417. set_bit(ST_FLITE_IN_USE, &fimc->state);
  418. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  419. if (ret < 0)
  420. goto unlock;
  421. ret = v4l2_fh_open(file);
  422. if (ret < 0)
  423. goto err_pm;
  424. if (!v4l2_fh_is_singular_file(file) ||
  425. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  426. goto unlock;
  427. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  428. me, true);
  429. if (!ret) {
  430. fimc_lite_clear_event_counters(fimc);
  431. fimc->ref_count++;
  432. goto unlock;
  433. }
  434. v4l2_fh_release(file);
  435. err_pm:
  436. pm_runtime_put_sync(&fimc->pdev->dev);
  437. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  438. unlock:
  439. mutex_unlock(&fimc->lock);
  440. mutex_unlock(&me->parent->graph_mutex);
  441. return ret;
  442. }
  443. static int fimc_lite_release(struct file *file)
  444. {
  445. struct fimc_lite *fimc = video_drvdata(file);
  446. mutex_lock(&fimc->lock);
  447. if (v4l2_fh_is_singular_file(file) &&
  448. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  449. if (fimc->streaming) {
  450. media_entity_pipeline_stop(&fimc->vfd.entity);
  451. fimc->streaming = false;
  452. }
  453. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  454. fimc_lite_stop_capture(fimc, false);
  455. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  456. fimc->ref_count--;
  457. }
  458. vb2_fop_release(file);
  459. pm_runtime_put(&fimc->pdev->dev);
  460. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  461. mutex_unlock(&fimc->lock);
  462. return 0;
  463. }
  464. static const struct v4l2_file_operations fimc_lite_fops = {
  465. .owner = THIS_MODULE,
  466. .open = fimc_lite_open,
  467. .release = fimc_lite_release,
  468. .poll = vb2_fop_poll,
  469. .unlocked_ioctl = video_ioctl2,
  470. .mmap = vb2_fop_mmap,
  471. };
  472. /*
  473. * Format and crop negotiation helpers
  474. */
  475. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  476. u32 *width, u32 *height,
  477. u32 *code, u32 *fourcc, int pad)
  478. {
  479. struct flite_drvdata *dd = fimc->dd;
  480. const struct fimc_fmt *fmt;
  481. unsigned int flags = 0;
  482. if (pad == FLITE_SD_PAD_SINK) {
  483. v4l_bound_align_image(width, 8, dd->max_width,
  484. ffs(dd->out_width_align) - 1,
  485. height, 0, dd->max_height, 0, 0);
  486. } else {
  487. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  488. ffs(dd->out_width_align) - 1,
  489. height, 0, fimc->inp_frame.rect.height,
  490. 0, 0);
  491. flags = fimc->inp_frame.fmt->flags;
  492. }
  493. fmt = fimc_lite_find_format(fourcc, code, flags, 0);
  494. if (WARN_ON(!fmt))
  495. return NULL;
  496. if (code)
  497. *code = fmt->mbus_code;
  498. if (fourcc)
  499. *fourcc = fmt->fourcc;
  500. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  501. code ? *code : 0, *width, *height);
  502. return fmt;
  503. }
  504. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  505. {
  506. struct flite_frame *frame = &fimc->inp_frame;
  507. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  508. &r->height, 0, frame->f_height, 0, 0);
  509. /* Adjust left/top if cropping rectangle got out of bounds */
  510. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  511. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  512. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  513. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  514. r->left, r->top, r->width, r->height,
  515. frame->f_width, frame->f_height);
  516. }
  517. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  518. {
  519. struct flite_frame *frame = &fimc->out_frame;
  520. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  521. /* Scaling is not supported so we enforce compose rectangle size
  522. same as size of the sink crop rectangle. */
  523. r->width = crop_rect->width;
  524. r->height = crop_rect->height;
  525. /* Adjust left/top if the composing rectangle got out of bounds */
  526. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  527. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  528. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  529. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  530. r->left, r->top, r->width, r->height,
  531. frame->f_width, frame->f_height);
  532. }
  533. /*
  534. * Video node ioctl operations
  535. */
  536. static int fimc_lite_querycap(struct file *file, void *priv,
  537. struct v4l2_capability *cap)
  538. {
  539. struct fimc_lite *fimc = video_drvdata(file);
  540. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  541. strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
  542. snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
  543. dev_name(&fimc->pdev->dev));
  544. cap->device_caps = V4L2_CAP_STREAMING;
  545. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  546. return 0;
  547. }
  548. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  549. struct v4l2_fmtdesc *f)
  550. {
  551. const struct fimc_fmt *fmt;
  552. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  553. return -EINVAL;
  554. fmt = &fimc_lite_formats[f->index];
  555. strlcpy(f->description, fmt->name, sizeof(f->description));
  556. f->pixelformat = fmt->fourcc;
  557. return 0;
  558. }
  559. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  560. struct v4l2_format *f)
  561. {
  562. struct fimc_lite *fimc = video_drvdata(file);
  563. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  564. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  565. struct flite_frame *frame = &fimc->out_frame;
  566. const struct fimc_fmt *fmt = frame->fmt;
  567. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  568. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  569. pixm->num_planes = fmt->memplanes;
  570. pixm->pixelformat = fmt->fourcc;
  571. pixm->width = frame->f_width;
  572. pixm->height = frame->f_height;
  573. pixm->field = V4L2_FIELD_NONE;
  574. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  575. return 0;
  576. }
  577. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  578. struct v4l2_pix_format_mplane *pixm,
  579. const struct fimc_fmt **ffmt)
  580. {
  581. u32 bpl = pixm->plane_fmt[0].bytesperline;
  582. struct flite_drvdata *dd = fimc->dd;
  583. const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
  584. const struct fimc_fmt *fmt;
  585. if (WARN_ON(inp_fmt == NULL))
  586. return -EINVAL;
  587. /*
  588. * We allow some flexibility only for YUV formats. In case of raw
  589. * raw Bayer the FIMC-LITE's output format must match its camera
  590. * interface input format.
  591. */
  592. if (inp_fmt->flags & FMT_FLAGS_YUV)
  593. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
  594. inp_fmt->flags, 0);
  595. else
  596. fmt = inp_fmt;
  597. if (WARN_ON(fmt == NULL))
  598. return -EINVAL;
  599. if (ffmt)
  600. *ffmt = fmt;
  601. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  602. ffs(dd->out_width_align) - 1,
  603. &pixm->height, 0, dd->max_height, 0, 0);
  604. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  605. pixm->plane_fmt[0].bytesperline = (pixm->width *
  606. fmt->depth[0]) / 8;
  607. if (pixm->plane_fmt[0].sizeimage == 0)
  608. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  609. fmt->depth[0]) / 8;
  610. pixm->num_planes = fmt->memplanes;
  611. pixm->pixelformat = fmt->fourcc;
  612. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  613. pixm->field = V4L2_FIELD_NONE;
  614. return 0;
  615. }
  616. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  617. struct v4l2_format *f)
  618. {
  619. struct fimc_lite *fimc = video_drvdata(file);
  620. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  621. }
  622. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  623. struct v4l2_format *f)
  624. {
  625. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  626. struct fimc_lite *fimc = video_drvdata(file);
  627. struct flite_frame *frame = &fimc->out_frame;
  628. const struct fimc_fmt *fmt = NULL;
  629. int ret;
  630. if (vb2_is_busy(&fimc->vb_queue))
  631. return -EBUSY;
  632. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  633. if (ret < 0)
  634. return ret;
  635. frame->fmt = fmt;
  636. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  637. pixm->plane_fmt[0].sizeimage);
  638. frame->f_width = pixm->width;
  639. frame->f_height = pixm->height;
  640. return 0;
  641. }
  642. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  643. {
  644. struct v4l2_subdev *sd = &fimc->subdev;
  645. struct v4l2_subdev_format sink_fmt, src_fmt;
  646. struct media_pad *pad;
  647. int ret;
  648. while (1) {
  649. /* Retrieve format at the sink pad */
  650. pad = &sd->entity.pads[0];
  651. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  652. break;
  653. /* Don't call FIMC subdev operation to avoid nested locking */
  654. if (sd == &fimc->subdev) {
  655. struct flite_frame *ff = &fimc->out_frame;
  656. sink_fmt.format.width = ff->f_width;
  657. sink_fmt.format.height = ff->f_height;
  658. sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
  659. } else {
  660. sink_fmt.pad = pad->index;
  661. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  662. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  663. &sink_fmt);
  664. if (ret < 0 && ret != -ENOIOCTLCMD)
  665. return -EPIPE;
  666. }
  667. /* Retrieve format at the source pad */
  668. pad = media_entity_remote_pad(pad);
  669. if (pad == NULL ||
  670. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  671. break;
  672. sd = media_entity_to_v4l2_subdev(pad->entity);
  673. src_fmt.pad = pad->index;
  674. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  675. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  676. if (ret < 0 && ret != -ENOIOCTLCMD)
  677. return -EPIPE;
  678. if (src_fmt.format.width != sink_fmt.format.width ||
  679. src_fmt.format.height != sink_fmt.format.height ||
  680. src_fmt.format.code != sink_fmt.format.code)
  681. return -EPIPE;
  682. }
  683. return 0;
  684. }
  685. static int fimc_lite_streamon(struct file *file, void *priv,
  686. enum v4l2_buf_type type)
  687. {
  688. struct fimc_lite *fimc = video_drvdata(file);
  689. struct media_entity *entity = &fimc->vfd.entity;
  690. struct fimc_pipeline *p = &fimc->pipeline;
  691. int ret;
  692. if (fimc_lite_active(fimc))
  693. return -EBUSY;
  694. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  695. if (ret < 0)
  696. return ret;
  697. ret = fimc_pipeline_validate(fimc);
  698. if (ret < 0)
  699. goto err_p_stop;
  700. fimc->sensor = __find_remote_sensor(&fimc->subdev.entity);
  701. ret = vb2_ioctl_streamon(file, priv, type);
  702. if (!ret) {
  703. fimc->streaming = true;
  704. return ret;
  705. }
  706. err_p_stop:
  707. media_entity_pipeline_stop(entity);
  708. return 0;
  709. }
  710. static int fimc_lite_streamoff(struct file *file, void *priv,
  711. enum v4l2_buf_type type)
  712. {
  713. struct fimc_lite *fimc = video_drvdata(file);
  714. int ret;
  715. ret = vb2_ioctl_streamoff(file, priv, type);
  716. if (ret < 0)
  717. return ret;
  718. media_entity_pipeline_stop(&fimc->vfd.entity);
  719. fimc->streaming = false;
  720. return 0;
  721. }
  722. static int fimc_lite_reqbufs(struct file *file, void *priv,
  723. struct v4l2_requestbuffers *reqbufs)
  724. {
  725. struct fimc_lite *fimc = video_drvdata(file);
  726. int ret;
  727. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  728. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  729. if (!ret)
  730. fimc->reqbufs_count = reqbufs->count;
  731. return ret;
  732. }
  733. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  734. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  735. {
  736. if (a->left < b->left || a->top < b->top)
  737. return 0;
  738. if (a->left + a->width > b->left + b->width)
  739. return 0;
  740. if (a->top + a->height > b->top + b->height)
  741. return 0;
  742. return 1;
  743. }
  744. static int fimc_lite_g_selection(struct file *file, void *fh,
  745. struct v4l2_selection *sel)
  746. {
  747. struct fimc_lite *fimc = video_drvdata(file);
  748. struct flite_frame *f = &fimc->out_frame;
  749. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  750. return -EINVAL;
  751. switch (sel->target) {
  752. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  753. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  754. sel->r.left = 0;
  755. sel->r.top = 0;
  756. sel->r.width = f->f_width;
  757. sel->r.height = f->f_height;
  758. return 0;
  759. case V4L2_SEL_TGT_COMPOSE:
  760. sel->r = f->rect;
  761. return 0;
  762. }
  763. return -EINVAL;
  764. }
  765. static int fimc_lite_s_selection(struct file *file, void *fh,
  766. struct v4l2_selection *sel)
  767. {
  768. struct fimc_lite *fimc = video_drvdata(file);
  769. struct flite_frame *f = &fimc->out_frame;
  770. struct v4l2_rect rect = sel->r;
  771. unsigned long flags;
  772. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  773. sel->target != V4L2_SEL_TGT_COMPOSE)
  774. return -EINVAL;
  775. fimc_lite_try_compose(fimc, &rect);
  776. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  777. !enclosed_rectangle(&rect, &sel->r))
  778. return -ERANGE;
  779. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  780. !enclosed_rectangle(&sel->r, &rect))
  781. return -ERANGE;
  782. sel->r = rect;
  783. spin_lock_irqsave(&fimc->slock, flags);
  784. f->rect = rect;
  785. set_bit(ST_FLITE_CONFIG, &fimc->state);
  786. spin_unlock_irqrestore(&fimc->slock, flags);
  787. return 0;
  788. }
  789. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  790. .vidioc_querycap = fimc_lite_querycap,
  791. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  792. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  793. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  794. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  795. .vidioc_g_selection = fimc_lite_g_selection,
  796. .vidioc_s_selection = fimc_lite_s_selection,
  797. .vidioc_reqbufs = fimc_lite_reqbufs,
  798. .vidioc_querybuf = vb2_ioctl_querybuf,
  799. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  800. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  801. .vidioc_qbuf = vb2_ioctl_qbuf,
  802. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  803. .vidioc_streamon = fimc_lite_streamon,
  804. .vidioc_streamoff = fimc_lite_streamoff,
  805. };
  806. /* Capture subdev media entity operations */
  807. static int fimc_lite_link_setup(struct media_entity *entity,
  808. const struct media_pad *local,
  809. const struct media_pad *remote, u32 flags)
  810. {
  811. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  812. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  813. unsigned int remote_ent_type = media_entity_type(remote->entity);
  814. int ret = 0;
  815. if (WARN_ON(fimc == NULL))
  816. return 0;
  817. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  818. __func__, remote->entity->name, local->entity->name,
  819. flags, fimc->source_subdev_grp_id);
  820. mutex_lock(&fimc->lock);
  821. switch (local->index) {
  822. case FLITE_SD_PAD_SINK:
  823. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
  824. ret = -EINVAL;
  825. break;
  826. }
  827. if (flags & MEDIA_LNK_FL_ENABLED) {
  828. if (fimc->source_subdev_grp_id == 0)
  829. fimc->source_subdev_grp_id = sd->grp_id;
  830. else
  831. ret = -EBUSY;
  832. } else {
  833. fimc->source_subdev_grp_id = 0;
  834. fimc->sensor = NULL;
  835. }
  836. break;
  837. case FLITE_SD_PAD_SOURCE_DMA:
  838. if (!(flags & MEDIA_LNK_FL_ENABLED))
  839. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  840. else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
  841. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  842. else
  843. ret = -EINVAL;
  844. break;
  845. case FLITE_SD_PAD_SOURCE_ISP:
  846. if (!(flags & MEDIA_LNK_FL_ENABLED))
  847. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  848. else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  849. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  850. else
  851. ret = -EINVAL;
  852. break;
  853. default:
  854. v4l2_err(sd, "Invalid pad index\n");
  855. ret = -EINVAL;
  856. }
  857. mb();
  858. mutex_unlock(&fimc->lock);
  859. return ret;
  860. }
  861. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  862. .link_setup = fimc_lite_link_setup,
  863. };
  864. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  865. struct v4l2_subdev_fh *fh,
  866. struct v4l2_subdev_mbus_code_enum *code)
  867. {
  868. const struct fimc_fmt *fmt;
  869. fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
  870. if (!fmt)
  871. return -EINVAL;
  872. code->code = fmt->mbus_code;
  873. return 0;
  874. }
  875. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  876. struct v4l2_subdev_fh *fh,
  877. struct v4l2_subdev_format *fmt)
  878. {
  879. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  880. struct v4l2_mbus_framefmt *mf = &fmt->format;
  881. struct flite_frame *f = &fimc->inp_frame;
  882. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  883. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  884. fmt->format = *mf;
  885. return 0;
  886. }
  887. mf->colorspace = V4L2_COLORSPACE_JPEG;
  888. mutex_lock(&fimc->lock);
  889. mf->code = f->fmt->mbus_code;
  890. if (fmt->pad == FLITE_SD_PAD_SINK) {
  891. /* full camera input frame size */
  892. mf->width = f->f_width;
  893. mf->height = f->f_height;
  894. } else {
  895. /* crop size */
  896. mf->width = f->rect.width;
  897. mf->height = f->rect.height;
  898. }
  899. mutex_unlock(&fimc->lock);
  900. return 0;
  901. }
  902. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  903. struct v4l2_subdev_fh *fh,
  904. struct v4l2_subdev_format *fmt)
  905. {
  906. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  907. struct v4l2_mbus_framefmt *mf = &fmt->format;
  908. struct flite_frame *sink = &fimc->inp_frame;
  909. struct flite_frame *source = &fimc->out_frame;
  910. const struct fimc_fmt *ffmt;
  911. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  912. fmt->pad, mf->code, mf->width, mf->height);
  913. mf->colorspace = V4L2_COLORSPACE_JPEG;
  914. mutex_lock(&fimc->lock);
  915. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  916. sd->entity.stream_count > 0) ||
  917. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  918. vb2_is_busy(&fimc->vb_queue))) {
  919. mutex_unlock(&fimc->lock);
  920. return -EBUSY;
  921. }
  922. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  923. &mf->code, NULL, fmt->pad);
  924. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  925. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  926. *mf = fmt->format;
  927. mutex_unlock(&fimc->lock);
  928. return 0;
  929. }
  930. if (fmt->pad == FLITE_SD_PAD_SINK) {
  931. sink->f_width = mf->width;
  932. sink->f_height = mf->height;
  933. sink->fmt = ffmt;
  934. /* Set sink crop rectangle */
  935. sink->rect.width = mf->width;
  936. sink->rect.height = mf->height;
  937. sink->rect.left = 0;
  938. sink->rect.top = 0;
  939. /* Reset source format and crop rectangle */
  940. source->rect = sink->rect;
  941. source->f_width = mf->width;
  942. source->f_height = mf->height;
  943. } else {
  944. /* Allow changing format only on sink pad */
  945. mf->code = sink->fmt->mbus_code;
  946. mf->width = sink->rect.width;
  947. mf->height = sink->rect.height;
  948. }
  949. mutex_unlock(&fimc->lock);
  950. return 0;
  951. }
  952. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  953. struct v4l2_subdev_fh *fh,
  954. struct v4l2_subdev_selection *sel)
  955. {
  956. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  957. struct flite_frame *f = &fimc->inp_frame;
  958. if ((sel->target != V4L2_SEL_TGT_CROP &&
  959. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  960. sel->pad != FLITE_SD_PAD_SINK)
  961. return -EINVAL;
  962. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  963. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  964. return 0;
  965. }
  966. mutex_lock(&fimc->lock);
  967. if (sel->target == V4L2_SEL_TGT_CROP) {
  968. sel->r = f->rect;
  969. } else {
  970. sel->r.left = 0;
  971. sel->r.top = 0;
  972. sel->r.width = f->f_width;
  973. sel->r.height = f->f_height;
  974. }
  975. mutex_unlock(&fimc->lock);
  976. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  977. __func__, f->rect.left, f->rect.top, f->rect.width,
  978. f->rect.height, f->f_width, f->f_height);
  979. return 0;
  980. }
  981. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  982. struct v4l2_subdev_fh *fh,
  983. struct v4l2_subdev_selection *sel)
  984. {
  985. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  986. struct flite_frame *f = &fimc->inp_frame;
  987. int ret = 0;
  988. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  989. return -EINVAL;
  990. mutex_lock(&fimc->lock);
  991. fimc_lite_try_crop(fimc, &sel->r);
  992. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  993. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  994. } else {
  995. unsigned long flags;
  996. spin_lock_irqsave(&fimc->slock, flags);
  997. f->rect = sel->r;
  998. /* Same crop rectangle on the source pad */
  999. fimc->out_frame.rect = sel->r;
  1000. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1001. spin_unlock_irqrestore(&fimc->slock, flags);
  1002. }
  1003. mutex_unlock(&fimc->lock);
  1004. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  1005. __func__, f->rect.left, f->rect.top, f->rect.width,
  1006. f->rect.height, f->f_width, f->f_height);
  1007. return ret;
  1008. }
  1009. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  1010. {
  1011. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1012. unsigned long flags;
  1013. int ret;
  1014. /*
  1015. * Find sensor subdev linked to FIMC-LITE directly or through
  1016. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  1017. * is used as a subdev only and feeds data internally to FIMC-IS.
  1018. * The pipeline links are protected through entity.stream_count
  1019. * so there is no need to take the media graph mutex here.
  1020. */
  1021. fimc->sensor = __find_remote_sensor(&sd->entity);
  1022. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  1023. return -ENOIOCTLCMD;
  1024. mutex_lock(&fimc->lock);
  1025. if (on) {
  1026. flite_hw_reset(fimc);
  1027. ret = fimc_lite_hw_init(fimc, true);
  1028. if (!ret) {
  1029. spin_lock_irqsave(&fimc->slock, flags);
  1030. flite_hw_capture_start(fimc);
  1031. spin_unlock_irqrestore(&fimc->slock, flags);
  1032. }
  1033. } else {
  1034. set_bit(ST_FLITE_OFF, &fimc->state);
  1035. spin_lock_irqsave(&fimc->slock, flags);
  1036. flite_hw_capture_stop(fimc);
  1037. spin_unlock_irqrestore(&fimc->slock, flags);
  1038. ret = wait_event_timeout(fimc->irq_queue,
  1039. !test_bit(ST_FLITE_OFF, &fimc->state),
  1040. msecs_to_jiffies(200));
  1041. if (ret == 0)
  1042. v4l2_err(sd, "s_stream(0) timeout\n");
  1043. clear_bit(ST_FLITE_RUN, &fimc->state);
  1044. }
  1045. mutex_unlock(&fimc->lock);
  1046. return ret;
  1047. }
  1048. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1049. {
  1050. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1051. flite_hw_dump_regs(fimc, __func__);
  1052. return 0;
  1053. }
  1054. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1055. {
  1056. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1057. struct vb2_queue *q = &fimc->vb_queue;
  1058. struct video_device *vfd = &fimc->vfd;
  1059. int ret;
  1060. memset(vfd, 0, sizeof(*vfd));
  1061. fimc->inp_frame.fmt = &fimc_lite_formats[0];
  1062. fimc->out_frame.fmt = &fimc_lite_formats[0];
  1063. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1064. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1065. fimc->index);
  1066. vfd->fops = &fimc_lite_fops;
  1067. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1068. vfd->v4l2_dev = sd->v4l2_dev;
  1069. vfd->minor = -1;
  1070. vfd->release = video_device_release_empty;
  1071. vfd->queue = q;
  1072. fimc->reqbufs_count = 0;
  1073. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1074. INIT_LIST_HEAD(&fimc->active_buf_q);
  1075. memset(q, 0, sizeof(*q));
  1076. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1077. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1078. q->ops = &fimc_lite_qops;
  1079. q->mem_ops = &vb2_dma_contig_memops;
  1080. q->buf_struct_size = sizeof(struct flite_buffer);
  1081. q->drv_priv = fimc;
  1082. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1083. q->lock = &fimc->lock;
  1084. ret = vb2_queue_init(q);
  1085. if (ret < 0)
  1086. return ret;
  1087. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1088. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1089. if (ret < 0)
  1090. return ret;
  1091. video_set_drvdata(vfd, fimc);
  1092. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1093. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1094. if (ret < 0) {
  1095. media_entity_cleanup(&vfd->entity);
  1096. fimc->pipeline_ops = NULL;
  1097. return ret;
  1098. }
  1099. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1100. vfd->name, video_device_node_name(vfd));
  1101. return 0;
  1102. }
  1103. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1104. {
  1105. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1106. if (fimc == NULL)
  1107. return;
  1108. if (video_is_registered(&fimc->vfd)) {
  1109. video_unregister_device(&fimc->vfd);
  1110. media_entity_cleanup(&fimc->vfd.entity);
  1111. fimc->pipeline_ops = NULL;
  1112. }
  1113. }
  1114. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1115. .registered = fimc_lite_subdev_registered,
  1116. .unregistered = fimc_lite_subdev_unregistered,
  1117. };
  1118. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1119. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1120. .get_selection = fimc_lite_subdev_get_selection,
  1121. .set_selection = fimc_lite_subdev_set_selection,
  1122. .get_fmt = fimc_lite_subdev_get_fmt,
  1123. .set_fmt = fimc_lite_subdev_set_fmt,
  1124. };
  1125. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1126. .s_stream = fimc_lite_subdev_s_stream,
  1127. };
  1128. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1129. .log_status = fimc_lite_log_status,
  1130. };
  1131. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1132. .core = &fimc_lite_core_ops,
  1133. .video = &fimc_lite_subdev_video_ops,
  1134. .pad = &fimc_lite_subdev_pad_ops,
  1135. };
  1136. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1137. {
  1138. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1139. ctrl_handler);
  1140. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1141. return 0;
  1142. }
  1143. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1144. .s_ctrl = fimc_lite_s_ctrl,
  1145. };
  1146. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1147. .ops = &fimc_lite_ctrl_ops,
  1148. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1149. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1150. .name = "Test Pattern 640x480",
  1151. .step = 1,
  1152. };
  1153. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1154. {
  1155. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1156. struct v4l2_subdev *sd = &fimc->subdev;
  1157. int ret;
  1158. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1159. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1160. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1161. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1162. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1163. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1164. ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
  1165. fimc->subdev_pads, 0);
  1166. if (ret)
  1167. return ret;
  1168. v4l2_ctrl_handler_init(handler, 1);
  1169. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1170. NULL);
  1171. if (handler->error) {
  1172. media_entity_cleanup(&sd->entity);
  1173. return handler->error;
  1174. }
  1175. sd->ctrl_handler = handler;
  1176. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1177. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1178. sd->owner = THIS_MODULE;
  1179. v4l2_set_subdevdata(sd, fimc);
  1180. return 0;
  1181. }
  1182. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1183. {
  1184. struct v4l2_subdev *sd = &fimc->subdev;
  1185. v4l2_device_unregister_subdev(sd);
  1186. media_entity_cleanup(&sd->entity);
  1187. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1188. v4l2_set_subdevdata(sd, NULL);
  1189. }
  1190. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1191. {
  1192. if (IS_ERR(fimc->clock))
  1193. return;
  1194. clk_unprepare(fimc->clock);
  1195. clk_put(fimc->clock);
  1196. fimc->clock = ERR_PTR(-EINVAL);
  1197. }
  1198. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1199. {
  1200. int ret;
  1201. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1202. if (IS_ERR(fimc->clock))
  1203. return PTR_ERR(fimc->clock);
  1204. ret = clk_prepare(fimc->clock);
  1205. if (ret < 0) {
  1206. clk_put(fimc->clock);
  1207. fimc->clock = ERR_PTR(-EINVAL);
  1208. }
  1209. return ret;
  1210. }
  1211. static const struct of_device_id flite_of_match[];
  1212. static int fimc_lite_probe(struct platform_device *pdev)
  1213. {
  1214. struct flite_drvdata *drv_data = NULL;
  1215. struct device *dev = &pdev->dev;
  1216. const struct of_device_id *of_id;
  1217. struct fimc_lite *fimc;
  1218. struct resource *res;
  1219. int ret;
  1220. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1221. if (!fimc)
  1222. return -ENOMEM;
  1223. if (dev->of_node) {
  1224. of_id = of_match_node(flite_of_match, dev->of_node);
  1225. if (of_id)
  1226. drv_data = (struct flite_drvdata *)of_id->data;
  1227. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1228. } else {
  1229. drv_data = fimc_lite_get_drvdata(pdev);
  1230. fimc->index = pdev->id;
  1231. }
  1232. if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
  1233. return -EINVAL;
  1234. fimc->dd = drv_data;
  1235. fimc->pdev = pdev;
  1236. init_waitqueue_head(&fimc->irq_queue);
  1237. spin_lock_init(&fimc->slock);
  1238. mutex_init(&fimc->lock);
  1239. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1240. fimc->regs = devm_ioremap_resource(dev, res);
  1241. if (IS_ERR(fimc->regs))
  1242. return PTR_ERR(fimc->regs);
  1243. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1244. if (res == NULL) {
  1245. dev_err(dev, "Failed to get IRQ resource\n");
  1246. return -ENXIO;
  1247. }
  1248. ret = fimc_lite_clk_get(fimc);
  1249. if (ret)
  1250. return ret;
  1251. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1252. 0, dev_name(dev), fimc);
  1253. if (ret) {
  1254. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1255. goto err_clk;
  1256. }
  1257. /* The video node will be created within the subdev's registered() op */
  1258. ret = fimc_lite_create_capture_subdev(fimc);
  1259. if (ret)
  1260. goto err_clk;
  1261. platform_set_drvdata(pdev, fimc);
  1262. pm_runtime_enable(dev);
  1263. ret = pm_runtime_get_sync(dev);
  1264. if (ret < 0)
  1265. goto err_sd;
  1266. fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1267. if (IS_ERR(fimc->alloc_ctx)) {
  1268. ret = PTR_ERR(fimc->alloc_ctx);
  1269. goto err_pm;
  1270. }
  1271. pm_runtime_put(dev);
  1272. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1273. fimc->index);
  1274. return 0;
  1275. err_pm:
  1276. pm_runtime_put(dev);
  1277. err_sd:
  1278. fimc_lite_unregister_capture_subdev(fimc);
  1279. err_clk:
  1280. fimc_lite_clk_put(fimc);
  1281. return ret;
  1282. }
  1283. static int fimc_lite_runtime_resume(struct device *dev)
  1284. {
  1285. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1286. clk_enable(fimc->clock);
  1287. return 0;
  1288. }
  1289. static int fimc_lite_runtime_suspend(struct device *dev)
  1290. {
  1291. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1292. clk_disable(fimc->clock);
  1293. return 0;
  1294. }
  1295. #ifdef CONFIG_PM_SLEEP
  1296. static int fimc_lite_resume(struct device *dev)
  1297. {
  1298. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1299. struct flite_buffer *buf;
  1300. unsigned long flags;
  1301. int i;
  1302. spin_lock_irqsave(&fimc->slock, flags);
  1303. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1304. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1305. spin_unlock_irqrestore(&fimc->slock, flags);
  1306. return 0;
  1307. }
  1308. flite_hw_reset(fimc);
  1309. spin_unlock_irqrestore(&fimc->slock, flags);
  1310. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1311. return 0;
  1312. INIT_LIST_HEAD(&fimc->active_buf_q);
  1313. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1314. &fimc->vfd.entity, false);
  1315. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1316. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1317. for (i = 0; i < fimc->reqbufs_count; i++) {
  1318. if (list_empty(&fimc->pending_buf_q))
  1319. break;
  1320. buf = fimc_lite_pending_queue_pop(fimc);
  1321. buffer_queue(&buf->vb);
  1322. }
  1323. return 0;
  1324. }
  1325. static int fimc_lite_suspend(struct device *dev)
  1326. {
  1327. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1328. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1329. int ret;
  1330. if (test_and_set_bit(ST_LPM, &fimc->state))
  1331. return 0;
  1332. ret = fimc_lite_stop_capture(fimc, suspend);
  1333. if (ret < 0 || !fimc_lite_active(fimc))
  1334. return ret;
  1335. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1336. }
  1337. #endif /* CONFIG_PM_SLEEP */
  1338. static int fimc_lite_remove(struct platform_device *pdev)
  1339. {
  1340. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1341. struct device *dev = &pdev->dev;
  1342. pm_runtime_disable(dev);
  1343. pm_runtime_set_suspended(dev);
  1344. fimc_lite_unregister_capture_subdev(fimc);
  1345. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1346. fimc_lite_clk_put(fimc);
  1347. dev_info(dev, "Driver unloaded\n");
  1348. return 0;
  1349. }
  1350. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1351. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1352. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1353. NULL)
  1354. };
  1355. /* EXYNOS4212, EXYNOS4412 */
  1356. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1357. .max_width = 8192,
  1358. .max_height = 8192,
  1359. .out_width_align = 8,
  1360. .win_hor_offs_align = 2,
  1361. .out_hor_offs_align = 8,
  1362. };
  1363. static const struct of_device_id flite_of_match[] = {
  1364. {
  1365. .compatible = "samsung,exynos4212-fimc-lite",
  1366. .data = &fimc_lite_drvdata_exynos4,
  1367. },
  1368. { /* sentinel */ },
  1369. };
  1370. MODULE_DEVICE_TABLE(of, flite_of_match);
  1371. static struct platform_driver fimc_lite_driver = {
  1372. .probe = fimc_lite_probe,
  1373. .remove = fimc_lite_remove,
  1374. .driver = {
  1375. .of_match_table = flite_of_match,
  1376. .name = FIMC_LITE_DRV_NAME,
  1377. .owner = THIS_MODULE,
  1378. .pm = &fimc_lite_pm_ops,
  1379. }
  1380. };
  1381. module_platform_driver(fimc_lite_driver);
  1382. MODULE_LICENSE("GPL");
  1383. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);