events.c 20 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <asm/ptrace.h>
  30. #include <asm/irq.h>
  31. #include <asm/idle.h>
  32. #include <asm/sync_bitops.h>
  33. #include <asm/xen/hypercall.h>
  34. #include <asm/xen/hypervisor.h>
  35. #include <xen/xen-ops.h>
  36. #include <xen/events.h>
  37. #include <xen/interface/xen.h>
  38. #include <xen/interface/event_channel.h>
  39. /*
  40. * This lock protects updates to the following mapping and reference-count
  41. * arrays. The lock does not need to be acquired to read the mapping tables.
  42. */
  43. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  44. /* IRQ <-> VIRQ mapping. */
  45. static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
  46. /* IRQ <-> IPI mapping */
  47. static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1};
  48. /* Packed IRQ information: binding type, sub-type index, and event channel. */
  49. struct packed_irq
  50. {
  51. unsigned short evtchn;
  52. unsigned char index;
  53. unsigned char type;
  54. };
  55. static struct packed_irq irq_info[NR_IRQS];
  56. /* Binding types. */
  57. enum {
  58. IRQT_UNBOUND,
  59. IRQT_PIRQ,
  60. IRQT_VIRQ,
  61. IRQT_IPI,
  62. IRQT_EVTCHN
  63. };
  64. /* Convenient shorthand for packed representation of an unbound IRQ. */
  65. #define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0)
  66. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  67. [0 ... NR_EVENT_CHANNELS-1] = -1
  68. };
  69. struct cpu_evtchn_s {
  70. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  71. };
  72. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  73. static inline unsigned long *cpu_evtchn_mask(int cpu)
  74. {
  75. return cpu_evtchn_mask_p[cpu].bits;
  76. }
  77. static u8 cpu_evtchn[NR_EVENT_CHANNELS];
  78. /* Reference counts for bindings to IRQs. */
  79. static int irq_bindcount[NR_IRQS];
  80. /* Xen will never allocate port zero for any purpose. */
  81. #define VALID_EVTCHN(chn) ((chn) != 0)
  82. static struct irq_chip xen_dynamic_chip;
  83. /* Constructor for packed IRQ information. */
  84. static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn)
  85. {
  86. return (struct packed_irq) { evtchn, index, type };
  87. }
  88. /*
  89. * Accessors for packed IRQ information.
  90. */
  91. static inline unsigned int evtchn_from_irq(int irq)
  92. {
  93. return irq_info[irq].evtchn;
  94. }
  95. static inline unsigned int index_from_irq(int irq)
  96. {
  97. return irq_info[irq].index;
  98. }
  99. static inline unsigned int type_from_irq(int irq)
  100. {
  101. return irq_info[irq].type;
  102. }
  103. static inline unsigned long active_evtchns(unsigned int cpu,
  104. struct shared_info *sh,
  105. unsigned int idx)
  106. {
  107. return (sh->evtchn_pending[idx] &
  108. cpu_evtchn_mask(cpu)[idx] &
  109. ~sh->evtchn_mask[idx]);
  110. }
  111. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  112. {
  113. int irq = evtchn_to_irq[chn];
  114. BUG_ON(irq == -1);
  115. #ifdef CONFIG_SMP
  116. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  117. #endif
  118. __clear_bit(chn, cpu_evtchn_mask(cpu_evtchn[chn]));
  119. __set_bit(chn, cpu_evtchn_mask(cpu));
  120. cpu_evtchn[chn] = cpu;
  121. }
  122. static void init_evtchn_cpu_bindings(void)
  123. {
  124. #ifdef CONFIG_SMP
  125. struct irq_desc *desc;
  126. int i;
  127. /* By default all event channels notify CPU#0. */
  128. for_each_irq_desc(i, desc) {
  129. cpumask_copy(desc->affinity, cpumask_of(0));
  130. }
  131. #endif
  132. memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
  133. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  134. }
  135. static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
  136. {
  137. return cpu_evtchn[evtchn];
  138. }
  139. static inline void clear_evtchn(int port)
  140. {
  141. struct shared_info *s = HYPERVISOR_shared_info;
  142. sync_clear_bit(port, &s->evtchn_pending[0]);
  143. }
  144. static inline void set_evtchn(int port)
  145. {
  146. struct shared_info *s = HYPERVISOR_shared_info;
  147. sync_set_bit(port, &s->evtchn_pending[0]);
  148. }
  149. static inline int test_evtchn(int port)
  150. {
  151. struct shared_info *s = HYPERVISOR_shared_info;
  152. return sync_test_bit(port, &s->evtchn_pending[0]);
  153. }
  154. /**
  155. * notify_remote_via_irq - send event to remote end of event channel via irq
  156. * @irq: irq of event channel to send event to
  157. *
  158. * Unlike notify_remote_via_evtchn(), this is safe to use across
  159. * save/restore. Notifications on a broken connection are silently
  160. * dropped.
  161. */
  162. void notify_remote_via_irq(int irq)
  163. {
  164. int evtchn = evtchn_from_irq(irq);
  165. if (VALID_EVTCHN(evtchn))
  166. notify_remote_via_evtchn(evtchn);
  167. }
  168. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  169. static void mask_evtchn(int port)
  170. {
  171. struct shared_info *s = HYPERVISOR_shared_info;
  172. sync_set_bit(port, &s->evtchn_mask[0]);
  173. }
  174. static void unmask_evtchn(int port)
  175. {
  176. struct shared_info *s = HYPERVISOR_shared_info;
  177. unsigned int cpu = get_cpu();
  178. BUG_ON(!irqs_disabled());
  179. /* Slow path (hypercall) if this is a non-local port. */
  180. if (unlikely(cpu != cpu_from_evtchn(port))) {
  181. struct evtchn_unmask unmask = { .port = port };
  182. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  183. } else {
  184. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  185. sync_clear_bit(port, &s->evtchn_mask[0]);
  186. /*
  187. * The following is basically the equivalent of
  188. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  189. * the interrupt edge' if the channel is masked.
  190. */
  191. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  192. !sync_test_and_set_bit(port / BITS_PER_LONG,
  193. &vcpu_info->evtchn_pending_sel))
  194. vcpu_info->evtchn_upcall_pending = 1;
  195. }
  196. put_cpu();
  197. }
  198. static int find_unbound_irq(void)
  199. {
  200. int irq;
  201. struct irq_desc *desc;
  202. /* Only allocate from dynirq range */
  203. for (irq = 0; irq < nr_irqs; irq++)
  204. if (irq_bindcount[irq] == 0)
  205. break;
  206. if (irq == nr_irqs)
  207. panic("No available IRQ to bind to: increase nr_irqs!\n");
  208. desc = irq_to_desc_alloc_cpu(irq, 0);
  209. if (WARN_ON(desc == NULL))
  210. return -1;
  211. return irq;
  212. }
  213. int bind_evtchn_to_irq(unsigned int evtchn)
  214. {
  215. int irq;
  216. spin_lock(&irq_mapping_update_lock);
  217. irq = evtchn_to_irq[evtchn];
  218. if (irq == -1) {
  219. irq = find_unbound_irq();
  220. dynamic_irq_init(irq);
  221. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  222. handle_level_irq, "event");
  223. evtchn_to_irq[evtchn] = irq;
  224. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  225. }
  226. irq_bindcount[irq]++;
  227. spin_unlock(&irq_mapping_update_lock);
  228. return irq;
  229. }
  230. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  231. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  232. {
  233. struct evtchn_bind_ipi bind_ipi;
  234. int evtchn, irq;
  235. spin_lock(&irq_mapping_update_lock);
  236. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  237. if (irq == -1) {
  238. irq = find_unbound_irq();
  239. if (irq < 0)
  240. goto out;
  241. dynamic_irq_init(irq);
  242. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  243. handle_level_irq, "ipi");
  244. bind_ipi.vcpu = cpu;
  245. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  246. &bind_ipi) != 0)
  247. BUG();
  248. evtchn = bind_ipi.port;
  249. evtchn_to_irq[evtchn] = irq;
  250. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  251. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  252. bind_evtchn_to_cpu(evtchn, cpu);
  253. }
  254. irq_bindcount[irq]++;
  255. out:
  256. spin_unlock(&irq_mapping_update_lock);
  257. return irq;
  258. }
  259. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  260. {
  261. struct evtchn_bind_virq bind_virq;
  262. int evtchn, irq;
  263. spin_lock(&irq_mapping_update_lock);
  264. irq = per_cpu(virq_to_irq, cpu)[virq];
  265. if (irq == -1) {
  266. bind_virq.virq = virq;
  267. bind_virq.vcpu = cpu;
  268. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  269. &bind_virq) != 0)
  270. BUG();
  271. evtchn = bind_virq.port;
  272. irq = find_unbound_irq();
  273. dynamic_irq_init(irq);
  274. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  275. handle_level_irq, "virq");
  276. evtchn_to_irq[evtchn] = irq;
  277. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  278. per_cpu(virq_to_irq, cpu)[virq] = irq;
  279. bind_evtchn_to_cpu(evtchn, cpu);
  280. }
  281. irq_bindcount[irq]++;
  282. spin_unlock(&irq_mapping_update_lock);
  283. return irq;
  284. }
  285. static void unbind_from_irq(unsigned int irq)
  286. {
  287. struct evtchn_close close;
  288. int evtchn = evtchn_from_irq(irq);
  289. spin_lock(&irq_mapping_update_lock);
  290. if ((--irq_bindcount[irq] == 0) && VALID_EVTCHN(evtchn)) {
  291. close.port = evtchn;
  292. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  293. BUG();
  294. switch (type_from_irq(irq)) {
  295. case IRQT_VIRQ:
  296. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  297. [index_from_irq(irq)] = -1;
  298. break;
  299. case IRQT_IPI:
  300. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  301. [index_from_irq(irq)] = -1;
  302. break;
  303. default:
  304. break;
  305. }
  306. /* Closed ports are implicitly re-bound to VCPU0. */
  307. bind_evtchn_to_cpu(evtchn, 0);
  308. evtchn_to_irq[evtchn] = -1;
  309. irq_info[irq] = IRQ_UNBOUND;
  310. dynamic_irq_cleanup(irq);
  311. }
  312. spin_unlock(&irq_mapping_update_lock);
  313. }
  314. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  315. irq_handler_t handler,
  316. unsigned long irqflags,
  317. const char *devname, void *dev_id)
  318. {
  319. unsigned int irq;
  320. int retval;
  321. irq = bind_evtchn_to_irq(evtchn);
  322. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  323. if (retval != 0) {
  324. unbind_from_irq(irq);
  325. return retval;
  326. }
  327. return irq;
  328. }
  329. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  330. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  331. irq_handler_t handler,
  332. unsigned long irqflags, const char *devname, void *dev_id)
  333. {
  334. unsigned int irq;
  335. int retval;
  336. irq = bind_virq_to_irq(virq, cpu);
  337. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  338. if (retval != 0) {
  339. unbind_from_irq(irq);
  340. return retval;
  341. }
  342. return irq;
  343. }
  344. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  345. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  346. unsigned int cpu,
  347. irq_handler_t handler,
  348. unsigned long irqflags,
  349. const char *devname,
  350. void *dev_id)
  351. {
  352. int irq, retval;
  353. irq = bind_ipi_to_irq(ipi, cpu);
  354. if (irq < 0)
  355. return irq;
  356. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  357. if (retval != 0) {
  358. unbind_from_irq(irq);
  359. return retval;
  360. }
  361. return irq;
  362. }
  363. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  364. {
  365. free_irq(irq, dev_id);
  366. unbind_from_irq(irq);
  367. }
  368. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  369. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  370. {
  371. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  372. BUG_ON(irq < 0);
  373. notify_remote_via_irq(irq);
  374. }
  375. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  376. {
  377. struct shared_info *sh = HYPERVISOR_shared_info;
  378. int cpu = smp_processor_id();
  379. int i;
  380. unsigned long flags;
  381. static DEFINE_SPINLOCK(debug_lock);
  382. spin_lock_irqsave(&debug_lock, flags);
  383. printk("vcpu %d\n ", cpu);
  384. for_each_online_cpu(i) {
  385. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  386. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  387. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  388. v->evtchn_upcall_pending,
  389. v->evtchn_pending_sel);
  390. }
  391. printk("pending:\n ");
  392. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  393. printk("%08lx%s", sh->evtchn_pending[i],
  394. i % 8 == 0 ? "\n " : " ");
  395. printk("\nmasks:\n ");
  396. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  397. printk("%08lx%s", sh->evtchn_mask[i],
  398. i % 8 == 0 ? "\n " : " ");
  399. printk("\nunmasked:\n ");
  400. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  401. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  402. i % 8 == 0 ? "\n " : " ");
  403. printk("\npending list:\n");
  404. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  405. if (sync_test_bit(i, sh->evtchn_pending)) {
  406. printk(" %d: event %d -> irq %d\n",
  407. cpu_evtchn[i], i,
  408. evtchn_to_irq[i]);
  409. }
  410. }
  411. spin_unlock_irqrestore(&debug_lock, flags);
  412. return IRQ_HANDLED;
  413. }
  414. static void xen_do_irq(unsigned irq, struct pt_regs *regs)
  415. {
  416. struct pt_regs *old_regs = set_irq_regs(regs);
  417. if (WARN_ON(irq == -1))
  418. return;
  419. exit_idle();
  420. irq_enter();
  421. //printk("cpu %d handling irq %d\n", smp_processor_id(), info->irq);
  422. handle_irq(irq, regs);
  423. irq_exit();
  424. set_irq_regs(old_regs);
  425. }
  426. /*
  427. * Search the CPUs pending events bitmasks. For each one found, map
  428. * the event number to an irq, and feed it into do_IRQ() for
  429. * handling.
  430. *
  431. * Xen uses a two-level bitmap to speed searching. The first level is
  432. * a bitset of words which contain pending event bits. The second
  433. * level is a bitset of pending events themselves.
  434. */
  435. void xen_evtchn_do_upcall(struct pt_regs *regs)
  436. {
  437. int cpu = get_cpu();
  438. struct shared_info *s = HYPERVISOR_shared_info;
  439. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  440. static DEFINE_PER_CPU(unsigned, nesting_count);
  441. unsigned count;
  442. do {
  443. unsigned long pending_words;
  444. vcpu_info->evtchn_upcall_pending = 0;
  445. if (__get_cpu_var(nesting_count)++)
  446. goto out;
  447. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  448. /* Clear master flag /before/ clearing selector flag. */
  449. wmb();
  450. #endif
  451. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  452. while (pending_words != 0) {
  453. unsigned long pending_bits;
  454. int word_idx = __ffs(pending_words);
  455. pending_words &= ~(1UL << word_idx);
  456. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  457. int bit_idx = __ffs(pending_bits);
  458. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  459. int irq = evtchn_to_irq[port];
  460. xen_do_irq(irq, regs);
  461. }
  462. }
  463. BUG_ON(!irqs_disabled());
  464. count = __get_cpu_var(nesting_count);
  465. __get_cpu_var(nesting_count) = 0;
  466. } while(count != 1);
  467. out:
  468. put_cpu();
  469. }
  470. /* Rebind a new event channel to an existing irq. */
  471. void rebind_evtchn_irq(int evtchn, int irq)
  472. {
  473. /* Make sure the irq is masked, since the new event channel
  474. will also be masked. */
  475. disable_irq(irq);
  476. spin_lock(&irq_mapping_update_lock);
  477. /* After resume the irq<->evtchn mappings are all cleared out */
  478. BUG_ON(evtchn_to_irq[evtchn] != -1);
  479. /* Expect irq to have been bound before,
  480. so the bindcount should be non-0 */
  481. BUG_ON(irq_bindcount[irq] == 0);
  482. evtchn_to_irq[evtchn] = irq;
  483. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  484. spin_unlock(&irq_mapping_update_lock);
  485. /* new event channels are always bound to cpu 0 */
  486. irq_set_affinity(irq, cpumask_of(0));
  487. /* Unmask the event channel. */
  488. enable_irq(irq);
  489. }
  490. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  491. static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  492. {
  493. struct evtchn_bind_vcpu bind_vcpu;
  494. int evtchn = evtchn_from_irq(irq);
  495. if (!VALID_EVTCHN(evtchn))
  496. return;
  497. /* Send future instances of this interrupt to other vcpu. */
  498. bind_vcpu.port = evtchn;
  499. bind_vcpu.vcpu = tcpu;
  500. /*
  501. * If this fails, it usually just indicates that we're dealing with a
  502. * virq or IPI channel, which don't actually need to be rebound. Ignore
  503. * it, but don't do the xenlinux-level rebind in that case.
  504. */
  505. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  506. bind_evtchn_to_cpu(evtchn, tcpu);
  507. }
  508. static void set_affinity_irq(unsigned irq, const struct cpumask *dest)
  509. {
  510. unsigned tcpu = cpumask_first(dest);
  511. rebind_irq_to_cpu(irq, tcpu);
  512. }
  513. int resend_irq_on_evtchn(unsigned int irq)
  514. {
  515. int masked, evtchn = evtchn_from_irq(irq);
  516. struct shared_info *s = HYPERVISOR_shared_info;
  517. if (!VALID_EVTCHN(evtchn))
  518. return 1;
  519. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  520. sync_set_bit(evtchn, s->evtchn_pending);
  521. if (!masked)
  522. unmask_evtchn(evtchn);
  523. return 1;
  524. }
  525. static void enable_dynirq(unsigned int irq)
  526. {
  527. int evtchn = evtchn_from_irq(irq);
  528. if (VALID_EVTCHN(evtchn))
  529. unmask_evtchn(evtchn);
  530. }
  531. static void disable_dynirq(unsigned int irq)
  532. {
  533. int evtchn = evtchn_from_irq(irq);
  534. if (VALID_EVTCHN(evtchn))
  535. mask_evtchn(evtchn);
  536. }
  537. static void ack_dynirq(unsigned int irq)
  538. {
  539. int evtchn = evtchn_from_irq(irq);
  540. move_native_irq(irq);
  541. if (VALID_EVTCHN(evtchn))
  542. clear_evtchn(evtchn);
  543. }
  544. static int retrigger_dynirq(unsigned int irq)
  545. {
  546. int evtchn = evtchn_from_irq(irq);
  547. struct shared_info *sh = HYPERVISOR_shared_info;
  548. int ret = 0;
  549. if (VALID_EVTCHN(evtchn)) {
  550. int masked;
  551. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  552. sync_set_bit(evtchn, sh->evtchn_pending);
  553. if (!masked)
  554. unmask_evtchn(evtchn);
  555. ret = 1;
  556. }
  557. return ret;
  558. }
  559. static void restore_cpu_virqs(unsigned int cpu)
  560. {
  561. struct evtchn_bind_virq bind_virq;
  562. int virq, irq, evtchn;
  563. for (virq = 0; virq < NR_VIRQS; virq++) {
  564. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  565. continue;
  566. BUG_ON(irq_info[irq].type != IRQT_VIRQ);
  567. BUG_ON(irq_info[irq].index != virq);
  568. /* Get a new binding from Xen. */
  569. bind_virq.virq = virq;
  570. bind_virq.vcpu = cpu;
  571. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  572. &bind_virq) != 0)
  573. BUG();
  574. evtchn = bind_virq.port;
  575. /* Record the new mapping. */
  576. evtchn_to_irq[evtchn] = irq;
  577. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  578. bind_evtchn_to_cpu(evtchn, cpu);
  579. /* Ready for use. */
  580. unmask_evtchn(evtchn);
  581. }
  582. }
  583. static void restore_cpu_ipis(unsigned int cpu)
  584. {
  585. struct evtchn_bind_ipi bind_ipi;
  586. int ipi, irq, evtchn;
  587. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  588. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  589. continue;
  590. BUG_ON(irq_info[irq].type != IRQT_IPI);
  591. BUG_ON(irq_info[irq].index != ipi);
  592. /* Get a new binding from Xen. */
  593. bind_ipi.vcpu = cpu;
  594. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  595. &bind_ipi) != 0)
  596. BUG();
  597. evtchn = bind_ipi.port;
  598. /* Record the new mapping. */
  599. evtchn_to_irq[evtchn] = irq;
  600. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  601. bind_evtchn_to_cpu(evtchn, cpu);
  602. /* Ready for use. */
  603. unmask_evtchn(evtchn);
  604. }
  605. }
  606. /* Clear an irq's pending state, in preparation for polling on it */
  607. void xen_clear_irq_pending(int irq)
  608. {
  609. int evtchn = evtchn_from_irq(irq);
  610. if (VALID_EVTCHN(evtchn))
  611. clear_evtchn(evtchn);
  612. }
  613. void xen_set_irq_pending(int irq)
  614. {
  615. int evtchn = evtchn_from_irq(irq);
  616. if (VALID_EVTCHN(evtchn))
  617. set_evtchn(evtchn);
  618. }
  619. bool xen_test_irq_pending(int irq)
  620. {
  621. int evtchn = evtchn_from_irq(irq);
  622. bool ret = false;
  623. if (VALID_EVTCHN(evtchn))
  624. ret = test_evtchn(evtchn);
  625. return ret;
  626. }
  627. /* Poll waiting for an irq to become pending. In the usual case, the
  628. irq will be disabled so it won't deliver an interrupt. */
  629. void xen_poll_irq(int irq)
  630. {
  631. evtchn_port_t evtchn = evtchn_from_irq(irq);
  632. if (VALID_EVTCHN(evtchn)) {
  633. struct sched_poll poll;
  634. poll.nr_ports = 1;
  635. poll.timeout = 0;
  636. set_xen_guest_handle(poll.ports, &evtchn);
  637. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  638. BUG();
  639. }
  640. }
  641. void xen_irq_resume(void)
  642. {
  643. unsigned int cpu, irq, evtchn;
  644. init_evtchn_cpu_bindings();
  645. /* New event-channel space is not 'live' yet. */
  646. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  647. mask_evtchn(evtchn);
  648. /* No IRQ <-> event-channel mappings. */
  649. for (irq = 0; irq < nr_irqs; irq++)
  650. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  651. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  652. evtchn_to_irq[evtchn] = -1;
  653. for_each_possible_cpu(cpu) {
  654. restore_cpu_virqs(cpu);
  655. restore_cpu_ipis(cpu);
  656. }
  657. }
  658. static struct irq_chip xen_dynamic_chip __read_mostly = {
  659. .name = "xen-dyn",
  660. .disable = disable_dynirq,
  661. .mask = disable_dynirq,
  662. .unmask = enable_dynirq,
  663. .ack = ack_dynirq,
  664. .set_affinity = set_affinity_irq,
  665. .retrigger = retrigger_dynirq,
  666. };
  667. void __init xen_init_IRQ(void)
  668. {
  669. int i;
  670. size_t size = nr_cpu_ids * sizeof(struct cpu_evtchn_s);
  671. cpu_evtchn_mask_p = alloc_bootmem(size);
  672. BUG_ON(cpu_evtchn_mask_p == NULL);
  673. init_evtchn_cpu_bindings();
  674. /* No event channels are 'live' right now. */
  675. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  676. mask_evtchn(i);
  677. /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
  678. for (i = 0; i < nr_irqs; i++)
  679. irq_bindcount[i] = 0;
  680. irq_ctx_init(smp_processor_id());
  681. }