vxge-main.c 125 KB

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  1. /******************************************************************************
  2. * This software may be used and distributed according to the terms of
  3. * the GNU General Public License (GPL), incorporated herein by reference.
  4. * Drivers based on or derived from this code fall under the GPL and must
  5. * retain the authorship, copyright and license notice. This file is not
  6. * a complete program and may only be used when the entire operating
  7. * system is licensed under the GPL.
  8. * See the file COPYING in this distribution for more information.
  9. *
  10. * vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11. * Virtualized Server Adapter.
  12. * Copyright(c) 2002-2010 Exar Corp.
  13. *
  14. * The module loadable parameters that are supported by the driver and a brief
  15. * explanation of all the variables:
  16. * vlan_tag_strip:
  17. * Strip VLAN Tag enable/disable. Instructs the device to remove
  18. * the VLAN tag from all received tagged frames that are not
  19. * replicated at the internal L2 switch.
  20. * 0 - Do not strip the VLAN tag.
  21. * 1 - Strip the VLAN tag.
  22. *
  23. * addr_learn_en:
  24. * Enable learning the mac address of the guest OS interface in
  25. * a virtualization environment.
  26. * 0 - DISABLE
  27. * 1 - ENABLE
  28. *
  29. * max_config_port:
  30. * Maximum number of port to be supported.
  31. * MIN -1 and MAX - 2
  32. *
  33. * max_config_vpath:
  34. * This configures the maximum no of VPATH configures for each
  35. * device function.
  36. * MIN - 1 and MAX - 17
  37. *
  38. * max_config_dev:
  39. * This configures maximum no of Device function to be enabled.
  40. * MIN - 1 and MAX - 17
  41. *
  42. ******************************************************************************/
  43. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44. #include <linux/if_vlan.h>
  45. #include <linux/pci.h>
  46. #include <linux/slab.h>
  47. #include <linux/tcp.h>
  48. #include <net/ip.h>
  49. #include <linux/netdevice.h>
  50. #include <linux/etherdevice.h>
  51. #include <linux/firmware.h>
  52. #include <linux/net_tstamp.h>
  53. #include "vxge-main.h"
  54. #include "vxge-reg.h"
  55. MODULE_LICENSE("Dual BSD/GPL");
  56. MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
  57. "Virtualized Server Adapter");
  58. static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
  59. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
  60. PCI_ANY_ID},
  61. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
  62. PCI_ANY_ID},
  63. {0}
  64. };
  65. MODULE_DEVICE_TABLE(pci, vxge_id_table);
  66. VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
  67. VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
  68. VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
  69. VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
  70. VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
  71. VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
  72. static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
  73. {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  74. static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
  75. {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
  76. module_param_array(bw_percentage, uint, NULL, 0);
  77. static struct vxge_drv_config *driver_config;
  78. static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
  79. struct macInfo *mac);
  80. static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
  81. struct macInfo *mac);
  82. static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac);
  83. static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac);
  84. static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath);
  85. static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath);
  86. static inline int is_vxge_card_up(struct vxgedev *vdev)
  87. {
  88. return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  89. }
  90. static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
  91. {
  92. struct sk_buff **skb_ptr = NULL;
  93. struct sk_buff **temp;
  94. #define NR_SKB_COMPLETED 128
  95. struct sk_buff *completed[NR_SKB_COMPLETED];
  96. int more;
  97. do {
  98. more = 0;
  99. skb_ptr = completed;
  100. if (__netif_tx_trylock(fifo->txq)) {
  101. vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
  102. NR_SKB_COMPLETED, &more);
  103. __netif_tx_unlock(fifo->txq);
  104. }
  105. /* free SKBs */
  106. for (temp = completed; temp != skb_ptr; temp++)
  107. dev_kfree_skb_irq(*temp);
  108. } while (more);
  109. }
  110. static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
  111. {
  112. int i;
  113. /* Complete all transmits */
  114. for (i = 0; i < vdev->no_of_vpath; i++)
  115. VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
  116. }
  117. static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
  118. {
  119. int i;
  120. struct vxge_ring *ring;
  121. /* Complete all receives*/
  122. for (i = 0; i < vdev->no_of_vpath; i++) {
  123. ring = &vdev->vpaths[i].ring;
  124. vxge_hw_vpath_poll_rx(ring->handle);
  125. }
  126. }
  127. /*
  128. * vxge_callback_link_up
  129. *
  130. * This function is called during interrupt context to notify link up state
  131. * change.
  132. */
  133. static void
  134. vxge_callback_link_up(struct __vxge_hw_device *hldev)
  135. {
  136. struct net_device *dev = hldev->ndev;
  137. struct vxgedev *vdev = netdev_priv(dev);
  138. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  139. vdev->ndev->name, __func__, __LINE__);
  140. netdev_notice(vdev->ndev, "Link Up\n");
  141. vdev->stats.link_up++;
  142. netif_carrier_on(vdev->ndev);
  143. netif_tx_wake_all_queues(vdev->ndev);
  144. vxge_debug_entryexit(VXGE_TRACE,
  145. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  146. }
  147. /*
  148. * vxge_callback_link_down
  149. *
  150. * This function is called during interrupt context to notify link down state
  151. * change.
  152. */
  153. static void
  154. vxge_callback_link_down(struct __vxge_hw_device *hldev)
  155. {
  156. struct net_device *dev = hldev->ndev;
  157. struct vxgedev *vdev = netdev_priv(dev);
  158. vxge_debug_entryexit(VXGE_TRACE,
  159. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  160. netdev_notice(vdev->ndev, "Link Down\n");
  161. vdev->stats.link_down++;
  162. netif_carrier_off(vdev->ndev);
  163. netif_tx_stop_all_queues(vdev->ndev);
  164. vxge_debug_entryexit(VXGE_TRACE,
  165. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  166. }
  167. /*
  168. * vxge_rx_alloc
  169. *
  170. * Allocate SKB.
  171. */
  172. static struct sk_buff*
  173. vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
  174. {
  175. struct net_device *dev;
  176. struct sk_buff *skb;
  177. struct vxge_rx_priv *rx_priv;
  178. dev = ring->ndev;
  179. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  180. ring->ndev->name, __func__, __LINE__);
  181. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  182. /* try to allocate skb first. this one may fail */
  183. skb = netdev_alloc_skb(dev, skb_size +
  184. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  185. if (skb == NULL) {
  186. vxge_debug_mem(VXGE_ERR,
  187. "%s: out of memory to allocate SKB", dev->name);
  188. ring->stats.skb_alloc_fail++;
  189. return NULL;
  190. }
  191. vxge_debug_mem(VXGE_TRACE,
  192. "%s: %s:%d Skb : 0x%p", ring->ndev->name,
  193. __func__, __LINE__, skb);
  194. skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  195. rx_priv->skb = skb;
  196. rx_priv->skb_data = NULL;
  197. rx_priv->data_size = skb_size;
  198. vxge_debug_entryexit(VXGE_TRACE,
  199. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  200. return skb;
  201. }
  202. /*
  203. * vxge_rx_map
  204. */
  205. static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
  206. {
  207. struct vxge_rx_priv *rx_priv;
  208. dma_addr_t dma_addr;
  209. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  210. ring->ndev->name, __func__, __LINE__);
  211. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  212. rx_priv->skb_data = rx_priv->skb->data;
  213. dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
  214. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  215. if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
  216. ring->stats.pci_map_fail++;
  217. return -EIO;
  218. }
  219. vxge_debug_mem(VXGE_TRACE,
  220. "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
  221. ring->ndev->name, __func__, __LINE__,
  222. (unsigned long long)dma_addr);
  223. vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
  224. rx_priv->data_dma = dma_addr;
  225. vxge_debug_entryexit(VXGE_TRACE,
  226. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  227. return 0;
  228. }
  229. /*
  230. * vxge_rx_initial_replenish
  231. * Allocation of RxD as an initial replenish procedure.
  232. */
  233. static enum vxge_hw_status
  234. vxge_rx_initial_replenish(void *dtrh, void *userdata)
  235. {
  236. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  237. struct vxge_rx_priv *rx_priv;
  238. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  239. ring->ndev->name, __func__, __LINE__);
  240. if (vxge_rx_alloc(dtrh, ring,
  241. VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
  242. return VXGE_HW_FAIL;
  243. if (vxge_rx_map(dtrh, ring)) {
  244. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  245. dev_kfree_skb(rx_priv->skb);
  246. return VXGE_HW_FAIL;
  247. }
  248. vxge_debug_entryexit(VXGE_TRACE,
  249. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  250. return VXGE_HW_OK;
  251. }
  252. static inline void
  253. vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
  254. int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
  255. {
  256. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  257. ring->ndev->name, __func__, __LINE__);
  258. skb_record_rx_queue(skb, ring->driver_id);
  259. skb->protocol = eth_type_trans(skb, ring->ndev);
  260. ring->stats.rx_frms++;
  261. ring->stats.rx_bytes += pkt_length;
  262. if (skb->pkt_type == PACKET_MULTICAST)
  263. ring->stats.rx_mcast++;
  264. vxge_debug_rx(VXGE_TRACE,
  265. "%s: %s:%d skb protocol = %d",
  266. ring->ndev->name, __func__, __LINE__, skb->protocol);
  267. if (ring->gro_enable) {
  268. if (ring->vlgrp && ext_info->vlan &&
  269. (ring->vlan_tag_strip ==
  270. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  271. vlan_gro_receive(ring->napi_p, ring->vlgrp,
  272. ext_info->vlan, skb);
  273. else
  274. napi_gro_receive(ring->napi_p, skb);
  275. } else {
  276. if (ring->vlgrp && vlan &&
  277. (ring->vlan_tag_strip ==
  278. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  279. vlan_hwaccel_receive_skb(skb, ring->vlgrp, vlan);
  280. else
  281. netif_receive_skb(skb);
  282. }
  283. vxge_debug_entryexit(VXGE_TRACE,
  284. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  285. }
  286. static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
  287. struct vxge_rx_priv *rx_priv)
  288. {
  289. pci_dma_sync_single_for_device(ring->pdev,
  290. rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
  291. vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
  292. vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
  293. }
  294. static inline void vxge_post(int *dtr_cnt, void **first_dtr,
  295. void *post_dtr, struct __vxge_hw_ring *ringh)
  296. {
  297. int dtr_count = *dtr_cnt;
  298. if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
  299. if (*first_dtr)
  300. vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
  301. *first_dtr = post_dtr;
  302. } else
  303. vxge_hw_ring_rxd_post_post(ringh, post_dtr);
  304. dtr_count++;
  305. *dtr_cnt = dtr_count;
  306. }
  307. /*
  308. * vxge_rx_1b_compl
  309. *
  310. * If the interrupt is because of a received frame or if the receive ring
  311. * contains fresh as yet un-processed frames, this function is called.
  312. */
  313. static enum vxge_hw_status
  314. vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
  315. u8 t_code, void *userdata)
  316. {
  317. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  318. struct net_device *dev = ring->ndev;
  319. unsigned int dma_sizes;
  320. void *first_dtr = NULL;
  321. int dtr_cnt = 0;
  322. int data_size;
  323. dma_addr_t data_dma;
  324. int pkt_length;
  325. struct sk_buff *skb;
  326. struct vxge_rx_priv *rx_priv;
  327. struct vxge_hw_ring_rxd_info ext_info;
  328. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  329. ring->ndev->name, __func__, __LINE__);
  330. ring->pkts_processed = 0;
  331. vxge_hw_ring_replenish(ringh);
  332. do {
  333. prefetch((char *)dtr + L1_CACHE_BYTES);
  334. rx_priv = vxge_hw_ring_rxd_private_get(dtr);
  335. skb = rx_priv->skb;
  336. data_size = rx_priv->data_size;
  337. data_dma = rx_priv->data_dma;
  338. prefetch(rx_priv->skb_data);
  339. vxge_debug_rx(VXGE_TRACE,
  340. "%s: %s:%d skb = 0x%p",
  341. ring->ndev->name, __func__, __LINE__, skb);
  342. vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
  343. pkt_length = dma_sizes;
  344. pkt_length -= ETH_FCS_LEN;
  345. vxge_debug_rx(VXGE_TRACE,
  346. "%s: %s:%d Packet Length = %d",
  347. ring->ndev->name, __func__, __LINE__, pkt_length);
  348. vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
  349. /* check skb validity */
  350. vxge_assert(skb);
  351. prefetch((char *)skb + L1_CACHE_BYTES);
  352. if (unlikely(t_code)) {
  353. if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
  354. VXGE_HW_OK) {
  355. ring->stats.rx_errors++;
  356. vxge_debug_rx(VXGE_TRACE,
  357. "%s: %s :%d Rx T_code is %d",
  358. ring->ndev->name, __func__,
  359. __LINE__, t_code);
  360. /* If the t_code is not supported and if the
  361. * t_code is other than 0x5 (unparseable packet
  362. * such as unknown UPV6 header), Drop it !!!
  363. */
  364. vxge_re_pre_post(dtr, ring, rx_priv);
  365. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  366. ring->stats.rx_dropped++;
  367. continue;
  368. }
  369. }
  370. if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
  371. if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
  372. if (!vxge_rx_map(dtr, ring)) {
  373. skb_put(skb, pkt_length);
  374. pci_unmap_single(ring->pdev, data_dma,
  375. data_size, PCI_DMA_FROMDEVICE);
  376. vxge_hw_ring_rxd_pre_post(ringh, dtr);
  377. vxge_post(&dtr_cnt, &first_dtr, dtr,
  378. ringh);
  379. } else {
  380. dev_kfree_skb(rx_priv->skb);
  381. rx_priv->skb = skb;
  382. rx_priv->data_size = data_size;
  383. vxge_re_pre_post(dtr, ring, rx_priv);
  384. vxge_post(&dtr_cnt, &first_dtr, dtr,
  385. ringh);
  386. ring->stats.rx_dropped++;
  387. break;
  388. }
  389. } else {
  390. vxge_re_pre_post(dtr, ring, rx_priv);
  391. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  392. ring->stats.rx_dropped++;
  393. break;
  394. }
  395. } else {
  396. struct sk_buff *skb_up;
  397. skb_up = netdev_alloc_skb(dev, pkt_length +
  398. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  399. if (skb_up != NULL) {
  400. skb_reserve(skb_up,
  401. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  402. pci_dma_sync_single_for_cpu(ring->pdev,
  403. data_dma, data_size,
  404. PCI_DMA_FROMDEVICE);
  405. vxge_debug_mem(VXGE_TRACE,
  406. "%s: %s:%d skb_up = %p",
  407. ring->ndev->name, __func__,
  408. __LINE__, skb);
  409. memcpy(skb_up->data, skb->data, pkt_length);
  410. vxge_re_pre_post(dtr, ring, rx_priv);
  411. vxge_post(&dtr_cnt, &first_dtr, dtr,
  412. ringh);
  413. /* will netif_rx small SKB instead */
  414. skb = skb_up;
  415. skb_put(skb, pkt_length);
  416. } else {
  417. vxge_re_pre_post(dtr, ring, rx_priv);
  418. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  419. vxge_debug_rx(VXGE_ERR,
  420. "%s: vxge_rx_1b_compl: out of "
  421. "memory", dev->name);
  422. ring->stats.skb_alloc_fail++;
  423. break;
  424. }
  425. }
  426. if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
  427. !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
  428. ring->rx_csum && /* Offload Rx side CSUM */
  429. ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
  430. ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
  431. skb->ip_summed = CHECKSUM_UNNECESSARY;
  432. else
  433. skb_checksum_none_assert(skb);
  434. if (ring->rx_hwts) {
  435. struct skb_shared_hwtstamps *skb_hwts;
  436. u32 ns = *(u32 *)(skb->head + pkt_length);
  437. skb_hwts = skb_hwtstamps(skb);
  438. skb_hwts->hwtstamp = ns_to_ktime(ns);
  439. skb_hwts->syststamp.tv64 = 0;
  440. }
  441. /* rth_hash_type and rth_it_hit are non-zero regardless of
  442. * whether rss is enabled. Only the rth_value is zero/non-zero
  443. * if rss is disabled/enabled, so key off of that.
  444. */
  445. if (ext_info.rth_value)
  446. skb->rxhash = ext_info.rth_value;
  447. vxge_rx_complete(ring, skb, ext_info.vlan,
  448. pkt_length, &ext_info);
  449. ring->budget--;
  450. ring->pkts_processed++;
  451. if (!ring->budget)
  452. break;
  453. } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
  454. &t_code) == VXGE_HW_OK);
  455. if (first_dtr)
  456. vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
  457. vxge_debug_entryexit(VXGE_TRACE,
  458. "%s:%d Exiting...",
  459. __func__, __LINE__);
  460. return VXGE_HW_OK;
  461. }
  462. /*
  463. * vxge_xmit_compl
  464. *
  465. * If an interrupt was raised to indicate DMA complete of the Tx packet,
  466. * this function is called. It identifies the last TxD whose buffer was
  467. * freed and frees all skbs whose data have already DMA'ed into the NICs
  468. * internal memory.
  469. */
  470. static enum vxge_hw_status
  471. vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
  472. enum vxge_hw_fifo_tcode t_code, void *userdata,
  473. struct sk_buff ***skb_ptr, int nr_skb, int *more)
  474. {
  475. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  476. struct sk_buff *skb, **done_skb = *skb_ptr;
  477. int pkt_cnt = 0;
  478. vxge_debug_entryexit(VXGE_TRACE,
  479. "%s:%d Entered....", __func__, __LINE__);
  480. do {
  481. int frg_cnt;
  482. skb_frag_t *frag;
  483. int i = 0, j;
  484. struct vxge_tx_priv *txd_priv =
  485. vxge_hw_fifo_txdl_private_get(dtr);
  486. skb = txd_priv->skb;
  487. frg_cnt = skb_shinfo(skb)->nr_frags;
  488. frag = &skb_shinfo(skb)->frags[0];
  489. vxge_debug_tx(VXGE_TRACE,
  490. "%s: %s:%d fifo_hw = %p dtr = %p "
  491. "tcode = 0x%x", fifo->ndev->name, __func__,
  492. __LINE__, fifo_hw, dtr, t_code);
  493. /* check skb validity */
  494. vxge_assert(skb);
  495. vxge_debug_tx(VXGE_TRACE,
  496. "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
  497. fifo->ndev->name, __func__, __LINE__,
  498. skb, txd_priv, frg_cnt);
  499. if (unlikely(t_code)) {
  500. fifo->stats.tx_errors++;
  501. vxge_debug_tx(VXGE_ERR,
  502. "%s: tx: dtr %p completed due to "
  503. "error t_code %01x", fifo->ndev->name,
  504. dtr, t_code);
  505. vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
  506. }
  507. /* for unfragmented skb */
  508. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  509. skb_headlen(skb), PCI_DMA_TODEVICE);
  510. for (j = 0; j < frg_cnt; j++) {
  511. pci_unmap_page(fifo->pdev,
  512. txd_priv->dma_buffers[i++],
  513. frag->size, PCI_DMA_TODEVICE);
  514. frag += 1;
  515. }
  516. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  517. /* Updating the statistics block */
  518. fifo->stats.tx_frms++;
  519. fifo->stats.tx_bytes += skb->len;
  520. *done_skb++ = skb;
  521. if (--nr_skb <= 0) {
  522. *more = 1;
  523. break;
  524. }
  525. pkt_cnt++;
  526. if (pkt_cnt > fifo->indicate_max_pkts)
  527. break;
  528. } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
  529. &dtr, &t_code) == VXGE_HW_OK);
  530. *skb_ptr = done_skb;
  531. if (netif_tx_queue_stopped(fifo->txq))
  532. netif_tx_wake_queue(fifo->txq);
  533. vxge_debug_entryexit(VXGE_TRACE,
  534. "%s: %s:%d Exiting...",
  535. fifo->ndev->name, __func__, __LINE__);
  536. return VXGE_HW_OK;
  537. }
  538. /* select a vpath to transmit the packet */
  539. static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
  540. {
  541. u16 queue_len, counter = 0;
  542. if (skb->protocol == htons(ETH_P_IP)) {
  543. struct iphdr *ip;
  544. struct tcphdr *th;
  545. ip = ip_hdr(skb);
  546. if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
  547. th = (struct tcphdr *)(((unsigned char *)ip) +
  548. ip->ihl*4);
  549. queue_len = vdev->no_of_vpath;
  550. counter = (ntohs(th->source) +
  551. ntohs(th->dest)) &
  552. vdev->vpath_selector[queue_len - 1];
  553. if (counter >= queue_len)
  554. counter = queue_len - 1;
  555. }
  556. }
  557. return counter;
  558. }
  559. static enum vxge_hw_status vxge_search_mac_addr_in_list(
  560. struct vxge_vpath *vpath, u64 del_mac)
  561. {
  562. struct list_head *entry, *next;
  563. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  564. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
  565. return TRUE;
  566. }
  567. return FALSE;
  568. }
  569. static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
  570. {
  571. struct macInfo mac_info;
  572. u8 *mac_address = NULL;
  573. u64 mac_addr = 0, vpath_vector = 0;
  574. int vpath_idx = 0;
  575. enum vxge_hw_status status = VXGE_HW_OK;
  576. struct vxge_vpath *vpath = NULL;
  577. struct __vxge_hw_device *hldev;
  578. hldev = pci_get_drvdata(vdev->pdev);
  579. mac_address = (u8 *)&mac_addr;
  580. memcpy(mac_address, mac_header, ETH_ALEN);
  581. /* Is this mac address already in the list? */
  582. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  583. vpath = &vdev->vpaths[vpath_idx];
  584. if (vxge_search_mac_addr_in_list(vpath, mac_addr))
  585. return vpath_idx;
  586. }
  587. memset(&mac_info, 0, sizeof(struct macInfo));
  588. memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
  589. /* Any vpath has room to add mac address to its da table? */
  590. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  591. vpath = &vdev->vpaths[vpath_idx];
  592. if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
  593. /* Add this mac address to this vpath */
  594. mac_info.vpath_no = vpath_idx;
  595. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  596. status = vxge_add_mac_addr(vdev, &mac_info);
  597. if (status != VXGE_HW_OK)
  598. return -EPERM;
  599. return vpath_idx;
  600. }
  601. }
  602. mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
  603. vpath_idx = 0;
  604. mac_info.vpath_no = vpath_idx;
  605. /* Is the first vpath already selected as catch-basin ? */
  606. vpath = &vdev->vpaths[vpath_idx];
  607. if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
  608. /* Add this mac address to this vpath */
  609. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  610. return -EPERM;
  611. return vpath_idx;
  612. }
  613. /* Select first vpath as catch-basin */
  614. vpath_vector = vxge_mBIT(vpath->device_id);
  615. status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
  616. vxge_hw_mgmt_reg_type_mrpcim,
  617. 0,
  618. (ulong)offsetof(
  619. struct vxge_hw_mrpcim_reg,
  620. rts_mgr_cbasin_cfg),
  621. vpath_vector);
  622. if (status != VXGE_HW_OK) {
  623. vxge_debug_tx(VXGE_ERR,
  624. "%s: Unable to set the vpath-%d in catch-basin mode",
  625. VXGE_DRIVER_NAME, vpath->device_id);
  626. return -EPERM;
  627. }
  628. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  629. return -EPERM;
  630. return vpath_idx;
  631. }
  632. /**
  633. * vxge_xmit
  634. * @skb : the socket buffer containing the Tx data.
  635. * @dev : device pointer.
  636. *
  637. * This function is the Tx entry point of the driver. Neterion NIC supports
  638. * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
  639. */
  640. static netdev_tx_t
  641. vxge_xmit(struct sk_buff *skb, struct net_device *dev)
  642. {
  643. struct vxge_fifo *fifo = NULL;
  644. void *dtr_priv;
  645. void *dtr = NULL;
  646. struct vxgedev *vdev = NULL;
  647. enum vxge_hw_status status;
  648. int frg_cnt, first_frg_len;
  649. skb_frag_t *frag;
  650. int i = 0, j = 0, avail;
  651. u64 dma_pointer;
  652. struct vxge_tx_priv *txdl_priv = NULL;
  653. struct __vxge_hw_fifo *fifo_hw;
  654. int offload_type;
  655. int vpath_no = 0;
  656. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  657. dev->name, __func__, __LINE__);
  658. /* A buffer with no data will be dropped */
  659. if (unlikely(skb->len <= 0)) {
  660. vxge_debug_tx(VXGE_ERR,
  661. "%s: Buffer has no data..", dev->name);
  662. dev_kfree_skb(skb);
  663. return NETDEV_TX_OK;
  664. }
  665. vdev = netdev_priv(dev);
  666. if (unlikely(!is_vxge_card_up(vdev))) {
  667. vxge_debug_tx(VXGE_ERR,
  668. "%s: vdev not initialized", dev->name);
  669. dev_kfree_skb(skb);
  670. return NETDEV_TX_OK;
  671. }
  672. if (vdev->config.addr_learn_en) {
  673. vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
  674. if (vpath_no == -EPERM) {
  675. vxge_debug_tx(VXGE_ERR,
  676. "%s: Failed to store the mac address",
  677. dev->name);
  678. dev_kfree_skb(skb);
  679. return NETDEV_TX_OK;
  680. }
  681. }
  682. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  683. vpath_no = skb_get_queue_mapping(skb);
  684. else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
  685. vpath_no = vxge_get_vpath_no(vdev, skb);
  686. vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
  687. if (vpath_no >= vdev->no_of_vpath)
  688. vpath_no = 0;
  689. fifo = &vdev->vpaths[vpath_no].fifo;
  690. fifo_hw = fifo->handle;
  691. if (netif_tx_queue_stopped(fifo->txq))
  692. return NETDEV_TX_BUSY;
  693. avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
  694. if (avail == 0) {
  695. vxge_debug_tx(VXGE_ERR,
  696. "%s: No free TXDs available", dev->name);
  697. fifo->stats.txd_not_free++;
  698. goto _exit0;
  699. }
  700. /* Last TXD? Stop tx queue to avoid dropping packets. TX
  701. * completion will resume the queue.
  702. */
  703. if (avail == 1)
  704. netif_tx_stop_queue(fifo->txq);
  705. status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
  706. if (unlikely(status != VXGE_HW_OK)) {
  707. vxge_debug_tx(VXGE_ERR,
  708. "%s: Out of descriptors .", dev->name);
  709. fifo->stats.txd_out_of_desc++;
  710. goto _exit0;
  711. }
  712. vxge_debug_tx(VXGE_TRACE,
  713. "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
  714. dev->name, __func__, __LINE__,
  715. fifo_hw, dtr, dtr_priv);
  716. if (vlan_tx_tag_present(skb)) {
  717. u16 vlan_tag = vlan_tx_tag_get(skb);
  718. vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
  719. }
  720. first_frg_len = skb_headlen(skb);
  721. dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
  722. PCI_DMA_TODEVICE);
  723. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
  724. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  725. fifo->stats.pci_map_fail++;
  726. goto _exit0;
  727. }
  728. txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
  729. txdl_priv->skb = skb;
  730. txdl_priv->dma_buffers[j] = dma_pointer;
  731. frg_cnt = skb_shinfo(skb)->nr_frags;
  732. vxge_debug_tx(VXGE_TRACE,
  733. "%s: %s:%d skb = %p txdl_priv = %p "
  734. "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
  735. __func__, __LINE__, skb, txdl_priv,
  736. frg_cnt, (unsigned long long)dma_pointer);
  737. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  738. first_frg_len);
  739. frag = &skb_shinfo(skb)->frags[0];
  740. for (i = 0; i < frg_cnt; i++) {
  741. /* ignore 0 length fragment */
  742. if (!frag->size)
  743. continue;
  744. dma_pointer = (u64) pci_map_page(fifo->pdev, frag->page,
  745. frag->page_offset, frag->size,
  746. PCI_DMA_TODEVICE);
  747. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
  748. goto _exit2;
  749. vxge_debug_tx(VXGE_TRACE,
  750. "%s: %s:%d frag = %d dma_pointer = 0x%llx",
  751. dev->name, __func__, __LINE__, i,
  752. (unsigned long long)dma_pointer);
  753. txdl_priv->dma_buffers[j] = dma_pointer;
  754. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  755. frag->size);
  756. frag += 1;
  757. }
  758. offload_type = vxge_offload_type(skb);
  759. if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
  760. int mss = vxge_tcp_mss(skb);
  761. if (mss) {
  762. vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
  763. dev->name, __func__, __LINE__, mss);
  764. vxge_hw_fifo_txdl_mss_set(dtr, mss);
  765. } else {
  766. vxge_assert(skb->len <=
  767. dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
  768. vxge_assert(0);
  769. goto _exit1;
  770. }
  771. }
  772. if (skb->ip_summed == CHECKSUM_PARTIAL)
  773. vxge_hw_fifo_txdl_cksum_set_bits(dtr,
  774. VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
  775. VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
  776. VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
  777. vxge_hw_fifo_txdl_post(fifo_hw, dtr);
  778. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  779. dev->name, __func__, __LINE__);
  780. return NETDEV_TX_OK;
  781. _exit2:
  782. vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
  783. _exit1:
  784. j = 0;
  785. frag = &skb_shinfo(skb)->frags[0];
  786. pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
  787. skb_headlen(skb), PCI_DMA_TODEVICE);
  788. for (; j < i; j++) {
  789. pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
  790. frag->size, PCI_DMA_TODEVICE);
  791. frag += 1;
  792. }
  793. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  794. _exit0:
  795. netif_tx_stop_queue(fifo->txq);
  796. dev_kfree_skb(skb);
  797. return NETDEV_TX_OK;
  798. }
  799. /*
  800. * vxge_rx_term
  801. *
  802. * Function will be called by hw function to abort all outstanding receive
  803. * descriptors.
  804. */
  805. static void
  806. vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
  807. {
  808. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  809. struct vxge_rx_priv *rx_priv =
  810. vxge_hw_ring_rxd_private_get(dtrh);
  811. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  812. ring->ndev->name, __func__, __LINE__);
  813. if (state != VXGE_HW_RXD_STATE_POSTED)
  814. return;
  815. pci_unmap_single(ring->pdev, rx_priv->data_dma,
  816. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  817. dev_kfree_skb(rx_priv->skb);
  818. rx_priv->skb_data = NULL;
  819. vxge_debug_entryexit(VXGE_TRACE,
  820. "%s: %s:%d Exiting...",
  821. ring->ndev->name, __func__, __LINE__);
  822. }
  823. /*
  824. * vxge_tx_term
  825. *
  826. * Function will be called to abort all outstanding tx descriptors
  827. */
  828. static void
  829. vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
  830. {
  831. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  832. skb_frag_t *frag;
  833. int i = 0, j, frg_cnt;
  834. struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
  835. struct sk_buff *skb = txd_priv->skb;
  836. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  837. if (state != VXGE_HW_TXDL_STATE_POSTED)
  838. return;
  839. /* check skb validity */
  840. vxge_assert(skb);
  841. frg_cnt = skb_shinfo(skb)->nr_frags;
  842. frag = &skb_shinfo(skb)->frags[0];
  843. /* for unfragmented skb */
  844. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  845. skb_headlen(skb), PCI_DMA_TODEVICE);
  846. for (j = 0; j < frg_cnt; j++) {
  847. pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
  848. frag->size, PCI_DMA_TODEVICE);
  849. frag += 1;
  850. }
  851. dev_kfree_skb(skb);
  852. vxge_debug_entryexit(VXGE_TRACE,
  853. "%s:%d Exiting...", __func__, __LINE__);
  854. }
  855. /**
  856. * vxge_set_multicast
  857. * @dev: pointer to the device structure
  858. *
  859. * Entry point for multicast address enable/disable
  860. * This function is a driver entry point which gets called by the kernel
  861. * whenever multicast addresses must be enabled/disabled. This also gets
  862. * called to set/reset promiscuous mode. Depending on the deivce flag, we
  863. * determine, if multicast address must be enabled or if promiscuous mode
  864. * is to be disabled etc.
  865. */
  866. static void vxge_set_multicast(struct net_device *dev)
  867. {
  868. struct netdev_hw_addr *ha;
  869. struct vxgedev *vdev;
  870. int i, mcast_cnt = 0;
  871. struct __vxge_hw_device *hldev;
  872. struct vxge_vpath *vpath;
  873. enum vxge_hw_status status = VXGE_HW_OK;
  874. struct macInfo mac_info;
  875. int vpath_idx = 0;
  876. struct vxge_mac_addrs *mac_entry;
  877. struct list_head *list_head;
  878. struct list_head *entry, *next;
  879. u8 *mac_address = NULL;
  880. vxge_debug_entryexit(VXGE_TRACE,
  881. "%s:%d", __func__, __LINE__);
  882. vdev = netdev_priv(dev);
  883. hldev = (struct __vxge_hw_device *)vdev->devh;
  884. if (unlikely(!is_vxge_card_up(vdev)))
  885. return;
  886. if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
  887. for (i = 0; i < vdev->no_of_vpath; i++) {
  888. vpath = &vdev->vpaths[i];
  889. vxge_assert(vpath->is_open);
  890. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  891. if (status != VXGE_HW_OK)
  892. vxge_debug_init(VXGE_ERR, "failed to enable "
  893. "multicast, status %d", status);
  894. vdev->all_multi_flg = 1;
  895. }
  896. } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
  897. for (i = 0; i < vdev->no_of_vpath; i++) {
  898. vpath = &vdev->vpaths[i];
  899. vxge_assert(vpath->is_open);
  900. status = vxge_hw_vpath_mcast_disable(vpath->handle);
  901. if (status != VXGE_HW_OK)
  902. vxge_debug_init(VXGE_ERR, "failed to disable "
  903. "multicast, status %d", status);
  904. vdev->all_multi_flg = 0;
  905. }
  906. }
  907. if (!vdev->config.addr_learn_en) {
  908. for (i = 0; i < vdev->no_of_vpath; i++) {
  909. vpath = &vdev->vpaths[i];
  910. vxge_assert(vpath->is_open);
  911. if (dev->flags & IFF_PROMISC)
  912. status = vxge_hw_vpath_promisc_enable(
  913. vpath->handle);
  914. else
  915. status = vxge_hw_vpath_promisc_disable(
  916. vpath->handle);
  917. if (status != VXGE_HW_OK)
  918. vxge_debug_init(VXGE_ERR, "failed to %s promisc"
  919. ", status %d", dev->flags&IFF_PROMISC ?
  920. "enable" : "disable", status);
  921. }
  922. }
  923. memset(&mac_info, 0, sizeof(struct macInfo));
  924. /* Update individual M_CAST address list */
  925. if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
  926. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  927. list_head = &vdev->vpaths[0].mac_addr_list;
  928. if ((netdev_mc_count(dev) +
  929. (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
  930. vdev->vpaths[0].max_mac_addr_cnt)
  931. goto _set_all_mcast;
  932. /* Delete previous MC's */
  933. for (i = 0; i < mcast_cnt; i++) {
  934. list_for_each_safe(entry, next, list_head) {
  935. mac_entry = (struct vxge_mac_addrs *)entry;
  936. /* Copy the mac address to delete */
  937. mac_address = (u8 *)&mac_entry->macaddr;
  938. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  939. /* Is this a multicast address */
  940. if (0x01 & mac_info.macaddr[0]) {
  941. for (vpath_idx = 0; vpath_idx <
  942. vdev->no_of_vpath;
  943. vpath_idx++) {
  944. mac_info.vpath_no = vpath_idx;
  945. status = vxge_del_mac_addr(
  946. vdev,
  947. &mac_info);
  948. }
  949. }
  950. }
  951. }
  952. /* Add new ones */
  953. netdev_for_each_mc_addr(ha, dev) {
  954. memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
  955. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  956. vpath_idx++) {
  957. mac_info.vpath_no = vpath_idx;
  958. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  959. status = vxge_add_mac_addr(vdev, &mac_info);
  960. if (status != VXGE_HW_OK) {
  961. vxge_debug_init(VXGE_ERR,
  962. "%s:%d Setting individual"
  963. "multicast address failed",
  964. __func__, __LINE__);
  965. goto _set_all_mcast;
  966. }
  967. }
  968. }
  969. return;
  970. _set_all_mcast:
  971. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  972. /* Delete previous MC's */
  973. for (i = 0; i < mcast_cnt; i++) {
  974. list_for_each_safe(entry, next, list_head) {
  975. mac_entry = (struct vxge_mac_addrs *)entry;
  976. /* Copy the mac address to delete */
  977. mac_address = (u8 *)&mac_entry->macaddr;
  978. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  979. /* Is this a multicast address */
  980. if (0x01 & mac_info.macaddr[0])
  981. break;
  982. }
  983. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  984. vpath_idx++) {
  985. mac_info.vpath_no = vpath_idx;
  986. status = vxge_del_mac_addr(vdev, &mac_info);
  987. }
  988. }
  989. /* Enable all multicast */
  990. for (i = 0; i < vdev->no_of_vpath; i++) {
  991. vpath = &vdev->vpaths[i];
  992. vxge_assert(vpath->is_open);
  993. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  994. if (status != VXGE_HW_OK) {
  995. vxge_debug_init(VXGE_ERR,
  996. "%s:%d Enabling all multicasts failed",
  997. __func__, __LINE__);
  998. }
  999. vdev->all_multi_flg = 1;
  1000. }
  1001. dev->flags |= IFF_ALLMULTI;
  1002. }
  1003. vxge_debug_entryexit(VXGE_TRACE,
  1004. "%s:%d Exiting...", __func__, __LINE__);
  1005. }
  1006. /**
  1007. * vxge_set_mac_addr
  1008. * @dev: pointer to the device structure
  1009. *
  1010. * Update entry "0" (default MAC addr)
  1011. */
  1012. static int vxge_set_mac_addr(struct net_device *dev, void *p)
  1013. {
  1014. struct sockaddr *addr = p;
  1015. struct vxgedev *vdev;
  1016. struct __vxge_hw_device *hldev;
  1017. enum vxge_hw_status status = VXGE_HW_OK;
  1018. struct macInfo mac_info_new, mac_info_old;
  1019. int vpath_idx = 0;
  1020. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1021. vdev = netdev_priv(dev);
  1022. hldev = vdev->devh;
  1023. if (!is_valid_ether_addr(addr->sa_data))
  1024. return -EINVAL;
  1025. memset(&mac_info_new, 0, sizeof(struct macInfo));
  1026. memset(&mac_info_old, 0, sizeof(struct macInfo));
  1027. vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
  1028. __func__, __LINE__);
  1029. /* Get the old address */
  1030. memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
  1031. /* Copy the new address */
  1032. memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
  1033. /* First delete the old mac address from all the vpaths
  1034. as we can't specify the index while adding new mac address */
  1035. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1036. struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
  1037. if (!vpath->is_open) {
  1038. /* This can happen when this interface is added/removed
  1039. to the bonding interface. Delete this station address
  1040. from the linked list */
  1041. vxge_mac_list_del(vpath, &mac_info_old);
  1042. /* Add this new address to the linked list
  1043. for later restoring */
  1044. vxge_mac_list_add(vpath, &mac_info_new);
  1045. continue;
  1046. }
  1047. /* Delete the station address */
  1048. mac_info_old.vpath_no = vpath_idx;
  1049. status = vxge_del_mac_addr(vdev, &mac_info_old);
  1050. }
  1051. if (unlikely(!is_vxge_card_up(vdev))) {
  1052. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1053. return VXGE_HW_OK;
  1054. }
  1055. /* Set this mac address to all the vpaths */
  1056. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1057. mac_info_new.vpath_no = vpath_idx;
  1058. mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1059. status = vxge_add_mac_addr(vdev, &mac_info_new);
  1060. if (status != VXGE_HW_OK)
  1061. return -EINVAL;
  1062. }
  1063. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1064. return status;
  1065. }
  1066. /*
  1067. * vxge_vpath_intr_enable
  1068. * @vdev: pointer to vdev
  1069. * @vp_id: vpath for which to enable the interrupts
  1070. *
  1071. * Enables the interrupts for the vpath
  1072. */
  1073. static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
  1074. {
  1075. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1076. int msix_id = 0;
  1077. int tim_msix_id[4] = {0, 1, 0, 0};
  1078. int alarm_msix_id = VXGE_ALARM_MSIX_ID;
  1079. vxge_hw_vpath_intr_enable(vpath->handle);
  1080. if (vdev->config.intr_type == INTA)
  1081. vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
  1082. else {
  1083. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1084. alarm_msix_id);
  1085. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1086. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1087. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
  1088. /* enable the alarm vector */
  1089. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1090. VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
  1091. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1092. }
  1093. }
  1094. /*
  1095. * vxge_vpath_intr_disable
  1096. * @vdev: pointer to vdev
  1097. * @vp_id: vpath for which to disable the interrupts
  1098. *
  1099. * Disables the interrupts for the vpath
  1100. */
  1101. static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
  1102. {
  1103. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1104. struct __vxge_hw_device *hldev;
  1105. int msix_id;
  1106. hldev = pci_get_drvdata(vdev->pdev);
  1107. vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
  1108. vxge_hw_vpath_intr_disable(vpath->handle);
  1109. if (vdev->config.intr_type == INTA)
  1110. vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
  1111. else {
  1112. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1113. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1114. vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
  1115. /* disable the alarm vector */
  1116. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1117. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1118. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1119. }
  1120. }
  1121. /*
  1122. * vxge_reset_vpath
  1123. * @vdev: pointer to vdev
  1124. * @vp_id: vpath to reset
  1125. *
  1126. * Resets the vpath
  1127. */
  1128. static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
  1129. {
  1130. enum vxge_hw_status status = VXGE_HW_OK;
  1131. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1132. int ret = 0;
  1133. /* check if device is down already */
  1134. if (unlikely(!is_vxge_card_up(vdev)))
  1135. return 0;
  1136. /* is device reset already scheduled */
  1137. if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1138. return 0;
  1139. if (vpath->handle) {
  1140. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1141. if (is_vxge_card_up(vdev) &&
  1142. vxge_hw_vpath_recover_from_reset(vpath->handle)
  1143. != VXGE_HW_OK) {
  1144. vxge_debug_init(VXGE_ERR,
  1145. "vxge_hw_vpath_recover_from_reset"
  1146. "failed for vpath:%d", vp_id);
  1147. return status;
  1148. }
  1149. } else {
  1150. vxge_debug_init(VXGE_ERR,
  1151. "vxge_hw_vpath_reset failed for"
  1152. "vpath:%d", vp_id);
  1153. return status;
  1154. }
  1155. } else
  1156. return VXGE_HW_FAIL;
  1157. vxge_restore_vpath_mac_addr(vpath);
  1158. vxge_restore_vpath_vid_table(vpath);
  1159. /* Enable all broadcast */
  1160. vxge_hw_vpath_bcast_enable(vpath->handle);
  1161. /* Enable all multicast */
  1162. if (vdev->all_multi_flg) {
  1163. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  1164. if (status != VXGE_HW_OK)
  1165. vxge_debug_init(VXGE_ERR,
  1166. "%s:%d Enabling multicast failed",
  1167. __func__, __LINE__);
  1168. }
  1169. /* Enable the interrupts */
  1170. vxge_vpath_intr_enable(vdev, vp_id);
  1171. smp_wmb();
  1172. /* Enable the flow of traffic through the vpath */
  1173. vxge_hw_vpath_enable(vpath->handle);
  1174. smp_wmb();
  1175. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  1176. vpath->ring.last_status = VXGE_HW_OK;
  1177. /* Vpath reset done */
  1178. clear_bit(vp_id, &vdev->vp_reset);
  1179. /* Start the vpath queue */
  1180. if (netif_tx_queue_stopped(vpath->fifo.txq))
  1181. netif_tx_wake_queue(vpath->fifo.txq);
  1182. return ret;
  1183. }
  1184. static int do_vxge_reset(struct vxgedev *vdev, int event)
  1185. {
  1186. enum vxge_hw_status status;
  1187. int ret = 0, vp_id, i;
  1188. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1189. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
  1190. /* check if device is down already */
  1191. if (unlikely(!is_vxge_card_up(vdev)))
  1192. return 0;
  1193. /* is reset already scheduled */
  1194. if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1195. return 0;
  1196. }
  1197. if (event == VXGE_LL_FULL_RESET) {
  1198. /* wait for all the vpath reset to complete */
  1199. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1200. while (test_bit(vp_id, &vdev->vp_reset))
  1201. msleep(50);
  1202. }
  1203. /* if execution mode is set to debug, don't reset the adapter */
  1204. if (unlikely(vdev->exec_mode)) {
  1205. vxge_debug_init(VXGE_ERR,
  1206. "%s: execution mode is debug, returning..",
  1207. vdev->ndev->name);
  1208. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1209. netif_tx_stop_all_queues(vdev->ndev);
  1210. return 0;
  1211. }
  1212. }
  1213. if (event == VXGE_LL_FULL_RESET) {
  1214. vxge_hw_device_wait_receive_idle(vdev->devh);
  1215. vxge_hw_device_intr_disable(vdev->devh);
  1216. switch (vdev->cric_err_event) {
  1217. case VXGE_HW_EVENT_UNKNOWN:
  1218. netif_tx_stop_all_queues(vdev->ndev);
  1219. vxge_debug_init(VXGE_ERR,
  1220. "fatal: %s: Disabling device due to"
  1221. "unknown error",
  1222. vdev->ndev->name);
  1223. ret = -EPERM;
  1224. goto out;
  1225. case VXGE_HW_EVENT_RESET_START:
  1226. break;
  1227. case VXGE_HW_EVENT_RESET_COMPLETE:
  1228. case VXGE_HW_EVENT_LINK_DOWN:
  1229. case VXGE_HW_EVENT_LINK_UP:
  1230. case VXGE_HW_EVENT_ALARM_CLEARED:
  1231. case VXGE_HW_EVENT_ECCERR:
  1232. case VXGE_HW_EVENT_MRPCIM_ECCERR:
  1233. ret = -EPERM;
  1234. goto out;
  1235. case VXGE_HW_EVENT_FIFO_ERR:
  1236. case VXGE_HW_EVENT_VPATH_ERR:
  1237. break;
  1238. case VXGE_HW_EVENT_CRITICAL_ERR:
  1239. netif_tx_stop_all_queues(vdev->ndev);
  1240. vxge_debug_init(VXGE_ERR,
  1241. "fatal: %s: Disabling device due to"
  1242. "serious error",
  1243. vdev->ndev->name);
  1244. /* SOP or device reset required */
  1245. /* This event is not currently used */
  1246. ret = -EPERM;
  1247. goto out;
  1248. case VXGE_HW_EVENT_SERR:
  1249. netif_tx_stop_all_queues(vdev->ndev);
  1250. vxge_debug_init(VXGE_ERR,
  1251. "fatal: %s: Disabling device due to"
  1252. "serious error",
  1253. vdev->ndev->name);
  1254. ret = -EPERM;
  1255. goto out;
  1256. case VXGE_HW_EVENT_SRPCIM_SERR:
  1257. case VXGE_HW_EVENT_MRPCIM_SERR:
  1258. ret = -EPERM;
  1259. goto out;
  1260. case VXGE_HW_EVENT_SLOT_FREEZE:
  1261. netif_tx_stop_all_queues(vdev->ndev);
  1262. vxge_debug_init(VXGE_ERR,
  1263. "fatal: %s: Disabling device due to"
  1264. "slot freeze",
  1265. vdev->ndev->name);
  1266. ret = -EPERM;
  1267. goto out;
  1268. default:
  1269. break;
  1270. }
  1271. }
  1272. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
  1273. netif_tx_stop_all_queues(vdev->ndev);
  1274. if (event == VXGE_LL_FULL_RESET) {
  1275. status = vxge_reset_all_vpaths(vdev);
  1276. if (status != VXGE_HW_OK) {
  1277. vxge_debug_init(VXGE_ERR,
  1278. "fatal: %s: can not reset vpaths",
  1279. vdev->ndev->name);
  1280. ret = -EPERM;
  1281. goto out;
  1282. }
  1283. }
  1284. if (event == VXGE_LL_COMPL_RESET) {
  1285. for (i = 0; i < vdev->no_of_vpath; i++)
  1286. if (vdev->vpaths[i].handle) {
  1287. if (vxge_hw_vpath_recover_from_reset(
  1288. vdev->vpaths[i].handle)
  1289. != VXGE_HW_OK) {
  1290. vxge_debug_init(VXGE_ERR,
  1291. "vxge_hw_vpath_recover_"
  1292. "from_reset failed for vpath: "
  1293. "%d", i);
  1294. ret = -EPERM;
  1295. goto out;
  1296. }
  1297. } else {
  1298. vxge_debug_init(VXGE_ERR,
  1299. "vxge_hw_vpath_reset failed for "
  1300. "vpath:%d", i);
  1301. ret = -EPERM;
  1302. goto out;
  1303. }
  1304. }
  1305. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
  1306. /* Reprogram the DA table with populated mac addresses */
  1307. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1308. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1309. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1310. }
  1311. /* enable vpath interrupts */
  1312. for (i = 0; i < vdev->no_of_vpath; i++)
  1313. vxge_vpath_intr_enable(vdev, i);
  1314. vxge_hw_device_intr_enable(vdev->devh);
  1315. smp_wmb();
  1316. /* Indicate card up */
  1317. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1318. /* Get the traffic to flow through the vpaths */
  1319. for (i = 0; i < vdev->no_of_vpath; i++) {
  1320. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  1321. smp_wmb();
  1322. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  1323. }
  1324. netif_tx_wake_all_queues(vdev->ndev);
  1325. }
  1326. out:
  1327. vxge_debug_entryexit(VXGE_TRACE,
  1328. "%s:%d Exiting...", __func__, __LINE__);
  1329. /* Indicate reset done */
  1330. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
  1331. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  1332. return ret;
  1333. }
  1334. /*
  1335. * vxge_reset
  1336. * @vdev: pointer to ll device
  1337. *
  1338. * driver may reset the chip on events of serr, eccerr, etc
  1339. */
  1340. static int vxge_reset(struct vxgedev *vdev)
  1341. {
  1342. return do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  1343. }
  1344. /**
  1345. * vxge_poll - Receive handler when Receive Polling is used.
  1346. * @dev: pointer to the device structure.
  1347. * @budget: Number of packets budgeted to be processed in this iteration.
  1348. *
  1349. * This function comes into picture only if Receive side is being handled
  1350. * through polling (called NAPI in linux). It mostly does what the normal
  1351. * Rx interrupt handler does in terms of descriptor and packet processing
  1352. * but not in an interrupt context. Also it will process a specified number
  1353. * of packets at most in one iteration. This value is passed down by the
  1354. * kernel as the function argument 'budget'.
  1355. */
  1356. static int vxge_poll_msix(struct napi_struct *napi, int budget)
  1357. {
  1358. struct vxge_ring *ring =
  1359. container_of(napi, struct vxge_ring, napi);
  1360. int budget_org = budget;
  1361. ring->budget = budget;
  1362. vxge_hw_vpath_poll_rx(ring->handle);
  1363. if (ring->pkts_processed < budget_org) {
  1364. napi_complete(napi);
  1365. /* Re enable the Rx interrupts for the vpath */
  1366. vxge_hw_channel_msix_unmask(
  1367. (struct __vxge_hw_channel *)ring->handle,
  1368. ring->rx_vector_no);
  1369. }
  1370. return ring->pkts_processed;
  1371. }
  1372. static int vxge_poll_inta(struct napi_struct *napi, int budget)
  1373. {
  1374. struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
  1375. int pkts_processed = 0;
  1376. int i;
  1377. int budget_org = budget;
  1378. struct vxge_ring *ring;
  1379. struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
  1380. for (i = 0; i < vdev->no_of_vpath; i++) {
  1381. ring = &vdev->vpaths[i].ring;
  1382. ring->budget = budget;
  1383. vxge_hw_vpath_poll_rx(ring->handle);
  1384. pkts_processed += ring->pkts_processed;
  1385. budget -= ring->pkts_processed;
  1386. if (budget <= 0)
  1387. break;
  1388. }
  1389. VXGE_COMPLETE_ALL_TX(vdev);
  1390. if (pkts_processed < budget_org) {
  1391. napi_complete(napi);
  1392. /* Re enable the Rx interrupts for the ring */
  1393. vxge_hw_device_unmask_all(hldev);
  1394. vxge_hw_device_flush_io(hldev);
  1395. }
  1396. return pkts_processed;
  1397. }
  1398. #ifdef CONFIG_NET_POLL_CONTROLLER
  1399. /**
  1400. * vxge_netpoll - netpoll event handler entry point
  1401. * @dev : pointer to the device structure.
  1402. * Description:
  1403. * This function will be called by upper layer to check for events on the
  1404. * interface in situations where interrupts are disabled. It is used for
  1405. * specific in-kernel networking tasks, such as remote consoles and kernel
  1406. * debugging over the network (example netdump in RedHat).
  1407. */
  1408. static void vxge_netpoll(struct net_device *dev)
  1409. {
  1410. struct __vxge_hw_device *hldev;
  1411. struct vxgedev *vdev;
  1412. vdev = netdev_priv(dev);
  1413. hldev = pci_get_drvdata(vdev->pdev);
  1414. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1415. if (pci_channel_offline(vdev->pdev))
  1416. return;
  1417. disable_irq(dev->irq);
  1418. vxge_hw_device_clear_tx_rx(hldev);
  1419. vxge_hw_device_clear_tx_rx(hldev);
  1420. VXGE_COMPLETE_ALL_RX(vdev);
  1421. VXGE_COMPLETE_ALL_TX(vdev);
  1422. enable_irq(dev->irq);
  1423. vxge_debug_entryexit(VXGE_TRACE,
  1424. "%s:%d Exiting...", __func__, __LINE__);
  1425. }
  1426. #endif
  1427. /* RTH configuration */
  1428. static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
  1429. {
  1430. enum vxge_hw_status status = VXGE_HW_OK;
  1431. struct vxge_hw_rth_hash_types hash_types;
  1432. u8 itable[256] = {0}; /* indirection table */
  1433. u8 mtable[256] = {0}; /* CPU to vpath mapping */
  1434. int index;
  1435. /*
  1436. * Filling
  1437. * - itable with bucket numbers
  1438. * - mtable with bucket-to-vpath mapping
  1439. */
  1440. for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
  1441. itable[index] = index;
  1442. mtable[index] = index % vdev->no_of_vpath;
  1443. }
  1444. /* set indirection table, bucket-to-vpath mapping */
  1445. status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
  1446. vdev->no_of_vpath,
  1447. mtable, itable,
  1448. vdev->config.rth_bkt_sz);
  1449. if (status != VXGE_HW_OK) {
  1450. vxge_debug_init(VXGE_ERR,
  1451. "RTH indirection table configuration failed "
  1452. "for vpath:%d", vdev->vpaths[0].device_id);
  1453. return status;
  1454. }
  1455. /* Fill RTH hash types */
  1456. hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
  1457. hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
  1458. hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
  1459. hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
  1460. hash_types.hash_type_tcpipv6ex_en =
  1461. vdev->config.rth_hash_type_tcpipv6ex;
  1462. hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
  1463. /*
  1464. * Because the itable_set() method uses the active_table field
  1465. * for the target virtual path the RTH config should be updated
  1466. * for all VPATHs. The h/w only uses the lowest numbered VPATH
  1467. * when steering frames.
  1468. */
  1469. for (index = 0; index < vdev->no_of_vpath; index++) {
  1470. status = vxge_hw_vpath_rts_rth_set(
  1471. vdev->vpaths[index].handle,
  1472. vdev->config.rth_algorithm,
  1473. &hash_types,
  1474. vdev->config.rth_bkt_sz);
  1475. if (status != VXGE_HW_OK) {
  1476. vxge_debug_init(VXGE_ERR,
  1477. "RTH configuration failed for vpath:%d",
  1478. vdev->vpaths[index].device_id);
  1479. return status;
  1480. }
  1481. }
  1482. return status;
  1483. }
  1484. static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
  1485. {
  1486. struct vxge_mac_addrs *new_mac_entry;
  1487. u8 *mac_address = NULL;
  1488. if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
  1489. return TRUE;
  1490. new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
  1491. if (!new_mac_entry) {
  1492. vxge_debug_mem(VXGE_ERR,
  1493. "%s: memory allocation failed",
  1494. VXGE_DRIVER_NAME);
  1495. return FALSE;
  1496. }
  1497. list_add(&new_mac_entry->item, &vpath->mac_addr_list);
  1498. /* Copy the new mac address to the list */
  1499. mac_address = (u8 *)&new_mac_entry->macaddr;
  1500. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1501. new_mac_entry->state = mac->state;
  1502. vpath->mac_addr_cnt++;
  1503. /* Is this a multicast address */
  1504. if (0x01 & mac->macaddr[0])
  1505. vpath->mcast_addr_cnt++;
  1506. return TRUE;
  1507. }
  1508. /* Add a mac address to DA table */
  1509. static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
  1510. struct macInfo *mac)
  1511. {
  1512. enum vxge_hw_status status = VXGE_HW_OK;
  1513. struct vxge_vpath *vpath;
  1514. enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
  1515. if (0x01 & mac->macaddr[0]) /* multicast address */
  1516. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
  1517. else
  1518. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
  1519. vpath = &vdev->vpaths[mac->vpath_no];
  1520. status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
  1521. mac->macmask, duplicate_mode);
  1522. if (status != VXGE_HW_OK) {
  1523. vxge_debug_init(VXGE_ERR,
  1524. "DA config add entry failed for vpath:%d",
  1525. vpath->device_id);
  1526. } else
  1527. if (FALSE == vxge_mac_list_add(vpath, mac))
  1528. status = -EPERM;
  1529. return status;
  1530. }
  1531. static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
  1532. {
  1533. struct list_head *entry, *next;
  1534. u64 del_mac = 0;
  1535. u8 *mac_address = (u8 *)(&del_mac);
  1536. /* Copy the mac address to delete from the list */
  1537. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1538. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1539. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
  1540. list_del(entry);
  1541. kfree((struct vxge_mac_addrs *)entry);
  1542. vpath->mac_addr_cnt--;
  1543. /* Is this a multicast address */
  1544. if (0x01 & mac->macaddr[0])
  1545. vpath->mcast_addr_cnt--;
  1546. return TRUE;
  1547. }
  1548. }
  1549. return FALSE;
  1550. }
  1551. /* delete a mac address from DA table */
  1552. static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
  1553. struct macInfo *mac)
  1554. {
  1555. enum vxge_hw_status status = VXGE_HW_OK;
  1556. struct vxge_vpath *vpath;
  1557. vpath = &vdev->vpaths[mac->vpath_no];
  1558. status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
  1559. mac->macmask);
  1560. if (status != VXGE_HW_OK) {
  1561. vxge_debug_init(VXGE_ERR,
  1562. "DA config delete entry failed for vpath:%d",
  1563. vpath->device_id);
  1564. } else
  1565. vxge_mac_list_del(vpath, mac);
  1566. return status;
  1567. }
  1568. /* list all mac addresses from DA table */
  1569. enum vxge_hw_status
  1570. static vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath,
  1571. struct macInfo *mac)
  1572. {
  1573. enum vxge_hw_status status = VXGE_HW_OK;
  1574. unsigned char macmask[ETH_ALEN];
  1575. unsigned char macaddr[ETH_ALEN];
  1576. status = vxge_hw_vpath_mac_addr_get(vpath->handle,
  1577. macaddr, macmask);
  1578. if (status != VXGE_HW_OK) {
  1579. vxge_debug_init(VXGE_ERR,
  1580. "DA config list entry failed for vpath:%d",
  1581. vpath->device_id);
  1582. return status;
  1583. }
  1584. while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
  1585. status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
  1586. macaddr, macmask);
  1587. if (status != VXGE_HW_OK)
  1588. break;
  1589. }
  1590. return status;
  1591. }
  1592. /* Store all vlan ids from the list to the vid table */
  1593. static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
  1594. {
  1595. enum vxge_hw_status status = VXGE_HW_OK;
  1596. struct vxgedev *vdev = vpath->vdev;
  1597. u16 vid;
  1598. if (vdev->vlgrp && vpath->is_open) {
  1599. for (vid = 0; vid < VLAN_N_VID; vid++) {
  1600. if (!vlan_group_get_device(vdev->vlgrp, vid))
  1601. continue;
  1602. /* Add these vlan to the vid table */
  1603. status = vxge_hw_vpath_vid_add(vpath->handle, vid);
  1604. }
  1605. }
  1606. return status;
  1607. }
  1608. /* Store all mac addresses from the list to the DA table */
  1609. static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
  1610. {
  1611. enum vxge_hw_status status = VXGE_HW_OK;
  1612. struct macInfo mac_info;
  1613. u8 *mac_address = NULL;
  1614. struct list_head *entry, *next;
  1615. memset(&mac_info, 0, sizeof(struct macInfo));
  1616. if (vpath->is_open) {
  1617. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1618. mac_address =
  1619. (u8 *)&
  1620. ((struct vxge_mac_addrs *)entry)->macaddr;
  1621. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1622. ((struct vxge_mac_addrs *)entry)->state =
  1623. VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1624. /* does this mac address already exist in da table? */
  1625. status = vxge_search_mac_addr_in_da_table(vpath,
  1626. &mac_info);
  1627. if (status != VXGE_HW_OK) {
  1628. /* Add this mac address to the DA table */
  1629. status = vxge_hw_vpath_mac_addr_add(
  1630. vpath->handle, mac_info.macaddr,
  1631. mac_info.macmask,
  1632. VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
  1633. if (status != VXGE_HW_OK) {
  1634. vxge_debug_init(VXGE_ERR,
  1635. "DA add entry failed for vpath:%d",
  1636. vpath->device_id);
  1637. ((struct vxge_mac_addrs *)entry)->state
  1638. = VXGE_LL_MAC_ADDR_IN_LIST;
  1639. }
  1640. }
  1641. }
  1642. }
  1643. return status;
  1644. }
  1645. /* reset vpaths */
  1646. enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
  1647. {
  1648. enum vxge_hw_status status = VXGE_HW_OK;
  1649. struct vxge_vpath *vpath;
  1650. int i;
  1651. for (i = 0; i < vdev->no_of_vpath; i++) {
  1652. vpath = &vdev->vpaths[i];
  1653. if (vpath->handle) {
  1654. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1655. if (is_vxge_card_up(vdev) &&
  1656. vxge_hw_vpath_recover_from_reset(
  1657. vpath->handle) != VXGE_HW_OK) {
  1658. vxge_debug_init(VXGE_ERR,
  1659. "vxge_hw_vpath_recover_"
  1660. "from_reset failed for vpath: "
  1661. "%d", i);
  1662. return status;
  1663. }
  1664. } else {
  1665. vxge_debug_init(VXGE_ERR,
  1666. "vxge_hw_vpath_reset failed for "
  1667. "vpath:%d", i);
  1668. return status;
  1669. }
  1670. }
  1671. }
  1672. return status;
  1673. }
  1674. /* close vpaths */
  1675. static void vxge_close_vpaths(struct vxgedev *vdev, int index)
  1676. {
  1677. struct vxge_vpath *vpath;
  1678. int i;
  1679. for (i = index; i < vdev->no_of_vpath; i++) {
  1680. vpath = &vdev->vpaths[i];
  1681. if (vpath->handle && vpath->is_open) {
  1682. vxge_hw_vpath_close(vpath->handle);
  1683. vdev->stats.vpaths_open--;
  1684. }
  1685. vpath->is_open = 0;
  1686. vpath->handle = NULL;
  1687. }
  1688. }
  1689. /* open vpaths */
  1690. static int vxge_open_vpaths(struct vxgedev *vdev)
  1691. {
  1692. struct vxge_hw_vpath_attr attr;
  1693. enum vxge_hw_status status;
  1694. struct vxge_vpath *vpath;
  1695. u32 vp_id = 0;
  1696. int i;
  1697. for (i = 0; i < vdev->no_of_vpath; i++) {
  1698. vpath = &vdev->vpaths[i];
  1699. vxge_assert(vpath->is_configured);
  1700. if (!vdev->titan1) {
  1701. struct vxge_hw_vp_config *vcfg;
  1702. vcfg = &vdev->devh->config.vp_config[vpath->device_id];
  1703. vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
  1704. vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
  1705. vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
  1706. vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
  1707. vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
  1708. vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
  1709. vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
  1710. vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
  1711. vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
  1712. }
  1713. attr.vp_id = vpath->device_id;
  1714. attr.fifo_attr.callback = vxge_xmit_compl;
  1715. attr.fifo_attr.txdl_term = vxge_tx_term;
  1716. attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
  1717. attr.fifo_attr.userdata = &vpath->fifo;
  1718. attr.ring_attr.callback = vxge_rx_1b_compl;
  1719. attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
  1720. attr.ring_attr.rxd_term = vxge_rx_term;
  1721. attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
  1722. attr.ring_attr.userdata = &vpath->ring;
  1723. vpath->ring.ndev = vdev->ndev;
  1724. vpath->ring.pdev = vdev->pdev;
  1725. status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
  1726. if (status == VXGE_HW_OK) {
  1727. vpath->fifo.handle =
  1728. (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
  1729. vpath->ring.handle =
  1730. (struct __vxge_hw_ring *)attr.ring_attr.userdata;
  1731. vpath->fifo.tx_steering_type =
  1732. vdev->config.tx_steering_type;
  1733. vpath->fifo.ndev = vdev->ndev;
  1734. vpath->fifo.pdev = vdev->pdev;
  1735. if (vdev->config.tx_steering_type)
  1736. vpath->fifo.txq =
  1737. netdev_get_tx_queue(vdev->ndev, i);
  1738. else
  1739. vpath->fifo.txq =
  1740. netdev_get_tx_queue(vdev->ndev, 0);
  1741. vpath->fifo.indicate_max_pkts =
  1742. vdev->config.fifo_indicate_max_pkts;
  1743. vpath->ring.rx_vector_no = 0;
  1744. vpath->ring.rx_csum = vdev->rx_csum;
  1745. vpath->ring.rx_hwts = vdev->rx_hwts;
  1746. vpath->is_open = 1;
  1747. vdev->vp_handles[i] = vpath->handle;
  1748. vpath->ring.gro_enable = vdev->config.gro_enable;
  1749. vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
  1750. vdev->stats.vpaths_open++;
  1751. } else {
  1752. vdev->stats.vpath_open_fail++;
  1753. vxge_debug_init(VXGE_ERR,
  1754. "%s: vpath: %d failed to open "
  1755. "with status: %d",
  1756. vdev->ndev->name, vpath->device_id,
  1757. status);
  1758. vxge_close_vpaths(vdev, 0);
  1759. return -EPERM;
  1760. }
  1761. vp_id = vpath->handle->vpath->vp_id;
  1762. vdev->vpaths_deployed |= vxge_mBIT(vp_id);
  1763. }
  1764. return VXGE_HW_OK;
  1765. }
  1766. /*
  1767. * vxge_isr_napi
  1768. * @irq: the irq of the device.
  1769. * @dev_id: a void pointer to the hldev structure of the Titan device
  1770. * @ptregs: pointer to the registers pushed on the stack.
  1771. *
  1772. * This function is the ISR handler of the device when napi is enabled. It
  1773. * identifies the reason for the interrupt and calls the relevant service
  1774. * routines.
  1775. */
  1776. static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
  1777. {
  1778. struct net_device *dev;
  1779. struct __vxge_hw_device *hldev;
  1780. u64 reason;
  1781. enum vxge_hw_status status;
  1782. struct vxgedev *vdev = (struct vxgedev *)dev_id;
  1783. vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1784. dev = vdev->ndev;
  1785. hldev = pci_get_drvdata(vdev->pdev);
  1786. if (pci_channel_offline(vdev->pdev))
  1787. return IRQ_NONE;
  1788. if (unlikely(!is_vxge_card_up(vdev)))
  1789. return IRQ_HANDLED;
  1790. status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode,
  1791. &reason);
  1792. if (status == VXGE_HW_OK) {
  1793. vxge_hw_device_mask_all(hldev);
  1794. if (reason &
  1795. VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
  1796. vdev->vpaths_deployed >>
  1797. (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
  1798. vxge_hw_device_clear_tx_rx(hldev);
  1799. napi_schedule(&vdev->napi);
  1800. vxge_debug_intr(VXGE_TRACE,
  1801. "%s:%d Exiting...", __func__, __LINE__);
  1802. return IRQ_HANDLED;
  1803. } else
  1804. vxge_hw_device_unmask_all(hldev);
  1805. } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
  1806. (status == VXGE_HW_ERR_CRITICAL) ||
  1807. (status == VXGE_HW_ERR_FIFO))) {
  1808. vxge_hw_device_mask_all(hldev);
  1809. vxge_hw_device_flush_io(hldev);
  1810. return IRQ_HANDLED;
  1811. } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
  1812. return IRQ_HANDLED;
  1813. vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
  1814. return IRQ_NONE;
  1815. }
  1816. #ifdef CONFIG_PCI_MSI
  1817. static irqreturn_t
  1818. vxge_tx_msix_handle(int irq, void *dev_id)
  1819. {
  1820. struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
  1821. VXGE_COMPLETE_VPATH_TX(fifo);
  1822. return IRQ_HANDLED;
  1823. }
  1824. static irqreturn_t
  1825. vxge_rx_msix_napi_handle(int irq, void *dev_id)
  1826. {
  1827. struct vxge_ring *ring = (struct vxge_ring *)dev_id;
  1828. /* MSIX_IDX for Rx is 1 */
  1829. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
  1830. ring->rx_vector_no);
  1831. napi_schedule(&ring->napi);
  1832. return IRQ_HANDLED;
  1833. }
  1834. static irqreturn_t
  1835. vxge_alarm_msix_handle(int irq, void *dev_id)
  1836. {
  1837. int i;
  1838. enum vxge_hw_status status;
  1839. struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
  1840. struct vxgedev *vdev = vpath->vdev;
  1841. int msix_id = (vpath->handle->vpath->vp_id *
  1842. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1843. for (i = 0; i < vdev->no_of_vpath; i++) {
  1844. vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
  1845. status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
  1846. vdev->exec_mode);
  1847. if (status == VXGE_HW_OK) {
  1848. vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
  1849. msix_id);
  1850. continue;
  1851. }
  1852. vxge_debug_intr(VXGE_ERR,
  1853. "%s: vxge_hw_vpath_alarm_process failed %x ",
  1854. VXGE_DRIVER_NAME, status);
  1855. }
  1856. return IRQ_HANDLED;
  1857. }
  1858. static int vxge_alloc_msix(struct vxgedev *vdev)
  1859. {
  1860. int j, i, ret = 0;
  1861. int msix_intr_vect = 0, temp;
  1862. vdev->intr_cnt = 0;
  1863. start:
  1864. /* Tx/Rx MSIX Vectors count */
  1865. vdev->intr_cnt = vdev->no_of_vpath * 2;
  1866. /* Alarm MSIX Vectors count */
  1867. vdev->intr_cnt++;
  1868. vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
  1869. GFP_KERNEL);
  1870. if (!vdev->entries) {
  1871. vxge_debug_init(VXGE_ERR,
  1872. "%s: memory allocation failed",
  1873. VXGE_DRIVER_NAME);
  1874. ret = -ENOMEM;
  1875. goto alloc_entries_failed;
  1876. }
  1877. vdev->vxge_entries = kcalloc(vdev->intr_cnt,
  1878. sizeof(struct vxge_msix_entry),
  1879. GFP_KERNEL);
  1880. if (!vdev->vxge_entries) {
  1881. vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
  1882. VXGE_DRIVER_NAME);
  1883. ret = -ENOMEM;
  1884. goto alloc_vxge_entries_failed;
  1885. }
  1886. for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
  1887. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1888. /* Initialize the fifo vector */
  1889. vdev->entries[j].entry = msix_intr_vect;
  1890. vdev->vxge_entries[j].entry = msix_intr_vect;
  1891. vdev->vxge_entries[j].in_use = 0;
  1892. j++;
  1893. /* Initialize the ring vector */
  1894. vdev->entries[j].entry = msix_intr_vect + 1;
  1895. vdev->vxge_entries[j].entry = msix_intr_vect + 1;
  1896. vdev->vxge_entries[j].in_use = 0;
  1897. j++;
  1898. }
  1899. /* Initialize the alarm vector */
  1900. vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
  1901. vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
  1902. vdev->vxge_entries[j].in_use = 0;
  1903. ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
  1904. if (ret > 0) {
  1905. vxge_debug_init(VXGE_ERR,
  1906. "%s: MSI-X enable failed for %d vectors, ret: %d",
  1907. VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
  1908. if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
  1909. ret = -ENODEV;
  1910. goto enable_msix_failed;
  1911. }
  1912. kfree(vdev->entries);
  1913. kfree(vdev->vxge_entries);
  1914. vdev->entries = NULL;
  1915. vdev->vxge_entries = NULL;
  1916. /* Try with less no of vector by reducing no of vpaths count */
  1917. temp = (ret - 1)/2;
  1918. vxge_close_vpaths(vdev, temp);
  1919. vdev->no_of_vpath = temp;
  1920. goto start;
  1921. } else if (ret < 0) {
  1922. ret = -ENODEV;
  1923. goto enable_msix_failed;
  1924. }
  1925. return 0;
  1926. enable_msix_failed:
  1927. kfree(vdev->vxge_entries);
  1928. alloc_vxge_entries_failed:
  1929. kfree(vdev->entries);
  1930. alloc_entries_failed:
  1931. return ret;
  1932. }
  1933. static int vxge_enable_msix(struct vxgedev *vdev)
  1934. {
  1935. int i, ret = 0;
  1936. /* 0 - Tx, 1 - Rx */
  1937. int tim_msix_id[4] = {0, 1, 0, 0};
  1938. vdev->intr_cnt = 0;
  1939. /* allocate msix vectors */
  1940. ret = vxge_alloc_msix(vdev);
  1941. if (!ret) {
  1942. for (i = 0; i < vdev->no_of_vpath; i++) {
  1943. struct vxge_vpath *vpath = &vdev->vpaths[i];
  1944. /* If fifo or ring are not enabled, the MSIX vector for
  1945. * it should be set to 0.
  1946. */
  1947. vpath->ring.rx_vector_no = (vpath->device_id *
  1948. VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
  1949. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1950. VXGE_ALARM_MSIX_ID);
  1951. }
  1952. }
  1953. return ret;
  1954. }
  1955. static void vxge_rem_msix_isr(struct vxgedev *vdev)
  1956. {
  1957. int intr_cnt;
  1958. for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
  1959. intr_cnt++) {
  1960. if (vdev->vxge_entries[intr_cnt].in_use) {
  1961. synchronize_irq(vdev->entries[intr_cnt].vector);
  1962. free_irq(vdev->entries[intr_cnt].vector,
  1963. vdev->vxge_entries[intr_cnt].arg);
  1964. vdev->vxge_entries[intr_cnt].in_use = 0;
  1965. }
  1966. }
  1967. kfree(vdev->entries);
  1968. kfree(vdev->vxge_entries);
  1969. vdev->entries = NULL;
  1970. vdev->vxge_entries = NULL;
  1971. if (vdev->config.intr_type == MSI_X)
  1972. pci_disable_msix(vdev->pdev);
  1973. }
  1974. #endif
  1975. static void vxge_rem_isr(struct vxgedev *vdev)
  1976. {
  1977. struct __vxge_hw_device *hldev;
  1978. hldev = pci_get_drvdata(vdev->pdev);
  1979. #ifdef CONFIG_PCI_MSI
  1980. if (vdev->config.intr_type == MSI_X) {
  1981. vxge_rem_msix_isr(vdev);
  1982. } else
  1983. #endif
  1984. if (vdev->config.intr_type == INTA) {
  1985. synchronize_irq(vdev->pdev->irq);
  1986. free_irq(vdev->pdev->irq, vdev);
  1987. }
  1988. }
  1989. static int vxge_add_isr(struct vxgedev *vdev)
  1990. {
  1991. int ret = 0;
  1992. #ifdef CONFIG_PCI_MSI
  1993. int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
  1994. int pci_fun = PCI_FUNC(vdev->pdev->devfn);
  1995. if (vdev->config.intr_type == MSI_X)
  1996. ret = vxge_enable_msix(vdev);
  1997. if (ret) {
  1998. vxge_debug_init(VXGE_ERR,
  1999. "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
  2000. vxge_debug_init(VXGE_ERR,
  2001. "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
  2002. vdev->config.intr_type = INTA;
  2003. }
  2004. if (vdev->config.intr_type == MSI_X) {
  2005. for (intr_idx = 0;
  2006. intr_idx < (vdev->no_of_vpath *
  2007. VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
  2008. msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
  2009. irq_req = 0;
  2010. switch (msix_idx) {
  2011. case 0:
  2012. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2013. "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
  2014. vdev->ndev->name,
  2015. vdev->entries[intr_cnt].entry,
  2016. pci_fun, vp_idx);
  2017. ret = request_irq(
  2018. vdev->entries[intr_cnt].vector,
  2019. vxge_tx_msix_handle, 0,
  2020. vdev->desc[intr_cnt],
  2021. &vdev->vpaths[vp_idx].fifo);
  2022. vdev->vxge_entries[intr_cnt].arg =
  2023. &vdev->vpaths[vp_idx].fifo;
  2024. irq_req = 1;
  2025. break;
  2026. case 1:
  2027. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2028. "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
  2029. vdev->ndev->name,
  2030. vdev->entries[intr_cnt].entry,
  2031. pci_fun, vp_idx);
  2032. ret = request_irq(
  2033. vdev->entries[intr_cnt].vector,
  2034. vxge_rx_msix_napi_handle,
  2035. 0,
  2036. vdev->desc[intr_cnt],
  2037. &vdev->vpaths[vp_idx].ring);
  2038. vdev->vxge_entries[intr_cnt].arg =
  2039. &vdev->vpaths[vp_idx].ring;
  2040. irq_req = 1;
  2041. break;
  2042. }
  2043. if (ret) {
  2044. vxge_debug_init(VXGE_ERR,
  2045. "%s: MSIX - %d Registration failed",
  2046. vdev->ndev->name, intr_cnt);
  2047. vxge_rem_msix_isr(vdev);
  2048. vdev->config.intr_type = INTA;
  2049. vxge_debug_init(VXGE_ERR,
  2050. "%s: Defaulting to INTA"
  2051. , vdev->ndev->name);
  2052. goto INTA_MODE;
  2053. }
  2054. if (irq_req) {
  2055. /* We requested for this msix interrupt */
  2056. vdev->vxge_entries[intr_cnt].in_use = 1;
  2057. msix_idx += vdev->vpaths[vp_idx].device_id *
  2058. VXGE_HW_VPATH_MSIX_ACTIVE;
  2059. vxge_hw_vpath_msix_unmask(
  2060. vdev->vpaths[vp_idx].handle,
  2061. msix_idx);
  2062. intr_cnt++;
  2063. }
  2064. /* Point to next vpath handler */
  2065. if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
  2066. (vp_idx < (vdev->no_of_vpath - 1)))
  2067. vp_idx++;
  2068. }
  2069. intr_cnt = vdev->no_of_vpath * 2;
  2070. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2071. "%s:vxge:MSI-X %d - Alarm - fn:%d",
  2072. vdev->ndev->name,
  2073. vdev->entries[intr_cnt].entry,
  2074. pci_fun);
  2075. /* For Alarm interrupts */
  2076. ret = request_irq(vdev->entries[intr_cnt].vector,
  2077. vxge_alarm_msix_handle, 0,
  2078. vdev->desc[intr_cnt],
  2079. &vdev->vpaths[0]);
  2080. if (ret) {
  2081. vxge_debug_init(VXGE_ERR,
  2082. "%s: MSIX - %d Registration failed",
  2083. vdev->ndev->name, intr_cnt);
  2084. vxge_rem_msix_isr(vdev);
  2085. vdev->config.intr_type = INTA;
  2086. vxge_debug_init(VXGE_ERR,
  2087. "%s: Defaulting to INTA",
  2088. vdev->ndev->name);
  2089. goto INTA_MODE;
  2090. }
  2091. msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
  2092. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  2093. vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
  2094. msix_idx);
  2095. vdev->vxge_entries[intr_cnt].in_use = 1;
  2096. vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
  2097. }
  2098. INTA_MODE:
  2099. #endif
  2100. if (vdev->config.intr_type == INTA) {
  2101. snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
  2102. "%s:vxge:INTA", vdev->ndev->name);
  2103. vxge_hw_device_set_intr_type(vdev->devh,
  2104. VXGE_HW_INTR_MODE_IRQLINE);
  2105. vxge_hw_vpath_tti_ci_set(vdev->devh,
  2106. vdev->vpaths[0].device_id);
  2107. ret = request_irq((int) vdev->pdev->irq,
  2108. vxge_isr_napi,
  2109. IRQF_SHARED, vdev->desc[0], vdev);
  2110. if (ret) {
  2111. vxge_debug_init(VXGE_ERR,
  2112. "%s %s-%d: ISR registration failed",
  2113. VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
  2114. return -ENODEV;
  2115. }
  2116. vxge_debug_init(VXGE_TRACE,
  2117. "new %s-%d line allocated",
  2118. "IRQ", vdev->pdev->irq);
  2119. }
  2120. return VXGE_HW_OK;
  2121. }
  2122. static void vxge_poll_vp_reset(unsigned long data)
  2123. {
  2124. struct vxgedev *vdev = (struct vxgedev *)data;
  2125. int i, j = 0;
  2126. for (i = 0; i < vdev->no_of_vpath; i++) {
  2127. if (test_bit(i, &vdev->vp_reset)) {
  2128. vxge_reset_vpath(vdev, i);
  2129. j++;
  2130. }
  2131. }
  2132. if (j && (vdev->config.intr_type != MSI_X)) {
  2133. vxge_hw_device_unmask_all(vdev->devh);
  2134. vxge_hw_device_flush_io(vdev->devh);
  2135. }
  2136. mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
  2137. }
  2138. static void vxge_poll_vp_lockup(unsigned long data)
  2139. {
  2140. struct vxgedev *vdev = (struct vxgedev *)data;
  2141. enum vxge_hw_status status = VXGE_HW_OK;
  2142. struct vxge_vpath *vpath;
  2143. struct vxge_ring *ring;
  2144. int i;
  2145. for (i = 0; i < vdev->no_of_vpath; i++) {
  2146. ring = &vdev->vpaths[i].ring;
  2147. /* Did this vpath received any packets */
  2148. if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
  2149. status = vxge_hw_vpath_check_leak(ring->handle);
  2150. /* Did it received any packets last time */
  2151. if ((VXGE_HW_FAIL == status) &&
  2152. (VXGE_HW_FAIL == ring->last_status)) {
  2153. /* schedule vpath reset */
  2154. if (!test_and_set_bit(i, &vdev->vp_reset)) {
  2155. vpath = &vdev->vpaths[i];
  2156. /* disable interrupts for this vpath */
  2157. vxge_vpath_intr_disable(vdev, i);
  2158. /* stop the queue for this vpath */
  2159. netif_tx_stop_queue(vpath->fifo.txq);
  2160. continue;
  2161. }
  2162. }
  2163. }
  2164. ring->stats.prev_rx_frms = ring->stats.rx_frms;
  2165. ring->last_status = status;
  2166. }
  2167. /* Check every 1 milli second */
  2168. mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
  2169. }
  2170. /**
  2171. * vxge_open
  2172. * @dev: pointer to the device structure.
  2173. *
  2174. * This function is the open entry point of the driver. It mainly calls a
  2175. * function to allocate Rx buffers and inserts them into the buffer
  2176. * descriptors and then enables the Rx part of the NIC.
  2177. * Return value: '0' on success and an appropriate (-)ve integer as
  2178. * defined in errno.h file on failure.
  2179. */
  2180. static int
  2181. vxge_open(struct net_device *dev)
  2182. {
  2183. enum vxge_hw_status status;
  2184. struct vxgedev *vdev;
  2185. struct __vxge_hw_device *hldev;
  2186. struct vxge_vpath *vpath;
  2187. int ret = 0;
  2188. int i;
  2189. u64 val64, function_mode;
  2190. vxge_debug_entryexit(VXGE_TRACE,
  2191. "%s: %s:%d", dev->name, __func__, __LINE__);
  2192. vdev = netdev_priv(dev);
  2193. hldev = pci_get_drvdata(vdev->pdev);
  2194. function_mode = vdev->config.device_hw_info.function_mode;
  2195. /* make sure you have link off by default every time Nic is
  2196. * initialized */
  2197. netif_carrier_off(dev);
  2198. /* Open VPATHs */
  2199. status = vxge_open_vpaths(vdev);
  2200. if (status != VXGE_HW_OK) {
  2201. vxge_debug_init(VXGE_ERR,
  2202. "%s: fatal: Vpath open failed", vdev->ndev->name);
  2203. ret = -EPERM;
  2204. goto out0;
  2205. }
  2206. vdev->mtu = dev->mtu;
  2207. status = vxge_add_isr(vdev);
  2208. if (status != VXGE_HW_OK) {
  2209. vxge_debug_init(VXGE_ERR,
  2210. "%s: fatal: ISR add failed", dev->name);
  2211. ret = -EPERM;
  2212. goto out1;
  2213. }
  2214. if (vdev->config.intr_type != MSI_X) {
  2215. netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
  2216. vdev->config.napi_weight);
  2217. napi_enable(&vdev->napi);
  2218. for (i = 0; i < vdev->no_of_vpath; i++) {
  2219. vpath = &vdev->vpaths[i];
  2220. vpath->ring.napi_p = &vdev->napi;
  2221. }
  2222. } else {
  2223. for (i = 0; i < vdev->no_of_vpath; i++) {
  2224. vpath = &vdev->vpaths[i];
  2225. netif_napi_add(dev, &vpath->ring.napi,
  2226. vxge_poll_msix, vdev->config.napi_weight);
  2227. napi_enable(&vpath->ring.napi);
  2228. vpath->ring.napi_p = &vpath->ring.napi;
  2229. }
  2230. }
  2231. /* configure RTH */
  2232. if (vdev->config.rth_steering) {
  2233. status = vxge_rth_configure(vdev);
  2234. if (status != VXGE_HW_OK) {
  2235. vxge_debug_init(VXGE_ERR,
  2236. "%s: fatal: RTH configuration failed",
  2237. dev->name);
  2238. ret = -EPERM;
  2239. goto out2;
  2240. }
  2241. }
  2242. printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
  2243. hldev->config.rth_en ? "enabled" : "disabled");
  2244. for (i = 0; i < vdev->no_of_vpath; i++) {
  2245. vpath = &vdev->vpaths[i];
  2246. /* set initial mtu before enabling the device */
  2247. status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
  2248. if (status != VXGE_HW_OK) {
  2249. vxge_debug_init(VXGE_ERR,
  2250. "%s: fatal: can not set new MTU", dev->name);
  2251. ret = -EPERM;
  2252. goto out2;
  2253. }
  2254. }
  2255. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
  2256. vxge_debug_init(vdev->level_trace,
  2257. "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
  2258. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
  2259. /* Restore the DA, VID table and also multicast and promiscuous mode
  2260. * states
  2261. */
  2262. if (vdev->all_multi_flg) {
  2263. for (i = 0; i < vdev->no_of_vpath; i++) {
  2264. vpath = &vdev->vpaths[i];
  2265. vxge_restore_vpath_mac_addr(vpath);
  2266. vxge_restore_vpath_vid_table(vpath);
  2267. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2268. if (status != VXGE_HW_OK)
  2269. vxge_debug_init(VXGE_ERR,
  2270. "%s:%d Enabling multicast failed",
  2271. __func__, __LINE__);
  2272. }
  2273. }
  2274. /* Enable vpath to sniff all unicast/multicast traffic that not
  2275. * addressed to them. We allow promiscous mode for PF only
  2276. */
  2277. val64 = 0;
  2278. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2279. val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
  2280. vxge_hw_mgmt_reg_write(vdev->devh,
  2281. vxge_hw_mgmt_reg_type_mrpcim,
  2282. 0,
  2283. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2284. rxmac_authorize_all_addr),
  2285. val64);
  2286. vxge_hw_mgmt_reg_write(vdev->devh,
  2287. vxge_hw_mgmt_reg_type_mrpcim,
  2288. 0,
  2289. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2290. rxmac_authorize_all_vid),
  2291. val64);
  2292. vxge_set_multicast(dev);
  2293. /* Enabling Bcast and mcast for all vpath */
  2294. for (i = 0; i < vdev->no_of_vpath; i++) {
  2295. vpath = &vdev->vpaths[i];
  2296. status = vxge_hw_vpath_bcast_enable(vpath->handle);
  2297. if (status != VXGE_HW_OK)
  2298. vxge_debug_init(VXGE_ERR,
  2299. "%s : Can not enable bcast for vpath "
  2300. "id %d", dev->name, i);
  2301. if (vdev->config.addr_learn_en) {
  2302. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2303. if (status != VXGE_HW_OK)
  2304. vxge_debug_init(VXGE_ERR,
  2305. "%s : Can not enable mcast for vpath "
  2306. "id %d", dev->name, i);
  2307. }
  2308. }
  2309. vxge_hw_device_setpause_data(vdev->devh, 0,
  2310. vdev->config.tx_pause_enable,
  2311. vdev->config.rx_pause_enable);
  2312. if (vdev->vp_reset_timer.function == NULL)
  2313. vxge_os_timer(vdev->vp_reset_timer,
  2314. vxge_poll_vp_reset, vdev, (HZ/2));
  2315. /* There is no need to check for RxD leak and RxD lookup on Titan1A */
  2316. if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
  2317. vxge_os_timer(vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
  2318. HZ / 2);
  2319. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2320. smp_wmb();
  2321. if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
  2322. netif_carrier_on(vdev->ndev);
  2323. netdev_notice(vdev->ndev, "Link Up\n");
  2324. vdev->stats.link_up++;
  2325. }
  2326. vxge_hw_device_intr_enable(vdev->devh);
  2327. smp_wmb();
  2328. for (i = 0; i < vdev->no_of_vpath; i++) {
  2329. vpath = &vdev->vpaths[i];
  2330. vxge_hw_vpath_enable(vpath->handle);
  2331. smp_wmb();
  2332. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  2333. }
  2334. netif_tx_start_all_queues(vdev->ndev);
  2335. goto out0;
  2336. out2:
  2337. vxge_rem_isr(vdev);
  2338. /* Disable napi */
  2339. if (vdev->config.intr_type != MSI_X)
  2340. napi_disable(&vdev->napi);
  2341. else {
  2342. for (i = 0; i < vdev->no_of_vpath; i++)
  2343. napi_disable(&vdev->vpaths[i].ring.napi);
  2344. }
  2345. out1:
  2346. vxge_close_vpaths(vdev, 0);
  2347. out0:
  2348. vxge_debug_entryexit(VXGE_TRACE,
  2349. "%s: %s:%d Exiting...",
  2350. dev->name, __func__, __LINE__);
  2351. return ret;
  2352. }
  2353. /* Loop throught the mac address list and delete all the entries */
  2354. static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
  2355. {
  2356. struct list_head *entry, *next;
  2357. if (list_empty(&vpath->mac_addr_list))
  2358. return;
  2359. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  2360. list_del(entry);
  2361. kfree((struct vxge_mac_addrs *)entry);
  2362. }
  2363. }
  2364. static void vxge_napi_del_all(struct vxgedev *vdev)
  2365. {
  2366. int i;
  2367. if (vdev->config.intr_type != MSI_X)
  2368. netif_napi_del(&vdev->napi);
  2369. else {
  2370. for (i = 0; i < vdev->no_of_vpath; i++)
  2371. netif_napi_del(&vdev->vpaths[i].ring.napi);
  2372. }
  2373. }
  2374. static int do_vxge_close(struct net_device *dev, int do_io)
  2375. {
  2376. enum vxge_hw_status status;
  2377. struct vxgedev *vdev;
  2378. struct __vxge_hw_device *hldev;
  2379. int i;
  2380. u64 val64, vpath_vector;
  2381. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  2382. dev->name, __func__, __LINE__);
  2383. vdev = netdev_priv(dev);
  2384. hldev = pci_get_drvdata(vdev->pdev);
  2385. if (unlikely(!is_vxge_card_up(vdev)))
  2386. return 0;
  2387. /* If vxge_handle_crit_err task is executing,
  2388. * wait till it completes. */
  2389. while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  2390. msleep(50);
  2391. if (do_io) {
  2392. /* Put the vpath back in normal mode */
  2393. vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
  2394. status = vxge_hw_mgmt_reg_read(vdev->devh,
  2395. vxge_hw_mgmt_reg_type_mrpcim,
  2396. 0,
  2397. (ulong)offsetof(
  2398. struct vxge_hw_mrpcim_reg,
  2399. rts_mgr_cbasin_cfg),
  2400. &val64);
  2401. if (status == VXGE_HW_OK) {
  2402. val64 &= ~vpath_vector;
  2403. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2404. vxge_hw_mgmt_reg_type_mrpcim,
  2405. 0,
  2406. (ulong)offsetof(
  2407. struct vxge_hw_mrpcim_reg,
  2408. rts_mgr_cbasin_cfg),
  2409. val64);
  2410. }
  2411. /* Remove the function 0 from promiscous mode */
  2412. vxge_hw_mgmt_reg_write(vdev->devh,
  2413. vxge_hw_mgmt_reg_type_mrpcim,
  2414. 0,
  2415. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2416. rxmac_authorize_all_addr),
  2417. 0);
  2418. vxge_hw_mgmt_reg_write(vdev->devh,
  2419. vxge_hw_mgmt_reg_type_mrpcim,
  2420. 0,
  2421. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2422. rxmac_authorize_all_vid),
  2423. 0);
  2424. smp_wmb();
  2425. }
  2426. if (vdev->titan1)
  2427. del_timer_sync(&vdev->vp_lockup_timer);
  2428. del_timer_sync(&vdev->vp_reset_timer);
  2429. if (do_io)
  2430. vxge_hw_device_wait_receive_idle(hldev);
  2431. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2432. /* Disable napi */
  2433. if (vdev->config.intr_type != MSI_X)
  2434. napi_disable(&vdev->napi);
  2435. else {
  2436. for (i = 0; i < vdev->no_of_vpath; i++)
  2437. napi_disable(&vdev->vpaths[i].ring.napi);
  2438. }
  2439. netif_carrier_off(vdev->ndev);
  2440. netdev_notice(vdev->ndev, "Link Down\n");
  2441. netif_tx_stop_all_queues(vdev->ndev);
  2442. /* Note that at this point xmit() is stopped by upper layer */
  2443. if (do_io)
  2444. vxge_hw_device_intr_disable(vdev->devh);
  2445. vxge_rem_isr(vdev);
  2446. vxge_napi_del_all(vdev);
  2447. if (do_io)
  2448. vxge_reset_all_vpaths(vdev);
  2449. vxge_close_vpaths(vdev, 0);
  2450. vxge_debug_entryexit(VXGE_TRACE,
  2451. "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
  2452. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  2453. return 0;
  2454. }
  2455. /**
  2456. * vxge_close
  2457. * @dev: device pointer.
  2458. *
  2459. * This is the stop entry point of the driver. It needs to undo exactly
  2460. * whatever was done by the open entry point, thus it's usually referred to
  2461. * as the close function.Among other things this function mainly stops the
  2462. * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
  2463. * Return value: '0' on success and an appropriate (-)ve integer as
  2464. * defined in errno.h file on failure.
  2465. */
  2466. static int
  2467. vxge_close(struct net_device *dev)
  2468. {
  2469. do_vxge_close(dev, 1);
  2470. return 0;
  2471. }
  2472. /**
  2473. * vxge_change_mtu
  2474. * @dev: net device pointer.
  2475. * @new_mtu :the new MTU size for the device.
  2476. *
  2477. * A driver entry point to change MTU size for the device. Before changing
  2478. * the MTU the device must be stopped.
  2479. */
  2480. static int vxge_change_mtu(struct net_device *dev, int new_mtu)
  2481. {
  2482. struct vxgedev *vdev = netdev_priv(dev);
  2483. vxge_debug_entryexit(vdev->level_trace,
  2484. "%s:%d", __func__, __LINE__);
  2485. if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
  2486. vxge_debug_init(vdev->level_err,
  2487. "%s: mtu size is invalid", dev->name);
  2488. return -EPERM;
  2489. }
  2490. /* check if device is down already */
  2491. if (unlikely(!is_vxge_card_up(vdev))) {
  2492. /* just store new value, will use later on open() */
  2493. dev->mtu = new_mtu;
  2494. vxge_debug_init(vdev->level_err,
  2495. "%s", "device is down on MTU change");
  2496. return 0;
  2497. }
  2498. vxge_debug_init(vdev->level_trace,
  2499. "trying to apply new MTU %d", new_mtu);
  2500. if (vxge_close(dev))
  2501. return -EIO;
  2502. dev->mtu = new_mtu;
  2503. vdev->mtu = new_mtu;
  2504. if (vxge_open(dev))
  2505. return -EIO;
  2506. vxge_debug_init(vdev->level_trace,
  2507. "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
  2508. vxge_debug_entryexit(vdev->level_trace,
  2509. "%s:%d Exiting...", __func__, __LINE__);
  2510. return 0;
  2511. }
  2512. /**
  2513. * vxge_get_stats64
  2514. * @dev: pointer to the device structure
  2515. * @stats: pointer to struct rtnl_link_stats64
  2516. *
  2517. */
  2518. static struct rtnl_link_stats64 *
  2519. vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
  2520. {
  2521. struct vxgedev *vdev = netdev_priv(dev);
  2522. int k;
  2523. /* net_stats already zeroed by caller */
  2524. for (k = 0; k < vdev->no_of_vpath; k++) {
  2525. net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
  2526. net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
  2527. net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
  2528. net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
  2529. net_stats->rx_dropped +=
  2530. vdev->vpaths[k].ring.stats.rx_dropped;
  2531. net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
  2532. net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
  2533. net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
  2534. }
  2535. return net_stats;
  2536. }
  2537. static enum vxge_hw_status vxge_timestamp_config(struct vxgedev *vdev,
  2538. int enable)
  2539. {
  2540. enum vxge_hw_status status;
  2541. u64 val64;
  2542. /* Timestamp is passed to the driver via the FCS, therefore we
  2543. * must disable the FCS stripping by the adapter. Since this is
  2544. * required for the driver to load (due to a hardware bug),
  2545. * there is no need to do anything special here.
  2546. */
  2547. if (enable)
  2548. val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
  2549. VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
  2550. VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
  2551. else
  2552. val64 = 0;
  2553. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2554. vxge_hw_mgmt_reg_type_mrpcim,
  2555. 0,
  2556. offsetof(struct vxge_hw_mrpcim_reg,
  2557. xmac_timestamp),
  2558. val64);
  2559. vxge_hw_device_flush_io(vdev->devh);
  2560. return status;
  2561. }
  2562. static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
  2563. {
  2564. struct hwtstamp_config config;
  2565. enum vxge_hw_status status;
  2566. int i;
  2567. if (copy_from_user(&config, data, sizeof(config)))
  2568. return -EFAULT;
  2569. /* reserved for future extensions */
  2570. if (config.flags)
  2571. return -EINVAL;
  2572. /* Transmit HW Timestamp not supported */
  2573. switch (config.tx_type) {
  2574. case HWTSTAMP_TX_OFF:
  2575. break;
  2576. case HWTSTAMP_TX_ON:
  2577. default:
  2578. return -ERANGE;
  2579. }
  2580. switch (config.rx_filter) {
  2581. case HWTSTAMP_FILTER_NONE:
  2582. status = vxge_timestamp_config(vdev, 0);
  2583. if (status != VXGE_HW_OK)
  2584. return -EFAULT;
  2585. vdev->rx_hwts = 0;
  2586. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2587. break;
  2588. case HWTSTAMP_FILTER_ALL:
  2589. case HWTSTAMP_FILTER_SOME:
  2590. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2591. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2592. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2593. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2594. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2595. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2596. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2597. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2598. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2599. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2600. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2601. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2602. status = vxge_timestamp_config(vdev, 1);
  2603. if (status != VXGE_HW_OK)
  2604. return -EFAULT;
  2605. vdev->rx_hwts = 1;
  2606. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2607. break;
  2608. default:
  2609. return -ERANGE;
  2610. }
  2611. for (i = 0; i < vdev->no_of_vpath; i++)
  2612. vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
  2613. if (copy_to_user(data, &config, sizeof(config)))
  2614. return -EFAULT;
  2615. return 0;
  2616. }
  2617. /**
  2618. * vxge_ioctl
  2619. * @dev: Device pointer.
  2620. * @ifr: An IOCTL specific structure, that can contain a pointer to
  2621. * a proprietary structure used to pass information to the driver.
  2622. * @cmd: This is used to distinguish between the different commands that
  2623. * can be passed to the IOCTL functions.
  2624. *
  2625. * Entry point for the Ioctl.
  2626. */
  2627. static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2628. {
  2629. struct vxgedev *vdev = netdev_priv(dev);
  2630. int ret;
  2631. switch (cmd) {
  2632. case SIOCSHWTSTAMP:
  2633. ret = vxge_hwtstamp_ioctl(vdev, rq->ifr_data);
  2634. if (ret)
  2635. return ret;
  2636. break;
  2637. default:
  2638. return -EOPNOTSUPP;
  2639. }
  2640. return 0;
  2641. }
  2642. /**
  2643. * vxge_tx_watchdog
  2644. * @dev: pointer to net device structure
  2645. *
  2646. * Watchdog for transmit side.
  2647. * This function is triggered if the Tx Queue is stopped
  2648. * for a pre-defined amount of time when the Interface is still up.
  2649. */
  2650. static void
  2651. vxge_tx_watchdog(struct net_device *dev)
  2652. {
  2653. struct vxgedev *vdev;
  2654. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2655. vdev = netdev_priv(dev);
  2656. vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
  2657. vxge_reset(vdev);
  2658. vxge_debug_entryexit(VXGE_TRACE,
  2659. "%s:%d Exiting...", __func__, __LINE__);
  2660. }
  2661. /**
  2662. * vxge_vlan_rx_register
  2663. * @dev: net device pointer.
  2664. * @grp: vlan group
  2665. *
  2666. * Vlan group registration
  2667. */
  2668. static void
  2669. vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
  2670. {
  2671. struct vxgedev *vdev;
  2672. struct vxge_vpath *vpath;
  2673. int vp;
  2674. u64 vid;
  2675. enum vxge_hw_status status;
  2676. int i;
  2677. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2678. vdev = netdev_priv(dev);
  2679. vpath = &vdev->vpaths[0];
  2680. if ((NULL == grp) && (vpath->is_open)) {
  2681. /* Get the first vlan */
  2682. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2683. while (status == VXGE_HW_OK) {
  2684. /* Delete this vlan from the vid table */
  2685. for (vp = 0; vp < vdev->no_of_vpath; vp++) {
  2686. vpath = &vdev->vpaths[vp];
  2687. if (!vpath->is_open)
  2688. continue;
  2689. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2690. }
  2691. /* Get the next vlan to be deleted */
  2692. vpath = &vdev->vpaths[0];
  2693. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2694. }
  2695. }
  2696. vdev->vlgrp = grp;
  2697. for (i = 0; i < vdev->no_of_vpath; i++) {
  2698. if (vdev->vpaths[i].is_configured)
  2699. vdev->vpaths[i].ring.vlgrp = grp;
  2700. }
  2701. vxge_debug_entryexit(VXGE_TRACE,
  2702. "%s:%d Exiting...", __func__, __LINE__);
  2703. }
  2704. /**
  2705. * vxge_vlan_rx_add_vid
  2706. * @dev: net device pointer.
  2707. * @vid: vid
  2708. *
  2709. * Add the vlan id to the devices vlan id table
  2710. */
  2711. static void
  2712. vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  2713. {
  2714. struct vxgedev *vdev;
  2715. struct vxge_vpath *vpath;
  2716. int vp_id;
  2717. vdev = netdev_priv(dev);
  2718. /* Add these vlan to the vid table */
  2719. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2720. vpath = &vdev->vpaths[vp_id];
  2721. if (!vpath->is_open)
  2722. continue;
  2723. vxge_hw_vpath_vid_add(vpath->handle, vid);
  2724. }
  2725. }
  2726. /**
  2727. * vxge_vlan_rx_add_vid
  2728. * @dev: net device pointer.
  2729. * @vid: vid
  2730. *
  2731. * Remove the vlan id from the device's vlan id table
  2732. */
  2733. static void
  2734. vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  2735. {
  2736. struct vxgedev *vdev;
  2737. struct vxge_vpath *vpath;
  2738. int vp_id;
  2739. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2740. vdev = netdev_priv(dev);
  2741. vlan_group_set_device(vdev->vlgrp, vid, NULL);
  2742. /* Delete this vlan from the vid table */
  2743. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2744. vpath = &vdev->vpaths[vp_id];
  2745. if (!vpath->is_open)
  2746. continue;
  2747. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2748. }
  2749. vxge_debug_entryexit(VXGE_TRACE,
  2750. "%s:%d Exiting...", __func__, __LINE__);
  2751. }
  2752. static const struct net_device_ops vxge_netdev_ops = {
  2753. .ndo_open = vxge_open,
  2754. .ndo_stop = vxge_close,
  2755. .ndo_get_stats64 = vxge_get_stats64,
  2756. .ndo_start_xmit = vxge_xmit,
  2757. .ndo_validate_addr = eth_validate_addr,
  2758. .ndo_set_multicast_list = vxge_set_multicast,
  2759. .ndo_do_ioctl = vxge_ioctl,
  2760. .ndo_set_mac_address = vxge_set_mac_addr,
  2761. .ndo_change_mtu = vxge_change_mtu,
  2762. .ndo_vlan_rx_register = vxge_vlan_rx_register,
  2763. .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
  2764. .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
  2765. .ndo_tx_timeout = vxge_tx_watchdog,
  2766. #ifdef CONFIG_NET_POLL_CONTROLLER
  2767. .ndo_poll_controller = vxge_netpoll,
  2768. #endif
  2769. };
  2770. static int __devinit vxge_device_revision(struct vxgedev *vdev)
  2771. {
  2772. int ret;
  2773. u8 revision;
  2774. ret = pci_read_config_byte(vdev->pdev, PCI_REVISION_ID, &revision);
  2775. if (ret)
  2776. return -EIO;
  2777. vdev->titan1 = (revision == VXGE_HW_TITAN1_PCI_REVISION);
  2778. return 0;
  2779. }
  2780. static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
  2781. struct vxge_config *config,
  2782. int high_dma, int no_of_vpath,
  2783. struct vxgedev **vdev_out)
  2784. {
  2785. struct net_device *ndev;
  2786. enum vxge_hw_status status = VXGE_HW_OK;
  2787. struct vxgedev *vdev;
  2788. int ret = 0, no_of_queue = 1;
  2789. u64 stat;
  2790. *vdev_out = NULL;
  2791. if (config->tx_steering_type)
  2792. no_of_queue = no_of_vpath;
  2793. ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
  2794. no_of_queue);
  2795. if (ndev == NULL) {
  2796. vxge_debug_init(
  2797. vxge_hw_device_trace_level_get(hldev),
  2798. "%s : device allocation failed", __func__);
  2799. ret = -ENODEV;
  2800. goto _out0;
  2801. }
  2802. vxge_debug_entryexit(
  2803. vxge_hw_device_trace_level_get(hldev),
  2804. "%s: %s:%d Entering...",
  2805. ndev->name, __func__, __LINE__);
  2806. vdev = netdev_priv(ndev);
  2807. memset(vdev, 0, sizeof(struct vxgedev));
  2808. vdev->ndev = ndev;
  2809. vdev->devh = hldev;
  2810. vdev->pdev = hldev->pdev;
  2811. memcpy(&vdev->config, config, sizeof(struct vxge_config));
  2812. vdev->rx_csum = 1; /* Enable Rx CSUM by default. */
  2813. vdev->rx_hwts = 0;
  2814. ret = vxge_device_revision(vdev);
  2815. if (ret < 0)
  2816. goto _out1;
  2817. SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
  2818. ndev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  2819. NETIF_F_HW_VLAN_FILTER;
  2820. /* Driver entry points */
  2821. ndev->irq = vdev->pdev->irq;
  2822. ndev->base_addr = (unsigned long) hldev->bar0;
  2823. ndev->netdev_ops = &vxge_netdev_ops;
  2824. ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
  2825. vxge_initialize_ethtool_ops(ndev);
  2826. if (vdev->config.rth_steering != NO_STEERING) {
  2827. ndev->features |= NETIF_F_RXHASH;
  2828. hldev->config.rth_en = VXGE_HW_RTH_ENABLE;
  2829. }
  2830. /* Allocate memory for vpath */
  2831. vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
  2832. no_of_vpath, GFP_KERNEL);
  2833. if (!vdev->vpaths) {
  2834. vxge_debug_init(VXGE_ERR,
  2835. "%s: vpath memory allocation failed",
  2836. vdev->ndev->name);
  2837. ret = -ENODEV;
  2838. goto _out1;
  2839. }
  2840. ndev->features |= NETIF_F_SG;
  2841. ndev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2842. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2843. "%s : checksuming enabled", __func__);
  2844. if (high_dma) {
  2845. ndev->features |= NETIF_F_HIGHDMA;
  2846. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2847. "%s : using High DMA", __func__);
  2848. }
  2849. ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
  2850. if (vdev->config.gro_enable)
  2851. ndev->features |= NETIF_F_GRO;
  2852. if (register_netdev(ndev)) {
  2853. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2854. "%s: %s : device registration failed!",
  2855. ndev->name, __func__);
  2856. ret = -ENODEV;
  2857. goto _out2;
  2858. }
  2859. /* Set the factory defined MAC address initially */
  2860. ndev->addr_len = ETH_ALEN;
  2861. /* Make Link state as off at this point, when the Link change
  2862. * interrupt comes the state will be automatically changed to
  2863. * the right state.
  2864. */
  2865. netif_carrier_off(ndev);
  2866. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2867. "%s: Ethernet device registered",
  2868. ndev->name);
  2869. hldev->ndev = ndev;
  2870. *vdev_out = vdev;
  2871. /* Resetting the Device stats */
  2872. status = vxge_hw_mrpcim_stats_access(
  2873. hldev,
  2874. VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
  2875. 0,
  2876. 0,
  2877. &stat);
  2878. if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
  2879. vxge_debug_init(
  2880. vxge_hw_device_trace_level_get(hldev),
  2881. "%s: device stats clear returns"
  2882. "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
  2883. vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
  2884. "%s: %s:%d Exiting...",
  2885. ndev->name, __func__, __LINE__);
  2886. return ret;
  2887. _out2:
  2888. kfree(vdev->vpaths);
  2889. _out1:
  2890. free_netdev(ndev);
  2891. _out0:
  2892. return ret;
  2893. }
  2894. /*
  2895. * vxge_device_unregister
  2896. *
  2897. * This function will unregister and free network device
  2898. */
  2899. static void vxge_device_unregister(struct __vxge_hw_device *hldev)
  2900. {
  2901. struct vxgedev *vdev;
  2902. struct net_device *dev;
  2903. char buf[IFNAMSIZ];
  2904. dev = hldev->ndev;
  2905. vdev = netdev_priv(dev);
  2906. vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
  2907. __func__, __LINE__);
  2908. strncpy(buf, dev->name, IFNAMSIZ);
  2909. /* in 2.6 will call stop() if device is up */
  2910. unregister_netdev(dev);
  2911. flush_scheduled_work();
  2912. vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
  2913. buf);
  2914. vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
  2915. __func__, __LINE__);
  2916. }
  2917. /*
  2918. * vxge_callback_crit_err
  2919. *
  2920. * This function is called by the alarm handler in interrupt context.
  2921. * Driver must analyze it based on the event type.
  2922. */
  2923. static void
  2924. vxge_callback_crit_err(struct __vxge_hw_device *hldev,
  2925. enum vxge_hw_event type, u64 vp_id)
  2926. {
  2927. struct net_device *dev = hldev->ndev;
  2928. struct vxgedev *vdev = netdev_priv(dev);
  2929. struct vxge_vpath *vpath = NULL;
  2930. int vpath_idx;
  2931. vxge_debug_entryexit(vdev->level_trace,
  2932. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2933. /* Note: This event type should be used for device wide
  2934. * indications only - Serious errors, Slot freeze and critical errors
  2935. */
  2936. vdev->cric_err_event = type;
  2937. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  2938. vpath = &vdev->vpaths[vpath_idx];
  2939. if (vpath->device_id == vp_id)
  2940. break;
  2941. }
  2942. if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
  2943. if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
  2944. vxge_debug_init(VXGE_ERR,
  2945. "%s: Slot is frozen", vdev->ndev->name);
  2946. } else if (type == VXGE_HW_EVENT_SERR) {
  2947. vxge_debug_init(VXGE_ERR,
  2948. "%s: Encountered Serious Error",
  2949. vdev->ndev->name);
  2950. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
  2951. vxge_debug_init(VXGE_ERR,
  2952. "%s: Encountered Critical Error",
  2953. vdev->ndev->name);
  2954. }
  2955. if ((type == VXGE_HW_EVENT_SERR) ||
  2956. (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
  2957. if (unlikely(vdev->exec_mode))
  2958. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2959. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
  2960. vxge_hw_device_mask_all(hldev);
  2961. if (unlikely(vdev->exec_mode))
  2962. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2963. } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
  2964. (type == VXGE_HW_EVENT_VPATH_ERR)) {
  2965. if (unlikely(vdev->exec_mode))
  2966. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2967. else {
  2968. /* check if this vpath is already set for reset */
  2969. if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
  2970. /* disable interrupts for this vpath */
  2971. vxge_vpath_intr_disable(vdev, vpath_idx);
  2972. /* stop the queue for this vpath */
  2973. netif_tx_stop_queue(vpath->fifo.txq);
  2974. }
  2975. }
  2976. }
  2977. vxge_debug_entryexit(vdev->level_trace,
  2978. "%s: %s:%d Exiting...",
  2979. vdev->ndev->name, __func__, __LINE__);
  2980. }
  2981. static void verify_bandwidth(void)
  2982. {
  2983. int i, band_width, total = 0, equal_priority = 0;
  2984. /* 1. If user enters 0 for some fifo, give equal priority to all */
  2985. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2986. if (bw_percentage[i] == 0) {
  2987. equal_priority = 1;
  2988. break;
  2989. }
  2990. }
  2991. if (!equal_priority) {
  2992. /* 2. If sum exceeds 100, give equal priority to all */
  2993. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2994. if (bw_percentage[i] == 0xFF)
  2995. break;
  2996. total += bw_percentage[i];
  2997. if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2998. equal_priority = 1;
  2999. break;
  3000. }
  3001. }
  3002. }
  3003. if (!equal_priority) {
  3004. /* Is all the bandwidth consumed? */
  3005. if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
  3006. if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
  3007. /* Split rest of bw equally among next VPs*/
  3008. band_width =
  3009. (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
  3010. (VXGE_HW_MAX_VIRTUAL_PATHS - i);
  3011. if (band_width < 2) /* min of 2% */
  3012. equal_priority = 1;
  3013. else {
  3014. for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
  3015. i++)
  3016. bw_percentage[i] =
  3017. band_width;
  3018. }
  3019. }
  3020. } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
  3021. equal_priority = 1;
  3022. }
  3023. if (equal_priority) {
  3024. vxge_debug_init(VXGE_ERR,
  3025. "%s: Assigning equal bandwidth to all the vpaths",
  3026. VXGE_DRIVER_NAME);
  3027. bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
  3028. VXGE_HW_MAX_VIRTUAL_PATHS;
  3029. for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3030. bw_percentage[i] = bw_percentage[0];
  3031. }
  3032. }
  3033. /*
  3034. * Vpath configuration
  3035. */
  3036. static int __devinit vxge_config_vpaths(
  3037. struct vxge_hw_device_config *device_config,
  3038. u64 vpath_mask, struct vxge_config *config_param)
  3039. {
  3040. int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
  3041. u32 txdl_size, txdl_per_memblock;
  3042. temp = driver_config->vpath_per_dev;
  3043. if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
  3044. (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
  3045. /* No more CPU. Return vpath number as zero.*/
  3046. if (driver_config->g_no_cpus == -1)
  3047. return 0;
  3048. if (!driver_config->g_no_cpus)
  3049. driver_config->g_no_cpus = num_online_cpus();
  3050. driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
  3051. if (!driver_config->vpath_per_dev)
  3052. driver_config->vpath_per_dev = 1;
  3053. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3054. if (!vxge_bVALn(vpath_mask, i, 1))
  3055. continue;
  3056. else
  3057. default_no_vpath++;
  3058. if (default_no_vpath < driver_config->vpath_per_dev)
  3059. driver_config->vpath_per_dev = default_no_vpath;
  3060. driver_config->g_no_cpus = driver_config->g_no_cpus -
  3061. (driver_config->vpath_per_dev * 2);
  3062. if (driver_config->g_no_cpus <= 0)
  3063. driver_config->g_no_cpus = -1;
  3064. }
  3065. if (driver_config->vpath_per_dev == 1) {
  3066. vxge_debug_ll_config(VXGE_TRACE,
  3067. "%s: Disable tx and rx steering, "
  3068. "as single vpath is configured", VXGE_DRIVER_NAME);
  3069. config_param->rth_steering = NO_STEERING;
  3070. config_param->tx_steering_type = NO_STEERING;
  3071. device_config->rth_en = 0;
  3072. }
  3073. /* configure bandwidth */
  3074. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3075. device_config->vp_config[i].min_bandwidth = bw_percentage[i];
  3076. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3077. device_config->vp_config[i].vp_id = i;
  3078. device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
  3079. if (no_of_vpaths < driver_config->vpath_per_dev) {
  3080. if (!vxge_bVALn(vpath_mask, i, 1)) {
  3081. vxge_debug_ll_config(VXGE_TRACE,
  3082. "%s: vpath: %d is not available",
  3083. VXGE_DRIVER_NAME, i);
  3084. continue;
  3085. } else {
  3086. vxge_debug_ll_config(VXGE_TRACE,
  3087. "%s: vpath: %d available",
  3088. VXGE_DRIVER_NAME, i);
  3089. no_of_vpaths++;
  3090. }
  3091. } else {
  3092. vxge_debug_ll_config(VXGE_TRACE,
  3093. "%s: vpath: %d is not configured, "
  3094. "max_config_vpath exceeded",
  3095. VXGE_DRIVER_NAME, i);
  3096. break;
  3097. }
  3098. /* Configure Tx fifo's */
  3099. device_config->vp_config[i].fifo.enable =
  3100. VXGE_HW_FIFO_ENABLE;
  3101. device_config->vp_config[i].fifo.max_frags =
  3102. MAX_SKB_FRAGS + 1;
  3103. device_config->vp_config[i].fifo.memblock_size =
  3104. VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
  3105. txdl_size = device_config->vp_config[i].fifo.max_frags *
  3106. sizeof(struct vxge_hw_fifo_txd);
  3107. txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
  3108. device_config->vp_config[i].fifo.fifo_blocks =
  3109. ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
  3110. device_config->vp_config[i].fifo.intr =
  3111. VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
  3112. /* Configure tti properties */
  3113. device_config->vp_config[i].tti.intr_enable =
  3114. VXGE_HW_TIM_INTR_ENABLE;
  3115. device_config->vp_config[i].tti.btimer_val =
  3116. (VXGE_TTI_BTIMER_VAL * 1000) / 272;
  3117. device_config->vp_config[i].tti.timer_ac_en =
  3118. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3119. /* For msi-x with napi (each vector
  3120. has a handler of its own) -
  3121. Set CI to OFF for all vpaths */
  3122. device_config->vp_config[i].tti.timer_ci_en =
  3123. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3124. device_config->vp_config[i].tti.timer_ri_en =
  3125. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3126. device_config->vp_config[i].tti.util_sel =
  3127. VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
  3128. device_config->vp_config[i].tti.ltimer_val =
  3129. (VXGE_TTI_LTIMER_VAL * 1000) / 272;
  3130. device_config->vp_config[i].tti.rtimer_val =
  3131. (VXGE_TTI_RTIMER_VAL * 1000) / 272;
  3132. device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
  3133. device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
  3134. device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
  3135. device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
  3136. device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
  3137. device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
  3138. device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
  3139. /* Configure Rx rings */
  3140. device_config->vp_config[i].ring.enable =
  3141. VXGE_HW_RING_ENABLE;
  3142. device_config->vp_config[i].ring.ring_blocks =
  3143. VXGE_HW_DEF_RING_BLOCKS;
  3144. device_config->vp_config[i].ring.buffer_mode =
  3145. VXGE_HW_RING_RXD_BUFFER_MODE_1;
  3146. device_config->vp_config[i].ring.rxds_limit =
  3147. VXGE_HW_DEF_RING_RXDS_LIMIT;
  3148. device_config->vp_config[i].ring.scatter_mode =
  3149. VXGE_HW_RING_SCATTER_MODE_A;
  3150. /* Configure rti properties */
  3151. device_config->vp_config[i].rti.intr_enable =
  3152. VXGE_HW_TIM_INTR_ENABLE;
  3153. device_config->vp_config[i].rti.btimer_val =
  3154. (VXGE_RTI_BTIMER_VAL * 1000)/272;
  3155. device_config->vp_config[i].rti.timer_ac_en =
  3156. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3157. device_config->vp_config[i].rti.timer_ci_en =
  3158. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3159. device_config->vp_config[i].rti.timer_ri_en =
  3160. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3161. device_config->vp_config[i].rti.util_sel =
  3162. VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
  3163. device_config->vp_config[i].rti.urange_a =
  3164. RTI_RX_URANGE_A;
  3165. device_config->vp_config[i].rti.urange_b =
  3166. RTI_RX_URANGE_B;
  3167. device_config->vp_config[i].rti.urange_c =
  3168. RTI_RX_URANGE_C;
  3169. device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
  3170. device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
  3171. device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
  3172. device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
  3173. device_config->vp_config[i].rti.rtimer_val =
  3174. (VXGE_RTI_RTIMER_VAL * 1000) / 272;
  3175. device_config->vp_config[i].rti.ltimer_val =
  3176. (VXGE_RTI_LTIMER_VAL * 1000) / 272;
  3177. device_config->vp_config[i].rpa_strip_vlan_tag =
  3178. vlan_tag_strip;
  3179. }
  3180. driver_config->vpath_per_dev = temp;
  3181. return no_of_vpaths;
  3182. }
  3183. /* initialize device configuratrions */
  3184. static void __devinit vxge_device_config_init(
  3185. struct vxge_hw_device_config *device_config,
  3186. int *intr_type)
  3187. {
  3188. /* Used for CQRQ/SRQ. */
  3189. device_config->dma_blockpool_initial =
  3190. VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
  3191. device_config->dma_blockpool_max =
  3192. VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
  3193. if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
  3194. max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
  3195. #ifndef CONFIG_PCI_MSI
  3196. vxge_debug_init(VXGE_ERR,
  3197. "%s: This Kernel does not support "
  3198. "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
  3199. *intr_type = INTA;
  3200. #endif
  3201. /* Configure whether MSI-X or IRQL. */
  3202. switch (*intr_type) {
  3203. case INTA:
  3204. device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
  3205. break;
  3206. case MSI_X:
  3207. device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX;
  3208. break;
  3209. }
  3210. /* Timer period between device poll */
  3211. device_config->device_poll_millis = VXGE_TIMER_DELAY;
  3212. /* Configure mac based steering. */
  3213. device_config->rts_mac_en = addr_learn_en;
  3214. /* Configure Vpaths */
  3215. device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
  3216. vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
  3217. __func__);
  3218. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_initial : %d",
  3219. device_config->dma_blockpool_initial);
  3220. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_max : %d",
  3221. device_config->dma_blockpool_max);
  3222. vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
  3223. device_config->intr_mode);
  3224. vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
  3225. device_config->device_poll_millis);
  3226. vxge_debug_ll_config(VXGE_TRACE, "rts_mac_en : %d",
  3227. device_config->rts_mac_en);
  3228. vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
  3229. device_config->rth_en);
  3230. vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
  3231. device_config->rth_it_type);
  3232. }
  3233. static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
  3234. {
  3235. int i;
  3236. vxge_debug_init(VXGE_TRACE,
  3237. "%s: %d Vpath(s) opened",
  3238. vdev->ndev->name, vdev->no_of_vpath);
  3239. switch (vdev->config.intr_type) {
  3240. case INTA:
  3241. vxge_debug_init(VXGE_TRACE,
  3242. "%s: Interrupt type INTA", vdev->ndev->name);
  3243. break;
  3244. case MSI_X:
  3245. vxge_debug_init(VXGE_TRACE,
  3246. "%s: Interrupt type MSI-X", vdev->ndev->name);
  3247. break;
  3248. }
  3249. if (vdev->config.rth_steering) {
  3250. vxge_debug_init(VXGE_TRACE,
  3251. "%s: RTH steering enabled for TCP_IPV4",
  3252. vdev->ndev->name);
  3253. } else {
  3254. vxge_debug_init(VXGE_TRACE,
  3255. "%s: RTH steering disabled", vdev->ndev->name);
  3256. }
  3257. switch (vdev->config.tx_steering_type) {
  3258. case NO_STEERING:
  3259. vxge_debug_init(VXGE_TRACE,
  3260. "%s: Tx steering disabled", vdev->ndev->name);
  3261. break;
  3262. case TX_PRIORITY_STEERING:
  3263. vxge_debug_init(VXGE_TRACE,
  3264. "%s: Unsupported tx steering option",
  3265. vdev->ndev->name);
  3266. vxge_debug_init(VXGE_TRACE,
  3267. "%s: Tx steering disabled", vdev->ndev->name);
  3268. vdev->config.tx_steering_type = 0;
  3269. break;
  3270. case TX_VLAN_STEERING:
  3271. vxge_debug_init(VXGE_TRACE,
  3272. "%s: Unsupported tx steering option",
  3273. vdev->ndev->name);
  3274. vxge_debug_init(VXGE_TRACE,
  3275. "%s: Tx steering disabled", vdev->ndev->name);
  3276. vdev->config.tx_steering_type = 0;
  3277. break;
  3278. case TX_MULTIQ_STEERING:
  3279. vxge_debug_init(VXGE_TRACE,
  3280. "%s: Tx multiqueue steering enabled",
  3281. vdev->ndev->name);
  3282. break;
  3283. case TX_PORT_STEERING:
  3284. vxge_debug_init(VXGE_TRACE,
  3285. "%s: Tx port steering enabled",
  3286. vdev->ndev->name);
  3287. break;
  3288. default:
  3289. vxge_debug_init(VXGE_ERR,
  3290. "%s: Unsupported tx steering type",
  3291. vdev->ndev->name);
  3292. vxge_debug_init(VXGE_TRACE,
  3293. "%s: Tx steering disabled", vdev->ndev->name);
  3294. vdev->config.tx_steering_type = 0;
  3295. }
  3296. if (vdev->config.gro_enable) {
  3297. vxge_debug_init(VXGE_ERR,
  3298. "%s: Generic receive offload enabled",
  3299. vdev->ndev->name);
  3300. } else
  3301. vxge_debug_init(VXGE_TRACE,
  3302. "%s: Generic receive offload disabled",
  3303. vdev->ndev->name);
  3304. if (vdev->config.addr_learn_en)
  3305. vxge_debug_init(VXGE_TRACE,
  3306. "%s: MAC Address learning enabled", vdev->ndev->name);
  3307. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3308. if (!vxge_bVALn(vpath_mask, i, 1))
  3309. continue;
  3310. vxge_debug_ll_config(VXGE_TRACE,
  3311. "%s: MTU size - %d", vdev->ndev->name,
  3312. ((struct __vxge_hw_device *)(vdev->devh))->
  3313. config.vp_config[i].mtu);
  3314. vxge_debug_init(VXGE_TRACE,
  3315. "%s: VLAN tag stripping %s", vdev->ndev->name,
  3316. ((struct __vxge_hw_device *)(vdev->devh))->
  3317. config.vp_config[i].rpa_strip_vlan_tag
  3318. ? "Enabled" : "Disabled");
  3319. vxge_debug_ll_config(VXGE_TRACE,
  3320. "%s: Max frags : %d", vdev->ndev->name,
  3321. ((struct __vxge_hw_device *)(vdev->devh))->
  3322. config.vp_config[i].fifo.max_frags);
  3323. break;
  3324. }
  3325. }
  3326. #ifdef CONFIG_PM
  3327. /**
  3328. * vxge_pm_suspend - vxge power management suspend entry point
  3329. *
  3330. */
  3331. static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
  3332. {
  3333. return -ENOSYS;
  3334. }
  3335. /**
  3336. * vxge_pm_resume - vxge power management resume entry point
  3337. *
  3338. */
  3339. static int vxge_pm_resume(struct pci_dev *pdev)
  3340. {
  3341. return -ENOSYS;
  3342. }
  3343. #endif
  3344. /**
  3345. * vxge_io_error_detected - called when PCI error is detected
  3346. * @pdev: Pointer to PCI device
  3347. * @state: The current pci connection state
  3348. *
  3349. * This function is called after a PCI bus error affecting
  3350. * this device has been detected.
  3351. */
  3352. static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
  3353. pci_channel_state_t state)
  3354. {
  3355. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3356. struct net_device *netdev = hldev->ndev;
  3357. netif_device_detach(netdev);
  3358. if (state == pci_channel_io_perm_failure)
  3359. return PCI_ERS_RESULT_DISCONNECT;
  3360. if (netif_running(netdev)) {
  3361. /* Bring down the card, while avoiding PCI I/O */
  3362. do_vxge_close(netdev, 0);
  3363. }
  3364. pci_disable_device(pdev);
  3365. return PCI_ERS_RESULT_NEED_RESET;
  3366. }
  3367. /**
  3368. * vxge_io_slot_reset - called after the pci bus has been reset.
  3369. * @pdev: Pointer to PCI device
  3370. *
  3371. * Restart the card from scratch, as if from a cold-boot.
  3372. * At this point, the card has exprienced a hard reset,
  3373. * followed by fixups by BIOS, and has its config space
  3374. * set up identically to what it was at cold boot.
  3375. */
  3376. static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
  3377. {
  3378. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3379. struct net_device *netdev = hldev->ndev;
  3380. struct vxgedev *vdev = netdev_priv(netdev);
  3381. if (pci_enable_device(pdev)) {
  3382. netdev_err(netdev, "Cannot re-enable device after reset\n");
  3383. return PCI_ERS_RESULT_DISCONNECT;
  3384. }
  3385. pci_set_master(pdev);
  3386. vxge_reset(vdev);
  3387. return PCI_ERS_RESULT_RECOVERED;
  3388. }
  3389. /**
  3390. * vxge_io_resume - called when traffic can start flowing again.
  3391. * @pdev: Pointer to PCI device
  3392. *
  3393. * This callback is called when the error recovery driver tells
  3394. * us that its OK to resume normal operation.
  3395. */
  3396. static void vxge_io_resume(struct pci_dev *pdev)
  3397. {
  3398. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3399. struct net_device *netdev = hldev->ndev;
  3400. if (netif_running(netdev)) {
  3401. if (vxge_open(netdev)) {
  3402. netdev_err(netdev,
  3403. "Can't bring device back up after reset\n");
  3404. return;
  3405. }
  3406. }
  3407. netif_device_attach(netdev);
  3408. }
  3409. static inline u32 vxge_get_num_vfs(u64 function_mode)
  3410. {
  3411. u32 num_functions = 0;
  3412. switch (function_mode) {
  3413. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3414. case VXGE_HW_FUNCTION_MODE_SRIOV_8:
  3415. num_functions = 8;
  3416. break;
  3417. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3418. num_functions = 1;
  3419. break;
  3420. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3421. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3422. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
  3423. num_functions = 17;
  3424. break;
  3425. case VXGE_HW_FUNCTION_MODE_SRIOV_4:
  3426. num_functions = 4;
  3427. break;
  3428. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
  3429. num_functions = 2;
  3430. break;
  3431. case VXGE_HW_FUNCTION_MODE_MRIOV_8:
  3432. num_functions = 8; /* TODO */
  3433. break;
  3434. }
  3435. return num_functions;
  3436. }
  3437. int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
  3438. {
  3439. struct __vxge_hw_device *hldev = vdev->devh;
  3440. u32 maj, min, bld, cmaj, cmin, cbld;
  3441. enum vxge_hw_status status;
  3442. const struct firmware *fw;
  3443. int ret;
  3444. ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
  3445. if (ret) {
  3446. vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
  3447. VXGE_DRIVER_NAME, fw_name);
  3448. goto out;
  3449. }
  3450. /* Load the new firmware onto the adapter */
  3451. status = vxge_update_fw_image(hldev, fw->data, fw->size);
  3452. if (status != VXGE_HW_OK) {
  3453. vxge_debug_init(VXGE_ERR,
  3454. "%s: FW image download to adapter failed '%s'.",
  3455. VXGE_DRIVER_NAME, fw_name);
  3456. ret = -EIO;
  3457. goto out;
  3458. }
  3459. /* Read the version of the new firmware */
  3460. status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
  3461. if (status != VXGE_HW_OK) {
  3462. vxge_debug_init(VXGE_ERR,
  3463. "%s: Upgrade read version failed '%s'.",
  3464. VXGE_DRIVER_NAME, fw_name);
  3465. ret = -EIO;
  3466. goto out;
  3467. }
  3468. cmaj = vdev->config.device_hw_info.fw_version.major;
  3469. cmin = vdev->config.device_hw_info.fw_version.minor;
  3470. cbld = vdev->config.device_hw_info.fw_version.build;
  3471. /* It's possible the version in /lib/firmware is not the latest version.
  3472. * If so, we could get into a loop of trying to upgrade to the latest
  3473. * and flashing the older version.
  3474. */
  3475. if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
  3476. !override) {
  3477. ret = -EINVAL;
  3478. goto out;
  3479. }
  3480. printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
  3481. maj, min, bld);
  3482. /* Flash the adapter with the new firmware */
  3483. status = vxge_hw_flash_fw(hldev);
  3484. if (status != VXGE_HW_OK) {
  3485. vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
  3486. VXGE_DRIVER_NAME, fw_name);
  3487. ret = -EIO;
  3488. goto out;
  3489. }
  3490. printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
  3491. "hard reset before using, thus requiring a system reboot or a "
  3492. "hotplug event.\n");
  3493. out:
  3494. return ret;
  3495. }
  3496. static int vxge_probe_fw_update(struct vxgedev *vdev)
  3497. {
  3498. u32 maj, min, bld;
  3499. int ret, gpxe = 0;
  3500. char *fw_name;
  3501. maj = vdev->config.device_hw_info.fw_version.major;
  3502. min = vdev->config.device_hw_info.fw_version.minor;
  3503. bld = vdev->config.device_hw_info.fw_version.build;
  3504. if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
  3505. return 0;
  3506. /* Ignore the build number when determining if the current firmware is
  3507. * "too new" to load the driver
  3508. */
  3509. if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
  3510. vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
  3511. "version, unable to load driver\n",
  3512. VXGE_DRIVER_NAME);
  3513. return -EINVAL;
  3514. }
  3515. /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
  3516. * work with this driver.
  3517. */
  3518. if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
  3519. vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
  3520. "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
  3521. return -EINVAL;
  3522. }
  3523. /* If file not specified, determine gPXE or not */
  3524. if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
  3525. int i;
  3526. for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
  3527. if (vdev->devh->eprom_versions[i]) {
  3528. gpxe = 1;
  3529. break;
  3530. }
  3531. }
  3532. if (gpxe)
  3533. fw_name = "vxge/X3fw-pxe.ncf";
  3534. else
  3535. fw_name = "vxge/X3fw.ncf";
  3536. ret = vxge_fw_upgrade(vdev, fw_name, 0);
  3537. /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
  3538. * probe, so ignore them
  3539. */
  3540. if (ret != -EINVAL && ret != -ENOENT)
  3541. return -EIO;
  3542. else
  3543. ret = 0;
  3544. if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
  3545. VXGE_FW_VER(maj, min, 0)) {
  3546. vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
  3547. " be used with this driver.\n"
  3548. "Please get the latest version from "
  3549. "ftp://ftp.s2io.com/pub/X3100-Drivers/FIRMWARE",
  3550. VXGE_DRIVER_NAME, maj, min, bld);
  3551. return -EINVAL;
  3552. }
  3553. return ret;
  3554. }
  3555. /**
  3556. * vxge_probe
  3557. * @pdev : structure containing the PCI related information of the device.
  3558. * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
  3559. * Description:
  3560. * This function is called when a new PCI device gets detected and initializes
  3561. * it.
  3562. * Return value:
  3563. * returns 0 on success and negative on failure.
  3564. *
  3565. */
  3566. static int __devinit
  3567. vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
  3568. {
  3569. struct __vxge_hw_device *hldev;
  3570. enum vxge_hw_status status;
  3571. int ret;
  3572. int high_dma = 0;
  3573. u64 vpath_mask = 0;
  3574. struct vxgedev *vdev;
  3575. struct vxge_config *ll_config = NULL;
  3576. struct vxge_hw_device_config *device_config = NULL;
  3577. struct vxge_hw_device_attr attr;
  3578. int i, j, no_of_vpath = 0, max_vpath_supported = 0;
  3579. u8 *macaddr;
  3580. struct vxge_mac_addrs *entry;
  3581. static int bus = -1, device = -1;
  3582. u32 host_type;
  3583. u8 new_device = 0;
  3584. enum vxge_hw_status is_privileged;
  3585. u32 function_mode;
  3586. u32 num_vfs = 0;
  3587. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  3588. attr.pdev = pdev;
  3589. /* In SRIOV-17 mode, functions of the same adapter
  3590. * can be deployed on different buses */
  3591. if ((!pdev->is_virtfn) && ((bus != pdev->bus->number) ||
  3592. (device != PCI_SLOT(pdev->devfn))))
  3593. new_device = 1;
  3594. bus = pdev->bus->number;
  3595. device = PCI_SLOT(pdev->devfn);
  3596. if (new_device) {
  3597. if (driver_config->config_dev_cnt &&
  3598. (driver_config->config_dev_cnt !=
  3599. driver_config->total_dev_cnt))
  3600. vxge_debug_init(VXGE_ERR,
  3601. "%s: Configured %d of %d devices",
  3602. VXGE_DRIVER_NAME,
  3603. driver_config->config_dev_cnt,
  3604. driver_config->total_dev_cnt);
  3605. driver_config->config_dev_cnt = 0;
  3606. driver_config->total_dev_cnt = 0;
  3607. }
  3608. /* Now making the CPU based no of vpath calculation
  3609. * applicable for individual functions as well.
  3610. */
  3611. driver_config->g_no_cpus = 0;
  3612. driver_config->vpath_per_dev = max_config_vpath;
  3613. driver_config->total_dev_cnt++;
  3614. if (++driver_config->config_dev_cnt > max_config_dev) {
  3615. ret = 0;
  3616. goto _exit0;
  3617. }
  3618. device_config = kzalloc(sizeof(struct vxge_hw_device_config),
  3619. GFP_KERNEL);
  3620. if (!device_config) {
  3621. ret = -ENOMEM;
  3622. vxge_debug_init(VXGE_ERR,
  3623. "device_config : malloc failed %s %d",
  3624. __FILE__, __LINE__);
  3625. goto _exit0;
  3626. }
  3627. ll_config = kzalloc(sizeof(*ll_config), GFP_KERNEL);
  3628. if (!ll_config) {
  3629. ret = -ENOMEM;
  3630. vxge_debug_init(VXGE_ERR,
  3631. "ll_config : malloc failed %s %d",
  3632. __FILE__, __LINE__);
  3633. goto _exit0;
  3634. }
  3635. ll_config->tx_steering_type = TX_MULTIQ_STEERING;
  3636. ll_config->intr_type = MSI_X;
  3637. ll_config->napi_weight = NEW_NAPI_WEIGHT;
  3638. ll_config->rth_steering = RTH_STEERING;
  3639. /* get the default configuration parameters */
  3640. vxge_hw_device_config_default_get(device_config);
  3641. /* initialize configuration parameters */
  3642. vxge_device_config_init(device_config, &ll_config->intr_type);
  3643. ret = pci_enable_device(pdev);
  3644. if (ret) {
  3645. vxge_debug_init(VXGE_ERR,
  3646. "%s : can not enable PCI device", __func__);
  3647. goto _exit0;
  3648. }
  3649. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
  3650. vxge_debug_ll_config(VXGE_TRACE,
  3651. "%s : using 64bit DMA", __func__);
  3652. high_dma = 1;
  3653. if (pci_set_consistent_dma_mask(pdev,
  3654. DMA_BIT_MASK(64))) {
  3655. vxge_debug_init(VXGE_ERR,
  3656. "%s : unable to obtain 64bit DMA for "
  3657. "consistent allocations", __func__);
  3658. ret = -ENOMEM;
  3659. goto _exit1;
  3660. }
  3661. } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  3662. vxge_debug_ll_config(VXGE_TRACE,
  3663. "%s : using 32bit DMA", __func__);
  3664. } else {
  3665. ret = -ENOMEM;
  3666. goto _exit1;
  3667. }
  3668. if (pci_request_regions(pdev, VXGE_DRIVER_NAME)) {
  3669. vxge_debug_init(VXGE_ERR,
  3670. "%s : request regions failed", __func__);
  3671. ret = -ENODEV;
  3672. goto _exit1;
  3673. }
  3674. pci_set_master(pdev);
  3675. attr.bar0 = pci_ioremap_bar(pdev, 0);
  3676. if (!attr.bar0) {
  3677. vxge_debug_init(VXGE_ERR,
  3678. "%s : cannot remap io memory bar0", __func__);
  3679. ret = -ENODEV;
  3680. goto _exit2;
  3681. }
  3682. vxge_debug_ll_config(VXGE_TRACE,
  3683. "pci ioremap bar0: %p:0x%llx",
  3684. attr.bar0,
  3685. (unsigned long long)pci_resource_start(pdev, 0));
  3686. status = vxge_hw_device_hw_info_get(attr.bar0,
  3687. &ll_config->device_hw_info);
  3688. if (status != VXGE_HW_OK) {
  3689. vxge_debug_init(VXGE_ERR,
  3690. "%s: Reading of hardware info failed."
  3691. "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
  3692. ret = -EINVAL;
  3693. goto _exit3;
  3694. }
  3695. vpath_mask = ll_config->device_hw_info.vpath_mask;
  3696. if (vpath_mask == 0) {
  3697. vxge_debug_ll_config(VXGE_TRACE,
  3698. "%s: No vpaths available in device", VXGE_DRIVER_NAME);
  3699. ret = -EINVAL;
  3700. goto _exit3;
  3701. }
  3702. vxge_debug_ll_config(VXGE_TRACE,
  3703. "%s:%d Vpath mask = %llx", __func__, __LINE__,
  3704. (unsigned long long)vpath_mask);
  3705. function_mode = ll_config->device_hw_info.function_mode;
  3706. host_type = ll_config->device_hw_info.host_type;
  3707. is_privileged = __vxge_hw_device_is_privilaged(host_type,
  3708. ll_config->device_hw_info.func_id);
  3709. /* Check how many vpaths are available */
  3710. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3711. if (!((vpath_mask) & vxge_mBIT(i)))
  3712. continue;
  3713. max_vpath_supported++;
  3714. }
  3715. if (new_device)
  3716. num_vfs = vxge_get_num_vfs(function_mode) - 1;
  3717. /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
  3718. if (is_sriov(function_mode) && (max_config_dev > 1) &&
  3719. (ll_config->intr_type != INTA) &&
  3720. (is_privileged == VXGE_HW_OK)) {
  3721. ret = pci_enable_sriov(pdev, ((max_config_dev - 1) < num_vfs)
  3722. ? (max_config_dev - 1) : num_vfs);
  3723. if (ret)
  3724. vxge_debug_ll_config(VXGE_ERR,
  3725. "Failed in enabling SRIOV mode: %d\n", ret);
  3726. }
  3727. /*
  3728. * Configure vpaths and get driver configured number of vpaths
  3729. * which is less than or equal to the maximum vpaths per function.
  3730. */
  3731. no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
  3732. if (!no_of_vpath) {
  3733. vxge_debug_ll_config(VXGE_ERR,
  3734. "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
  3735. ret = 0;
  3736. goto _exit3;
  3737. }
  3738. /* Setting driver callbacks */
  3739. attr.uld_callbacks.link_up = vxge_callback_link_up;
  3740. attr.uld_callbacks.link_down = vxge_callback_link_down;
  3741. attr.uld_callbacks.crit_err = vxge_callback_crit_err;
  3742. status = vxge_hw_device_initialize(&hldev, &attr, device_config);
  3743. if (status != VXGE_HW_OK) {
  3744. vxge_debug_init(VXGE_ERR,
  3745. "Failed to initialize device (%d)", status);
  3746. ret = -EINVAL;
  3747. goto _exit3;
  3748. }
  3749. if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
  3750. ll_config->device_hw_info.fw_version.minor,
  3751. ll_config->device_hw_info.fw_version.build) >=
  3752. VXGE_EPROM_FW_VER) {
  3753. struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
  3754. status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
  3755. if (status != VXGE_HW_OK) {
  3756. vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
  3757. VXGE_DRIVER_NAME);
  3758. /* This is a non-fatal error, continue */
  3759. }
  3760. for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
  3761. hldev->eprom_versions[i] = img[i].version;
  3762. if (!img[i].is_valid)
  3763. break;
  3764. vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
  3765. "%d.%d.%d.%d\n", VXGE_DRIVER_NAME, i,
  3766. VXGE_EPROM_IMG_MAJOR(img[i].version),
  3767. VXGE_EPROM_IMG_MINOR(img[i].version),
  3768. VXGE_EPROM_IMG_FIX(img[i].version),
  3769. VXGE_EPROM_IMG_BUILD(img[i].version));
  3770. }
  3771. }
  3772. /* if FCS stripping is not disabled in MAC fail driver load */
  3773. status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
  3774. if (status != VXGE_HW_OK) {
  3775. vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
  3776. " failing driver load", VXGE_DRIVER_NAME);
  3777. ret = -EINVAL;
  3778. goto _exit4;
  3779. }
  3780. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3781. /* set private device info */
  3782. pci_set_drvdata(pdev, hldev);
  3783. ll_config->gro_enable = VXGE_GRO_ALWAYS_AGGREGATE;
  3784. ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
  3785. ll_config->addr_learn_en = addr_learn_en;
  3786. ll_config->rth_algorithm = RTH_ALG_JENKINS;
  3787. ll_config->rth_hash_type_tcpipv4 = 1;
  3788. ll_config->rth_hash_type_ipv4 = 0;
  3789. ll_config->rth_hash_type_tcpipv6 = 0;
  3790. ll_config->rth_hash_type_ipv6 = 0;
  3791. ll_config->rth_hash_type_tcpipv6ex = 0;
  3792. ll_config->rth_hash_type_ipv6ex = 0;
  3793. ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
  3794. ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3795. ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3796. ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
  3797. &vdev);
  3798. if (ret) {
  3799. ret = -EINVAL;
  3800. goto _exit4;
  3801. }
  3802. ret = vxge_probe_fw_update(vdev);
  3803. if (ret)
  3804. goto _exit5;
  3805. vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
  3806. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3807. vxge_hw_device_trace_level_get(hldev));
  3808. /* set private HW device info */
  3809. vdev->mtu = VXGE_HW_DEFAULT_MTU;
  3810. vdev->bar0 = attr.bar0;
  3811. vdev->max_vpath_supported = max_vpath_supported;
  3812. vdev->no_of_vpath = no_of_vpath;
  3813. /* Virtual Path count */
  3814. for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3815. if (!vxge_bVALn(vpath_mask, i, 1))
  3816. continue;
  3817. if (j >= vdev->no_of_vpath)
  3818. break;
  3819. vdev->vpaths[j].is_configured = 1;
  3820. vdev->vpaths[j].device_id = i;
  3821. vdev->vpaths[j].ring.driver_id = j;
  3822. vdev->vpaths[j].vdev = vdev;
  3823. vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
  3824. memcpy((u8 *)vdev->vpaths[j].macaddr,
  3825. ll_config->device_hw_info.mac_addrs[i],
  3826. ETH_ALEN);
  3827. /* Initialize the mac address list header */
  3828. INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
  3829. vdev->vpaths[j].mac_addr_cnt = 0;
  3830. vdev->vpaths[j].mcast_addr_cnt = 0;
  3831. j++;
  3832. }
  3833. vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
  3834. vdev->max_config_port = max_config_port;
  3835. vdev->vlan_tag_strip = vlan_tag_strip;
  3836. /* map the hashing selector table to the configured vpaths */
  3837. for (i = 0; i < vdev->no_of_vpath; i++)
  3838. vdev->vpath_selector[i] = vpath_selector[i];
  3839. macaddr = (u8 *)vdev->vpaths[0].macaddr;
  3840. ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3841. ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
  3842. ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3843. vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
  3844. vdev->ndev->name, ll_config->device_hw_info.serial_number);
  3845. vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
  3846. vdev->ndev->name, ll_config->device_hw_info.part_number);
  3847. vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
  3848. vdev->ndev->name, ll_config->device_hw_info.product_desc);
  3849. vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
  3850. vdev->ndev->name, macaddr);
  3851. vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
  3852. vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
  3853. vxge_debug_init(VXGE_TRACE,
  3854. "%s: Firmware version : %s Date : %s", vdev->ndev->name,
  3855. ll_config->device_hw_info.fw_version.version,
  3856. ll_config->device_hw_info.fw_date.date);
  3857. if (new_device) {
  3858. switch (ll_config->device_hw_info.function_mode) {
  3859. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3860. vxge_debug_init(VXGE_TRACE,
  3861. "%s: Single Function Mode Enabled", vdev->ndev->name);
  3862. break;
  3863. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3864. vxge_debug_init(VXGE_TRACE,
  3865. "%s: Multi Function Mode Enabled", vdev->ndev->name);
  3866. break;
  3867. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3868. vxge_debug_init(VXGE_TRACE,
  3869. "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
  3870. break;
  3871. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3872. vxge_debug_init(VXGE_TRACE,
  3873. "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
  3874. break;
  3875. }
  3876. }
  3877. vxge_print_parm(vdev, vpath_mask);
  3878. /* Store the fw version for ethttool option */
  3879. strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
  3880. memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
  3881. memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
  3882. /* Copy the station mac address to the list */
  3883. for (i = 0; i < vdev->no_of_vpath; i++) {
  3884. entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
  3885. if (NULL == entry) {
  3886. vxge_debug_init(VXGE_ERR,
  3887. "%s: mac_addr_list : memory allocation failed",
  3888. vdev->ndev->name);
  3889. ret = -EPERM;
  3890. goto _exit6;
  3891. }
  3892. macaddr = (u8 *)&entry->macaddr;
  3893. memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
  3894. list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
  3895. vdev->vpaths[i].mac_addr_cnt = 1;
  3896. }
  3897. kfree(device_config);
  3898. /*
  3899. * INTA is shared in multi-function mode. This is unlike the INTA
  3900. * implementation in MR mode, where each VH has its own INTA message.
  3901. * - INTA is masked (disabled) as long as at least one function sets
  3902. * its TITAN_MASK_ALL_INT.ALARM bit.
  3903. * - INTA is unmasked (enabled) when all enabled functions have cleared
  3904. * their own TITAN_MASK_ALL_INT.ALARM bit.
  3905. * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
  3906. * Though this driver leaves the top level interrupts unmasked while
  3907. * leaving the required module interrupt bits masked on exit, there
  3908. * could be a rougue driver around that does not follow this procedure
  3909. * resulting in a failure to generate interrupts. The following code is
  3910. * present to prevent such a failure.
  3911. */
  3912. if (ll_config->device_hw_info.function_mode ==
  3913. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
  3914. if (vdev->config.intr_type == INTA)
  3915. vxge_hw_device_unmask_all(hldev);
  3916. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  3917. vdev->ndev->name, __func__, __LINE__);
  3918. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3919. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3920. vxge_hw_device_trace_level_get(hldev));
  3921. kfree(ll_config);
  3922. return 0;
  3923. _exit6:
  3924. for (i = 0; i < vdev->no_of_vpath; i++)
  3925. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3926. _exit5:
  3927. vxge_device_unregister(hldev);
  3928. _exit4:
  3929. pci_disable_sriov(pdev);
  3930. vxge_hw_device_terminate(hldev);
  3931. _exit3:
  3932. iounmap(attr.bar0);
  3933. _exit2:
  3934. pci_release_regions(pdev);
  3935. _exit1:
  3936. pci_disable_device(pdev);
  3937. _exit0:
  3938. kfree(ll_config);
  3939. kfree(device_config);
  3940. driver_config->config_dev_cnt--;
  3941. pci_set_drvdata(pdev, NULL);
  3942. return ret;
  3943. }
  3944. /**
  3945. * vxge_rem_nic - Free the PCI device
  3946. * @pdev: structure containing the PCI related information of the device.
  3947. * Description: This function is called by the Pci subsystem to release a
  3948. * PCI device and free up all resource held up by the device.
  3949. */
  3950. static void __devexit vxge_remove(struct pci_dev *pdev)
  3951. {
  3952. struct __vxge_hw_device *hldev;
  3953. struct vxgedev *vdev = NULL;
  3954. struct net_device *dev;
  3955. int i = 0;
  3956. hldev = pci_get_drvdata(pdev);
  3957. if (hldev == NULL)
  3958. return;
  3959. dev = hldev->ndev;
  3960. vdev = netdev_priv(dev);
  3961. vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
  3962. vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
  3963. __func__);
  3964. vxge_device_unregister(hldev);
  3965. for (i = 0; i < vdev->no_of_vpath; i++) {
  3966. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3967. vdev->vpaths[i].mcast_addr_cnt = 0;
  3968. vdev->vpaths[i].mac_addr_cnt = 0;
  3969. }
  3970. kfree(vdev->vpaths);
  3971. iounmap(vdev->bar0);
  3972. pci_disable_sriov(pdev);
  3973. /* we are safe to free it now */
  3974. free_netdev(dev);
  3975. vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
  3976. __func__, __LINE__);
  3977. vxge_hw_device_terminate(hldev);
  3978. pci_disable_device(pdev);
  3979. pci_release_regions(pdev);
  3980. pci_set_drvdata(pdev, NULL);
  3981. vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
  3982. __LINE__);
  3983. }
  3984. static struct pci_error_handlers vxge_err_handler = {
  3985. .error_detected = vxge_io_error_detected,
  3986. .slot_reset = vxge_io_slot_reset,
  3987. .resume = vxge_io_resume,
  3988. };
  3989. static struct pci_driver vxge_driver = {
  3990. .name = VXGE_DRIVER_NAME,
  3991. .id_table = vxge_id_table,
  3992. .probe = vxge_probe,
  3993. .remove = __devexit_p(vxge_remove),
  3994. #ifdef CONFIG_PM
  3995. .suspend = vxge_pm_suspend,
  3996. .resume = vxge_pm_resume,
  3997. #endif
  3998. .err_handler = &vxge_err_handler,
  3999. };
  4000. static int __init
  4001. vxge_starter(void)
  4002. {
  4003. int ret = 0;
  4004. pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
  4005. pr_info("Driver version: %s\n", DRV_VERSION);
  4006. verify_bandwidth();
  4007. driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
  4008. if (!driver_config)
  4009. return -ENOMEM;
  4010. ret = pci_register_driver(&vxge_driver);
  4011. if (driver_config->config_dev_cnt &&
  4012. (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
  4013. vxge_debug_init(VXGE_ERR,
  4014. "%s: Configured %d of %d devices",
  4015. VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
  4016. driver_config->total_dev_cnt);
  4017. if (ret)
  4018. kfree(driver_config);
  4019. return ret;
  4020. }
  4021. static void __exit
  4022. vxge_closer(void)
  4023. {
  4024. pci_unregister_driver(&vxge_driver);
  4025. kfree(driver_config);
  4026. }
  4027. module_init(vxge_starter);
  4028. module_exit(vxge_closer);