main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87. if (++sc->ps_usecount != 1)
  88. goto unlock;
  89. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  90. /*
  91. * While the hardware is asleep, the cycle counters contain no
  92. * useful data. Better clear them now so that they don't mess up
  93. * survey data results.
  94. */
  95. spin_lock(&common->cc_lock);
  96. ath_hw_cycle_counters_update(common);
  97. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  98. spin_unlock(&common->cc_lock);
  99. unlock:
  100. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  101. }
  102. void ath9k_ps_restore(struct ath_softc *sc)
  103. {
  104. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  105. unsigned long flags;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. if (--sc->ps_usecount != 0)
  108. goto unlock;
  109. spin_lock(&common->cc_lock);
  110. ath_hw_cycle_counters_update(common);
  111. spin_unlock(&common->cc_lock);
  112. if (sc->ps_idle)
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  114. else if (sc->ps_enabled &&
  115. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  116. PS_WAIT_FOR_CAB |
  117. PS_WAIT_FOR_PSPOLL_DATA |
  118. PS_WAIT_FOR_TX_ACK)))
  119. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  120. unlock:
  121. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  122. }
  123. static void ath_start_ani(struct ath_common *common)
  124. {
  125. struct ath_hw *ah = common->ah;
  126. unsigned long timestamp = jiffies_to_msecs(jiffies);
  127. struct ath_softc *sc = (struct ath_softc *) common->priv;
  128. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  129. return;
  130. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  131. return;
  132. common->ani.longcal_timer = timestamp;
  133. common->ani.shortcal_timer = timestamp;
  134. common->ani.checkani_timer = timestamp;
  135. mod_timer(&common->ani.timer,
  136. jiffies +
  137. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  138. }
  139. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  140. {
  141. struct ath_hw *ah = sc->sc_ah;
  142. struct ath9k_channel *chan = &ah->channels[channel];
  143. struct survey_info *survey = &sc->survey[channel];
  144. if (chan->noisefloor) {
  145. survey->filled |= SURVEY_INFO_NOISE_DBM;
  146. survey->noise = chan->noisefloor;
  147. }
  148. }
  149. static void ath_update_survey_stats(struct ath_softc *sc)
  150. {
  151. struct ath_hw *ah = sc->sc_ah;
  152. struct ath_common *common = ath9k_hw_common(ah);
  153. int pos = ah->curchan - &ah->channels[0];
  154. struct survey_info *survey = &sc->survey[pos];
  155. struct ath_cycle_counters *cc = &common->cc_survey;
  156. unsigned int div = common->clockrate * 1000;
  157. if (!ah->curchan)
  158. return;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. memset(cc, 0, sizeof(*cc));
  172. ath_update_survey_nf(sc, pos);
  173. }
  174. /*
  175. * Set/change channels. If the channel is really being changed, it's done
  176. * by reseting the chip. To accomplish this we must first cleanup any pending
  177. * DMA, then restart stuff.
  178. */
  179. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  180. struct ath9k_channel *hchan)
  181. {
  182. struct ath_wiphy *aphy = hw->priv;
  183. struct ath_hw *ah = sc->sc_ah;
  184. struct ath_common *common = ath9k_hw_common(ah);
  185. struct ieee80211_conf *conf = &common->hw->conf;
  186. bool fastcc = true, stopped;
  187. struct ieee80211_channel *channel = hw->conf.channel;
  188. struct ath9k_hw_cal_data *caldata = NULL;
  189. int r;
  190. if (sc->sc_flags & SC_OP_INVALID)
  191. return -EIO;
  192. del_timer_sync(&common->ani.timer);
  193. cancel_work_sync(&sc->paprd_work);
  194. cancel_work_sync(&sc->hw_check_work);
  195. cancel_delayed_work_sync(&sc->tx_complete_work);
  196. ath9k_ps_wakeup(sc);
  197. /*
  198. * This is only performed if the channel settings have
  199. * actually changed.
  200. *
  201. * To switch channels clear any pending DMA operations;
  202. * wait long enough for the RX fifo to drain, reset the
  203. * hardware at the new frequency, and then re-enable
  204. * the relevant bits of the h/w.
  205. */
  206. ath9k_hw_set_interrupts(ah, 0);
  207. ath_drain_all_txq(sc, false);
  208. stopped = ath_stoprecv(sc);
  209. /* XXX: do not flush receive queue here. We don't want
  210. * to flush data frames already in queue because of
  211. * changing channel. */
  212. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  213. fastcc = false;
  214. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  215. caldata = &aphy->caldata;
  216. ath_print(common, ATH_DBG_CONFIG,
  217. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  218. sc->sc_ah->curchan->channel,
  219. channel->center_freq, conf_is_ht40(conf),
  220. fastcc);
  221. spin_lock_bh(&sc->sc_resetlock);
  222. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  223. if (r) {
  224. ath_print(common, ATH_DBG_FATAL,
  225. "Unable to reset channel (%u MHz), "
  226. "reset status %d\n",
  227. channel->center_freq, r);
  228. spin_unlock_bh(&sc->sc_resetlock);
  229. goto ps_restore;
  230. }
  231. spin_unlock_bh(&sc->sc_resetlock);
  232. if (ath_startrecv(sc) != 0) {
  233. ath_print(common, ATH_DBG_FATAL,
  234. "Unable to restart recv logic\n");
  235. r = -EIO;
  236. goto ps_restore;
  237. }
  238. ath_update_txpow(sc);
  239. ath9k_hw_set_interrupts(ah, ah->imask);
  240. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  241. ath_beacon_config(sc, NULL);
  242. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  243. ath_start_ani(common);
  244. }
  245. ps_restore:
  246. ath9k_ps_restore(sc);
  247. return r;
  248. }
  249. static void ath_paprd_activate(struct ath_softc *sc)
  250. {
  251. struct ath_hw *ah = sc->sc_ah;
  252. struct ath9k_hw_cal_data *caldata = ah->caldata;
  253. struct ath_common *common = ath9k_hw_common(ah);
  254. int chain;
  255. if (!caldata || !caldata->paprd_done)
  256. return;
  257. ath9k_ps_wakeup(sc);
  258. ar9003_paprd_enable(ah, false);
  259. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  260. if (!(common->tx_chainmask & BIT(chain)))
  261. continue;
  262. ar9003_paprd_populate_single_table(ah, caldata, chain);
  263. }
  264. ar9003_paprd_enable(ah, true);
  265. ath9k_ps_restore(sc);
  266. }
  267. void ath_paprd_calibrate(struct work_struct *work)
  268. {
  269. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  270. struct ieee80211_hw *hw = sc->hw;
  271. struct ath_hw *ah = sc->sc_ah;
  272. struct ieee80211_hdr *hdr;
  273. struct sk_buff *skb = NULL;
  274. struct ieee80211_tx_info *tx_info;
  275. int band = hw->conf.channel->band;
  276. struct ieee80211_supported_band *sband = &sc->sbands[band];
  277. struct ath_tx_control txctl;
  278. struct ath9k_hw_cal_data *caldata = ah->caldata;
  279. struct ath_common *common = ath9k_hw_common(ah);
  280. int qnum, ftype;
  281. int chain_ok = 0;
  282. int chain;
  283. int len = 1800;
  284. int time_left;
  285. int i;
  286. if (!caldata)
  287. return;
  288. skb = alloc_skb(len, GFP_KERNEL);
  289. if (!skb)
  290. return;
  291. tx_info = IEEE80211_SKB_CB(skb);
  292. skb_put(skb, len);
  293. memset(skb->data, 0, len);
  294. hdr = (struct ieee80211_hdr *)skb->data;
  295. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  296. hdr->frame_control = cpu_to_le16(ftype);
  297. hdr->duration_id = cpu_to_le16(10);
  298. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  299. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  300. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  301. memset(&txctl, 0, sizeof(txctl));
  302. qnum = sc->tx.hwq_map[WME_AC_BE];
  303. txctl.txq = &sc->tx.txq[qnum];
  304. ath9k_ps_wakeup(sc);
  305. ar9003_paprd_init_table(ah);
  306. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  307. if (!(common->tx_chainmask & BIT(chain)))
  308. continue;
  309. chain_ok = 0;
  310. memset(tx_info, 0, sizeof(*tx_info));
  311. tx_info->band = band;
  312. for (i = 0; i < 4; i++) {
  313. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  314. tx_info->control.rates[i].count = 6;
  315. }
  316. init_completion(&sc->paprd_complete);
  317. ar9003_paprd_setup_gain_table(ah, chain);
  318. txctl.paprd = BIT(chain);
  319. if (ath_tx_start(hw, skb, &txctl) != 0)
  320. break;
  321. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  322. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  323. if (!time_left) {
  324. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  325. "Timeout waiting for paprd training on "
  326. "TX chain %d\n",
  327. chain);
  328. goto fail_paprd;
  329. }
  330. if (!ar9003_paprd_is_done(ah))
  331. break;
  332. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  333. break;
  334. chain_ok = 1;
  335. }
  336. kfree_skb(skb);
  337. if (chain_ok) {
  338. caldata->paprd_done = true;
  339. ath_paprd_activate(sc);
  340. }
  341. fail_paprd:
  342. ath9k_ps_restore(sc);
  343. }
  344. /*
  345. * This routine performs the periodic noise floor calibration function
  346. * that is used to adjust and optimize the chip performance. This
  347. * takes environmental changes (location, temperature) into account.
  348. * When the task is complete, it reschedules itself depending on the
  349. * appropriate interval that was calculated.
  350. */
  351. void ath_ani_calibrate(unsigned long data)
  352. {
  353. struct ath_softc *sc = (struct ath_softc *)data;
  354. struct ath_hw *ah = sc->sc_ah;
  355. struct ath_common *common = ath9k_hw_common(ah);
  356. bool longcal = false;
  357. bool shortcal = false;
  358. bool aniflag = false;
  359. unsigned int timestamp = jiffies_to_msecs(jiffies);
  360. u32 cal_interval, short_cal_interval, long_cal_interval;
  361. unsigned long flags;
  362. if (ah->caldata && ah->caldata->nfcal_interference)
  363. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  364. else
  365. long_cal_interval = ATH_LONG_CALINTERVAL;
  366. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  367. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  368. /* Only calibrate if awake */
  369. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  370. goto set_timer;
  371. ath9k_ps_wakeup(sc);
  372. /* Long calibration runs independently of short calibration. */
  373. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  374. longcal = true;
  375. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  376. common->ani.longcal_timer = timestamp;
  377. }
  378. /* Short calibration applies only while caldone is false */
  379. if (!common->ani.caldone) {
  380. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  381. shortcal = true;
  382. ath_print(common, ATH_DBG_ANI,
  383. "shortcal @%lu\n", jiffies);
  384. common->ani.shortcal_timer = timestamp;
  385. common->ani.resetcal_timer = timestamp;
  386. }
  387. } else {
  388. if ((timestamp - common->ani.resetcal_timer) >=
  389. ATH_RESTART_CALINTERVAL) {
  390. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  391. if (common->ani.caldone)
  392. common->ani.resetcal_timer = timestamp;
  393. }
  394. }
  395. /* Verify whether we must check ANI */
  396. if ((timestamp - common->ani.checkani_timer) >=
  397. ah->config.ani_poll_interval) {
  398. aniflag = true;
  399. common->ani.checkani_timer = timestamp;
  400. }
  401. /* Skip all processing if there's nothing to do. */
  402. if (longcal || shortcal || aniflag) {
  403. /* Call ANI routine if necessary */
  404. if (aniflag) {
  405. spin_lock_irqsave(&common->cc_lock, flags);
  406. ath9k_hw_ani_monitor(ah, ah->curchan);
  407. ath_update_survey_stats(sc);
  408. spin_unlock_irqrestore(&common->cc_lock, flags);
  409. }
  410. /* Perform calibration if necessary */
  411. if (longcal || shortcal) {
  412. common->ani.caldone =
  413. ath9k_hw_calibrate(ah,
  414. ah->curchan,
  415. common->rx_chainmask,
  416. longcal);
  417. }
  418. }
  419. ath9k_ps_restore(sc);
  420. set_timer:
  421. /*
  422. * Set timer interval based on previous results.
  423. * The interval must be the shortest necessary to satisfy ANI,
  424. * short calibration and long calibration.
  425. */
  426. cal_interval = ATH_LONG_CALINTERVAL;
  427. if (sc->sc_ah->config.enable_ani)
  428. cal_interval = min(cal_interval,
  429. (u32)ah->config.ani_poll_interval);
  430. if (!common->ani.caldone)
  431. cal_interval = min(cal_interval, (u32)short_cal_interval);
  432. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  433. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  434. if (!ah->caldata->paprd_done)
  435. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  436. else
  437. ath_paprd_activate(sc);
  438. }
  439. }
  440. /*
  441. * Update tx/rx chainmask. For legacy association,
  442. * hard code chainmask to 1x1, for 11n association, use
  443. * the chainmask configuration, for bt coexistence, use
  444. * the chainmask configuration even in legacy mode.
  445. */
  446. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  447. {
  448. struct ath_hw *ah = sc->sc_ah;
  449. struct ath_common *common = ath9k_hw_common(ah);
  450. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  451. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  452. common->tx_chainmask = ah->caps.tx_chainmask;
  453. common->rx_chainmask = ah->caps.rx_chainmask;
  454. } else {
  455. common->tx_chainmask = 1;
  456. common->rx_chainmask = 1;
  457. }
  458. ath_print(common, ATH_DBG_CONFIG,
  459. "tx chmask: %d, rx chmask: %d\n",
  460. common->tx_chainmask,
  461. common->rx_chainmask);
  462. }
  463. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  464. {
  465. struct ath_node *an;
  466. an = (struct ath_node *)sta->drv_priv;
  467. if (sc->sc_flags & SC_OP_TXAGGR) {
  468. ath_tx_node_init(sc, an);
  469. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  470. sta->ht_cap.ampdu_factor);
  471. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  472. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  473. }
  474. }
  475. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  476. {
  477. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  478. if (sc->sc_flags & SC_OP_TXAGGR)
  479. ath_tx_node_cleanup(sc, an);
  480. }
  481. void ath_hw_check(struct work_struct *work)
  482. {
  483. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  484. int i;
  485. ath9k_ps_wakeup(sc);
  486. for (i = 0; i < 3; i++) {
  487. if (ath9k_hw_check_alive(sc->sc_ah))
  488. goto out;
  489. msleep(1);
  490. }
  491. ath_reset(sc, true);
  492. out:
  493. ath9k_ps_restore(sc);
  494. }
  495. void ath9k_tasklet(unsigned long data)
  496. {
  497. struct ath_softc *sc = (struct ath_softc *)data;
  498. struct ath_hw *ah = sc->sc_ah;
  499. struct ath_common *common = ath9k_hw_common(ah);
  500. u32 status = sc->intrstatus;
  501. u32 rxmask;
  502. ath9k_ps_wakeup(sc);
  503. if (status & ATH9K_INT_FATAL) {
  504. ath_reset(sc, true);
  505. ath9k_ps_restore(sc);
  506. return;
  507. }
  508. if (!ath9k_hw_check_alive(ah))
  509. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  510. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  511. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  512. ATH9K_INT_RXORN);
  513. else
  514. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  515. if (status & rxmask) {
  516. spin_lock_bh(&sc->rx.rxflushlock);
  517. /* Check for high priority Rx first */
  518. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  519. (status & ATH9K_INT_RXHP))
  520. ath_rx_tasklet(sc, 0, true);
  521. ath_rx_tasklet(sc, 0, false);
  522. spin_unlock_bh(&sc->rx.rxflushlock);
  523. }
  524. if (status & ATH9K_INT_TX) {
  525. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  526. ath_tx_edma_tasklet(sc);
  527. else
  528. ath_tx_tasklet(sc);
  529. }
  530. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  531. /*
  532. * TSF sync does not look correct; remain awake to sync with
  533. * the next Beacon.
  534. */
  535. ath_print(common, ATH_DBG_PS,
  536. "TSFOOR - Sync with next Beacon\n");
  537. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  538. }
  539. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  540. if (status & ATH9K_INT_GENTIMER)
  541. ath_gen_timer_isr(sc->sc_ah);
  542. /* re-enable hardware interrupt */
  543. ath9k_hw_set_interrupts(ah, ah->imask);
  544. ath9k_ps_restore(sc);
  545. }
  546. irqreturn_t ath_isr(int irq, void *dev)
  547. {
  548. #define SCHED_INTR ( \
  549. ATH9K_INT_FATAL | \
  550. ATH9K_INT_RXORN | \
  551. ATH9K_INT_RXEOL | \
  552. ATH9K_INT_RX | \
  553. ATH9K_INT_RXLP | \
  554. ATH9K_INT_RXHP | \
  555. ATH9K_INT_TX | \
  556. ATH9K_INT_BMISS | \
  557. ATH9K_INT_CST | \
  558. ATH9K_INT_TSFOOR | \
  559. ATH9K_INT_GENTIMER)
  560. struct ath_softc *sc = dev;
  561. struct ath_hw *ah = sc->sc_ah;
  562. struct ath_common *common = ath9k_hw_common(ah);
  563. enum ath9k_int status;
  564. bool sched = false;
  565. /*
  566. * The hardware is not ready/present, don't
  567. * touch anything. Note this can happen early
  568. * on if the IRQ is shared.
  569. */
  570. if (sc->sc_flags & SC_OP_INVALID)
  571. return IRQ_NONE;
  572. /* shared irq, not for us */
  573. if (!ath9k_hw_intrpend(ah))
  574. return IRQ_NONE;
  575. /*
  576. * Figure out the reason(s) for the interrupt. Note
  577. * that the hal returns a pseudo-ISR that may include
  578. * bits we haven't explicitly enabled so we mask the
  579. * value to insure we only process bits we requested.
  580. */
  581. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  582. status &= ah->imask; /* discard unasked-for bits */
  583. /*
  584. * If there are no status bits set, then this interrupt was not
  585. * for me (should have been caught above).
  586. */
  587. if (!status)
  588. return IRQ_NONE;
  589. /* Cache the status */
  590. sc->intrstatus = status;
  591. if (status & SCHED_INTR)
  592. sched = true;
  593. /*
  594. * If a FATAL or RXORN interrupt is received, we have to reset the
  595. * chip immediately.
  596. */
  597. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  598. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  599. goto chip_reset;
  600. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  601. (status & ATH9K_INT_BB_WATCHDOG)) {
  602. spin_lock(&common->cc_lock);
  603. ath_hw_cycle_counters_update(common);
  604. ar9003_hw_bb_watchdog_dbg_info(ah);
  605. spin_unlock(&common->cc_lock);
  606. goto chip_reset;
  607. }
  608. if (status & ATH9K_INT_SWBA)
  609. tasklet_schedule(&sc->bcon_tasklet);
  610. if (status & ATH9K_INT_TXURN)
  611. ath9k_hw_updatetxtriglevel(ah, true);
  612. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  613. if (status & ATH9K_INT_RXEOL) {
  614. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  615. ath9k_hw_set_interrupts(ah, ah->imask);
  616. }
  617. }
  618. if (status & ATH9K_INT_MIB) {
  619. /*
  620. * Disable interrupts until we service the MIB
  621. * interrupt; otherwise it will continue to
  622. * fire.
  623. */
  624. ath9k_hw_set_interrupts(ah, 0);
  625. /*
  626. * Let the hal handle the event. We assume
  627. * it will clear whatever condition caused
  628. * the interrupt.
  629. */
  630. spin_lock(&common->cc_lock);
  631. ath9k_hw_proc_mib_event(ah);
  632. spin_unlock(&common->cc_lock);
  633. ath9k_hw_set_interrupts(ah, ah->imask);
  634. }
  635. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  636. if (status & ATH9K_INT_TIM_TIMER) {
  637. /* Clear RxAbort bit so that we can
  638. * receive frames */
  639. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  640. ath9k_hw_setrxabort(sc->sc_ah, 0);
  641. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  642. }
  643. chip_reset:
  644. ath_debug_stat_interrupt(sc, status);
  645. if (sched) {
  646. /* turn off every interrupt except SWBA */
  647. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  648. tasklet_schedule(&sc->intr_tq);
  649. }
  650. return IRQ_HANDLED;
  651. #undef SCHED_INTR
  652. }
  653. static u32 ath_get_extchanmode(struct ath_softc *sc,
  654. struct ieee80211_channel *chan,
  655. enum nl80211_channel_type channel_type)
  656. {
  657. u32 chanmode = 0;
  658. switch (chan->band) {
  659. case IEEE80211_BAND_2GHZ:
  660. switch(channel_type) {
  661. case NL80211_CHAN_NO_HT:
  662. case NL80211_CHAN_HT20:
  663. chanmode = CHANNEL_G_HT20;
  664. break;
  665. case NL80211_CHAN_HT40PLUS:
  666. chanmode = CHANNEL_G_HT40PLUS;
  667. break;
  668. case NL80211_CHAN_HT40MINUS:
  669. chanmode = CHANNEL_G_HT40MINUS;
  670. break;
  671. }
  672. break;
  673. case IEEE80211_BAND_5GHZ:
  674. switch(channel_type) {
  675. case NL80211_CHAN_NO_HT:
  676. case NL80211_CHAN_HT20:
  677. chanmode = CHANNEL_A_HT20;
  678. break;
  679. case NL80211_CHAN_HT40PLUS:
  680. chanmode = CHANNEL_A_HT40PLUS;
  681. break;
  682. case NL80211_CHAN_HT40MINUS:
  683. chanmode = CHANNEL_A_HT40MINUS;
  684. break;
  685. }
  686. break;
  687. default:
  688. break;
  689. }
  690. return chanmode;
  691. }
  692. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  693. struct ieee80211_vif *vif,
  694. struct ieee80211_bss_conf *bss_conf)
  695. {
  696. struct ath_hw *ah = sc->sc_ah;
  697. struct ath_common *common = ath9k_hw_common(ah);
  698. if (bss_conf->assoc) {
  699. ath_print(common, ATH_DBG_CONFIG,
  700. "Bss Info ASSOC %d, bssid: %pM\n",
  701. bss_conf->aid, common->curbssid);
  702. /* New association, store aid */
  703. common->curaid = bss_conf->aid;
  704. ath9k_hw_write_associd(ah);
  705. /*
  706. * Request a re-configuration of Beacon related timers
  707. * on the receipt of the first Beacon frame (i.e.,
  708. * after time sync with the AP).
  709. */
  710. sc->ps_flags |= PS_BEACON_SYNC;
  711. /* Configure the beacon */
  712. ath_beacon_config(sc, vif);
  713. /* Reset rssi stats */
  714. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  715. sc->sc_flags |= SC_OP_ANI_RUN;
  716. ath_start_ani(common);
  717. } else {
  718. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  719. common->curaid = 0;
  720. /* Stop ANI */
  721. sc->sc_flags &= ~SC_OP_ANI_RUN;
  722. del_timer_sync(&common->ani.timer);
  723. }
  724. }
  725. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  726. {
  727. struct ath_hw *ah = sc->sc_ah;
  728. struct ath_common *common = ath9k_hw_common(ah);
  729. struct ieee80211_channel *channel = hw->conf.channel;
  730. int r;
  731. ath9k_ps_wakeup(sc);
  732. ath9k_hw_configpcipowersave(ah, 0, 0);
  733. if (!ah->curchan)
  734. ah->curchan = ath_get_curchannel(sc, sc->hw);
  735. spin_lock_bh(&sc->sc_resetlock);
  736. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  737. if (r) {
  738. ath_print(common, ATH_DBG_FATAL,
  739. "Unable to reset channel (%u MHz), "
  740. "reset status %d\n",
  741. channel->center_freq, r);
  742. }
  743. spin_unlock_bh(&sc->sc_resetlock);
  744. ath_update_txpow(sc);
  745. if (ath_startrecv(sc) != 0) {
  746. ath_print(common, ATH_DBG_FATAL,
  747. "Unable to restart recv logic\n");
  748. return;
  749. }
  750. if (sc->sc_flags & SC_OP_BEACONS)
  751. ath_beacon_config(sc, NULL); /* restart beacons */
  752. /* Re-Enable interrupts */
  753. ath9k_hw_set_interrupts(ah, ah->imask);
  754. /* Enable LED */
  755. ath9k_hw_cfg_output(ah, ah->led_pin,
  756. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  757. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  758. ieee80211_wake_queues(hw);
  759. ath9k_ps_restore(sc);
  760. }
  761. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  762. {
  763. struct ath_hw *ah = sc->sc_ah;
  764. struct ieee80211_channel *channel = hw->conf.channel;
  765. int r;
  766. ath9k_ps_wakeup(sc);
  767. ieee80211_stop_queues(hw);
  768. /*
  769. * Keep the LED on when the radio is disabled
  770. * during idle unassociated state.
  771. */
  772. if (!sc->ps_idle) {
  773. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  774. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  775. }
  776. /* Disable interrupts */
  777. ath9k_hw_set_interrupts(ah, 0);
  778. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  779. ath_stoprecv(sc); /* turn off frame recv */
  780. ath_flushrecv(sc); /* flush recv queue */
  781. if (!ah->curchan)
  782. ah->curchan = ath_get_curchannel(sc, hw);
  783. spin_lock_bh(&sc->sc_resetlock);
  784. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  785. if (r) {
  786. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  787. "Unable to reset channel (%u MHz), "
  788. "reset status %d\n",
  789. channel->center_freq, r);
  790. }
  791. spin_unlock_bh(&sc->sc_resetlock);
  792. ath9k_hw_phy_disable(ah);
  793. ath9k_hw_configpcipowersave(ah, 1, 1);
  794. ath9k_ps_restore(sc);
  795. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  796. }
  797. int ath_reset(struct ath_softc *sc, bool retry_tx)
  798. {
  799. struct ath_hw *ah = sc->sc_ah;
  800. struct ath_common *common = ath9k_hw_common(ah);
  801. struct ieee80211_hw *hw = sc->hw;
  802. int r;
  803. /* Stop ANI */
  804. del_timer_sync(&common->ani.timer);
  805. ieee80211_stop_queues(hw);
  806. ath9k_hw_set_interrupts(ah, 0);
  807. ath_drain_all_txq(sc, retry_tx);
  808. ath_stoprecv(sc);
  809. ath_flushrecv(sc);
  810. spin_lock_bh(&sc->sc_resetlock);
  811. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  812. if (r)
  813. ath_print(common, ATH_DBG_FATAL,
  814. "Unable to reset hardware; reset status %d\n", r);
  815. spin_unlock_bh(&sc->sc_resetlock);
  816. if (ath_startrecv(sc) != 0)
  817. ath_print(common, ATH_DBG_FATAL,
  818. "Unable to start recv logic\n");
  819. /*
  820. * We may be doing a reset in response to a request
  821. * that changes the channel so update any state that
  822. * might change as a result.
  823. */
  824. ath_update_txpow(sc);
  825. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  826. ath_beacon_config(sc, NULL); /* restart beacons */
  827. ath9k_hw_set_interrupts(ah, ah->imask);
  828. if (retry_tx) {
  829. int i;
  830. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  831. if (ATH_TXQ_SETUP(sc, i)) {
  832. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  833. ath_txq_schedule(sc, &sc->tx.txq[i]);
  834. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  835. }
  836. }
  837. }
  838. ieee80211_wake_queues(hw);
  839. /* Start ANI */
  840. ath_start_ani(common);
  841. return r;
  842. }
  843. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  844. {
  845. int qnum;
  846. switch (queue) {
  847. case 0:
  848. qnum = sc->tx.hwq_map[WME_AC_VO];
  849. break;
  850. case 1:
  851. qnum = sc->tx.hwq_map[WME_AC_VI];
  852. break;
  853. case 2:
  854. qnum = sc->tx.hwq_map[WME_AC_BE];
  855. break;
  856. case 3:
  857. qnum = sc->tx.hwq_map[WME_AC_BK];
  858. break;
  859. default:
  860. qnum = sc->tx.hwq_map[WME_AC_BE];
  861. break;
  862. }
  863. return qnum;
  864. }
  865. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  866. {
  867. int qnum;
  868. switch (queue) {
  869. case WME_AC_VO:
  870. qnum = 0;
  871. break;
  872. case WME_AC_VI:
  873. qnum = 1;
  874. break;
  875. case WME_AC_BE:
  876. qnum = 2;
  877. break;
  878. case WME_AC_BK:
  879. qnum = 3;
  880. break;
  881. default:
  882. qnum = -1;
  883. break;
  884. }
  885. return qnum;
  886. }
  887. /* XXX: Remove me once we don't depend on ath9k_channel for all
  888. * this redundant data */
  889. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  890. struct ath9k_channel *ichan)
  891. {
  892. struct ieee80211_channel *chan = hw->conf.channel;
  893. struct ieee80211_conf *conf = &hw->conf;
  894. ichan->channel = chan->center_freq;
  895. ichan->chan = chan;
  896. if (chan->band == IEEE80211_BAND_2GHZ) {
  897. ichan->chanmode = CHANNEL_G;
  898. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  899. } else {
  900. ichan->chanmode = CHANNEL_A;
  901. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  902. }
  903. if (conf_is_ht(conf))
  904. ichan->chanmode = ath_get_extchanmode(sc, chan,
  905. conf->channel_type);
  906. }
  907. /**********************/
  908. /* mac80211 callbacks */
  909. /**********************/
  910. static int ath9k_start(struct ieee80211_hw *hw)
  911. {
  912. struct ath_wiphy *aphy = hw->priv;
  913. struct ath_softc *sc = aphy->sc;
  914. struct ath_hw *ah = sc->sc_ah;
  915. struct ath_common *common = ath9k_hw_common(ah);
  916. struct ieee80211_channel *curchan = hw->conf.channel;
  917. struct ath9k_channel *init_channel;
  918. int r;
  919. ath_print(common, ATH_DBG_CONFIG,
  920. "Starting driver with initial channel: %d MHz\n",
  921. curchan->center_freq);
  922. mutex_lock(&sc->mutex);
  923. if (ath9k_wiphy_started(sc)) {
  924. if (sc->chan_idx == curchan->hw_value) {
  925. /*
  926. * Already on the operational channel, the new wiphy
  927. * can be marked active.
  928. */
  929. aphy->state = ATH_WIPHY_ACTIVE;
  930. ieee80211_wake_queues(hw);
  931. } else {
  932. /*
  933. * Another wiphy is on another channel, start the new
  934. * wiphy in paused state.
  935. */
  936. aphy->state = ATH_WIPHY_PAUSED;
  937. ieee80211_stop_queues(hw);
  938. }
  939. mutex_unlock(&sc->mutex);
  940. return 0;
  941. }
  942. aphy->state = ATH_WIPHY_ACTIVE;
  943. /* setup initial channel */
  944. sc->chan_idx = curchan->hw_value;
  945. init_channel = ath_get_curchannel(sc, hw);
  946. /* Reset SERDES registers */
  947. ath9k_hw_configpcipowersave(ah, 0, 0);
  948. /*
  949. * The basic interface to setting the hardware in a good
  950. * state is ``reset''. On return the hardware is known to
  951. * be powered up and with interrupts disabled. This must
  952. * be followed by initialization of the appropriate bits
  953. * and then setup of the interrupt mask.
  954. */
  955. spin_lock_bh(&sc->sc_resetlock);
  956. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  957. if (r) {
  958. ath_print(common, ATH_DBG_FATAL,
  959. "Unable to reset hardware; reset status %d "
  960. "(freq %u MHz)\n", r,
  961. curchan->center_freq);
  962. spin_unlock_bh(&sc->sc_resetlock);
  963. goto mutex_unlock;
  964. }
  965. spin_unlock_bh(&sc->sc_resetlock);
  966. /*
  967. * This is needed only to setup initial state
  968. * but it's best done after a reset.
  969. */
  970. ath_update_txpow(sc);
  971. /*
  972. * Setup the hardware after reset:
  973. * The receive engine is set going.
  974. * Frame transmit is handled entirely
  975. * in the frame output path; there's nothing to do
  976. * here except setup the interrupt mask.
  977. */
  978. if (ath_startrecv(sc) != 0) {
  979. ath_print(common, ATH_DBG_FATAL,
  980. "Unable to start recv logic\n");
  981. r = -EIO;
  982. goto mutex_unlock;
  983. }
  984. /* Setup our intr mask. */
  985. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  986. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  987. ATH9K_INT_GLOBAL;
  988. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  989. ah->imask |= ATH9K_INT_RXHP |
  990. ATH9K_INT_RXLP |
  991. ATH9K_INT_BB_WATCHDOG;
  992. else
  993. ah->imask |= ATH9K_INT_RX;
  994. ah->imask |= ATH9K_INT_GTT;
  995. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  996. ah->imask |= ATH9K_INT_CST;
  997. sc->sc_flags &= ~SC_OP_INVALID;
  998. /* Disable BMISS interrupt when we're not associated */
  999. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  1000. ath9k_hw_set_interrupts(ah, ah->imask);
  1001. ieee80211_wake_queues(hw);
  1002. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  1003. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  1004. !ah->btcoex_hw.enabled) {
  1005. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  1006. AR_STOMP_LOW_WLAN_WGHT);
  1007. ath9k_hw_btcoex_enable(ah);
  1008. if (common->bus_ops->bt_coex_prep)
  1009. common->bus_ops->bt_coex_prep(common);
  1010. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1011. ath9k_btcoex_timer_resume(sc);
  1012. }
  1013. mutex_unlock:
  1014. mutex_unlock(&sc->mutex);
  1015. return r;
  1016. }
  1017. static int ath9k_tx(struct ieee80211_hw *hw,
  1018. struct sk_buff *skb)
  1019. {
  1020. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1021. struct ath_wiphy *aphy = hw->priv;
  1022. struct ath_softc *sc = aphy->sc;
  1023. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1024. struct ath_tx_control txctl;
  1025. int padpos, padsize;
  1026. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1027. int qnum;
  1028. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1029. ath_print(common, ATH_DBG_XMIT,
  1030. "ath9k: %s: TX in unexpected wiphy state "
  1031. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1032. goto exit;
  1033. }
  1034. if (sc->ps_enabled) {
  1035. /*
  1036. * mac80211 does not set PM field for normal data frames, so we
  1037. * need to update that based on the current PS mode.
  1038. */
  1039. if (ieee80211_is_data(hdr->frame_control) &&
  1040. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1041. !ieee80211_has_pm(hdr->frame_control)) {
  1042. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1043. "while in PS mode\n");
  1044. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1045. }
  1046. }
  1047. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1048. /*
  1049. * We are using PS-Poll and mac80211 can request TX while in
  1050. * power save mode. Need to wake up hardware for the TX to be
  1051. * completed and if needed, also for RX of buffered frames.
  1052. */
  1053. ath9k_ps_wakeup(sc);
  1054. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1055. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1056. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1057. ath_print(common, ATH_DBG_PS,
  1058. "Sending PS-Poll to pick a buffered frame\n");
  1059. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1060. } else {
  1061. ath_print(common, ATH_DBG_PS,
  1062. "Wake up to complete TX\n");
  1063. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1064. }
  1065. /*
  1066. * The actual restore operation will happen only after
  1067. * the sc_flags bit is cleared. We are just dropping
  1068. * the ps_usecount here.
  1069. */
  1070. ath9k_ps_restore(sc);
  1071. }
  1072. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1073. /*
  1074. * As a temporary workaround, assign seq# here; this will likely need
  1075. * to be cleaned up to work better with Beacon transmission and virtual
  1076. * BSSes.
  1077. */
  1078. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1079. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1080. sc->tx.seq_no += 0x10;
  1081. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1082. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1083. }
  1084. /* Add the padding after the header if this is not already done */
  1085. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1086. padsize = padpos & 3;
  1087. if (padsize && skb->len>padpos) {
  1088. if (skb_headroom(skb) < padsize)
  1089. return -1;
  1090. skb_push(skb, padsize);
  1091. memmove(skb->data, skb->data + padsize, padpos);
  1092. }
  1093. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1094. txctl.txq = &sc->tx.txq[qnum];
  1095. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1096. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1097. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1098. goto exit;
  1099. }
  1100. return 0;
  1101. exit:
  1102. dev_kfree_skb_any(skb);
  1103. return 0;
  1104. }
  1105. static void ath9k_stop(struct ieee80211_hw *hw)
  1106. {
  1107. struct ath_wiphy *aphy = hw->priv;
  1108. struct ath_softc *sc = aphy->sc;
  1109. struct ath_hw *ah = sc->sc_ah;
  1110. struct ath_common *common = ath9k_hw_common(ah);
  1111. int i;
  1112. mutex_lock(&sc->mutex);
  1113. aphy->state = ATH_WIPHY_INACTIVE;
  1114. if (led_blink)
  1115. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1116. cancel_delayed_work_sync(&sc->tx_complete_work);
  1117. cancel_work_sync(&sc->paprd_work);
  1118. cancel_work_sync(&sc->hw_check_work);
  1119. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1120. if (sc->sec_wiphy[i])
  1121. break;
  1122. }
  1123. if (i == sc->num_sec_wiphy) {
  1124. cancel_delayed_work_sync(&sc->wiphy_work);
  1125. cancel_work_sync(&sc->chan_work);
  1126. }
  1127. if (sc->sc_flags & SC_OP_INVALID) {
  1128. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1129. mutex_unlock(&sc->mutex);
  1130. return;
  1131. }
  1132. if (ath9k_wiphy_started(sc)) {
  1133. mutex_unlock(&sc->mutex);
  1134. return; /* another wiphy still in use */
  1135. }
  1136. /* Ensure HW is awake when we try to shut it down. */
  1137. ath9k_ps_wakeup(sc);
  1138. if (ah->btcoex_hw.enabled) {
  1139. ath9k_hw_btcoex_disable(ah);
  1140. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1141. ath9k_btcoex_timer_pause(sc);
  1142. }
  1143. /* make sure h/w will not generate any interrupt
  1144. * before setting the invalid flag. */
  1145. ath9k_hw_set_interrupts(ah, 0);
  1146. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1147. ath_drain_all_txq(sc, false);
  1148. ath_stoprecv(sc);
  1149. ath9k_hw_phy_disable(ah);
  1150. } else
  1151. sc->rx.rxlink = NULL;
  1152. /* disable HAL and put h/w to sleep */
  1153. ath9k_hw_disable(ah);
  1154. ath9k_hw_configpcipowersave(ah, 1, 1);
  1155. ath9k_ps_restore(sc);
  1156. /* Finally, put the chip in FULL SLEEP mode */
  1157. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1158. sc->sc_flags |= SC_OP_INVALID;
  1159. mutex_unlock(&sc->mutex);
  1160. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1161. }
  1162. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1163. struct ieee80211_vif *vif)
  1164. {
  1165. struct ath_wiphy *aphy = hw->priv;
  1166. struct ath_softc *sc = aphy->sc;
  1167. struct ath_hw *ah = sc->sc_ah;
  1168. struct ath_common *common = ath9k_hw_common(ah);
  1169. struct ath_vif *avp = (void *)vif->drv_priv;
  1170. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1171. int ret = 0;
  1172. mutex_lock(&sc->mutex);
  1173. switch (vif->type) {
  1174. case NL80211_IFTYPE_STATION:
  1175. ic_opmode = NL80211_IFTYPE_STATION;
  1176. break;
  1177. case NL80211_IFTYPE_WDS:
  1178. ic_opmode = NL80211_IFTYPE_WDS;
  1179. break;
  1180. case NL80211_IFTYPE_ADHOC:
  1181. case NL80211_IFTYPE_AP:
  1182. case NL80211_IFTYPE_MESH_POINT:
  1183. if (sc->nbcnvifs >= ATH_BCBUF) {
  1184. ret = -ENOBUFS;
  1185. goto out;
  1186. }
  1187. ic_opmode = vif->type;
  1188. break;
  1189. default:
  1190. ath_print(common, ATH_DBG_FATAL,
  1191. "Interface type %d not yet supported\n", vif->type);
  1192. ret = -EOPNOTSUPP;
  1193. goto out;
  1194. }
  1195. ath_print(common, ATH_DBG_CONFIG,
  1196. "Attach a VIF of type: %d\n", ic_opmode);
  1197. /* Set the VIF opmode */
  1198. avp->av_opmode = ic_opmode;
  1199. avp->av_bslot = -1;
  1200. sc->nvifs++;
  1201. ath9k_set_bssid_mask(hw, vif);
  1202. if (sc->nvifs > 1)
  1203. goto out; /* skip global settings for secondary vif */
  1204. if (ic_opmode == NL80211_IFTYPE_AP) {
  1205. ath9k_hw_set_tsfadjust(ah, 1);
  1206. sc->sc_flags |= SC_OP_TSF_RESET;
  1207. }
  1208. /* Set the device opmode */
  1209. ah->opmode = ic_opmode;
  1210. /*
  1211. * Enable MIB interrupts when there are hardware phy counters.
  1212. * Note we only do this (at the moment) for station mode.
  1213. */
  1214. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1215. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1216. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1217. if (ah->config.enable_ani)
  1218. ah->imask |= ATH9K_INT_MIB;
  1219. ah->imask |= ATH9K_INT_TSFOOR;
  1220. }
  1221. ath9k_hw_set_interrupts(ah, ah->imask);
  1222. if (vif->type == NL80211_IFTYPE_AP ||
  1223. vif->type == NL80211_IFTYPE_ADHOC ||
  1224. vif->type == NL80211_IFTYPE_MONITOR) {
  1225. sc->sc_flags |= SC_OP_ANI_RUN;
  1226. ath_start_ani(common);
  1227. }
  1228. out:
  1229. mutex_unlock(&sc->mutex);
  1230. return ret;
  1231. }
  1232. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1233. struct ieee80211_vif *vif)
  1234. {
  1235. struct ath_wiphy *aphy = hw->priv;
  1236. struct ath_softc *sc = aphy->sc;
  1237. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1238. struct ath_vif *avp = (void *)vif->drv_priv;
  1239. int i;
  1240. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1241. mutex_lock(&sc->mutex);
  1242. /* Stop ANI */
  1243. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1244. del_timer_sync(&common->ani.timer);
  1245. /* Reclaim beacon resources */
  1246. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1247. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1248. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1249. ath9k_ps_wakeup(sc);
  1250. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1251. ath9k_ps_restore(sc);
  1252. }
  1253. ath_beacon_return(sc, avp);
  1254. sc->sc_flags &= ~SC_OP_BEACONS;
  1255. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1256. if (sc->beacon.bslot[i] == vif) {
  1257. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1258. "slot\n", __func__);
  1259. sc->beacon.bslot[i] = NULL;
  1260. sc->beacon.bslot_aphy[i] = NULL;
  1261. }
  1262. }
  1263. sc->nvifs--;
  1264. mutex_unlock(&sc->mutex);
  1265. }
  1266. static void ath9k_enable_ps(struct ath_softc *sc)
  1267. {
  1268. struct ath_hw *ah = sc->sc_ah;
  1269. sc->ps_enabled = true;
  1270. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1271. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1272. ah->imask |= ATH9K_INT_TIM_TIMER;
  1273. ath9k_hw_set_interrupts(ah, ah->imask);
  1274. }
  1275. ath9k_hw_setrxabort(ah, 1);
  1276. }
  1277. }
  1278. static void ath9k_disable_ps(struct ath_softc *sc)
  1279. {
  1280. struct ath_hw *ah = sc->sc_ah;
  1281. sc->ps_enabled = false;
  1282. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1283. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1284. ath9k_hw_setrxabort(ah, 0);
  1285. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1286. PS_WAIT_FOR_CAB |
  1287. PS_WAIT_FOR_PSPOLL_DATA |
  1288. PS_WAIT_FOR_TX_ACK);
  1289. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1290. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1291. ath9k_hw_set_interrupts(ah, ah->imask);
  1292. }
  1293. }
  1294. }
  1295. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1296. {
  1297. struct ath_wiphy *aphy = hw->priv;
  1298. struct ath_softc *sc = aphy->sc;
  1299. struct ath_hw *ah = sc->sc_ah;
  1300. struct ath_common *common = ath9k_hw_common(ah);
  1301. struct ieee80211_conf *conf = &hw->conf;
  1302. bool disable_radio;
  1303. mutex_lock(&sc->mutex);
  1304. /*
  1305. * Leave this as the first check because we need to turn on the
  1306. * radio if it was disabled before prior to processing the rest
  1307. * of the changes. Likewise we must only disable the radio towards
  1308. * the end.
  1309. */
  1310. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1311. bool enable_radio;
  1312. bool all_wiphys_idle;
  1313. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1314. spin_lock_bh(&sc->wiphy_lock);
  1315. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1316. ath9k_set_wiphy_idle(aphy, idle);
  1317. enable_radio = (!idle && all_wiphys_idle);
  1318. /*
  1319. * After we unlock here its possible another wiphy
  1320. * can be re-renabled so to account for that we will
  1321. * only disable the radio toward the end of this routine
  1322. * if by then all wiphys are still idle.
  1323. */
  1324. spin_unlock_bh(&sc->wiphy_lock);
  1325. if (enable_radio) {
  1326. sc->ps_idle = false;
  1327. ath_radio_enable(sc, hw);
  1328. ath_print(common, ATH_DBG_CONFIG,
  1329. "not-idle: enabling radio\n");
  1330. }
  1331. }
  1332. /*
  1333. * We just prepare to enable PS. We have to wait until our AP has
  1334. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1335. * those ACKs and end up retransmitting the same null data frames.
  1336. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1337. */
  1338. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1339. unsigned long flags;
  1340. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1341. if (conf->flags & IEEE80211_CONF_PS)
  1342. ath9k_enable_ps(sc);
  1343. else
  1344. ath9k_disable_ps(sc);
  1345. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1346. }
  1347. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1348. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1349. ath_print(common, ATH_DBG_CONFIG,
  1350. "HW opmode set to Monitor mode\n");
  1351. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1352. }
  1353. }
  1354. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1355. struct ieee80211_channel *curchan = hw->conf.channel;
  1356. int pos = curchan->hw_value;
  1357. int old_pos = -1;
  1358. unsigned long flags;
  1359. if (ah->curchan)
  1360. old_pos = ah->curchan - &ah->channels[0];
  1361. aphy->chan_idx = pos;
  1362. aphy->chan_is_ht = conf_is_ht(conf);
  1363. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1364. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1365. else
  1366. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1367. if (aphy->state == ATH_WIPHY_SCAN ||
  1368. aphy->state == ATH_WIPHY_ACTIVE)
  1369. ath9k_wiphy_pause_all_forced(sc, aphy);
  1370. else {
  1371. /*
  1372. * Do not change operational channel based on a paused
  1373. * wiphy changes.
  1374. */
  1375. goto skip_chan_change;
  1376. }
  1377. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1378. curchan->center_freq);
  1379. /* XXX: remove me eventualy */
  1380. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1381. ath_update_chainmask(sc, conf_is_ht(conf));
  1382. /* update survey stats for the old channel before switching */
  1383. spin_lock_irqsave(&common->cc_lock, flags);
  1384. ath_update_survey_stats(sc);
  1385. spin_unlock_irqrestore(&common->cc_lock, flags);
  1386. /*
  1387. * If the operating channel changes, change the survey in-use flags
  1388. * along with it.
  1389. * Reset the survey data for the new channel, unless we're switching
  1390. * back to the operating channel from an off-channel operation.
  1391. */
  1392. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1393. sc->cur_survey != &sc->survey[pos]) {
  1394. if (sc->cur_survey)
  1395. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1396. sc->cur_survey = &sc->survey[pos];
  1397. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1398. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1399. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1400. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1401. }
  1402. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1403. ath_print(common, ATH_DBG_FATAL,
  1404. "Unable to set channel\n");
  1405. mutex_unlock(&sc->mutex);
  1406. return -EINVAL;
  1407. }
  1408. /*
  1409. * The most recent snapshot of channel->noisefloor for the old
  1410. * channel is only available after the hardware reset. Copy it to
  1411. * the survey stats now.
  1412. */
  1413. if (old_pos >= 0)
  1414. ath_update_survey_nf(sc, old_pos);
  1415. }
  1416. skip_chan_change:
  1417. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1418. sc->config.txpowlimit = 2 * conf->power_level;
  1419. ath_update_txpow(sc);
  1420. }
  1421. spin_lock_bh(&sc->wiphy_lock);
  1422. disable_radio = ath9k_all_wiphys_idle(sc);
  1423. spin_unlock_bh(&sc->wiphy_lock);
  1424. if (disable_radio) {
  1425. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1426. sc->ps_idle = true;
  1427. ath_radio_disable(sc, hw);
  1428. }
  1429. mutex_unlock(&sc->mutex);
  1430. return 0;
  1431. }
  1432. #define SUPPORTED_FILTERS \
  1433. (FIF_PROMISC_IN_BSS | \
  1434. FIF_ALLMULTI | \
  1435. FIF_CONTROL | \
  1436. FIF_PSPOLL | \
  1437. FIF_OTHER_BSS | \
  1438. FIF_BCN_PRBRESP_PROMISC | \
  1439. FIF_PROBE_REQ | \
  1440. FIF_FCSFAIL)
  1441. /* FIXME: sc->sc_full_reset ? */
  1442. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1443. unsigned int changed_flags,
  1444. unsigned int *total_flags,
  1445. u64 multicast)
  1446. {
  1447. struct ath_wiphy *aphy = hw->priv;
  1448. struct ath_softc *sc = aphy->sc;
  1449. u32 rfilt;
  1450. changed_flags &= SUPPORTED_FILTERS;
  1451. *total_flags &= SUPPORTED_FILTERS;
  1452. sc->rx.rxfilter = *total_flags;
  1453. ath9k_ps_wakeup(sc);
  1454. rfilt = ath_calcrxfilter(sc);
  1455. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1456. ath9k_ps_restore(sc);
  1457. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1458. "Set HW RX filter: 0x%x\n", rfilt);
  1459. }
  1460. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1461. struct ieee80211_vif *vif,
  1462. struct ieee80211_sta *sta)
  1463. {
  1464. struct ath_wiphy *aphy = hw->priv;
  1465. struct ath_softc *sc = aphy->sc;
  1466. ath_node_attach(sc, sta);
  1467. return 0;
  1468. }
  1469. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1470. struct ieee80211_vif *vif,
  1471. struct ieee80211_sta *sta)
  1472. {
  1473. struct ath_wiphy *aphy = hw->priv;
  1474. struct ath_softc *sc = aphy->sc;
  1475. ath_node_detach(sc, sta);
  1476. return 0;
  1477. }
  1478. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1479. const struct ieee80211_tx_queue_params *params)
  1480. {
  1481. struct ath_wiphy *aphy = hw->priv;
  1482. struct ath_softc *sc = aphy->sc;
  1483. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1484. struct ath9k_tx_queue_info qi;
  1485. int ret = 0, qnum;
  1486. if (queue >= WME_NUM_AC)
  1487. return 0;
  1488. mutex_lock(&sc->mutex);
  1489. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1490. qi.tqi_aifs = params->aifs;
  1491. qi.tqi_cwmin = params->cw_min;
  1492. qi.tqi_cwmax = params->cw_max;
  1493. qi.tqi_burstTime = params->txop;
  1494. qnum = ath_get_hal_qnum(queue, sc);
  1495. ath_print(common, ATH_DBG_CONFIG,
  1496. "Configure tx [queue/halq] [%d/%d], "
  1497. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1498. queue, qnum, params->aifs, params->cw_min,
  1499. params->cw_max, params->txop);
  1500. ret = ath_txq_update(sc, qnum, &qi);
  1501. if (ret)
  1502. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1503. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1504. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1505. ath_beaconq_config(sc);
  1506. mutex_unlock(&sc->mutex);
  1507. return ret;
  1508. }
  1509. static int ath9k_set_key(struct ieee80211_hw *hw,
  1510. enum set_key_cmd cmd,
  1511. struct ieee80211_vif *vif,
  1512. struct ieee80211_sta *sta,
  1513. struct ieee80211_key_conf *key)
  1514. {
  1515. struct ath_wiphy *aphy = hw->priv;
  1516. struct ath_softc *sc = aphy->sc;
  1517. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1518. int ret = 0;
  1519. if (modparam_nohwcrypt)
  1520. return -ENOSPC;
  1521. mutex_lock(&sc->mutex);
  1522. ath9k_ps_wakeup(sc);
  1523. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1524. switch (cmd) {
  1525. case SET_KEY:
  1526. ret = ath_key_config(common, vif, sta, key);
  1527. if (ret >= 0) {
  1528. key->hw_key_idx = ret;
  1529. /* push IV and Michael MIC generation to stack */
  1530. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1531. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1532. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1533. if (sc->sc_ah->sw_mgmt_crypto &&
  1534. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1535. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1536. ret = 0;
  1537. }
  1538. break;
  1539. case DISABLE_KEY:
  1540. ath_key_delete(common, key);
  1541. break;
  1542. default:
  1543. ret = -EINVAL;
  1544. }
  1545. ath9k_ps_restore(sc);
  1546. mutex_unlock(&sc->mutex);
  1547. return ret;
  1548. }
  1549. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1550. struct ieee80211_vif *vif,
  1551. struct ieee80211_bss_conf *bss_conf,
  1552. u32 changed)
  1553. {
  1554. struct ath_wiphy *aphy = hw->priv;
  1555. struct ath_softc *sc = aphy->sc;
  1556. struct ath_hw *ah = sc->sc_ah;
  1557. struct ath_common *common = ath9k_hw_common(ah);
  1558. struct ath_vif *avp = (void *)vif->drv_priv;
  1559. int slottime;
  1560. int error;
  1561. mutex_lock(&sc->mutex);
  1562. if (changed & BSS_CHANGED_BSSID) {
  1563. /* Set BSSID */
  1564. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1565. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1566. common->curaid = 0;
  1567. ath9k_hw_write_associd(ah);
  1568. /* Set aggregation protection mode parameters */
  1569. sc->config.ath_aggr_prot = 0;
  1570. /* Only legacy IBSS for now */
  1571. if (vif->type == NL80211_IFTYPE_ADHOC)
  1572. ath_update_chainmask(sc, 0);
  1573. ath_print(common, ATH_DBG_CONFIG,
  1574. "BSSID: %pM aid: 0x%x\n",
  1575. common->curbssid, common->curaid);
  1576. /* need to reconfigure the beacon */
  1577. sc->sc_flags &= ~SC_OP_BEACONS ;
  1578. }
  1579. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1580. if ((changed & BSS_CHANGED_BEACON) ||
  1581. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1582. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1583. error = ath_beacon_alloc(aphy, vif);
  1584. if (!error)
  1585. ath_beacon_config(sc, vif);
  1586. }
  1587. if (changed & BSS_CHANGED_ERP_SLOT) {
  1588. if (bss_conf->use_short_slot)
  1589. slottime = 9;
  1590. else
  1591. slottime = 20;
  1592. if (vif->type == NL80211_IFTYPE_AP) {
  1593. /*
  1594. * Defer update, so that connected stations can adjust
  1595. * their settings at the same time.
  1596. * See beacon.c for more details
  1597. */
  1598. sc->beacon.slottime = slottime;
  1599. sc->beacon.updateslot = UPDATE;
  1600. } else {
  1601. ah->slottime = slottime;
  1602. ath9k_hw_init_global_settings(ah);
  1603. }
  1604. }
  1605. /* Disable transmission of beacons */
  1606. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1607. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1608. if (changed & BSS_CHANGED_BEACON_INT) {
  1609. sc->beacon_interval = bss_conf->beacon_int;
  1610. /*
  1611. * In case of AP mode, the HW TSF has to be reset
  1612. * when the beacon interval changes.
  1613. */
  1614. if (vif->type == NL80211_IFTYPE_AP) {
  1615. sc->sc_flags |= SC_OP_TSF_RESET;
  1616. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1617. error = ath_beacon_alloc(aphy, vif);
  1618. if (!error)
  1619. ath_beacon_config(sc, vif);
  1620. } else {
  1621. ath_beacon_config(sc, vif);
  1622. }
  1623. }
  1624. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1625. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1626. bss_conf->use_short_preamble);
  1627. if (bss_conf->use_short_preamble)
  1628. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1629. else
  1630. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1631. }
  1632. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1633. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1634. bss_conf->use_cts_prot);
  1635. if (bss_conf->use_cts_prot &&
  1636. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1637. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1638. else
  1639. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1640. }
  1641. if (changed & BSS_CHANGED_ASSOC) {
  1642. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1643. bss_conf->assoc);
  1644. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1645. }
  1646. mutex_unlock(&sc->mutex);
  1647. }
  1648. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1649. {
  1650. u64 tsf;
  1651. struct ath_wiphy *aphy = hw->priv;
  1652. struct ath_softc *sc = aphy->sc;
  1653. mutex_lock(&sc->mutex);
  1654. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1655. mutex_unlock(&sc->mutex);
  1656. return tsf;
  1657. }
  1658. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1659. {
  1660. struct ath_wiphy *aphy = hw->priv;
  1661. struct ath_softc *sc = aphy->sc;
  1662. mutex_lock(&sc->mutex);
  1663. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1664. mutex_unlock(&sc->mutex);
  1665. }
  1666. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1667. {
  1668. struct ath_wiphy *aphy = hw->priv;
  1669. struct ath_softc *sc = aphy->sc;
  1670. mutex_lock(&sc->mutex);
  1671. ath9k_ps_wakeup(sc);
  1672. ath9k_hw_reset_tsf(sc->sc_ah);
  1673. ath9k_ps_restore(sc);
  1674. mutex_unlock(&sc->mutex);
  1675. }
  1676. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1677. struct ieee80211_vif *vif,
  1678. enum ieee80211_ampdu_mlme_action action,
  1679. struct ieee80211_sta *sta,
  1680. u16 tid, u16 *ssn)
  1681. {
  1682. struct ath_wiphy *aphy = hw->priv;
  1683. struct ath_softc *sc = aphy->sc;
  1684. int ret = 0;
  1685. local_bh_disable();
  1686. switch (action) {
  1687. case IEEE80211_AMPDU_RX_START:
  1688. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1689. ret = -ENOTSUPP;
  1690. break;
  1691. case IEEE80211_AMPDU_RX_STOP:
  1692. break;
  1693. case IEEE80211_AMPDU_TX_START:
  1694. ath9k_ps_wakeup(sc);
  1695. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1696. if (!ret)
  1697. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1698. ath9k_ps_restore(sc);
  1699. break;
  1700. case IEEE80211_AMPDU_TX_STOP:
  1701. ath9k_ps_wakeup(sc);
  1702. ath_tx_aggr_stop(sc, sta, tid);
  1703. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1704. ath9k_ps_restore(sc);
  1705. break;
  1706. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1707. ath9k_ps_wakeup(sc);
  1708. ath_tx_aggr_resume(sc, sta, tid);
  1709. ath9k_ps_restore(sc);
  1710. break;
  1711. default:
  1712. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1713. "Unknown AMPDU action\n");
  1714. }
  1715. local_bh_enable();
  1716. return ret;
  1717. }
  1718. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1719. struct survey_info *survey)
  1720. {
  1721. struct ath_wiphy *aphy = hw->priv;
  1722. struct ath_softc *sc = aphy->sc;
  1723. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1724. struct ieee80211_supported_band *sband;
  1725. struct ieee80211_channel *chan;
  1726. unsigned long flags;
  1727. int pos;
  1728. spin_lock_irqsave(&common->cc_lock, flags);
  1729. if (idx == 0)
  1730. ath_update_survey_stats(sc);
  1731. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1732. if (sband && idx >= sband->n_channels) {
  1733. idx -= sband->n_channels;
  1734. sband = NULL;
  1735. }
  1736. if (!sband)
  1737. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1738. if (!sband || idx >= sband->n_channels) {
  1739. spin_unlock_irqrestore(&common->cc_lock, flags);
  1740. return -ENOENT;
  1741. }
  1742. chan = &sband->channels[idx];
  1743. pos = chan->hw_value;
  1744. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1745. survey->channel = chan;
  1746. spin_unlock_irqrestore(&common->cc_lock, flags);
  1747. return 0;
  1748. }
  1749. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1750. {
  1751. struct ath_wiphy *aphy = hw->priv;
  1752. struct ath_softc *sc = aphy->sc;
  1753. mutex_lock(&sc->mutex);
  1754. if (ath9k_wiphy_scanning(sc)) {
  1755. /*
  1756. * There is a race here in mac80211 but fixing it requires
  1757. * we revisit how we handle the scan complete callback.
  1758. * After mac80211 fixes we will not have configured hardware
  1759. * to the home channel nor would we have configured the RX
  1760. * filter yet.
  1761. */
  1762. mutex_unlock(&sc->mutex);
  1763. return;
  1764. }
  1765. aphy->state = ATH_WIPHY_SCAN;
  1766. ath9k_wiphy_pause_all_forced(sc, aphy);
  1767. mutex_unlock(&sc->mutex);
  1768. }
  1769. /*
  1770. * XXX: this requires a revisit after the driver
  1771. * scan_complete gets moved to another place/removed in mac80211.
  1772. */
  1773. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1774. {
  1775. struct ath_wiphy *aphy = hw->priv;
  1776. struct ath_softc *sc = aphy->sc;
  1777. mutex_lock(&sc->mutex);
  1778. aphy->state = ATH_WIPHY_ACTIVE;
  1779. mutex_unlock(&sc->mutex);
  1780. }
  1781. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1782. {
  1783. struct ath_wiphy *aphy = hw->priv;
  1784. struct ath_softc *sc = aphy->sc;
  1785. struct ath_hw *ah = sc->sc_ah;
  1786. mutex_lock(&sc->mutex);
  1787. ah->coverage_class = coverage_class;
  1788. ath9k_hw_init_global_settings(ah);
  1789. mutex_unlock(&sc->mutex);
  1790. }
  1791. struct ieee80211_ops ath9k_ops = {
  1792. .tx = ath9k_tx,
  1793. .start = ath9k_start,
  1794. .stop = ath9k_stop,
  1795. .add_interface = ath9k_add_interface,
  1796. .remove_interface = ath9k_remove_interface,
  1797. .config = ath9k_config,
  1798. .configure_filter = ath9k_configure_filter,
  1799. .sta_add = ath9k_sta_add,
  1800. .sta_remove = ath9k_sta_remove,
  1801. .conf_tx = ath9k_conf_tx,
  1802. .bss_info_changed = ath9k_bss_info_changed,
  1803. .set_key = ath9k_set_key,
  1804. .get_tsf = ath9k_get_tsf,
  1805. .set_tsf = ath9k_set_tsf,
  1806. .reset_tsf = ath9k_reset_tsf,
  1807. .ampdu_action = ath9k_ampdu_action,
  1808. .get_survey = ath9k_get_survey,
  1809. .sw_scan_start = ath9k_sw_scan_start,
  1810. .sw_scan_complete = ath9k_sw_scan_complete,
  1811. .rfkill_poll = ath9k_rfkill_poll_state,
  1812. .set_coverage_class = ath9k_set_coverage_class,
  1813. };