rt2x00pci.c 9.0 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/slab.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00pci.h"
  28. /*
  29. * Register access.
  30. */
  31. int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
  32. const unsigned int offset,
  33. const struct rt2x00_field32 field,
  34. u32 *reg)
  35. {
  36. unsigned int i;
  37. if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
  38. return 0;
  39. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  40. rt2x00pci_register_read(rt2x00dev, offset, reg);
  41. if (!rt2x00_get_field32(*reg, field))
  42. return 1;
  43. udelay(REGISTER_BUSY_DELAY);
  44. }
  45. ERROR(rt2x00dev, "Indirect register access failed: "
  46. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  47. *reg = ~0;
  48. return 0;
  49. }
  50. EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
  51. /*
  52. * TX/RX data handlers.
  53. */
  54. void rt2x00pci_txdone(struct queue_entry *entry,
  55. struct txdone_entry_desc *txdesc)
  56. {
  57. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  58. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  59. /*
  60. * Unmap the skb.
  61. */
  62. rt2x00queue_unmap_skb(rt2x00dev, entry->skb);
  63. /*
  64. * Remove the extra tx headroom from the skb.
  65. */
  66. skb_pull(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  67. /*
  68. * Signal that the TX descriptor is no longer in the skb.
  69. */
  70. skbdesc->flags &= ~SKBDESC_DESC_IN_SKB;
  71. /*
  72. * Pass on to rt2x00lib.
  73. */
  74. rt2x00lib_txdone(entry, txdesc);
  75. }
  76. EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
  77. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  78. {
  79. struct data_queue *queue = rt2x00dev->rx;
  80. struct queue_entry *entry;
  81. struct queue_entry_priv_pci *entry_priv;
  82. struct skb_frame_desc *skbdesc;
  83. while (1) {
  84. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  85. entry_priv = entry->priv_data;
  86. if (rt2x00dev->ops->lib->get_entry_state(entry))
  87. break;
  88. /*
  89. * Fill in desc fields of the skb descriptor
  90. */
  91. skbdesc = get_skb_frame_desc(entry->skb);
  92. skbdesc->desc = entry_priv->desc;
  93. skbdesc->desc_len = entry->queue->desc_size;
  94. /*
  95. * Send the frame to rt2x00lib for further processing.
  96. */
  97. rt2x00lib_rxdone(rt2x00dev, entry);
  98. }
  99. }
  100. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  101. /*
  102. * Device initialization handlers.
  103. */
  104. static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
  105. struct data_queue *queue)
  106. {
  107. struct queue_entry_priv_pci *entry_priv;
  108. void *addr;
  109. dma_addr_t dma;
  110. unsigned int i;
  111. /*
  112. * Allocate DMA memory for descriptor and buffer.
  113. */
  114. addr = dma_alloc_coherent(rt2x00dev->dev,
  115. queue->limit * queue->desc_size,
  116. &dma, GFP_KERNEL | GFP_DMA);
  117. if (!addr)
  118. return -ENOMEM;
  119. memset(addr, 0, queue->limit * queue->desc_size);
  120. /*
  121. * Initialize all queue entries to contain valid addresses.
  122. */
  123. for (i = 0; i < queue->limit; i++) {
  124. entry_priv = queue->entries[i].priv_data;
  125. entry_priv->desc = addr + i * queue->desc_size;
  126. entry_priv->desc_dma = dma + i * queue->desc_size;
  127. }
  128. return 0;
  129. }
  130. static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
  131. struct data_queue *queue)
  132. {
  133. struct queue_entry_priv_pci *entry_priv =
  134. queue->entries[0].priv_data;
  135. if (entry_priv->desc)
  136. dma_free_coherent(rt2x00dev->dev,
  137. queue->limit * queue->desc_size,
  138. entry_priv->desc, entry_priv->desc_dma);
  139. entry_priv->desc = NULL;
  140. }
  141. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  142. {
  143. struct data_queue *queue;
  144. int status;
  145. /*
  146. * Allocate DMA
  147. */
  148. queue_for_each(rt2x00dev, queue) {
  149. status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
  150. if (status)
  151. goto exit;
  152. }
  153. /*
  154. * Register interrupt handler.
  155. */
  156. status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
  157. IRQF_SHARED, rt2x00dev->name, rt2x00dev);
  158. if (status) {
  159. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  160. rt2x00dev->irq, status);
  161. goto exit;
  162. }
  163. return 0;
  164. exit:
  165. queue_for_each(rt2x00dev, queue)
  166. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  167. return status;
  168. }
  169. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  170. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  171. {
  172. struct data_queue *queue;
  173. /*
  174. * Free irq line.
  175. */
  176. free_irq(rt2x00dev->irq, rt2x00dev);
  177. /*
  178. * Free DMA
  179. */
  180. queue_for_each(rt2x00dev, queue)
  181. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  182. }
  183. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  184. /*
  185. * PCI driver handlers.
  186. */
  187. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  188. {
  189. kfree(rt2x00dev->rf);
  190. rt2x00dev->rf = NULL;
  191. kfree(rt2x00dev->eeprom);
  192. rt2x00dev->eeprom = NULL;
  193. if (rt2x00dev->csr.base) {
  194. iounmap(rt2x00dev->csr.base);
  195. rt2x00dev->csr.base = NULL;
  196. }
  197. }
  198. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  199. {
  200. struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
  201. rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
  202. if (!rt2x00dev->csr.base)
  203. goto exit;
  204. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  205. if (!rt2x00dev->eeprom)
  206. goto exit;
  207. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  208. if (!rt2x00dev->rf)
  209. goto exit;
  210. return 0;
  211. exit:
  212. ERROR_PROBE("Failed to allocate registers.\n");
  213. rt2x00pci_free_reg(rt2x00dev);
  214. return -ENOMEM;
  215. }
  216. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  217. {
  218. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  219. struct ieee80211_hw *hw;
  220. struct rt2x00_dev *rt2x00dev;
  221. int retval;
  222. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  223. if (retval) {
  224. ERROR_PROBE("PCI request regions failed.\n");
  225. return retval;
  226. }
  227. retval = pci_enable_device(pci_dev);
  228. if (retval) {
  229. ERROR_PROBE("Enable device failed.\n");
  230. goto exit_release_regions;
  231. }
  232. pci_set_master(pci_dev);
  233. if (pci_set_mwi(pci_dev))
  234. ERROR_PROBE("MWI not available.\n");
  235. if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
  236. ERROR_PROBE("PCI DMA not supported.\n");
  237. retval = -EIO;
  238. goto exit_disable_device;
  239. }
  240. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  241. if (!hw) {
  242. ERROR_PROBE("Failed to allocate hardware.\n");
  243. retval = -ENOMEM;
  244. goto exit_disable_device;
  245. }
  246. pci_set_drvdata(pci_dev, hw);
  247. rt2x00dev = hw->priv;
  248. rt2x00dev->dev = &pci_dev->dev;
  249. rt2x00dev->ops = ops;
  250. rt2x00dev->hw = hw;
  251. rt2x00dev->irq = pci_dev->irq;
  252. rt2x00dev->name = pci_name(pci_dev);
  253. if (pci_dev->is_pcie)
  254. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
  255. else
  256. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
  257. retval = rt2x00pci_alloc_reg(rt2x00dev);
  258. if (retval)
  259. goto exit_free_device;
  260. retval = rt2x00lib_probe_dev(rt2x00dev);
  261. if (retval)
  262. goto exit_free_reg;
  263. return 0;
  264. exit_free_reg:
  265. rt2x00pci_free_reg(rt2x00dev);
  266. exit_free_device:
  267. ieee80211_free_hw(hw);
  268. exit_disable_device:
  269. if (retval != -EBUSY)
  270. pci_disable_device(pci_dev);
  271. exit_release_regions:
  272. pci_release_regions(pci_dev);
  273. pci_set_drvdata(pci_dev, NULL);
  274. return retval;
  275. }
  276. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  277. void rt2x00pci_remove(struct pci_dev *pci_dev)
  278. {
  279. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  280. struct rt2x00_dev *rt2x00dev = hw->priv;
  281. /*
  282. * Free all allocated data.
  283. */
  284. rt2x00lib_remove_dev(rt2x00dev);
  285. rt2x00pci_free_reg(rt2x00dev);
  286. ieee80211_free_hw(hw);
  287. /*
  288. * Free the PCI device data.
  289. */
  290. pci_set_drvdata(pci_dev, NULL);
  291. pci_disable_device(pci_dev);
  292. pci_release_regions(pci_dev);
  293. }
  294. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  295. #ifdef CONFIG_PM
  296. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  297. {
  298. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  299. struct rt2x00_dev *rt2x00dev = hw->priv;
  300. int retval;
  301. retval = rt2x00lib_suspend(rt2x00dev, state);
  302. if (retval)
  303. return retval;
  304. pci_save_state(pci_dev);
  305. pci_disable_device(pci_dev);
  306. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  307. }
  308. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  309. int rt2x00pci_resume(struct pci_dev *pci_dev)
  310. {
  311. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  312. struct rt2x00_dev *rt2x00dev = hw->priv;
  313. if (pci_set_power_state(pci_dev, PCI_D0) ||
  314. pci_enable_device(pci_dev) ||
  315. pci_restore_state(pci_dev)) {
  316. ERROR(rt2x00dev, "Failed to resume device.\n");
  317. return -EIO;
  318. }
  319. return rt2x00lib_resume(rt2x00dev);
  320. }
  321. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  322. #endif /* CONFIG_PM */
  323. /*
  324. * rt2x00pci module information.
  325. */
  326. MODULE_AUTHOR(DRV_PROJECT);
  327. MODULE_VERSION(DRV_VERSION);
  328. MODULE_DESCRIPTION("rt2x00 pci library");
  329. MODULE_LICENSE("GPL");