cx88-dvb.c 28 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-xc2028-types.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  49. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  50. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  51. MODULE_LICENSE("GPL");
  52. static unsigned int debug;
  53. module_param(debug, int, 0644);
  54. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  55. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  56. #define dprintk(level,fmt, arg...) if (debug >= level) \
  57. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  58. /* ------------------------------------------------------------------ */
  59. static int dvb_buf_setup(struct videobuf_queue *q,
  60. unsigned int *count, unsigned int *size)
  61. {
  62. struct cx8802_dev *dev = q->priv_data;
  63. dev->ts_packet_size = 188 * 4;
  64. dev->ts_packet_count = 32;
  65. *size = dev->ts_packet_size * dev->ts_packet_count;
  66. *count = 32;
  67. return 0;
  68. }
  69. static int dvb_buf_prepare(struct videobuf_queue *q,
  70. struct videobuf_buffer *vb, enum v4l2_field field)
  71. {
  72. struct cx8802_dev *dev = q->priv_data;
  73. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  74. }
  75. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  79. }
  80. static void dvb_buf_release(struct videobuf_queue *q,
  81. struct videobuf_buffer *vb)
  82. {
  83. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  84. }
  85. static struct videobuf_queue_ops dvb_qops = {
  86. .buf_setup = dvb_buf_setup,
  87. .buf_prepare = dvb_buf_prepare,
  88. .buf_queue = dvb_buf_queue,
  89. .buf_release = dvb_buf_release,
  90. };
  91. /* ------------------------------------------------------------------ */
  92. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  93. {
  94. struct cx8802_dev *dev= fe->dvb->priv;
  95. struct cx8802_driver *drv = NULL;
  96. int ret = 0;
  97. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  98. if (drv) {
  99. if (acquire)
  100. ret = drv->request_acquire(drv);
  101. else
  102. ret = drv->request_release(drv);
  103. }
  104. return ret;
  105. }
  106. /* ------------------------------------------------------------------ */
  107. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  108. {
  109. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  110. static u8 reset [] = { RESET, 0x80 };
  111. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  112. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  113. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  114. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  115. mt352_write(fe, clock_config, sizeof(clock_config));
  116. udelay(200);
  117. mt352_write(fe, reset, sizeof(reset));
  118. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  119. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  120. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  121. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  122. return 0;
  123. }
  124. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  125. {
  126. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  127. static u8 reset [] = { RESET, 0x80 };
  128. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  129. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  130. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  131. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  132. mt352_write(fe, clock_config, sizeof(clock_config));
  133. udelay(200);
  134. mt352_write(fe, reset, sizeof(reset));
  135. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  136. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  137. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  142. {
  143. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  144. static u8 reset [] = { 0x50, 0x80 };
  145. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  146. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  147. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  148. static u8 dntv_extra[] = { 0xB5, 0x7A };
  149. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  150. mt352_write(fe, clock_config, sizeof(clock_config));
  151. udelay(2000);
  152. mt352_write(fe, reset, sizeof(reset));
  153. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  154. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  155. udelay(2000);
  156. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  157. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  158. return 0;
  159. }
  160. static struct mt352_config dvico_fusionhdtv = {
  161. .demod_address = 0x0f,
  162. .demod_init = dvico_fusionhdtv_demod_init,
  163. };
  164. static struct mt352_config dntv_live_dvbt_config = {
  165. .demod_address = 0x0f,
  166. .demod_init = dntv_live_dvbt_demod_init,
  167. };
  168. static struct mt352_config dvico_fusionhdtv_dual = {
  169. .demod_address = 0x0f,
  170. .demod_init = dvico_dual_demod_init,
  171. };
  172. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  173. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  174. {
  175. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  176. static u8 reset [] = { 0x50, 0x80 };
  177. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  178. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  179. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  180. static u8 dntv_extra[] = { 0xB5, 0x7A };
  181. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  182. mt352_write(fe, clock_config, sizeof(clock_config));
  183. udelay(2000);
  184. mt352_write(fe, reset, sizeof(reset));
  185. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  186. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  187. udelay(2000);
  188. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  189. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  190. return 0;
  191. }
  192. static struct mt352_config dntv_live_dvbt_pro_config = {
  193. .demod_address = 0x0f,
  194. .no_tuner = 1,
  195. .demod_init = dntv_live_dvbt_pro_demod_init,
  196. };
  197. #endif
  198. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  199. .demod_address = 0x0f,
  200. .no_tuner = 1,
  201. };
  202. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  203. .demod_address = 0x0f,
  204. .if2 = 45600,
  205. .no_tuner = 1,
  206. };
  207. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  208. .demod_address = 0x0f,
  209. .if2 = 4560,
  210. .no_tuner = 1,
  211. .demod_init = dvico_fusionhdtv_demod_init,
  212. };
  213. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  214. .demod_address = 0x0f,
  215. };
  216. static struct cx22702_config connexant_refboard_config = {
  217. .demod_address = 0x43,
  218. .output_mode = CX22702_SERIAL_OUTPUT,
  219. };
  220. static struct cx22702_config hauppauge_hvr_config = {
  221. .demod_address = 0x63,
  222. .output_mode = CX22702_SERIAL_OUTPUT,
  223. };
  224. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  225. {
  226. struct cx8802_dev *dev= fe->dvb->priv;
  227. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  228. return 0;
  229. }
  230. static struct or51132_config pchdtv_hd3000 = {
  231. .demod_address = 0x15,
  232. .set_ts_params = or51132_set_ts_param,
  233. };
  234. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  235. {
  236. struct cx8802_dev *dev= fe->dvb->priv;
  237. struct cx88_core *core = dev->core;
  238. dprintk(1, "%s: index = %d\n", __func__, index);
  239. if (index == 0)
  240. cx_clear(MO_GP0_IO, 8);
  241. else
  242. cx_set(MO_GP0_IO, 8);
  243. return 0;
  244. }
  245. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  246. {
  247. struct cx8802_dev *dev= fe->dvb->priv;
  248. if (is_punctured)
  249. dev->ts_gen_cntrl |= 0x04;
  250. else
  251. dev->ts_gen_cntrl &= ~0x04;
  252. return 0;
  253. }
  254. static struct lgdt330x_config fusionhdtv_3_gold = {
  255. .demod_address = 0x0e,
  256. .demod_chip = LGDT3302,
  257. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  258. .set_ts_params = lgdt330x_set_ts_param,
  259. };
  260. static struct lgdt330x_config fusionhdtv_5_gold = {
  261. .demod_address = 0x0e,
  262. .demod_chip = LGDT3303,
  263. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  264. .set_ts_params = lgdt330x_set_ts_param,
  265. };
  266. static struct lgdt330x_config pchdtv_hd5500 = {
  267. .demod_address = 0x59,
  268. .demod_chip = LGDT3303,
  269. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  270. .set_ts_params = lgdt330x_set_ts_param,
  271. };
  272. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  273. {
  274. struct cx8802_dev *dev= fe->dvb->priv;
  275. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  276. return 0;
  277. }
  278. static struct nxt200x_config ati_hdtvwonder = {
  279. .demod_address = 0x0a,
  280. .set_ts_params = nxt200x_set_ts_param,
  281. };
  282. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  283. int is_punctured)
  284. {
  285. struct cx8802_dev *dev= fe->dvb->priv;
  286. dev->ts_gen_cntrl = 0x02;
  287. return 0;
  288. }
  289. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  290. fe_sec_voltage_t voltage)
  291. {
  292. struct cx8802_dev *dev= fe->dvb->priv;
  293. struct cx88_core *core = dev->core;
  294. if (voltage == SEC_VOLTAGE_OFF)
  295. cx_write(MO_GP0_IO, 0x000006fb);
  296. else
  297. cx_write(MO_GP0_IO, 0x000006f9);
  298. if (core->prev_set_voltage)
  299. return core->prev_set_voltage(fe, voltage);
  300. return 0;
  301. }
  302. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  303. fe_sec_voltage_t voltage)
  304. {
  305. struct cx8802_dev *dev= fe->dvb->priv;
  306. struct cx88_core *core = dev->core;
  307. if (voltage == SEC_VOLTAGE_OFF) {
  308. dprintk(1,"LNB Voltage OFF\n");
  309. cx_write(MO_GP0_IO, 0x0000efff);
  310. }
  311. if (core->prev_set_voltage)
  312. return core->prev_set_voltage(fe, voltage);
  313. return 0;
  314. }
  315. static int cx88_pci_nano_callback(void *ptr, int command, int arg)
  316. {
  317. struct cx88_core *core = ptr;
  318. switch (command) {
  319. case XC2028_TUNER_RESET:
  320. /* Send the tuner in then out of reset */
  321. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg);
  322. switch (core->boardnr) {
  323. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  324. /* GPIO-4 xc3028 tuner */
  325. cx_set(MO_GP0_IO, 0x00001000);
  326. cx_clear(MO_GP0_IO, 0x00000010);
  327. msleep(100);
  328. cx_set(MO_GP0_IO, 0x00000010);
  329. msleep(100);
  330. break;
  331. }
  332. break;
  333. case XC2028_RESET_CLK:
  334. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg);
  335. break;
  336. default:
  337. dprintk(1, "%s: unknown command %d, arg %d\n", __func__,
  338. command, arg);
  339. return -EINVAL;
  340. }
  341. return 0;
  342. }
  343. static struct cx24123_config geniatech_dvbs_config = {
  344. .demod_address = 0x55,
  345. .set_ts_params = cx24123_set_ts_param,
  346. };
  347. static struct cx24123_config hauppauge_novas_config = {
  348. .demod_address = 0x55,
  349. .set_ts_params = cx24123_set_ts_param,
  350. };
  351. static struct cx24123_config kworld_dvbs_100_config = {
  352. .demod_address = 0x15,
  353. .set_ts_params = cx24123_set_ts_param,
  354. .lnb_polarity = 1,
  355. };
  356. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  357. .demod_address = 0x32 >> 1,
  358. .output_mode = S5H1409_PARALLEL_OUTPUT,
  359. .gpio = S5H1409_GPIO_ON,
  360. .qam_if = 44000,
  361. .inversion = S5H1409_INVERSION_OFF,
  362. .status_mode = S5H1409_DEMODLOCKING,
  363. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  364. };
  365. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  366. .demod_address = 0x32 >> 1,
  367. .output_mode = S5H1409_SERIAL_OUTPUT,
  368. .gpio = S5H1409_GPIO_OFF,
  369. .inversion = S5H1409_INVERSION_OFF,
  370. .status_mode = S5H1409_DEMODLOCKING,
  371. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  372. };
  373. static struct s5h1409_config kworld_atsc_120_config = {
  374. .demod_address = 0x32 >> 1,
  375. .output_mode = S5H1409_SERIAL_OUTPUT,
  376. .gpio = S5H1409_GPIO_OFF,
  377. .inversion = S5H1409_INVERSION_OFF,
  378. .status_mode = S5H1409_DEMODLOCKING,
  379. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  380. };
  381. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  382. .i2c_address = 0x64,
  383. .if_khz = 5380,
  384. .tuner_callback = cx88_tuner_callback,
  385. };
  386. static struct zl10353_config cx88_geniatech_x8000_mt = {
  387. .demod_address = (0x1e >> 1),
  388. .no_tuner = 1,
  389. };
  390. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  391. {
  392. struct dvb_frontend *fe;
  393. struct xc2028_ctrl ctl;
  394. struct xc2028_config cfg = {
  395. .i2c_adap = &dev->core->i2c_adap,
  396. .i2c_addr = addr,
  397. .ctrl = &ctl,
  398. .callback = cx88_tuner_callback,
  399. };
  400. if (!dev->dvb.frontend) {
  401. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  402. "Can't attach xc3028\n",
  403. dev->core->name);
  404. return -EINVAL;
  405. }
  406. /*
  407. * Some xc3028 devices may be hidden by an I2C gate. This is known
  408. * to happen with some s5h1409-based devices.
  409. * Now that I2C gate is open, sets up xc3028 configuration
  410. */
  411. cx88_setup_xc3028(dev->core, &ctl);
  412. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  413. if (!fe) {
  414. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  415. dev->core->name);
  416. dvb_frontend_detach(dev->dvb.frontend);
  417. dvb_unregister_frontend(dev->dvb.frontend);
  418. dev->dvb.frontend = NULL;
  419. return -EINVAL;
  420. }
  421. printk(KERN_INFO "%s/2: xc3028 attached\n",
  422. dev->core->name);
  423. return 0;
  424. }
  425. static int dvb_register(struct cx8802_dev *dev)
  426. {
  427. /* init struct videobuf_dvb */
  428. dev->dvb.name = dev->core->name;
  429. dev->ts_gen_cntrl = 0x0c;
  430. /* init frontend */
  431. switch (dev->core->boardnr) {
  432. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  433. dev->dvb.frontend = dvb_attach(cx22702_attach,
  434. &connexant_refboard_config,
  435. &dev->core->i2c_adap);
  436. if (dev->dvb.frontend != NULL) {
  437. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  438. &dev->core->i2c_adap,
  439. DVB_PLL_THOMSON_DTT759X);
  440. }
  441. break;
  442. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  443. case CX88_BOARD_CONEXANT_DVB_T1:
  444. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  445. case CX88_BOARD_WINFAST_DTV1000:
  446. dev->dvb.frontend = dvb_attach(cx22702_attach,
  447. &connexant_refboard_config,
  448. &dev->core->i2c_adap);
  449. if (dev->dvb.frontend != NULL) {
  450. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  451. &dev->core->i2c_adap,
  452. DVB_PLL_THOMSON_DTT7579);
  453. }
  454. break;
  455. case CX88_BOARD_WINFAST_DTV2000H:
  456. case CX88_BOARD_HAUPPAUGE_HVR1100:
  457. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  458. case CX88_BOARD_HAUPPAUGE_HVR1300:
  459. case CX88_BOARD_HAUPPAUGE_HVR3000:
  460. dev->dvb.frontend = dvb_attach(cx22702_attach,
  461. &hauppauge_hvr_config,
  462. &dev->core->i2c_adap);
  463. if (dev->dvb.frontend != NULL) {
  464. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  465. &dev->core->i2c_adap, 0x61,
  466. TUNER_PHILIPS_FMD1216ME_MK3);
  467. }
  468. break;
  469. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  470. dev->dvb.frontend = dvb_attach(mt352_attach,
  471. &dvico_fusionhdtv,
  472. &dev->core->i2c_adap);
  473. if (dev->dvb.frontend != NULL) {
  474. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  475. NULL, DVB_PLL_THOMSON_DTT7579);
  476. break;
  477. }
  478. /* ZL10353 replaces MT352 on later cards */
  479. dev->dvb.frontend = dvb_attach(zl10353_attach,
  480. &dvico_fusionhdtv_plus_v1_1,
  481. &dev->core->i2c_adap);
  482. if (dev->dvb.frontend != NULL) {
  483. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  484. NULL, DVB_PLL_THOMSON_DTT7579);
  485. }
  486. break;
  487. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  488. /* The tin box says DEE1601, but it seems to be DTT7579
  489. * compatible, with a slightly different MT352 AGC gain. */
  490. dev->dvb.frontend = dvb_attach(mt352_attach,
  491. &dvico_fusionhdtv_dual,
  492. &dev->core->i2c_adap);
  493. if (dev->dvb.frontend != NULL) {
  494. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  495. NULL, DVB_PLL_THOMSON_DTT7579);
  496. break;
  497. }
  498. /* ZL10353 replaces MT352 on later cards */
  499. dev->dvb.frontend = dvb_attach(zl10353_attach,
  500. &dvico_fusionhdtv_plus_v1_1,
  501. &dev->core->i2c_adap);
  502. if (dev->dvb.frontend != NULL) {
  503. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  504. NULL, DVB_PLL_THOMSON_DTT7579);
  505. }
  506. break;
  507. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  508. dev->dvb.frontend = dvb_attach(mt352_attach,
  509. &dvico_fusionhdtv,
  510. &dev->core->i2c_adap);
  511. if (dev->dvb.frontend != NULL) {
  512. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  513. NULL, DVB_PLL_LG_Z201);
  514. }
  515. break;
  516. case CX88_BOARD_KWORLD_DVB_T:
  517. case CX88_BOARD_DNTV_LIVE_DVB_T:
  518. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  519. dev->dvb.frontend = dvb_attach(mt352_attach,
  520. &dntv_live_dvbt_config,
  521. &dev->core->i2c_adap);
  522. if (dev->dvb.frontend != NULL) {
  523. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  524. NULL, DVB_PLL_UNKNOWN_1);
  525. }
  526. break;
  527. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  528. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  529. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  530. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  531. &dev->vp3054->adap);
  532. if (dev->dvb.frontend != NULL) {
  533. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  534. &dev->core->i2c_adap, 0x61,
  535. TUNER_PHILIPS_FMD1216ME_MK3);
  536. }
  537. #else
  538. printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
  539. #endif
  540. break;
  541. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  542. dev->dvb.frontend = dvb_attach(zl10353_attach,
  543. &dvico_fusionhdtv_hybrid,
  544. &dev->core->i2c_adap);
  545. if (dev->dvb.frontend != NULL) {
  546. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  547. &dev->core->i2c_adap, 0x61,
  548. TUNER_THOMSON_FE6600);
  549. }
  550. break;
  551. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  552. dev->dvb.frontend = dvb_attach(zl10353_attach,
  553. &dvico_fusionhdtv_xc3028,
  554. &dev->core->i2c_adap);
  555. if (dev->dvb.frontend == NULL)
  556. dev->dvb.frontend = dvb_attach(mt352_attach,
  557. &dvico_fusionhdtv_mt352_xc3028,
  558. &dev->core->i2c_adap);
  559. /*
  560. * On this board, the demod provides the I2C bus pullup.
  561. * We must not permit gate_ctrl to be performed, or
  562. * the xc3028 cannot communicate on the bus.
  563. */
  564. if (dev->dvb.frontend)
  565. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  566. if (attach_xc3028(0x61, dev) < 0)
  567. return -EINVAL;
  568. break;
  569. case CX88_BOARD_PCHDTV_HD3000:
  570. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  571. &dev->core->i2c_adap);
  572. if (dev->dvb.frontend != NULL) {
  573. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  574. &dev->core->i2c_adap, 0x61,
  575. TUNER_THOMSON_DTT761X);
  576. }
  577. break;
  578. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  579. dev->ts_gen_cntrl = 0x08;
  580. {
  581. /* Do a hardware reset of chip before using it. */
  582. struct cx88_core *core = dev->core;
  583. cx_clear(MO_GP0_IO, 1);
  584. mdelay(100);
  585. cx_set(MO_GP0_IO, 1);
  586. mdelay(200);
  587. /* Select RF connector callback */
  588. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  589. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  590. &fusionhdtv_3_gold,
  591. &dev->core->i2c_adap);
  592. if (dev->dvb.frontend != NULL) {
  593. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  594. &dev->core->i2c_adap, 0x61,
  595. TUNER_MICROTUNE_4042FI5);
  596. }
  597. }
  598. break;
  599. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  600. dev->ts_gen_cntrl = 0x08;
  601. {
  602. /* Do a hardware reset of chip before using it. */
  603. struct cx88_core *core = dev->core;
  604. cx_clear(MO_GP0_IO, 1);
  605. mdelay(100);
  606. cx_set(MO_GP0_IO, 9);
  607. mdelay(200);
  608. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  609. &fusionhdtv_3_gold,
  610. &dev->core->i2c_adap);
  611. if (dev->dvb.frontend != NULL) {
  612. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  613. &dev->core->i2c_adap, 0x61,
  614. TUNER_THOMSON_DTT761X);
  615. }
  616. }
  617. break;
  618. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  619. dev->ts_gen_cntrl = 0x08;
  620. {
  621. /* Do a hardware reset of chip before using it. */
  622. struct cx88_core *core = dev->core;
  623. cx_clear(MO_GP0_IO, 1);
  624. mdelay(100);
  625. cx_set(MO_GP0_IO, 1);
  626. mdelay(200);
  627. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  628. &fusionhdtv_5_gold,
  629. &dev->core->i2c_adap);
  630. if (dev->dvb.frontend != NULL) {
  631. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  632. &dev->core->i2c_adap, 0x61,
  633. TUNER_LG_TDVS_H06XF);
  634. dvb_attach(tda9887_attach, dev->dvb.frontend,
  635. &dev->core->i2c_adap, 0x43);
  636. }
  637. }
  638. break;
  639. case CX88_BOARD_PCHDTV_HD5500:
  640. dev->ts_gen_cntrl = 0x08;
  641. {
  642. /* Do a hardware reset of chip before using it. */
  643. struct cx88_core *core = dev->core;
  644. cx_clear(MO_GP0_IO, 1);
  645. mdelay(100);
  646. cx_set(MO_GP0_IO, 1);
  647. mdelay(200);
  648. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  649. &pchdtv_hd5500,
  650. &dev->core->i2c_adap);
  651. if (dev->dvb.frontend != NULL) {
  652. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  653. &dev->core->i2c_adap, 0x61,
  654. TUNER_LG_TDVS_H06XF);
  655. dvb_attach(tda9887_attach, dev->dvb.frontend,
  656. &dev->core->i2c_adap, 0x43);
  657. }
  658. }
  659. break;
  660. case CX88_BOARD_ATI_HDTVWONDER:
  661. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  662. &ati_hdtvwonder,
  663. &dev->core->i2c_adap);
  664. if (dev->dvb.frontend != NULL) {
  665. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  666. &dev->core->i2c_adap, 0x61,
  667. TUNER_PHILIPS_TUV1236D);
  668. }
  669. break;
  670. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  671. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  672. dev->dvb.frontend = dvb_attach(cx24123_attach,
  673. &hauppauge_novas_config,
  674. &dev->core->i2c_adap);
  675. if (dev->dvb.frontend) {
  676. dvb_attach(isl6421_attach, dev->dvb.frontend,
  677. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  678. }
  679. break;
  680. case CX88_BOARD_KWORLD_DVBS_100:
  681. dev->dvb.frontend = dvb_attach(cx24123_attach,
  682. &kworld_dvbs_100_config,
  683. &dev->core->i2c_adap);
  684. if (dev->dvb.frontend) {
  685. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  686. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  687. }
  688. break;
  689. case CX88_BOARD_GENIATECH_DVBS:
  690. dev->dvb.frontend = dvb_attach(cx24123_attach,
  691. &geniatech_dvbs_config,
  692. &dev->core->i2c_adap);
  693. if (dev->dvb.frontend) {
  694. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  695. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  696. }
  697. break;
  698. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  699. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  700. &pinnacle_pctv_hd_800i_config,
  701. &dev->core->i2c_adap);
  702. if (dev->dvb.frontend != NULL) {
  703. /* tuner_config.video_dev must point to
  704. * i2c_adap.algo_data
  705. */
  706. pinnacle_pctv_hd_800i_tuner_config.priv =
  707. dev->core->i2c_adap.algo_data;
  708. dvb_attach(xc5000_attach, dev->dvb.frontend,
  709. &dev->core->i2c_adap,
  710. &pinnacle_pctv_hd_800i_tuner_config);
  711. }
  712. break;
  713. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  714. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  715. &dvico_hdtv5_pci_nano_config,
  716. &dev->core->i2c_adap);
  717. if (dev->dvb.frontend != NULL) {
  718. struct dvb_frontend *fe;
  719. struct xc2028_config cfg = {
  720. .i2c_adap = &dev->core->i2c_adap,
  721. .i2c_addr = 0x61,
  722. .callback = cx88_pci_nano_callback,
  723. };
  724. static struct xc2028_ctrl ctl = {
  725. .fname = "xc3028-v27.fw",
  726. .max_len = 64,
  727. .scode_table = OREN538,
  728. };
  729. fe = dvb_attach(xc2028_attach,
  730. dev->dvb.frontend, &cfg);
  731. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  732. fe->ops.tuner_ops.set_config(fe, &ctl);
  733. }
  734. break;
  735. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  736. dev->dvb.frontend = dvb_attach(zl10353_attach,
  737. &cx88_geniatech_x8000_mt,
  738. &dev->core->i2c_adap);
  739. if (attach_xc3028(0x61, dev) < 0)
  740. return -EINVAL;
  741. break;
  742. case CX88_BOARD_GENIATECH_X8000_MT:
  743. dev->ts_gen_cntrl = 0x00;
  744. dev->dvb.frontend = dvb_attach(zl10353_attach,
  745. &cx88_geniatech_x8000_mt,
  746. &dev->core->i2c_adap);
  747. if (attach_xc3028(0x61, dev) < 0)
  748. return -EINVAL;
  749. break;
  750. case CX88_BOARD_KWORLD_ATSC_120:
  751. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  752. &kworld_atsc_120_config,
  753. &dev->core->i2c_adap);
  754. if (attach_xc3028(0x61, dev) < 0)
  755. return -EINVAL;
  756. break;
  757. default:
  758. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  759. dev->core->name);
  760. break;
  761. }
  762. if (NULL == dev->dvb.frontend) {
  763. printk(KERN_ERR
  764. "%s/2: frontend initialization failed\n",
  765. dev->core->name);
  766. return -EINVAL;
  767. }
  768. /* Ensure all frontends negotiate bus access */
  769. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  770. /* Put the analog decoder in standby to keep it quiet */
  771. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  772. /* register everything */
  773. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
  774. &dev->pci->dev, adapter_nr);
  775. }
  776. /* ----------------------------------------------------------- */
  777. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  778. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  779. {
  780. struct cx88_core *core = drv->core;
  781. int err = 0;
  782. dprintk( 1, "%s\n", __func__);
  783. switch (core->boardnr) {
  784. case CX88_BOARD_HAUPPAUGE_HVR1300:
  785. /* We arrive here with either the cx23416 or the cx22702
  786. * on the bus. Take the bus from the cx23416 and enable the
  787. * cx22702 demod
  788. */
  789. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  790. cx_clear(MO_GP0_IO, 0x00000004);
  791. udelay(1000);
  792. break;
  793. default:
  794. err = -ENODEV;
  795. }
  796. return err;
  797. }
  798. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  799. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  800. {
  801. struct cx88_core *core = drv->core;
  802. int err = 0;
  803. dprintk( 1, "%s\n", __func__);
  804. switch (core->boardnr) {
  805. case CX88_BOARD_HAUPPAUGE_HVR1300:
  806. /* Do Nothing, leave the cx22702 on the bus. */
  807. break;
  808. default:
  809. err = -ENODEV;
  810. }
  811. return err;
  812. }
  813. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  814. {
  815. struct cx88_core *core = drv->core;
  816. struct cx8802_dev *dev = drv->core->dvbdev;
  817. int err;
  818. dprintk( 1, "%s\n", __func__);
  819. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  820. core->boardnr,
  821. core->name,
  822. core->pci_bus,
  823. core->pci_slot);
  824. err = -ENODEV;
  825. if (!(core->board.mpeg & CX88_MPEG_DVB))
  826. goto fail_core;
  827. /* If vp3054 isn't enabled, a stub will just return 0 */
  828. err = vp3054_i2c_probe(dev);
  829. if (0 != err)
  830. goto fail_core;
  831. /* dvb stuff */
  832. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  833. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  834. &dev->pci->dev, &dev->slock,
  835. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  836. V4L2_FIELD_TOP,
  837. sizeof(struct cx88_buffer),
  838. dev);
  839. err = dvb_register(dev);
  840. if (err != 0)
  841. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  842. core->name, err);
  843. fail_core:
  844. return err;
  845. }
  846. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  847. {
  848. struct cx8802_dev *dev = drv->core->dvbdev;
  849. /* dvb */
  850. if (dev->dvb.frontend)
  851. videobuf_dvb_unregister(&dev->dvb);
  852. vp3054_i2c_remove(dev);
  853. return 0;
  854. }
  855. static struct cx8802_driver cx8802_dvb_driver = {
  856. .type_id = CX88_MPEG_DVB,
  857. .hw_access = CX8802_DRVCTL_SHARED,
  858. .probe = cx8802_dvb_probe,
  859. .remove = cx8802_dvb_remove,
  860. .advise_acquire = cx8802_dvb_advise_acquire,
  861. .advise_release = cx8802_dvb_advise_release,
  862. };
  863. static int dvb_init(void)
  864. {
  865. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  866. (CX88_VERSION_CODE >> 16) & 0xff,
  867. (CX88_VERSION_CODE >> 8) & 0xff,
  868. CX88_VERSION_CODE & 0xff);
  869. #ifdef SNAPSHOT
  870. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  871. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  872. #endif
  873. return cx8802_register_driver(&cx8802_dvb_driver);
  874. }
  875. static void dvb_fini(void)
  876. {
  877. cx8802_unregister_driver(&cx8802_dvb_driver);
  878. }
  879. module_init(dvb_init);
  880. module_exit(dvb_fini);
  881. /*
  882. * Local variables:
  883. * c-basic-offset: 8
  884. * compile-command: "make DVB=1"
  885. * End:
  886. */