cx23885-cards.c 39 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400
  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include <linux/firmware.h>
  27. #include <staging/altera.h>
  28. #include "cx23885.h"
  29. #include "tuner-xc2028.h"
  30. #include "netup-init.h"
  31. #include "altera-ci.h"
  32. #include "xc5000.h"
  33. #include "cx23888-ir.h"
  34. static unsigned int enable_885_ir;
  35. module_param(enable_885_ir, int, 0644);
  36. MODULE_PARM_DESC(enable_885_ir,
  37. "Enable integrated IR controller for supported\n"
  38. "\t\t CX2388[57] boards that are wired for it:\n"
  39. "\t\t\tHVR-1250 (reported safe)\n"
  40. "\t\t\tTeVii S470 (reported unsafe)\n"
  41. "\t\t This can cause an interrupt storm with some cards.\n"
  42. "\t\t Default: 0 [Disabled]");
  43. /* ------------------------------------------------------------------ */
  44. /* board config info */
  45. struct cx23885_board cx23885_boards[] = {
  46. [CX23885_BOARD_UNKNOWN] = {
  47. .name = "UNKNOWN/GENERIC",
  48. /* Ensure safe default for unknown boards */
  49. .clk_freq = 0,
  50. .input = {{
  51. .type = CX23885_VMUX_COMPOSITE1,
  52. .vmux = 0,
  53. }, {
  54. .type = CX23885_VMUX_COMPOSITE2,
  55. .vmux = 1,
  56. }, {
  57. .type = CX23885_VMUX_COMPOSITE3,
  58. .vmux = 2,
  59. }, {
  60. .type = CX23885_VMUX_COMPOSITE4,
  61. .vmux = 3,
  62. } },
  63. },
  64. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  65. .name = "Hauppauge WinTV-HVR1800lp",
  66. .portc = CX23885_MPEG_DVB,
  67. .input = {{
  68. .type = CX23885_VMUX_TELEVISION,
  69. .vmux = 0,
  70. .gpio0 = 0xff00,
  71. }, {
  72. .type = CX23885_VMUX_DEBUG,
  73. .vmux = 0,
  74. .gpio0 = 0xff01,
  75. }, {
  76. .type = CX23885_VMUX_COMPOSITE1,
  77. .vmux = 1,
  78. .gpio0 = 0xff02,
  79. }, {
  80. .type = CX23885_VMUX_SVIDEO,
  81. .vmux = 2,
  82. .gpio0 = 0xff02,
  83. } },
  84. },
  85. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  86. .name = "Hauppauge WinTV-HVR1800",
  87. .porta = CX23885_ANALOG_VIDEO,
  88. .portb = CX23885_MPEG_ENCODER,
  89. .portc = CX23885_MPEG_DVB,
  90. .tuner_type = TUNER_PHILIPS_TDA8290,
  91. .tuner_addr = 0x42, /* 0x84 >> 1 */
  92. .input = {{
  93. .type = CX23885_VMUX_TELEVISION,
  94. .vmux = CX25840_VIN7_CH3 |
  95. CX25840_VIN5_CH2 |
  96. CX25840_VIN2_CH1,
  97. .gpio0 = 0,
  98. }, {
  99. .type = CX23885_VMUX_COMPOSITE1,
  100. .vmux = CX25840_VIN7_CH3 |
  101. CX25840_VIN4_CH2 |
  102. CX25840_VIN6_CH1,
  103. .gpio0 = 0,
  104. }, {
  105. .type = CX23885_VMUX_SVIDEO,
  106. .vmux = CX25840_VIN7_CH3 |
  107. CX25840_VIN4_CH2 |
  108. CX25840_VIN8_CH1 |
  109. CX25840_SVIDEO_ON,
  110. .gpio0 = 0,
  111. } },
  112. },
  113. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  114. .name = "Hauppauge WinTV-HVR1250",
  115. .portc = CX23885_MPEG_DVB,
  116. .input = {{
  117. .type = CX23885_VMUX_TELEVISION,
  118. .vmux = 0,
  119. .gpio0 = 0xff00,
  120. }, {
  121. .type = CX23885_VMUX_DEBUG,
  122. .vmux = 0,
  123. .gpio0 = 0xff01,
  124. }, {
  125. .type = CX23885_VMUX_COMPOSITE1,
  126. .vmux = 1,
  127. .gpio0 = 0xff02,
  128. }, {
  129. .type = CX23885_VMUX_SVIDEO,
  130. .vmux = 2,
  131. .gpio0 = 0xff02,
  132. } },
  133. },
  134. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  135. .name = "DViCO FusionHDTV5 Express",
  136. .portb = CX23885_MPEG_DVB,
  137. },
  138. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  139. .name = "Hauppauge WinTV-HVR1500Q",
  140. .portc = CX23885_MPEG_DVB,
  141. },
  142. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  143. .name = "Hauppauge WinTV-HVR1500",
  144. .portc = CX23885_MPEG_DVB,
  145. },
  146. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  147. .name = "Hauppauge WinTV-HVR1200",
  148. .portc = CX23885_MPEG_DVB,
  149. },
  150. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  151. .name = "Hauppauge WinTV-HVR1700",
  152. .portc = CX23885_MPEG_DVB,
  153. },
  154. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  155. .name = "Hauppauge WinTV-HVR1400",
  156. .portc = CX23885_MPEG_DVB,
  157. },
  158. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  159. .name = "DViCO FusionHDTV7 Dual Express",
  160. .portb = CX23885_MPEG_DVB,
  161. .portc = CX23885_MPEG_DVB,
  162. },
  163. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  164. .name = "DViCO FusionHDTV DVB-T Dual Express",
  165. .portb = CX23885_MPEG_DVB,
  166. .portc = CX23885_MPEG_DVB,
  167. },
  168. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  169. .name = "Leadtek Winfast PxDVR3200 H",
  170. .portc = CX23885_MPEG_DVB,
  171. },
  172. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  173. .name = "Compro VideoMate E650F",
  174. .portc = CX23885_MPEG_DVB,
  175. },
  176. [CX23885_BOARD_TBS_6920] = {
  177. .name = "TurboSight TBS 6920",
  178. .portb = CX23885_MPEG_DVB,
  179. },
  180. [CX23885_BOARD_TEVII_S470] = {
  181. .name = "TeVii S470",
  182. .portb = CX23885_MPEG_DVB,
  183. },
  184. [CX23885_BOARD_DVBWORLD_2005] = {
  185. .name = "DVBWorld DVB-S2 2005",
  186. .portb = CX23885_MPEG_DVB,
  187. },
  188. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  189. .ci_type = 1,
  190. .name = "NetUP Dual DVB-S2 CI",
  191. .portb = CX23885_MPEG_DVB,
  192. .portc = CX23885_MPEG_DVB,
  193. },
  194. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  195. .name = "Hauppauge WinTV-HVR1270",
  196. .portc = CX23885_MPEG_DVB,
  197. },
  198. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  199. .name = "Hauppauge WinTV-HVR1275",
  200. .portc = CX23885_MPEG_DVB,
  201. },
  202. [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
  203. .name = "Hauppauge WinTV-HVR1255",
  204. .portc = CX23885_MPEG_DVB,
  205. },
  206. [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
  207. .name = "Hauppauge WinTV-HVR1210",
  208. .portc = CX23885_MPEG_DVB,
  209. },
  210. [CX23885_BOARD_MYGICA_X8506] = {
  211. .name = "Mygica X8506 DMB-TH",
  212. .tuner_type = TUNER_XC5000,
  213. .tuner_addr = 0x61,
  214. .porta = CX23885_ANALOG_VIDEO,
  215. .portb = CX23885_MPEG_DVB,
  216. .input = {
  217. {
  218. .type = CX23885_VMUX_TELEVISION,
  219. .vmux = CX25840_COMPOSITE2,
  220. },
  221. {
  222. .type = CX23885_VMUX_COMPOSITE1,
  223. .vmux = CX25840_COMPOSITE8,
  224. },
  225. {
  226. .type = CX23885_VMUX_SVIDEO,
  227. .vmux = CX25840_SVIDEO_LUMA3 |
  228. CX25840_SVIDEO_CHROMA4,
  229. },
  230. {
  231. .type = CX23885_VMUX_COMPONENT,
  232. .vmux = CX25840_COMPONENT_ON |
  233. CX25840_VIN1_CH1 |
  234. CX25840_VIN6_CH2 |
  235. CX25840_VIN7_CH3,
  236. },
  237. },
  238. },
  239. [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
  240. .name = "Magic-Pro ProHDTV Extreme 2",
  241. .tuner_type = TUNER_XC5000,
  242. .tuner_addr = 0x61,
  243. .porta = CX23885_ANALOG_VIDEO,
  244. .portb = CX23885_MPEG_DVB,
  245. .input = {
  246. {
  247. .type = CX23885_VMUX_TELEVISION,
  248. .vmux = CX25840_COMPOSITE2,
  249. },
  250. {
  251. .type = CX23885_VMUX_COMPOSITE1,
  252. .vmux = CX25840_COMPOSITE8,
  253. },
  254. {
  255. .type = CX23885_VMUX_SVIDEO,
  256. .vmux = CX25840_SVIDEO_LUMA3 |
  257. CX25840_SVIDEO_CHROMA4,
  258. },
  259. {
  260. .type = CX23885_VMUX_COMPONENT,
  261. .vmux = CX25840_COMPONENT_ON |
  262. CX25840_VIN1_CH1 |
  263. CX25840_VIN6_CH2 |
  264. CX25840_VIN7_CH3,
  265. },
  266. },
  267. },
  268. [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
  269. .name = "Hauppauge WinTV-HVR1850",
  270. .portb = CX23885_MPEG_ENCODER,
  271. .portc = CX23885_MPEG_DVB,
  272. },
  273. [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
  274. .name = "Compro VideoMate E800",
  275. .portc = CX23885_MPEG_DVB,
  276. },
  277. [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
  278. .name = "Hauppauge WinTV-HVR1290",
  279. .portc = CX23885_MPEG_DVB,
  280. },
  281. [CX23885_BOARD_MYGICA_X8558PRO] = {
  282. .name = "Mygica X8558 PRO DMB-TH",
  283. .portb = CX23885_MPEG_DVB,
  284. .portc = CX23885_MPEG_DVB,
  285. },
  286. [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
  287. .name = "LEADTEK WinFast PxTV1200",
  288. .porta = CX23885_ANALOG_VIDEO,
  289. .tuner_type = TUNER_XC2028,
  290. .tuner_addr = 0x61,
  291. .input = {{
  292. .type = CX23885_VMUX_TELEVISION,
  293. .vmux = CX25840_VIN2_CH1 |
  294. CX25840_VIN5_CH2 |
  295. CX25840_NONE0_CH3,
  296. }, {
  297. .type = CX23885_VMUX_COMPOSITE1,
  298. .vmux = CX25840_COMPOSITE1,
  299. }, {
  300. .type = CX23885_VMUX_SVIDEO,
  301. .vmux = CX25840_SVIDEO_LUMA3 |
  302. CX25840_SVIDEO_CHROMA4,
  303. }, {
  304. .type = CX23885_VMUX_COMPONENT,
  305. .vmux = CX25840_VIN7_CH1 |
  306. CX25840_VIN6_CH2 |
  307. CX25840_VIN8_CH3 |
  308. CX25840_COMPONENT_ON,
  309. } },
  310. },
  311. [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
  312. .name = "GoTView X5 3D Hybrid",
  313. .tuner_type = TUNER_XC5000,
  314. .tuner_addr = 0x64,
  315. .porta = CX23885_ANALOG_VIDEO,
  316. .portb = CX23885_MPEG_DVB,
  317. .input = {{
  318. .type = CX23885_VMUX_TELEVISION,
  319. .vmux = CX25840_VIN2_CH1 |
  320. CX25840_VIN5_CH2,
  321. .gpio0 = 0x02,
  322. }, {
  323. .type = CX23885_VMUX_COMPOSITE1,
  324. .vmux = CX23885_VMUX_COMPOSITE1,
  325. }, {
  326. .type = CX23885_VMUX_SVIDEO,
  327. .vmux = CX25840_SVIDEO_LUMA3 |
  328. CX25840_SVIDEO_CHROMA4,
  329. } },
  330. },
  331. [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
  332. .ci_type = 2,
  333. .name = "NetUP Dual DVB-T/C-CI RF",
  334. .porta = CX23885_ANALOG_VIDEO,
  335. .portb = CX23885_MPEG_DVB,
  336. .portc = CX23885_MPEG_DVB,
  337. .tuner_type = TUNER_XC5000,
  338. .tuner_addr = 0x64,
  339. .input = { {
  340. .type = CX23885_VMUX_TELEVISION,
  341. .vmux = CX25840_COMPOSITE1,
  342. } },
  343. },
  344. };
  345. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  346. /* ------------------------------------------------------------------ */
  347. /* PCI subsystem IDs */
  348. struct cx23885_subid cx23885_subids[] = {
  349. {
  350. .subvendor = 0x0070,
  351. .subdevice = 0x3400,
  352. .card = CX23885_BOARD_UNKNOWN,
  353. }, {
  354. .subvendor = 0x0070,
  355. .subdevice = 0x7600,
  356. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  357. }, {
  358. .subvendor = 0x0070,
  359. .subdevice = 0x7800,
  360. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  361. }, {
  362. .subvendor = 0x0070,
  363. .subdevice = 0x7801,
  364. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  365. }, {
  366. .subvendor = 0x0070,
  367. .subdevice = 0x7809,
  368. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  369. }, {
  370. .subvendor = 0x0070,
  371. .subdevice = 0x7911,
  372. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  373. }, {
  374. .subvendor = 0x18ac,
  375. .subdevice = 0xd500,
  376. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  377. }, {
  378. .subvendor = 0x0070,
  379. .subdevice = 0x7790,
  380. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  381. }, {
  382. .subvendor = 0x0070,
  383. .subdevice = 0x7797,
  384. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  385. }, {
  386. .subvendor = 0x0070,
  387. .subdevice = 0x7710,
  388. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  389. }, {
  390. .subvendor = 0x0070,
  391. .subdevice = 0x7717,
  392. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  393. }, {
  394. .subvendor = 0x0070,
  395. .subdevice = 0x71d1,
  396. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  397. }, {
  398. .subvendor = 0x0070,
  399. .subdevice = 0x71d3,
  400. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  401. }, {
  402. .subvendor = 0x0070,
  403. .subdevice = 0x8101,
  404. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  405. }, {
  406. .subvendor = 0x0070,
  407. .subdevice = 0x8010,
  408. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  409. }, {
  410. .subvendor = 0x18ac,
  411. .subdevice = 0xd618,
  412. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  413. }, {
  414. .subvendor = 0x18ac,
  415. .subdevice = 0xdb78,
  416. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  417. }, {
  418. .subvendor = 0x107d,
  419. .subdevice = 0x6681,
  420. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  421. }, {
  422. .subvendor = 0x185b,
  423. .subdevice = 0xe800,
  424. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  425. }, {
  426. .subvendor = 0x6920,
  427. .subdevice = 0x8888,
  428. .card = CX23885_BOARD_TBS_6920,
  429. }, {
  430. .subvendor = 0xd470,
  431. .subdevice = 0x9022,
  432. .card = CX23885_BOARD_TEVII_S470,
  433. }, {
  434. .subvendor = 0x0001,
  435. .subdevice = 0x2005,
  436. .card = CX23885_BOARD_DVBWORLD_2005,
  437. }, {
  438. .subvendor = 0x1b55,
  439. .subdevice = 0x2a2c,
  440. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  441. }, {
  442. .subvendor = 0x0070,
  443. .subdevice = 0x2211,
  444. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  445. }, {
  446. .subvendor = 0x0070,
  447. .subdevice = 0x2215,
  448. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  449. }, {
  450. .subvendor = 0x0070,
  451. .subdevice = 0x221d,
  452. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  453. }, {
  454. .subvendor = 0x0070,
  455. .subdevice = 0x2251,
  456. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  457. }, {
  458. .subvendor = 0x0070,
  459. .subdevice = 0x2259,
  460. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  461. }, {
  462. .subvendor = 0x0070,
  463. .subdevice = 0x2291,
  464. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  465. }, {
  466. .subvendor = 0x0070,
  467. .subdevice = 0x2295,
  468. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  469. }, {
  470. .subvendor = 0x0070,
  471. .subdevice = 0x2299,
  472. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  473. }, {
  474. .subvendor = 0x0070,
  475. .subdevice = 0x229d,
  476. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  477. }, {
  478. .subvendor = 0x0070,
  479. .subdevice = 0x22f0,
  480. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  481. }, {
  482. .subvendor = 0x0070,
  483. .subdevice = 0x22f1,
  484. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  485. }, {
  486. .subvendor = 0x0070,
  487. .subdevice = 0x22f2,
  488. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  489. }, {
  490. .subvendor = 0x0070,
  491. .subdevice = 0x22f3,
  492. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  493. }, {
  494. .subvendor = 0x0070,
  495. .subdevice = 0x22f4,
  496. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  497. }, {
  498. .subvendor = 0x0070,
  499. .subdevice = 0x22f5,
  500. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  501. }, {
  502. .subvendor = 0x14f1,
  503. .subdevice = 0x8651,
  504. .card = CX23885_BOARD_MYGICA_X8506,
  505. }, {
  506. .subvendor = 0x14f1,
  507. .subdevice = 0x8657,
  508. .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
  509. }, {
  510. .subvendor = 0x0070,
  511. .subdevice = 0x8541,
  512. .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
  513. }, {
  514. .subvendor = 0x1858,
  515. .subdevice = 0xe800,
  516. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
  517. }, {
  518. .subvendor = 0x0070,
  519. .subdevice = 0x8551,
  520. .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
  521. }, {
  522. .subvendor = 0x14f1,
  523. .subdevice = 0x8578,
  524. .card = CX23885_BOARD_MYGICA_X8558PRO,
  525. }, {
  526. .subvendor = 0x107d,
  527. .subdevice = 0x6f22,
  528. .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
  529. }, {
  530. .subvendor = 0x5654,
  531. .subdevice = 0x2390,
  532. .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
  533. }, {
  534. .subvendor = 0x1b55,
  535. .subdevice = 0xe2e4,
  536. .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
  537. },
  538. };
  539. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  540. void cx23885_card_list(struct cx23885_dev *dev)
  541. {
  542. int i;
  543. if (0 == dev->pci->subsystem_vendor &&
  544. 0 == dev->pci->subsystem_device) {
  545. printk(KERN_INFO
  546. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  547. "%s: be autodetected. Pass card=<n> insmod option\n"
  548. "%s: to workaround that. Redirect complaints to the\n"
  549. "%s: vendor of the TV card. Best regards,\n"
  550. "%s: -- tux\n",
  551. dev->name, dev->name, dev->name, dev->name, dev->name);
  552. } else {
  553. printk(KERN_INFO
  554. "%s: Your board isn't known (yet) to the driver.\n"
  555. "%s: Try to pick one of the existing card configs via\n"
  556. "%s: card=<n> insmod option. Updating to the latest\n"
  557. "%s: version might help as well.\n",
  558. dev->name, dev->name, dev->name, dev->name);
  559. }
  560. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  561. dev->name);
  562. for (i = 0; i < cx23885_bcount; i++)
  563. printk(KERN_INFO "%s: card=%d -> %s\n",
  564. dev->name, i, cx23885_boards[i].name);
  565. }
  566. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  567. {
  568. struct tveeprom tv;
  569. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  570. eeprom_data);
  571. /* Make sure we support the board model */
  572. switch (tv.model) {
  573. case 22001:
  574. /* WinTV-HVR1270 (PCIe, Retail, half height)
  575. * ATSC/QAM and basic analog, IR Blast */
  576. case 22009:
  577. /* WinTV-HVR1210 (PCIe, Retail, half height)
  578. * DVB-T and basic analog, IR Blast */
  579. case 22011:
  580. /* WinTV-HVR1270 (PCIe, Retail, half height)
  581. * ATSC/QAM and basic analog, IR Recv */
  582. case 22019:
  583. /* WinTV-HVR1210 (PCIe, Retail, half height)
  584. * DVB-T and basic analog, IR Recv */
  585. case 22021:
  586. /* WinTV-HVR1275 (PCIe, Retail, half height)
  587. * ATSC/QAM and basic analog, IR Recv */
  588. case 22029:
  589. /* WinTV-HVR1210 (PCIe, Retail, half height)
  590. * DVB-T and basic analog, IR Recv */
  591. case 22101:
  592. /* WinTV-HVR1270 (PCIe, Retail, full height)
  593. * ATSC/QAM and basic analog, IR Blast */
  594. case 22109:
  595. /* WinTV-HVR1210 (PCIe, Retail, full height)
  596. * DVB-T and basic analog, IR Blast */
  597. case 22111:
  598. /* WinTV-HVR1270 (PCIe, Retail, full height)
  599. * ATSC/QAM and basic analog, IR Recv */
  600. case 22119:
  601. /* WinTV-HVR1210 (PCIe, Retail, full height)
  602. * DVB-T and basic analog, IR Recv */
  603. case 22121:
  604. /* WinTV-HVR1275 (PCIe, Retail, full height)
  605. * ATSC/QAM and basic analog, IR Recv */
  606. case 22129:
  607. /* WinTV-HVR1210 (PCIe, Retail, full height)
  608. * DVB-T and basic analog, IR Recv */
  609. case 71009:
  610. /* WinTV-HVR1200 (PCIe, Retail, full height)
  611. * DVB-T and basic analog */
  612. case 71359:
  613. /* WinTV-HVR1200 (PCIe, OEM, half height)
  614. * DVB-T and basic analog */
  615. case 71439:
  616. /* WinTV-HVR1200 (PCIe, OEM, half height)
  617. * DVB-T and basic analog */
  618. case 71449:
  619. /* WinTV-HVR1200 (PCIe, OEM, full height)
  620. * DVB-T and basic analog */
  621. case 71939:
  622. /* WinTV-HVR1200 (PCIe, OEM, half height)
  623. * DVB-T and basic analog */
  624. case 71949:
  625. /* WinTV-HVR1200 (PCIe, OEM, full height)
  626. * DVB-T and basic analog */
  627. case 71959:
  628. /* WinTV-HVR1200 (PCIe, OEM, full height)
  629. * DVB-T and basic analog */
  630. case 71979:
  631. /* WinTV-HVR1200 (PCIe, OEM, half height)
  632. * DVB-T and basic analog */
  633. case 71999:
  634. /* WinTV-HVR1200 (PCIe, OEM, full height)
  635. * DVB-T and basic analog */
  636. case 76601:
  637. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  638. channel ATSC and MPEG2 HW Encoder */
  639. case 77001:
  640. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  641. and Basic analog */
  642. case 77011:
  643. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  644. and Basic analog */
  645. case 77041:
  646. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  647. and Basic analog */
  648. case 77051:
  649. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  650. and Basic analog */
  651. case 78011:
  652. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  653. Dual channel ATSC and MPEG2 HW Encoder */
  654. case 78501:
  655. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  656. Dual channel ATSC and MPEG2 HW Encoder */
  657. case 78521:
  658. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  659. Dual channel ATSC and MPEG2 HW Encoder */
  660. case 78531:
  661. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  662. Dual channel ATSC and MPEG2 HW Encoder */
  663. case 78631:
  664. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  665. Dual channel ATSC and MPEG2 HW Encoder */
  666. case 79001:
  667. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  668. ATSC and Basic analog */
  669. case 79101:
  670. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  671. ATSC and Basic analog */
  672. case 79501:
  673. /* WinTV-HVR1250 (PCIe, No IR, half height,
  674. ATSC [at least] and Basic analog) */
  675. case 79561:
  676. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  677. ATSC and Basic analog */
  678. case 79571:
  679. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  680. ATSC and Basic analog */
  681. case 79671:
  682. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  683. ATSC and Basic analog */
  684. case 80019:
  685. /* WinTV-HVR1400 (Express Card, Retail, IR,
  686. * DVB-T and Basic analog */
  687. case 81509:
  688. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  689. * DVB-T and MPEG2 HW Encoder */
  690. case 81519:
  691. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  692. * DVB-T and MPEG2 HW Encoder */
  693. break;
  694. case 85021:
  695. /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
  696. Dual channel ATSC and MPEG2 HW Encoder */
  697. break;
  698. case 85721:
  699. /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
  700. Dual channel ATSC and Basic analog */
  701. break;
  702. default:
  703. printk(KERN_WARNING "%s: warning: "
  704. "unknown hauppauge model #%d\n",
  705. dev->name, tv.model);
  706. break;
  707. }
  708. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  709. dev->name, tv.model);
  710. }
  711. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  712. {
  713. struct cx23885_tsport *port = priv;
  714. struct cx23885_dev *dev = port->dev;
  715. u32 bitmask = 0;
  716. if (command == XC2028_RESET_CLK)
  717. return 0;
  718. if (command != 0) {
  719. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  720. __func__, command);
  721. return -EINVAL;
  722. }
  723. switch (dev->board) {
  724. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  725. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  726. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  727. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  728. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  729. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  730. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  731. /* Tuner Reset Command */
  732. bitmask = 0x04;
  733. break;
  734. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  735. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  736. /* Two identical tuners on two different i2c buses,
  737. * we need to reset the correct gpio. */
  738. if (port->nr == 1)
  739. bitmask = 0x01;
  740. else if (port->nr == 2)
  741. bitmask = 0x04;
  742. break;
  743. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  744. /* Tuner Reset Command */
  745. bitmask = 0x02;
  746. break;
  747. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  748. altera_ci_tuner_reset(dev, port->nr);
  749. break;
  750. }
  751. if (bitmask) {
  752. /* Drive the tuner into reset and back out */
  753. cx_clear(GP0_IO, bitmask);
  754. mdelay(200);
  755. cx_set(GP0_IO, bitmask);
  756. }
  757. return 0;
  758. }
  759. void cx23885_gpio_setup(struct cx23885_dev *dev)
  760. {
  761. switch (dev->board) {
  762. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  763. /* GPIO-0 cx24227 demodulator reset */
  764. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  765. break;
  766. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  767. /* GPIO-0 cx24227 demodulator */
  768. /* GPIO-2 xc3028 tuner */
  769. /* Put the parts into reset */
  770. cx_set(GP0_IO, 0x00050000);
  771. cx_clear(GP0_IO, 0x00000005);
  772. msleep(5);
  773. /* Bring the parts out of reset */
  774. cx_set(GP0_IO, 0x00050005);
  775. break;
  776. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  777. /* GPIO-0 cx24227 demodulator reset */
  778. /* GPIO-2 xc5000 tuner reset */
  779. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  780. break;
  781. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  782. /* GPIO-0 656_CLK */
  783. /* GPIO-1 656_D0 */
  784. /* GPIO-2 8295A Reset */
  785. /* GPIO-3-10 cx23417 data0-7 */
  786. /* GPIO-11-14 cx23417 addr0-3 */
  787. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  788. /* GPIO-19 IR_RX */
  789. /* CX23417 GPIO's */
  790. /* EIO15 Zilog Reset */
  791. /* EIO14 S5H1409/CX24227 Reset */
  792. mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
  793. /* Put the demod into reset and protect the eeprom */
  794. mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
  795. mdelay(100);
  796. /* Bring the demod and blaster out of reset */
  797. mc417_gpio_set(dev, GPIO_15 | GPIO_14);
  798. mdelay(100);
  799. /* Force the TDA8295A into reset and back */
  800. cx23885_gpio_enable(dev, GPIO_2, 1);
  801. cx23885_gpio_set(dev, GPIO_2);
  802. mdelay(20);
  803. cx23885_gpio_clear(dev, GPIO_2);
  804. mdelay(20);
  805. cx23885_gpio_set(dev, GPIO_2);
  806. mdelay(20);
  807. break;
  808. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  809. /* GPIO-0 tda10048 demodulator reset */
  810. /* GPIO-2 tda18271 tuner reset */
  811. /* Put the parts into reset and back */
  812. cx_set(GP0_IO, 0x00050000);
  813. mdelay(20);
  814. cx_clear(GP0_IO, 0x00000005);
  815. mdelay(20);
  816. cx_set(GP0_IO, 0x00050005);
  817. break;
  818. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  819. /* GPIO-0 TDA10048 demodulator reset */
  820. /* GPIO-2 TDA8295A Reset */
  821. /* GPIO-3-10 cx23417 data0-7 */
  822. /* GPIO-11-14 cx23417 addr0-3 */
  823. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  824. /* The following GPIO's are on the interna AVCore (cx25840) */
  825. /* GPIO-19 IR_RX */
  826. /* GPIO-20 IR_TX 416/DVBT Select */
  827. /* GPIO-21 IIS DAT */
  828. /* GPIO-22 IIS WCLK */
  829. /* GPIO-23 IIS BCLK */
  830. /* Put the parts into reset and back */
  831. cx_set(GP0_IO, 0x00050000);
  832. mdelay(20);
  833. cx_clear(GP0_IO, 0x00000005);
  834. mdelay(20);
  835. cx_set(GP0_IO, 0x00050005);
  836. break;
  837. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  838. /* GPIO-0 Dibcom7000p demodulator reset */
  839. /* GPIO-2 xc3028L tuner reset */
  840. /* GPIO-13 LED */
  841. /* Put the parts into reset and back */
  842. cx_set(GP0_IO, 0x00050000);
  843. mdelay(20);
  844. cx_clear(GP0_IO, 0x00000005);
  845. mdelay(20);
  846. cx_set(GP0_IO, 0x00050005);
  847. break;
  848. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  849. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  850. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  851. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  852. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  853. /* Put the parts into reset and back */
  854. cx_set(GP0_IO, 0x000f0000);
  855. mdelay(20);
  856. cx_clear(GP0_IO, 0x0000000f);
  857. mdelay(20);
  858. cx_set(GP0_IO, 0x000f000f);
  859. break;
  860. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  861. /* GPIO-0 portb xc3028 reset */
  862. /* GPIO-1 portb zl10353 reset */
  863. /* GPIO-2 portc xc3028 reset */
  864. /* GPIO-3 portc zl10353 reset */
  865. /* Put the parts into reset and back */
  866. cx_set(GP0_IO, 0x000f0000);
  867. mdelay(20);
  868. cx_clear(GP0_IO, 0x0000000f);
  869. mdelay(20);
  870. cx_set(GP0_IO, 0x000f000f);
  871. break;
  872. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  873. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  874. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  875. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  876. /* GPIO-2 xc3028 tuner reset */
  877. /* The following GPIO's are on the internal AVCore (cx25840) */
  878. /* GPIO-? zl10353 demod reset */
  879. /* Put the parts into reset and back */
  880. cx_set(GP0_IO, 0x00040000);
  881. mdelay(20);
  882. cx_clear(GP0_IO, 0x00000004);
  883. mdelay(20);
  884. cx_set(GP0_IO, 0x00040004);
  885. break;
  886. case CX23885_BOARD_TBS_6920:
  887. cx_write(MC417_CTL, 0x00000036);
  888. cx_write(MC417_OEN, 0x00001000);
  889. cx_set(MC417_RWD, 0x00000002);
  890. mdelay(200);
  891. cx_clear(MC417_RWD, 0x00000800);
  892. mdelay(200);
  893. cx_set(MC417_RWD, 0x00000800);
  894. mdelay(200);
  895. break;
  896. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  897. /* GPIO-0 INTA from CiMax1
  898. GPIO-1 INTB from CiMax2
  899. GPIO-2 reset chips
  900. GPIO-3 to GPIO-10 data/addr for CA
  901. GPIO-11 ~CS0 to CiMax1
  902. GPIO-12 ~CS1 to CiMax2
  903. GPIO-13 ADL0 load LSB addr
  904. GPIO-14 ADL1 load MSB addr
  905. GPIO-15 ~RDY from CiMax
  906. GPIO-17 ~RD to CiMax
  907. GPIO-18 ~WR to CiMax
  908. */
  909. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  910. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  911. cx_clear(GP0_IO, 0x00030004);
  912. mdelay(100);/* reset delay */
  913. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  914. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  915. /* GPIO-15 IN as ~ACK, rest as OUT */
  916. cx_write(MC417_OEN, 0x00001000);
  917. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  918. cx_write(MC417_RWD, 0x0000c300);
  919. /* enable irq */
  920. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  921. break;
  922. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  923. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  924. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  925. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  926. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  927. /* GPIO-6 I2C Gate which can isolate the demod from the bus */
  928. /* GPIO-9 Demod reset */
  929. /* Put the parts into reset and back */
  930. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  931. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  932. cx23885_gpio_clear(dev, GPIO_9);
  933. mdelay(20);
  934. cx23885_gpio_set(dev, GPIO_9);
  935. break;
  936. case CX23885_BOARD_MYGICA_X8506:
  937. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  938. /* GPIO-0 (0)Analog / (1)Digital TV */
  939. /* GPIO-1 reset XC5000 */
  940. /* GPIO-2 reset LGS8GL5 / LGS8G75 */
  941. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
  942. cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
  943. mdelay(100);
  944. cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
  945. mdelay(100);
  946. break;
  947. case CX23885_BOARD_MYGICA_X8558PRO:
  948. /* GPIO-0 reset first ATBM8830 */
  949. /* GPIO-1 reset second ATBM8830 */
  950. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
  951. cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
  952. mdelay(100);
  953. cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
  954. mdelay(100);
  955. break;
  956. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  957. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  958. /* GPIO-0 656_CLK */
  959. /* GPIO-1 656_D0 */
  960. /* GPIO-2 Wake# */
  961. /* GPIO-3-10 cx23417 data0-7 */
  962. /* GPIO-11-14 cx23417 addr0-3 */
  963. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  964. /* GPIO-19 IR_RX */
  965. /* GPIO-20 C_IR_TX */
  966. /* GPIO-21 I2S DAT */
  967. /* GPIO-22 I2S WCLK */
  968. /* GPIO-23 I2S BCLK */
  969. /* ALT GPIO: EXP GPIO LATCH */
  970. /* CX23417 GPIO's */
  971. /* GPIO-14 S5H1411/CX24228 Reset */
  972. /* GPIO-13 EEPROM write protect */
  973. mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
  974. /* Put the demod into reset and protect the eeprom */
  975. mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
  976. mdelay(100);
  977. /* Bring the demod out of reset */
  978. mc417_gpio_set(dev, GPIO_14);
  979. mdelay(100);
  980. /* CX24228 GPIO */
  981. /* Connected to IF / Mux */
  982. break;
  983. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  984. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  985. break;
  986. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  987. /* GPIO-0 ~INT in
  988. GPIO-1 TMS out
  989. GPIO-2 ~reset chips out
  990. GPIO-3 to GPIO-10 data/addr for CA in/out
  991. GPIO-11 ~CS out
  992. GPIO-12 ADDR out
  993. GPIO-13 ~WR out
  994. GPIO-14 ~RD out
  995. GPIO-15 ~RDY in
  996. GPIO-16 TCK out
  997. GPIO-17 TDO in
  998. GPIO-18 TDI out
  999. */
  1000. cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
  1001. /* GPIO-0 as INT, reset & TMS low */
  1002. cx_clear(GP0_IO, 0x00010006);
  1003. mdelay(100);/* reset delay */
  1004. cx_set(GP0_IO, 0x00000004); /* reset high */
  1005. cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
  1006. /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
  1007. cx_write(MC417_OEN, 0x00005000);
  1008. /* ~RD, ~WR high; ADDR low; ~CS high */
  1009. cx_write(MC417_RWD, 0x00000d00);
  1010. /* enable irq */
  1011. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  1012. break;
  1013. }
  1014. }
  1015. int cx23885_ir_init(struct cx23885_dev *dev)
  1016. {
  1017. static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
  1018. {
  1019. .flags = V4L2_SUBDEV_IO_PIN_INPUT,
  1020. .pin = CX23885_PIN_IR_RX_GPIO19,
  1021. .function = CX23885_PAD_IR_RX,
  1022. .value = 0,
  1023. .strength = CX25840_PIN_DRIVE_MEDIUM,
  1024. }, {
  1025. .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
  1026. .pin = CX23885_PIN_IR_TX_GPIO20,
  1027. .function = CX23885_PAD_IR_TX,
  1028. .value = 0,
  1029. .strength = CX25840_PIN_DRIVE_MEDIUM,
  1030. }
  1031. };
  1032. const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
  1033. static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
  1034. {
  1035. .flags = V4L2_SUBDEV_IO_PIN_INPUT,
  1036. .pin = CX23885_PIN_IR_RX_GPIO19,
  1037. .function = CX23885_PAD_IR_RX,
  1038. .value = 0,
  1039. .strength = CX25840_PIN_DRIVE_MEDIUM,
  1040. }
  1041. };
  1042. const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
  1043. struct v4l2_subdev_ir_parameters params;
  1044. int ret = 0;
  1045. switch (dev->board) {
  1046. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1047. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1048. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1049. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1050. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1051. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1052. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1053. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1054. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1055. /* FIXME: Implement me */
  1056. break;
  1057. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1058. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1059. ret = cx23888_ir_probe(dev);
  1060. if (ret)
  1061. break;
  1062. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
  1063. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1064. ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
  1065. /*
  1066. * For these boards we need to invert the Tx output via the
  1067. * IR controller to have the LED off while idle
  1068. */
  1069. v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
  1070. params.enable = false;
  1071. params.shutdown = false;
  1072. params.invert_level = true;
  1073. v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
  1074. params.shutdown = true;
  1075. v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
  1076. break;
  1077. case CX23885_BOARD_TEVII_S470:
  1078. if (!enable_885_ir)
  1079. break;
  1080. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
  1081. if (dev->sd_ir == NULL) {
  1082. ret = -ENODEV;
  1083. break;
  1084. }
  1085. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1086. ir_rx_pin_cfg_count, ir_rx_pin_cfg);
  1087. break;
  1088. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1089. if (!enable_885_ir)
  1090. break;
  1091. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
  1092. if (dev->sd_ir == NULL) {
  1093. ret = -ENODEV;
  1094. break;
  1095. }
  1096. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1097. ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
  1098. break;
  1099. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1100. request_module("ir-kbd-i2c");
  1101. break;
  1102. }
  1103. return ret;
  1104. }
  1105. void cx23885_ir_fini(struct cx23885_dev *dev)
  1106. {
  1107. switch (dev->board) {
  1108. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1109. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1110. cx23885_irq_remove(dev, PCI_MSK_IR);
  1111. cx23888_ir_remove(dev);
  1112. dev->sd_ir = NULL;
  1113. break;
  1114. case CX23885_BOARD_TEVII_S470:
  1115. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1116. cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
  1117. /* sd_ir is a duplicate pointer to the AV Core, just clear it */
  1118. dev->sd_ir = NULL;
  1119. break;
  1120. }
  1121. }
  1122. int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
  1123. {
  1124. int data;
  1125. int tdo = 0;
  1126. struct cx23885_dev *dev = (struct cx23885_dev *)device;
  1127. /*TMS*/
  1128. data = ((cx_read(GP0_IO)) & (~0x00000002));
  1129. data |= (tms ? 0x00020002 : 0x00020000);
  1130. cx_write(GP0_IO, data);
  1131. /*TDI*/
  1132. data = ((cx_read(MC417_RWD)) & (~0x0000a000));
  1133. data |= (tdi ? 0x00008000 : 0);
  1134. cx_write(MC417_RWD, data);
  1135. if (read_tdo)
  1136. tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
  1137. cx_write(MC417_RWD, data | 0x00002000);
  1138. udelay(1);
  1139. /*TCK*/
  1140. cx_write(MC417_RWD, data);
  1141. return tdo;
  1142. }
  1143. void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
  1144. {
  1145. switch (dev->board) {
  1146. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1147. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1148. if (dev->sd_ir)
  1149. cx23885_irq_add_enable(dev, PCI_MSK_IR);
  1150. break;
  1151. case CX23885_BOARD_TEVII_S470:
  1152. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1153. if (dev->sd_ir)
  1154. cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
  1155. break;
  1156. }
  1157. }
  1158. void cx23885_card_setup(struct cx23885_dev *dev)
  1159. {
  1160. struct cx23885_tsport *ts1 = &dev->ts1;
  1161. struct cx23885_tsport *ts2 = &dev->ts2;
  1162. static u8 eeprom[256];
  1163. if (dev->i2c_bus[0].i2c_rc == 0) {
  1164. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  1165. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  1166. eeprom, sizeof(eeprom));
  1167. }
  1168. switch (dev->board) {
  1169. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1170. if (dev->i2c_bus[0].i2c_rc == 0) {
  1171. if (eeprom[0x80] != 0x84)
  1172. hauppauge_eeprom(dev, eeprom+0xc0);
  1173. else
  1174. hauppauge_eeprom(dev, eeprom+0x80);
  1175. }
  1176. break;
  1177. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1178. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1179. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1180. if (dev->i2c_bus[0].i2c_rc == 0)
  1181. hauppauge_eeprom(dev, eeprom+0x80);
  1182. break;
  1183. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1184. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  1185. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1186. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1187. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1188. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1189. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1190. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1191. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1192. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1193. if (dev->i2c_bus[0].i2c_rc == 0)
  1194. hauppauge_eeprom(dev, eeprom+0xc0);
  1195. break;
  1196. }
  1197. switch (dev->board) {
  1198. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  1199. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1200. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1201. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1202. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1203. /* break omitted intentionally */
  1204. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  1205. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1206. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1207. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1208. break;
  1209. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1210. /* Defaults for VID B - Analog encoder */
  1211. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  1212. ts1->gen_ctrl_val = 0x10e;
  1213. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1214. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1215. /* APB_TSVALERR_POL (active low)*/
  1216. ts1->vld_misc_val = 0x2000;
  1217. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  1218. /* Defaults for VID C */
  1219. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1220. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1221. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1222. break;
  1223. case CX23885_BOARD_TBS_6920:
  1224. ts1->gen_ctrl_val = 0x4; /* Parallel */
  1225. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1226. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1227. break;
  1228. case CX23885_BOARD_TEVII_S470:
  1229. case CX23885_BOARD_DVBWORLD_2005:
  1230. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1231. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1232. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1233. break;
  1234. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1235. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  1236. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1237. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1238. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1239. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1240. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1241. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1242. break;
  1243. case CX23885_BOARD_MYGICA_X8506:
  1244. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  1245. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1246. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1247. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1248. break;
  1249. case CX23885_BOARD_MYGICA_X8558PRO:
  1250. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1251. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1252. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1253. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1254. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1255. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1256. break;
  1257. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1258. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1259. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1260. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  1261. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1262. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1263. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1264. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  1265. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  1266. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1267. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1268. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1269. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1270. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1271. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  1272. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1273. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  1274. default:
  1275. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1276. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1277. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1278. }
  1279. /* Certain boards support analog, or require the avcore to be
  1280. * loaded, ensure this happens.
  1281. */
  1282. switch (dev->board) {
  1283. case CX23885_BOARD_TEVII_S470:
  1284. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1285. /* Currently only enabled for the integrated IR controller */
  1286. if (!enable_885_ir)
  1287. break;
  1288. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1289. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  1290. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1291. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  1292. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  1293. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1294. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  1295. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  1296. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1297. case CX23885_BOARD_MYGICA_X8506:
  1298. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  1299. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1300. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  1301. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  1302. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  1303. &dev->i2c_bus[2].i2c_adap,
  1304. "cx25840", 0x88 >> 1, NULL);
  1305. if (dev->sd_cx25840) {
  1306. dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
  1307. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  1308. }
  1309. break;
  1310. }
  1311. /* AUX-PLL 27MHz CLK */
  1312. switch (dev->board) {
  1313. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1314. netup_initialize(dev);
  1315. break;
  1316. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
  1317. int ret;
  1318. const struct firmware *fw;
  1319. const char *filename = "dvb-netup-altera-01.fw";
  1320. char *action = "configure";
  1321. struct altera_config netup_config = {
  1322. .dev = dev,
  1323. .action = action,
  1324. .jtag_io = netup_jtag_io,
  1325. };
  1326. netup_initialize(dev);
  1327. ret = request_firmware(&fw, filename, &dev->pci->dev);
  1328. if (ret != 0)
  1329. printk(KERN_ERR "did not find the firmware file. (%s) "
  1330. "Please see linux/Documentation/dvb/ for more details "
  1331. "on firmware-problems.", filename);
  1332. else
  1333. altera_init(&netup_config, fw);
  1334. break;
  1335. }
  1336. }
  1337. }
  1338. /* ------------------------------------------------------------------ */