iwl4965-base.c 268 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #include "iwl-4965.h"
  46. #include "iwl-helpers.h"
  47. #ifdef CONFIG_IWL4965_DEBUG
  48. u32 iwl4965_debug_level;
  49. #endif
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /* module parameters */
  58. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  59. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  60. static int iwl4965_param_disable; /* def: enable radio */
  61. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  62. int iwl4965_param_hwcrypto; /* def: using software encryption */
  63. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  64. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.1.19k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. static int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For data Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr, int is_ap, u8 flags)
  419. {
  420. int i;
  421. int index = IWL_INVALID_STATION;
  422. struct iwl4965_station_entry *station;
  423. unsigned long flags_spin;
  424. DECLARE_MAC_BUF(mac);
  425. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  426. if (is_ap)
  427. index = IWL_AP_ID;
  428. else if (is_broadcast_ether_addr(addr))
  429. index = priv->hw_setting.bcast_sta_id;
  430. else
  431. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  432. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  433. addr)) {
  434. index = i;
  435. break;
  436. }
  437. if (!priv->stations[i].used &&
  438. index == IWL_INVALID_STATION)
  439. index = i;
  440. }
  441. /* These two conditions have the same outcome, but keep them separate
  442. since they have different meanings */
  443. if (unlikely(index == IWL_INVALID_STATION)) {
  444. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  445. return index;
  446. }
  447. if (priv->stations[index].used &&
  448. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  449. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  450. return index;
  451. }
  452. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  453. station = &priv->stations[index];
  454. station->used = 1;
  455. priv->num_stations++;
  456. /* Set up the REPLY_ADD_STA command to send to device */
  457. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  458. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  459. station->sta.mode = 0;
  460. station->sta.sta.sta_id = index;
  461. station->sta.station_flags = 0;
  462. #ifdef CONFIG_IWL4965_HT
  463. /* BCAST station and IBSS stations do not work in HT mode */
  464. if (index != priv->hw_setting.bcast_sta_id &&
  465. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  466. iwl4965_set_ht_add_station(priv, index);
  467. #endif /*CONFIG_IWL4965_HT*/
  468. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  469. /* Add station to device's station table */
  470. iwl4965_send_add_station(priv, &station->sta, flags);
  471. return index;
  472. }
  473. /*************** DRIVER STATUS FUNCTIONS *****/
  474. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  475. {
  476. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  477. * set but EXIT_PENDING is not */
  478. return test_bit(STATUS_READY, &priv->status) &&
  479. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  480. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  481. }
  482. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  483. {
  484. return test_bit(STATUS_ALIVE, &priv->status);
  485. }
  486. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  487. {
  488. return test_bit(STATUS_INIT, &priv->status);
  489. }
  490. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  491. {
  492. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  493. test_bit(STATUS_RF_KILL_SW, &priv->status);
  494. }
  495. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  496. {
  497. if (iwl4965_is_rfkill(priv))
  498. return 0;
  499. return iwl4965_is_ready(priv);
  500. }
  501. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  502. #define IWL_CMD(x) case x : return #x
  503. static const char *get_cmd_string(u8 cmd)
  504. {
  505. switch (cmd) {
  506. IWL_CMD(REPLY_ALIVE);
  507. IWL_CMD(REPLY_ERROR);
  508. IWL_CMD(REPLY_RXON);
  509. IWL_CMD(REPLY_RXON_ASSOC);
  510. IWL_CMD(REPLY_QOS_PARAM);
  511. IWL_CMD(REPLY_RXON_TIMING);
  512. IWL_CMD(REPLY_ADD_STA);
  513. IWL_CMD(REPLY_REMOVE_STA);
  514. IWL_CMD(REPLY_REMOVE_ALL_STA);
  515. IWL_CMD(REPLY_TX);
  516. IWL_CMD(REPLY_RATE_SCALE);
  517. IWL_CMD(REPLY_LEDS_CMD);
  518. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  519. IWL_CMD(RADAR_NOTIFICATION);
  520. IWL_CMD(REPLY_QUIET_CMD);
  521. IWL_CMD(REPLY_CHANNEL_SWITCH);
  522. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  523. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  524. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  525. IWL_CMD(POWER_TABLE_CMD);
  526. IWL_CMD(PM_SLEEP_NOTIFICATION);
  527. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  528. IWL_CMD(REPLY_SCAN_CMD);
  529. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  530. IWL_CMD(SCAN_START_NOTIFICATION);
  531. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  532. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  533. IWL_CMD(BEACON_NOTIFICATION);
  534. IWL_CMD(REPLY_TX_BEACON);
  535. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  536. IWL_CMD(QUIET_NOTIFICATION);
  537. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  538. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  539. IWL_CMD(REPLY_BT_CONFIG);
  540. IWL_CMD(REPLY_STATISTICS_CMD);
  541. IWL_CMD(STATISTICS_NOTIFICATION);
  542. IWL_CMD(REPLY_CARD_STATE_CMD);
  543. IWL_CMD(CARD_STATE_NOTIFICATION);
  544. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  545. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  546. IWL_CMD(SENSITIVITY_CMD);
  547. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  548. IWL_CMD(REPLY_RX_PHY_CMD);
  549. IWL_CMD(REPLY_RX_MPDU_CMD);
  550. IWL_CMD(REPLY_4965_RX);
  551. IWL_CMD(REPLY_COMPRESSED_BA);
  552. default:
  553. return "UNKNOWN";
  554. }
  555. }
  556. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  557. /**
  558. * iwl4965_enqueue_hcmd - enqueue a uCode command
  559. * @priv: device private data point
  560. * @cmd: a point to the ucode command structure
  561. *
  562. * The function returns < 0 values to indicate the operation is
  563. * failed. On success, it turns the index (> 0) of command in the
  564. * command queue.
  565. */
  566. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  567. {
  568. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  569. struct iwl4965_queue *q = &txq->q;
  570. struct iwl4965_tfd_frame *tfd;
  571. u32 *control_flags;
  572. struct iwl4965_cmd *out_cmd;
  573. u32 idx;
  574. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  575. dma_addr_t phys_addr;
  576. int ret;
  577. unsigned long flags;
  578. /* If any of the command structures end up being larger than
  579. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  580. * we will need to increase the size of the TFD entries */
  581. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  582. !(cmd->meta.flags & CMD_SIZE_HUGE));
  583. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  584. IWL_ERROR("No space for Tx\n");
  585. return -ENOSPC;
  586. }
  587. spin_lock_irqsave(&priv->hcmd_lock, flags);
  588. tfd = &txq->bd[q->write_ptr];
  589. memset(tfd, 0, sizeof(*tfd));
  590. control_flags = (u32 *) tfd;
  591. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  592. out_cmd = &txq->cmd[idx];
  593. out_cmd->hdr.cmd = cmd->id;
  594. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  595. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  596. /* At this point, the out_cmd now has all of the incoming cmd
  597. * information */
  598. out_cmd->hdr.flags = 0;
  599. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  600. INDEX_TO_SEQ(q->write_ptr));
  601. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  602. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  603. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  604. offsetof(struct iwl4965_cmd, hdr);
  605. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  606. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  607. "%d bytes at %d[%d]:%d\n",
  608. get_cmd_string(out_cmd->hdr.cmd),
  609. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  610. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  611. txq->need_update = 1;
  612. /* Set up entry in queue's byte count circular buffer */
  613. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  614. /* Increment and update queue's write index */
  615. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  616. iwl4965_tx_queue_update_write_ptr(priv, txq);
  617. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  618. return ret ? ret : idx;
  619. }
  620. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  621. {
  622. int ret;
  623. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  624. /* An asynchronous command can not expect an SKB to be set. */
  625. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  626. /* An asynchronous command MUST have a callback. */
  627. BUG_ON(!cmd->meta.u.callback);
  628. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  629. return -EBUSY;
  630. ret = iwl4965_enqueue_hcmd(priv, cmd);
  631. if (ret < 0) {
  632. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  633. get_cmd_string(cmd->id), ret);
  634. return ret;
  635. }
  636. return 0;
  637. }
  638. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  639. {
  640. int cmd_idx;
  641. int ret;
  642. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  643. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  644. /* A synchronous command can not have a callback set. */
  645. BUG_ON(cmd->meta.u.callback != NULL);
  646. if (atomic_xchg(&entry, 1)) {
  647. IWL_ERROR("Error sending %s: Already sending a host command\n",
  648. get_cmd_string(cmd->id));
  649. return -EBUSY;
  650. }
  651. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  652. if (cmd->meta.flags & CMD_WANT_SKB)
  653. cmd->meta.source = &cmd->meta;
  654. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  655. if (cmd_idx < 0) {
  656. ret = cmd_idx;
  657. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  658. get_cmd_string(cmd->id), ret);
  659. goto out;
  660. }
  661. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  662. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  663. HOST_COMPLETE_TIMEOUT);
  664. if (!ret) {
  665. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  666. IWL_ERROR("Error sending %s: time out after %dms.\n",
  667. get_cmd_string(cmd->id),
  668. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  669. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  670. ret = -ETIMEDOUT;
  671. goto cancel;
  672. }
  673. }
  674. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  675. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  676. get_cmd_string(cmd->id));
  677. ret = -ECANCELED;
  678. goto fail;
  679. }
  680. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  681. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  682. get_cmd_string(cmd->id));
  683. ret = -EIO;
  684. goto fail;
  685. }
  686. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  687. IWL_ERROR("Error: Response NULL in '%s'\n",
  688. get_cmd_string(cmd->id));
  689. ret = -EIO;
  690. goto out;
  691. }
  692. ret = 0;
  693. goto out;
  694. cancel:
  695. if (cmd->meta.flags & CMD_WANT_SKB) {
  696. struct iwl4965_cmd *qcmd;
  697. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  698. * TX cmd queue. Otherwise in case the cmd comes
  699. * in later, it will possibly set an invalid
  700. * address (cmd->meta.source). */
  701. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  702. qcmd->meta.flags &= ~CMD_WANT_SKB;
  703. }
  704. fail:
  705. if (cmd->meta.u.skb) {
  706. dev_kfree_skb_any(cmd->meta.u.skb);
  707. cmd->meta.u.skb = NULL;
  708. }
  709. out:
  710. atomic_set(&entry, 0);
  711. return ret;
  712. }
  713. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  714. {
  715. if (cmd->meta.flags & CMD_ASYNC)
  716. return iwl4965_send_cmd_async(priv, cmd);
  717. return iwl4965_send_cmd_sync(priv, cmd);
  718. }
  719. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  720. {
  721. struct iwl4965_host_cmd cmd = {
  722. .id = id,
  723. .len = len,
  724. .data = data,
  725. };
  726. return iwl4965_send_cmd_sync(priv, &cmd);
  727. }
  728. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  729. {
  730. struct iwl4965_host_cmd cmd = {
  731. .id = id,
  732. .len = sizeof(val),
  733. .data = &val,
  734. };
  735. return iwl4965_send_cmd_sync(priv, &cmd);
  736. }
  737. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  738. {
  739. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  740. }
  741. /**
  742. * iwl4965_rxon_add_station - add station into station table.
  743. *
  744. * there is only one AP station with id= IWL_AP_ID
  745. * NOTE: mutex must be held before calling this fnction
  746. */
  747. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  748. const u8 *addr, int is_ap)
  749. {
  750. u8 sta_id;
  751. /* Add station to device's station table */
  752. sta_id = iwl4965_add_station_flags(priv, addr, is_ap, 0);
  753. /* Set up default rate scaling table in device's station table */
  754. iwl4965_add_station(priv, addr, is_ap);
  755. return sta_id;
  756. }
  757. /**
  758. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  759. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  760. * @channel: Any channel valid for the requested phymode
  761. * In addition to setting the staging RXON, priv->phymode is also set.
  762. *
  763. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  764. * in the staging RXON flag structure based on the phymode
  765. */
  766. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  767. u16 channel)
  768. {
  769. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  770. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  771. channel, phymode);
  772. return -EINVAL;
  773. }
  774. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  775. (priv->phymode == phymode))
  776. return 0;
  777. priv->staging_rxon.channel = cpu_to_le16(channel);
  778. if (phymode == MODE_IEEE80211A)
  779. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  780. else
  781. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  782. priv->phymode = phymode;
  783. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  784. return 0;
  785. }
  786. /**
  787. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  788. *
  789. * NOTE: This is really only useful during development and can eventually
  790. * be #ifdef'd out once the driver is stable and folks aren't actively
  791. * making changes
  792. */
  793. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  794. {
  795. int error = 0;
  796. int counter = 1;
  797. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  798. error |= le32_to_cpu(rxon->flags &
  799. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  800. RXON_FLG_RADAR_DETECT_MSK));
  801. if (error)
  802. IWL_WARNING("check 24G fields %d | %d\n",
  803. counter++, error);
  804. } else {
  805. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  806. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  807. if (error)
  808. IWL_WARNING("check 52 fields %d | %d\n",
  809. counter++, error);
  810. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  811. if (error)
  812. IWL_WARNING("check 52 CCK %d | %d\n",
  813. counter++, error);
  814. }
  815. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  816. if (error)
  817. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  818. /* make sure basic rates 6Mbps and 1Mbps are supported */
  819. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  820. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  821. if (error)
  822. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  823. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  824. if (error)
  825. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  826. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  827. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  828. if (error)
  829. IWL_WARNING("check CCK and short slot %d | %d\n",
  830. counter++, error);
  831. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  832. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  833. if (error)
  834. IWL_WARNING("check CCK & auto detect %d | %d\n",
  835. counter++, error);
  836. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  837. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  838. if (error)
  839. IWL_WARNING("check TGG and auto detect %d | %d\n",
  840. counter++, error);
  841. if (error)
  842. IWL_WARNING("Tuning to channel %d\n",
  843. le16_to_cpu(rxon->channel));
  844. if (error) {
  845. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  846. return -1;
  847. }
  848. return 0;
  849. }
  850. /**
  851. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  852. * @priv: staging_rxon is compared to active_rxon
  853. *
  854. * If the RXON structure is changing enough to require a new tune,
  855. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  856. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  857. */
  858. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  859. {
  860. /* These items are only settable from the full RXON command */
  861. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  862. compare_ether_addr(priv->staging_rxon.bssid_addr,
  863. priv->active_rxon.bssid_addr) ||
  864. compare_ether_addr(priv->staging_rxon.node_addr,
  865. priv->active_rxon.node_addr) ||
  866. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  867. priv->active_rxon.wlap_bssid_addr) ||
  868. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  869. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  870. (priv->staging_rxon.air_propagation !=
  871. priv->active_rxon.air_propagation) ||
  872. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  873. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  874. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  875. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  876. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  877. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  878. return 1;
  879. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  880. * be updated with the RXON_ASSOC command -- however only some
  881. * flag transitions are allowed using RXON_ASSOC */
  882. /* Check if we are not switching bands */
  883. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  884. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  885. return 1;
  886. /* Check if we are switching association toggle */
  887. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  888. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  889. return 1;
  890. return 0;
  891. }
  892. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  893. {
  894. int rc = 0;
  895. struct iwl4965_rx_packet *res = NULL;
  896. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  897. struct iwl4965_host_cmd cmd = {
  898. .id = REPLY_RXON_ASSOC,
  899. .len = sizeof(rxon_assoc),
  900. .meta.flags = CMD_WANT_SKB,
  901. .data = &rxon_assoc,
  902. };
  903. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  904. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  905. if ((rxon1->flags == rxon2->flags) &&
  906. (rxon1->filter_flags == rxon2->filter_flags) &&
  907. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  908. (rxon1->ofdm_ht_single_stream_basic_rates ==
  909. rxon2->ofdm_ht_single_stream_basic_rates) &&
  910. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  911. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  912. (rxon1->rx_chain == rxon2->rx_chain) &&
  913. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  914. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  915. return 0;
  916. }
  917. rxon_assoc.flags = priv->staging_rxon.flags;
  918. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  919. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  920. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  921. rxon_assoc.reserved = 0;
  922. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  923. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  924. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  925. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  926. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  927. rc = iwl4965_send_cmd_sync(priv, &cmd);
  928. if (rc)
  929. return rc;
  930. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  931. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  932. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  933. rc = -EIO;
  934. }
  935. priv->alloc_rxb_skb--;
  936. dev_kfree_skb_any(cmd.meta.u.skb);
  937. return rc;
  938. }
  939. /**
  940. * iwl4965_commit_rxon - commit staging_rxon to hardware
  941. *
  942. * The RXON command in staging_rxon is committed to the hardware and
  943. * the active_rxon structure is updated with the new data. This
  944. * function correctly transitions out of the RXON_ASSOC_MSK state if
  945. * a HW tune is required based on the RXON structure changes.
  946. */
  947. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  948. {
  949. /* cast away the const for active_rxon in this function */
  950. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  951. DECLARE_MAC_BUF(mac);
  952. int rc = 0;
  953. if (!iwl4965_is_alive(priv))
  954. return -1;
  955. /* always get timestamp with Rx frame */
  956. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  957. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  958. if (rc) {
  959. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  960. return -EINVAL;
  961. }
  962. /* If we don't need to send a full RXON, we can use
  963. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  964. * and other flags for the current radio configuration. */
  965. if (!iwl4965_full_rxon_required(priv)) {
  966. rc = iwl4965_send_rxon_assoc(priv);
  967. if (rc) {
  968. IWL_ERROR("Error setting RXON_ASSOC "
  969. "configuration (%d).\n", rc);
  970. return rc;
  971. }
  972. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  973. return 0;
  974. }
  975. /* station table will be cleared */
  976. priv->assoc_station_added = 0;
  977. #ifdef CONFIG_IWL4965_SENSITIVITY
  978. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  979. if (!priv->error_recovering)
  980. priv->start_calib = 0;
  981. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  982. #endif /* CONFIG_IWL4965_SENSITIVITY */
  983. /* If we are currently associated and the new config requires
  984. * an RXON_ASSOC and the new config wants the associated mask enabled,
  985. * we must clear the associated from the active configuration
  986. * before we apply the new config */
  987. if (iwl4965_is_associated(priv) &&
  988. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  989. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  990. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  991. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  992. sizeof(struct iwl4965_rxon_cmd),
  993. &priv->active_rxon);
  994. /* If the mask clearing failed then we set
  995. * active_rxon back to what it was previously */
  996. if (rc) {
  997. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  998. IWL_ERROR("Error clearing ASSOC_MSK on current "
  999. "configuration (%d).\n", rc);
  1000. return rc;
  1001. }
  1002. }
  1003. IWL_DEBUG_INFO("Sending RXON\n"
  1004. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1005. "* channel = %d\n"
  1006. "* bssid = %s\n",
  1007. ((priv->staging_rxon.filter_flags &
  1008. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1009. le16_to_cpu(priv->staging_rxon.channel),
  1010. print_mac(mac, priv->staging_rxon.bssid_addr));
  1011. /* Apply the new configuration */
  1012. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1013. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1014. if (rc) {
  1015. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1016. return rc;
  1017. }
  1018. iwl4965_clear_stations_table(priv);
  1019. #ifdef CONFIG_IWL4965_SENSITIVITY
  1020. if (!priv->error_recovering)
  1021. priv->start_calib = 0;
  1022. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1023. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1024. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1025. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1026. /* If we issue a new RXON command which required a tune then we must
  1027. * send a new TXPOWER command or we won't be able to Tx any frames */
  1028. rc = iwl4965_hw_reg_send_txpower(priv);
  1029. if (rc) {
  1030. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1031. return rc;
  1032. }
  1033. /* Add the broadcast address so we can send broadcast frames */
  1034. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1035. IWL_INVALID_STATION) {
  1036. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1037. return -EIO;
  1038. }
  1039. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1040. * add the IWL_AP_ID to the station rate table */
  1041. if (iwl4965_is_associated(priv) &&
  1042. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1043. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1044. == IWL_INVALID_STATION) {
  1045. IWL_ERROR("Error adding AP address for transmit.\n");
  1046. return -EIO;
  1047. }
  1048. priv->assoc_station_added = 1;
  1049. }
  1050. return 0;
  1051. }
  1052. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1053. {
  1054. struct iwl4965_bt_cmd bt_cmd = {
  1055. .flags = 3,
  1056. .lead_time = 0xAA,
  1057. .max_kill = 1,
  1058. .kill_ack_mask = 0,
  1059. .kill_cts_mask = 0,
  1060. };
  1061. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1062. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1063. }
  1064. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1065. {
  1066. int rc = 0;
  1067. struct iwl4965_rx_packet *res;
  1068. struct iwl4965_host_cmd cmd = {
  1069. .id = REPLY_SCAN_ABORT_CMD,
  1070. .meta.flags = CMD_WANT_SKB,
  1071. };
  1072. /* If there isn't a scan actively going on in the hardware
  1073. * then we are in between scan bands and not actually
  1074. * actively scanning, so don't send the abort command */
  1075. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1076. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1077. return 0;
  1078. }
  1079. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1080. if (rc) {
  1081. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1082. return rc;
  1083. }
  1084. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1085. if (res->u.status != CAN_ABORT_STATUS) {
  1086. /* The scan abort will return 1 for success or
  1087. * 2 for "failure". A failure condition can be
  1088. * due to simply not being in an active scan which
  1089. * can occur if we send the scan abort before we
  1090. * the microcode has notified us that a scan is
  1091. * completed. */
  1092. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1093. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1094. clear_bit(STATUS_SCAN_HW, &priv->status);
  1095. }
  1096. dev_kfree_skb_any(cmd.meta.u.skb);
  1097. return rc;
  1098. }
  1099. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1100. struct iwl4965_cmd *cmd,
  1101. struct sk_buff *skb)
  1102. {
  1103. return 1;
  1104. }
  1105. /*
  1106. * CARD_STATE_CMD
  1107. *
  1108. * Use: Sets the device's internal card state to enable, disable, or halt
  1109. *
  1110. * When in the 'enable' state the card operates as normal.
  1111. * When in the 'disable' state, the card enters into a low power mode.
  1112. * When in the 'halt' state, the card is shut down and must be fully
  1113. * restarted to come back on.
  1114. */
  1115. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1116. {
  1117. struct iwl4965_host_cmd cmd = {
  1118. .id = REPLY_CARD_STATE_CMD,
  1119. .len = sizeof(u32),
  1120. .data = &flags,
  1121. .meta.flags = meta_flag,
  1122. };
  1123. if (meta_flag & CMD_ASYNC)
  1124. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1125. return iwl4965_send_cmd(priv, &cmd);
  1126. }
  1127. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1128. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1129. {
  1130. struct iwl4965_rx_packet *res = NULL;
  1131. if (!skb) {
  1132. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1133. return 1;
  1134. }
  1135. res = (struct iwl4965_rx_packet *)skb->data;
  1136. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1137. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1138. res->hdr.flags);
  1139. return 1;
  1140. }
  1141. switch (res->u.add_sta.status) {
  1142. case ADD_STA_SUCCESS_MSK:
  1143. break;
  1144. default:
  1145. break;
  1146. }
  1147. /* We didn't cache the SKB; let the caller free it */
  1148. return 1;
  1149. }
  1150. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1151. struct iwl4965_addsta_cmd *sta, u8 flags)
  1152. {
  1153. struct iwl4965_rx_packet *res = NULL;
  1154. int rc = 0;
  1155. struct iwl4965_host_cmd cmd = {
  1156. .id = REPLY_ADD_STA,
  1157. .len = sizeof(struct iwl4965_addsta_cmd),
  1158. .meta.flags = flags,
  1159. .data = sta,
  1160. };
  1161. if (flags & CMD_ASYNC)
  1162. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1163. else
  1164. cmd.meta.flags |= CMD_WANT_SKB;
  1165. rc = iwl4965_send_cmd(priv, &cmd);
  1166. if (rc || (flags & CMD_ASYNC))
  1167. return rc;
  1168. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1169. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1170. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1171. res->hdr.flags);
  1172. rc = -EIO;
  1173. }
  1174. if (rc == 0) {
  1175. switch (res->u.add_sta.status) {
  1176. case ADD_STA_SUCCESS_MSK:
  1177. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1178. break;
  1179. default:
  1180. rc = -EIO;
  1181. IWL_WARNING("REPLY_ADD_STA failed\n");
  1182. break;
  1183. }
  1184. }
  1185. priv->alloc_rxb_skb--;
  1186. dev_kfree_skb_any(cmd.meta.u.skb);
  1187. return rc;
  1188. }
  1189. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1190. struct ieee80211_key_conf *keyconf,
  1191. u8 sta_id)
  1192. {
  1193. unsigned long flags;
  1194. __le16 key_flags = 0;
  1195. switch (keyconf->alg) {
  1196. case ALG_CCMP:
  1197. key_flags |= STA_KEY_FLG_CCMP;
  1198. key_flags |= cpu_to_le16(
  1199. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1200. key_flags &= ~STA_KEY_FLG_INVALID;
  1201. break;
  1202. case ALG_TKIP:
  1203. case ALG_WEP:
  1204. default:
  1205. return -EINVAL;
  1206. }
  1207. spin_lock_irqsave(&priv->sta_lock, flags);
  1208. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1209. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1210. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1211. keyconf->keylen);
  1212. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1213. keyconf->keylen);
  1214. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1215. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1216. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1217. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1218. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1219. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1220. return 0;
  1221. }
  1222. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1223. {
  1224. unsigned long flags;
  1225. spin_lock_irqsave(&priv->sta_lock, flags);
  1226. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1227. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1228. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1229. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1230. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1231. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1232. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1233. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1234. return 0;
  1235. }
  1236. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1237. {
  1238. struct list_head *element;
  1239. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1240. priv->frames_count);
  1241. while (!list_empty(&priv->free_frames)) {
  1242. element = priv->free_frames.next;
  1243. list_del(element);
  1244. kfree(list_entry(element, struct iwl4965_frame, list));
  1245. priv->frames_count--;
  1246. }
  1247. if (priv->frames_count) {
  1248. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1249. priv->frames_count);
  1250. priv->frames_count = 0;
  1251. }
  1252. }
  1253. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1254. {
  1255. struct iwl4965_frame *frame;
  1256. struct list_head *element;
  1257. if (list_empty(&priv->free_frames)) {
  1258. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1259. if (!frame) {
  1260. IWL_ERROR("Could not allocate frame!\n");
  1261. return NULL;
  1262. }
  1263. priv->frames_count++;
  1264. return frame;
  1265. }
  1266. element = priv->free_frames.next;
  1267. list_del(element);
  1268. return list_entry(element, struct iwl4965_frame, list);
  1269. }
  1270. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1271. {
  1272. memset(frame, 0, sizeof(*frame));
  1273. list_add(&frame->list, &priv->free_frames);
  1274. }
  1275. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1276. struct ieee80211_hdr *hdr,
  1277. const u8 *dest, int left)
  1278. {
  1279. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1280. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1281. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1282. return 0;
  1283. if (priv->ibss_beacon->len > left)
  1284. return 0;
  1285. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1286. return priv->ibss_beacon->len;
  1287. }
  1288. int iwl4965_rate_index_from_plcp(int plcp)
  1289. {
  1290. int i = 0;
  1291. /* 4965 HT rate format */
  1292. if (plcp & RATE_MCS_HT_MSK) {
  1293. i = (plcp & 0xff);
  1294. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1295. i = i - IWL_RATE_MIMO_6M_PLCP;
  1296. i += IWL_FIRST_OFDM_RATE;
  1297. /* skip 9M not supported in ht*/
  1298. if (i >= IWL_RATE_9M_INDEX)
  1299. i += 1;
  1300. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1301. (i <= IWL_LAST_OFDM_RATE))
  1302. return i;
  1303. /* 4965 legacy rate format, search for match in table */
  1304. } else {
  1305. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1306. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1307. return i;
  1308. }
  1309. return -1;
  1310. }
  1311. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1312. {
  1313. u8 i;
  1314. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1315. i = iwl4965_rates[i].next_ieee) {
  1316. if (rate_mask & (1 << i))
  1317. return iwl4965_rates[i].plcp;
  1318. }
  1319. return IWL_RATE_INVALID;
  1320. }
  1321. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1322. {
  1323. struct iwl4965_frame *frame;
  1324. unsigned int frame_size;
  1325. int rc;
  1326. u8 rate;
  1327. frame = iwl4965_get_free_frame(priv);
  1328. if (!frame) {
  1329. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1330. "command.\n");
  1331. return -ENOMEM;
  1332. }
  1333. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1334. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1335. 0xFF0);
  1336. if (rate == IWL_INVALID_RATE)
  1337. rate = IWL_RATE_6M_PLCP;
  1338. } else {
  1339. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1340. if (rate == IWL_INVALID_RATE)
  1341. rate = IWL_RATE_1M_PLCP;
  1342. }
  1343. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1344. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1345. &frame->u.cmd[0]);
  1346. iwl4965_free_frame(priv, frame);
  1347. return rc;
  1348. }
  1349. /******************************************************************************
  1350. *
  1351. * EEPROM related functions
  1352. *
  1353. ******************************************************************************/
  1354. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1355. {
  1356. memcpy(mac, priv->eeprom.mac_address, 6);
  1357. }
  1358. /**
  1359. * iwl4965_eeprom_init - read EEPROM contents
  1360. *
  1361. * Load the EEPROM contents from adapter into priv->eeprom
  1362. *
  1363. * NOTE: This routine uses the non-debug IO access functions.
  1364. */
  1365. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1366. {
  1367. u16 *e = (u16 *)&priv->eeprom;
  1368. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1369. u32 r;
  1370. int sz = sizeof(priv->eeprom);
  1371. int rc;
  1372. int i;
  1373. u16 addr;
  1374. /* The EEPROM structure has several padding buffers within it
  1375. * and when adding new EEPROM maps is subject to programmer errors
  1376. * which may be very difficult to identify without explicitly
  1377. * checking the resulting size of the eeprom map. */
  1378. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1379. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1380. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1381. return -ENOENT;
  1382. }
  1383. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1384. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1385. if (rc < 0) {
  1386. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1387. return -ENOENT;
  1388. }
  1389. /* eeprom is an array of 16bit values */
  1390. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1391. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1392. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1393. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1394. i += IWL_EEPROM_ACCESS_DELAY) {
  1395. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1396. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1397. break;
  1398. udelay(IWL_EEPROM_ACCESS_DELAY);
  1399. }
  1400. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1401. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1402. rc = -ETIMEDOUT;
  1403. goto done;
  1404. }
  1405. e[addr / 2] = le16_to_cpu(r >> 16);
  1406. }
  1407. rc = 0;
  1408. done:
  1409. iwl4965_eeprom_release_semaphore(priv);
  1410. return rc;
  1411. }
  1412. /******************************************************************************
  1413. *
  1414. * Misc. internal state and helper functions
  1415. *
  1416. ******************************************************************************/
  1417. #ifdef CONFIG_IWL4965_DEBUG
  1418. /**
  1419. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1420. *
  1421. * You may hack this function to show different aspects of received frames,
  1422. * including selective frame dumps.
  1423. * group100 parameter selects whether to show 1 out of 100 good frames.
  1424. *
  1425. * TODO: This was originally written for 3945, need to audit for
  1426. * proper operation with 4965.
  1427. */
  1428. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1429. struct iwl4965_rx_packet *pkt,
  1430. struct ieee80211_hdr *header, int group100)
  1431. {
  1432. u32 to_us;
  1433. u32 print_summary = 0;
  1434. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1435. u32 hundred = 0;
  1436. u32 dataframe = 0;
  1437. u16 fc;
  1438. u16 seq_ctl;
  1439. u16 channel;
  1440. u16 phy_flags;
  1441. int rate_sym;
  1442. u16 length;
  1443. u16 status;
  1444. u16 bcn_tmr;
  1445. u32 tsf_low;
  1446. u64 tsf;
  1447. u8 rssi;
  1448. u8 agc;
  1449. u16 sig_avg;
  1450. u16 noise_diff;
  1451. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1452. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1453. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1454. u8 *data = IWL_RX_DATA(pkt);
  1455. /* MAC header */
  1456. fc = le16_to_cpu(header->frame_control);
  1457. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1458. /* metadata */
  1459. channel = le16_to_cpu(rx_hdr->channel);
  1460. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1461. rate_sym = rx_hdr->rate;
  1462. length = le16_to_cpu(rx_hdr->len);
  1463. /* end-of-frame status and timestamp */
  1464. status = le32_to_cpu(rx_end->status);
  1465. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1466. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1467. tsf = le64_to_cpu(rx_end->timestamp);
  1468. /* signal statistics */
  1469. rssi = rx_stats->rssi;
  1470. agc = rx_stats->agc;
  1471. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1472. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1473. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1474. /* if data frame is to us and all is good,
  1475. * (optionally) print summary for only 1 out of every 100 */
  1476. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1477. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1478. dataframe = 1;
  1479. if (!group100)
  1480. print_summary = 1; /* print each frame */
  1481. else if (priv->framecnt_to_us < 100) {
  1482. priv->framecnt_to_us++;
  1483. print_summary = 0;
  1484. } else {
  1485. priv->framecnt_to_us = 0;
  1486. print_summary = 1;
  1487. hundred = 1;
  1488. }
  1489. } else {
  1490. /* print summary for all other frames */
  1491. print_summary = 1;
  1492. }
  1493. if (print_summary) {
  1494. char *title;
  1495. u32 rate;
  1496. if (hundred)
  1497. title = "100Frames";
  1498. else if (fc & IEEE80211_FCTL_RETRY)
  1499. title = "Retry";
  1500. else if (ieee80211_is_assoc_response(fc))
  1501. title = "AscRsp";
  1502. else if (ieee80211_is_reassoc_response(fc))
  1503. title = "RasRsp";
  1504. else if (ieee80211_is_probe_response(fc)) {
  1505. title = "PrbRsp";
  1506. print_dump = 1; /* dump frame contents */
  1507. } else if (ieee80211_is_beacon(fc)) {
  1508. title = "Beacon";
  1509. print_dump = 1; /* dump frame contents */
  1510. } else if (ieee80211_is_atim(fc))
  1511. title = "ATIM";
  1512. else if (ieee80211_is_auth(fc))
  1513. title = "Auth";
  1514. else if (ieee80211_is_deauth(fc))
  1515. title = "DeAuth";
  1516. else if (ieee80211_is_disassoc(fc))
  1517. title = "DisAssoc";
  1518. else
  1519. title = "Frame";
  1520. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1521. if (rate == -1)
  1522. rate = 0;
  1523. else
  1524. rate = iwl4965_rates[rate].ieee / 2;
  1525. /* print frame summary.
  1526. * MAC addresses show just the last byte (for brevity),
  1527. * but you can hack it to show more, if you'd like to. */
  1528. if (dataframe)
  1529. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1530. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1531. title, fc, header->addr1[5],
  1532. length, rssi, channel, rate);
  1533. else {
  1534. /* src/dst addresses assume managed mode */
  1535. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1536. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1537. "phy=0x%02x, chnl=%d\n",
  1538. title, fc, header->addr1[5],
  1539. header->addr3[5], rssi,
  1540. tsf_low - priv->scan_start_tsf,
  1541. phy_flags, channel);
  1542. }
  1543. }
  1544. if (print_dump)
  1545. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1546. }
  1547. #endif
  1548. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1549. {
  1550. if (priv->hw_setting.shared_virt)
  1551. pci_free_consistent(priv->pci_dev,
  1552. sizeof(struct iwl4965_shared),
  1553. priv->hw_setting.shared_virt,
  1554. priv->hw_setting.shared_phys);
  1555. }
  1556. /**
  1557. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1558. *
  1559. * return : set the bit for each supported rate insert in ie
  1560. */
  1561. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1562. u16 basic_rate, int *left)
  1563. {
  1564. u16 ret_rates = 0, bit;
  1565. int i;
  1566. u8 *cnt = ie;
  1567. u8 *rates = ie + 1;
  1568. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1569. if (bit & supported_rate) {
  1570. ret_rates |= bit;
  1571. rates[*cnt] = iwl4965_rates[i].ieee |
  1572. ((bit & basic_rate) ? 0x80 : 0x00);
  1573. (*cnt)++;
  1574. (*left)--;
  1575. if ((*left <= 0) ||
  1576. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1577. break;
  1578. }
  1579. }
  1580. return ret_rates;
  1581. }
  1582. #ifdef CONFIG_IWL4965_HT
  1583. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1584. struct ieee80211_ht_capability *ht_cap,
  1585. u8 use_wide_chan);
  1586. #endif
  1587. /**
  1588. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1589. */
  1590. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1591. struct ieee80211_mgmt *frame,
  1592. int left, int is_direct)
  1593. {
  1594. int len = 0;
  1595. u8 *pos = NULL;
  1596. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1597. /* Make sure there is enough space for the probe request,
  1598. * two mandatory IEs and the data */
  1599. left -= 24;
  1600. if (left < 0)
  1601. return 0;
  1602. len += 24;
  1603. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1604. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1605. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1606. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1607. frame->seq_ctrl = 0;
  1608. /* fill in our indirect SSID IE */
  1609. /* ...next IE... */
  1610. left -= 2;
  1611. if (left < 0)
  1612. return 0;
  1613. len += 2;
  1614. pos = &(frame->u.probe_req.variable[0]);
  1615. *pos++ = WLAN_EID_SSID;
  1616. *pos++ = 0;
  1617. /* fill in our direct SSID IE... */
  1618. if (is_direct) {
  1619. /* ...next IE... */
  1620. left -= 2 + priv->essid_len;
  1621. if (left < 0)
  1622. return 0;
  1623. /* ... fill it in... */
  1624. *pos++ = WLAN_EID_SSID;
  1625. *pos++ = priv->essid_len;
  1626. memcpy(pos, priv->essid, priv->essid_len);
  1627. pos += priv->essid_len;
  1628. len += 2 + priv->essid_len;
  1629. }
  1630. /* fill in supported rate */
  1631. /* ...next IE... */
  1632. left -= 2;
  1633. if (left < 0)
  1634. return 0;
  1635. /* ... fill it in... */
  1636. *pos++ = WLAN_EID_SUPP_RATES;
  1637. *pos = 0;
  1638. /* exclude 60M rate */
  1639. active_rates = priv->rates_mask;
  1640. active_rates &= ~IWL_RATE_60M_MASK;
  1641. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1642. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1643. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1644. active_rate_basic, &left);
  1645. active_rates &= ~ret_rates;
  1646. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1647. active_rate_basic, &left);
  1648. active_rates &= ~ret_rates;
  1649. len += 2 + *pos;
  1650. pos += (*pos) + 1;
  1651. if (active_rates == 0)
  1652. goto fill_end;
  1653. /* fill in supported extended rate */
  1654. /* ...next IE... */
  1655. left -= 2;
  1656. if (left < 0)
  1657. return 0;
  1658. /* ... fill it in... */
  1659. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1660. *pos = 0;
  1661. iwl4965_supported_rate_to_ie(pos, active_rates,
  1662. active_rate_basic, &left);
  1663. if (*pos > 0)
  1664. len += 2 + *pos;
  1665. #ifdef CONFIG_IWL4965_HT
  1666. if (is_direct && priv->is_ht_enabled) {
  1667. u8 use_wide_chan = 1;
  1668. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1669. use_wide_chan = 0;
  1670. pos += (*pos) + 1;
  1671. *pos++ = WLAN_EID_HT_CAPABILITY;
  1672. *pos++ = sizeof(struct ieee80211_ht_capability);
  1673. iwl4965_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1674. use_wide_chan);
  1675. len += 2 + sizeof(struct ieee80211_ht_capability);
  1676. }
  1677. #endif /*CONFIG_IWL4965_HT */
  1678. fill_end:
  1679. return (u16)len;
  1680. }
  1681. /*
  1682. * QoS support
  1683. */
  1684. #ifdef CONFIG_IWL4965_QOS
  1685. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1686. struct iwl4965_qosparam_cmd *qos)
  1687. {
  1688. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1689. sizeof(struct iwl4965_qosparam_cmd), qos);
  1690. }
  1691. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1692. {
  1693. u16 cw_min = 15;
  1694. u16 cw_max = 1023;
  1695. u8 aifs = 2;
  1696. u8 is_legacy = 0;
  1697. unsigned long flags;
  1698. int i;
  1699. spin_lock_irqsave(&priv->lock, flags);
  1700. priv->qos_data.qos_active = 0;
  1701. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1702. if (priv->qos_data.qos_enable)
  1703. priv->qos_data.qos_active = 1;
  1704. if (!(priv->active_rate & 0xfff0)) {
  1705. cw_min = 31;
  1706. is_legacy = 1;
  1707. }
  1708. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1709. if (priv->qos_data.qos_enable)
  1710. priv->qos_data.qos_active = 1;
  1711. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1712. cw_min = 31;
  1713. is_legacy = 1;
  1714. }
  1715. if (priv->qos_data.qos_active)
  1716. aifs = 3;
  1717. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1718. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1719. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1720. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1721. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1722. if (priv->qos_data.qos_active) {
  1723. i = 1;
  1724. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1725. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1726. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1727. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1728. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1729. i = 2;
  1730. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1731. cpu_to_le16((cw_min + 1) / 2 - 1);
  1732. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1733. cpu_to_le16(cw_max);
  1734. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1735. if (is_legacy)
  1736. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1737. cpu_to_le16(6016);
  1738. else
  1739. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1740. cpu_to_le16(3008);
  1741. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1742. i = 3;
  1743. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1744. cpu_to_le16((cw_min + 1) / 4 - 1);
  1745. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1746. cpu_to_le16((cw_max + 1) / 2 - 1);
  1747. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1748. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1749. if (is_legacy)
  1750. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1751. cpu_to_le16(3264);
  1752. else
  1753. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1754. cpu_to_le16(1504);
  1755. } else {
  1756. for (i = 1; i < 4; i++) {
  1757. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1758. cpu_to_le16(cw_min);
  1759. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1760. cpu_to_le16(cw_max);
  1761. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1762. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1763. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1764. }
  1765. }
  1766. IWL_DEBUG_QOS("set QoS to default \n");
  1767. spin_unlock_irqrestore(&priv->lock, flags);
  1768. }
  1769. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1770. {
  1771. unsigned long flags;
  1772. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1773. return;
  1774. if (!priv->qos_data.qos_enable)
  1775. return;
  1776. spin_lock_irqsave(&priv->lock, flags);
  1777. priv->qos_data.def_qos_parm.qos_flags = 0;
  1778. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1779. !priv->qos_data.qos_cap.q_AP.txop_request)
  1780. priv->qos_data.def_qos_parm.qos_flags |=
  1781. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1782. if (priv->qos_data.qos_active)
  1783. priv->qos_data.def_qos_parm.qos_flags |=
  1784. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1785. #ifdef CONFIG_IWL4965_HT
  1786. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  1787. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1788. #endif /* CONFIG_IWL4965_HT */
  1789. spin_unlock_irqrestore(&priv->lock, flags);
  1790. if (force || iwl4965_is_associated(priv)) {
  1791. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1792. priv->qos_data.qos_active,
  1793. priv->qos_data.def_qos_parm.qos_flags);
  1794. iwl4965_send_qos_params_command(priv,
  1795. &(priv->qos_data.def_qos_parm));
  1796. }
  1797. }
  1798. #endif /* CONFIG_IWL4965_QOS */
  1799. /*
  1800. * Power management (not Tx power!) functions
  1801. */
  1802. #define MSEC_TO_USEC 1024
  1803. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1804. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1805. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1806. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1807. __constant_cpu_to_le32(X1), \
  1808. __constant_cpu_to_le32(X2), \
  1809. __constant_cpu_to_le32(X3), \
  1810. __constant_cpu_to_le32(X4)}
  1811. /* default power management (not Tx power) table values */
  1812. /* for tim 0-10 */
  1813. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1814. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1815. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1816. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1817. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1818. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1819. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1820. };
  1821. /* for tim > 10 */
  1822. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1823. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1824. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1825. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1826. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1827. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1828. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1829. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1830. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1831. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1832. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1833. };
  1834. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1835. {
  1836. int rc = 0, i;
  1837. struct iwl4965_power_mgr *pow_data;
  1838. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1839. u16 pci_pm;
  1840. IWL_DEBUG_POWER("Initialize power \n");
  1841. pow_data = &(priv->power_data);
  1842. memset(pow_data, 0, sizeof(*pow_data));
  1843. pow_data->active_index = IWL_POWER_RANGE_0;
  1844. pow_data->dtim_val = 0xffff;
  1845. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1846. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1847. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1848. if (rc != 0)
  1849. return 0;
  1850. else {
  1851. struct iwl4965_powertable_cmd *cmd;
  1852. IWL_DEBUG_POWER("adjust power command flags\n");
  1853. for (i = 0; i < IWL_POWER_AC; i++) {
  1854. cmd = &pow_data->pwr_range_0[i].cmd;
  1855. if (pci_pm & 0x1)
  1856. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1857. else
  1858. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1859. }
  1860. }
  1861. return rc;
  1862. }
  1863. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1864. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1865. {
  1866. int rc = 0, i;
  1867. u8 skip;
  1868. u32 max_sleep = 0;
  1869. struct iwl4965_power_vec_entry *range;
  1870. u8 period = 0;
  1871. struct iwl4965_power_mgr *pow_data;
  1872. if (mode > IWL_POWER_INDEX_5) {
  1873. IWL_DEBUG_POWER("Error invalid power mode \n");
  1874. return -1;
  1875. }
  1876. pow_data = &(priv->power_data);
  1877. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1878. range = &pow_data->pwr_range_0[0];
  1879. else
  1880. range = &pow_data->pwr_range_1[1];
  1881. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1882. #ifdef IWL_MAC80211_DISABLE
  1883. if (priv->assoc_network != NULL) {
  1884. unsigned long flags;
  1885. period = priv->assoc_network->tim.tim_period;
  1886. }
  1887. #endif /*IWL_MAC80211_DISABLE */
  1888. skip = range[mode].no_dtim;
  1889. if (period == 0) {
  1890. period = 1;
  1891. skip = 0;
  1892. }
  1893. if (skip == 0) {
  1894. max_sleep = period;
  1895. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1896. } else {
  1897. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1898. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1899. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1900. }
  1901. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1902. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1903. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1904. }
  1905. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1906. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1907. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1908. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1909. le32_to_cpu(cmd->sleep_interval[0]),
  1910. le32_to_cpu(cmd->sleep_interval[1]),
  1911. le32_to_cpu(cmd->sleep_interval[2]),
  1912. le32_to_cpu(cmd->sleep_interval[3]),
  1913. le32_to_cpu(cmd->sleep_interval[4]));
  1914. return rc;
  1915. }
  1916. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1917. {
  1918. u32 uninitialized_var(final_mode);
  1919. int rc;
  1920. struct iwl4965_powertable_cmd cmd;
  1921. /* If on battery, set to 3,
  1922. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1923. * else user level */
  1924. switch (mode) {
  1925. case IWL_POWER_BATTERY:
  1926. final_mode = IWL_POWER_INDEX_3;
  1927. break;
  1928. case IWL_POWER_AC:
  1929. final_mode = IWL_POWER_MODE_CAM;
  1930. break;
  1931. default:
  1932. final_mode = mode;
  1933. break;
  1934. }
  1935. cmd.keep_alive_beacons = 0;
  1936. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1937. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1938. if (final_mode == IWL_POWER_MODE_CAM)
  1939. clear_bit(STATUS_POWER_PMI, &priv->status);
  1940. else
  1941. set_bit(STATUS_POWER_PMI, &priv->status);
  1942. return rc;
  1943. }
  1944. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1945. {
  1946. /* Filter incoming packets to determine if they are targeted toward
  1947. * this network, discarding packets coming from ourselves */
  1948. switch (priv->iw_mode) {
  1949. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1950. /* packets from our adapter are dropped (echo) */
  1951. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1952. return 0;
  1953. /* {broad,multi}cast packets to our IBSS go through */
  1954. if (is_multicast_ether_addr(header->addr1))
  1955. return !compare_ether_addr(header->addr3, priv->bssid);
  1956. /* packets to our adapter go through */
  1957. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1958. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1959. /* packets from our adapter are dropped (echo) */
  1960. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1961. return 0;
  1962. /* {broad,multi}cast packets to our BSS go through */
  1963. if (is_multicast_ether_addr(header->addr1))
  1964. return !compare_ether_addr(header->addr2, priv->bssid);
  1965. /* packets to our adapter go through */
  1966. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1967. }
  1968. return 1;
  1969. }
  1970. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1971. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1972. {
  1973. switch (status & TX_STATUS_MSK) {
  1974. case TX_STATUS_SUCCESS:
  1975. return "SUCCESS";
  1976. TX_STATUS_ENTRY(SHORT_LIMIT);
  1977. TX_STATUS_ENTRY(LONG_LIMIT);
  1978. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1979. TX_STATUS_ENTRY(MGMNT_ABORT);
  1980. TX_STATUS_ENTRY(NEXT_FRAG);
  1981. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1982. TX_STATUS_ENTRY(DEST_PS);
  1983. TX_STATUS_ENTRY(ABORTED);
  1984. TX_STATUS_ENTRY(BT_RETRY);
  1985. TX_STATUS_ENTRY(STA_INVALID);
  1986. TX_STATUS_ENTRY(FRAG_DROPPED);
  1987. TX_STATUS_ENTRY(TID_DISABLE);
  1988. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1989. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1990. TX_STATUS_ENTRY(TX_LOCKED);
  1991. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1992. }
  1993. return "UNKNOWN";
  1994. }
  1995. /**
  1996. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1997. *
  1998. * NOTE: priv->mutex is not required before calling this function
  1999. */
  2000. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2001. {
  2002. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2003. clear_bit(STATUS_SCANNING, &priv->status);
  2004. return 0;
  2005. }
  2006. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2007. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2008. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2009. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2010. queue_work(priv->workqueue, &priv->abort_scan);
  2011. } else
  2012. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2013. return test_bit(STATUS_SCANNING, &priv->status);
  2014. }
  2015. return 0;
  2016. }
  2017. /**
  2018. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2019. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2020. *
  2021. * NOTE: priv->mutex must be held before calling this function
  2022. */
  2023. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2024. {
  2025. unsigned long now = jiffies;
  2026. int ret;
  2027. ret = iwl4965_scan_cancel(priv);
  2028. if (ret && ms) {
  2029. mutex_unlock(&priv->mutex);
  2030. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2031. test_bit(STATUS_SCANNING, &priv->status))
  2032. msleep(1);
  2033. mutex_lock(&priv->mutex);
  2034. return test_bit(STATUS_SCANNING, &priv->status);
  2035. }
  2036. return ret;
  2037. }
  2038. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2039. {
  2040. /* Reset ieee stats */
  2041. /* We don't reset the net_device_stats (ieee->stats) on
  2042. * re-association */
  2043. priv->last_seq_num = -1;
  2044. priv->last_frag_num = -1;
  2045. priv->last_packet_time = 0;
  2046. iwl4965_scan_cancel(priv);
  2047. }
  2048. #define MAX_UCODE_BEACON_INTERVAL 4096
  2049. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2050. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2051. {
  2052. u16 new_val = 0;
  2053. u16 beacon_factor = 0;
  2054. beacon_factor =
  2055. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2056. / MAX_UCODE_BEACON_INTERVAL;
  2057. new_val = beacon_val / beacon_factor;
  2058. return cpu_to_le16(new_val);
  2059. }
  2060. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2061. {
  2062. u64 interval_tm_unit;
  2063. u64 tsf, result;
  2064. unsigned long flags;
  2065. struct ieee80211_conf *conf = NULL;
  2066. u16 beacon_int = 0;
  2067. conf = ieee80211_get_hw_conf(priv->hw);
  2068. spin_lock_irqsave(&priv->lock, flags);
  2069. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2070. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2071. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2072. tsf = priv->timestamp1;
  2073. tsf = ((tsf << 32) | priv->timestamp0);
  2074. beacon_int = priv->beacon_int;
  2075. spin_unlock_irqrestore(&priv->lock, flags);
  2076. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2077. if (beacon_int == 0) {
  2078. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2079. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2080. } else {
  2081. priv->rxon_timing.beacon_interval =
  2082. cpu_to_le16(beacon_int);
  2083. priv->rxon_timing.beacon_interval =
  2084. iwl4965_adjust_beacon_interval(
  2085. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2086. }
  2087. priv->rxon_timing.atim_window = 0;
  2088. } else {
  2089. priv->rxon_timing.beacon_interval =
  2090. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2091. /* TODO: we need to get atim_window from upper stack
  2092. * for now we set to 0 */
  2093. priv->rxon_timing.atim_window = 0;
  2094. }
  2095. interval_tm_unit =
  2096. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2097. result = do_div(tsf, interval_tm_unit);
  2098. priv->rxon_timing.beacon_init_val =
  2099. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2100. IWL_DEBUG_ASSOC
  2101. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2102. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2103. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2104. le16_to_cpu(priv->rxon_timing.atim_window));
  2105. }
  2106. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2107. {
  2108. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2109. IWL_ERROR("APs don't scan.\n");
  2110. return 0;
  2111. }
  2112. if (!iwl4965_is_ready_rf(priv)) {
  2113. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2114. return -EIO;
  2115. }
  2116. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2117. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2118. return -EAGAIN;
  2119. }
  2120. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2121. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2122. "Queuing.\n");
  2123. return -EAGAIN;
  2124. }
  2125. IWL_DEBUG_INFO("Starting scan...\n");
  2126. priv->scan_bands = 2;
  2127. set_bit(STATUS_SCANNING, &priv->status);
  2128. priv->scan_start = jiffies;
  2129. priv->scan_pass_start = priv->scan_start;
  2130. queue_work(priv->workqueue, &priv->request_scan);
  2131. return 0;
  2132. }
  2133. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2134. {
  2135. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2136. if (hw_decrypt)
  2137. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2138. else
  2139. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2140. return 0;
  2141. }
  2142. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2143. {
  2144. if (phymode == MODE_IEEE80211A) {
  2145. priv->staging_rxon.flags &=
  2146. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2147. | RXON_FLG_CCK_MSK);
  2148. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2149. } else {
  2150. /* Copied from iwl4965_bg_post_associate() */
  2151. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2152. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2153. else
  2154. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2155. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2156. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2157. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2158. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2159. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2160. }
  2161. }
  2162. /*
  2163. * initialize rxon structure with default values from eeprom
  2164. */
  2165. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2166. {
  2167. const struct iwl4965_channel_info *ch_info;
  2168. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2169. switch (priv->iw_mode) {
  2170. case IEEE80211_IF_TYPE_AP:
  2171. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2172. break;
  2173. case IEEE80211_IF_TYPE_STA:
  2174. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2175. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2176. break;
  2177. case IEEE80211_IF_TYPE_IBSS:
  2178. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2179. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2180. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2181. RXON_FILTER_ACCEPT_GRP_MSK;
  2182. break;
  2183. case IEEE80211_IF_TYPE_MNTR:
  2184. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2185. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2186. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2187. break;
  2188. }
  2189. #if 0
  2190. /* TODO: Figure out when short_preamble would be set and cache from
  2191. * that */
  2192. if (!hw_to_local(priv->hw)->short_preamble)
  2193. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2194. else
  2195. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2196. #endif
  2197. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2198. le16_to_cpu(priv->staging_rxon.channel));
  2199. if (!ch_info)
  2200. ch_info = &priv->channel_info[0];
  2201. /*
  2202. * in some case A channels are all non IBSS
  2203. * in this case force B/G channel
  2204. */
  2205. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2206. !(is_channel_ibss(ch_info)))
  2207. ch_info = &priv->channel_info[0];
  2208. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2209. if (is_channel_a_band(ch_info))
  2210. priv->phymode = MODE_IEEE80211A;
  2211. else
  2212. priv->phymode = MODE_IEEE80211G;
  2213. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2214. priv->staging_rxon.ofdm_basic_rates =
  2215. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2216. priv->staging_rxon.cck_basic_rates =
  2217. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2218. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2219. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2220. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2221. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2222. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2223. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2224. iwl4965_set_rxon_chain(priv);
  2225. }
  2226. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2227. {
  2228. if (!iwl4965_is_ready_rf(priv))
  2229. return -EAGAIN;
  2230. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2231. const struct iwl4965_channel_info *ch_info;
  2232. ch_info = iwl4965_get_channel_info(priv,
  2233. priv->phymode,
  2234. le16_to_cpu(priv->staging_rxon.channel));
  2235. if (!ch_info || !is_channel_ibss(ch_info)) {
  2236. IWL_ERROR("channel %d not IBSS channel\n",
  2237. le16_to_cpu(priv->staging_rxon.channel));
  2238. return -EINVAL;
  2239. }
  2240. }
  2241. cancel_delayed_work(&priv->scan_check);
  2242. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2243. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2244. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2245. return -EAGAIN;
  2246. }
  2247. priv->iw_mode = mode;
  2248. iwl4965_connection_init_rx_config(priv);
  2249. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2250. iwl4965_clear_stations_table(priv);
  2251. iwl4965_commit_rxon(priv);
  2252. return 0;
  2253. }
  2254. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2255. struct ieee80211_tx_control *ctl,
  2256. struct iwl4965_cmd *cmd,
  2257. struct sk_buff *skb_frag,
  2258. int last_frag)
  2259. {
  2260. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2261. switch (keyinfo->alg) {
  2262. case ALG_CCMP:
  2263. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2264. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2265. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2266. break;
  2267. case ALG_TKIP:
  2268. #if 0
  2269. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2270. if (last_frag)
  2271. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2272. 8);
  2273. else
  2274. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2275. #endif
  2276. break;
  2277. case ALG_WEP:
  2278. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2279. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2280. if (keyinfo->keylen == 13)
  2281. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2282. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2283. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2284. "with key %d\n", ctl->key_idx);
  2285. break;
  2286. default:
  2287. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2288. break;
  2289. }
  2290. }
  2291. /*
  2292. * handle build REPLY_TX command notification.
  2293. */
  2294. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2295. struct iwl4965_cmd *cmd,
  2296. struct ieee80211_tx_control *ctrl,
  2297. struct ieee80211_hdr *hdr,
  2298. int is_unicast, u8 std_id)
  2299. {
  2300. __le16 *qc;
  2301. u16 fc = le16_to_cpu(hdr->frame_control);
  2302. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2303. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2304. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2305. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2306. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2307. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2308. if (ieee80211_is_probe_response(fc) &&
  2309. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2310. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2311. } else {
  2312. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2313. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2314. }
  2315. cmd->cmd.tx.sta_id = std_id;
  2316. if (ieee80211_get_morefrag(hdr))
  2317. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2318. qc = ieee80211_get_qos_ctrl(hdr);
  2319. if (qc) {
  2320. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2321. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2322. } else
  2323. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2324. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2325. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2326. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2327. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2328. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2329. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2330. }
  2331. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2332. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2333. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2334. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2335. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2336. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2337. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2338. else
  2339. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2340. } else
  2341. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2342. cmd->cmd.tx.driver_txop = 0;
  2343. cmd->cmd.tx.tx_flags = tx_flags;
  2344. cmd->cmd.tx.next_frame_len = 0;
  2345. }
  2346. /**
  2347. * iwl4965_get_sta_id - Find station's index within station table
  2348. *
  2349. * If new IBSS station, create new entry in station table
  2350. */
  2351. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2352. struct ieee80211_hdr *hdr)
  2353. {
  2354. int sta_id;
  2355. u16 fc = le16_to_cpu(hdr->frame_control);
  2356. DECLARE_MAC_BUF(mac);
  2357. /* If this frame is broadcast or management, use broadcast station id */
  2358. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2359. is_multicast_ether_addr(hdr->addr1))
  2360. return priv->hw_setting.bcast_sta_id;
  2361. switch (priv->iw_mode) {
  2362. /* If we are a client station in a BSS network, use the special
  2363. * AP station entry (that's the only station we communicate with) */
  2364. case IEEE80211_IF_TYPE_STA:
  2365. return IWL_AP_ID;
  2366. /* If we are an AP, then find the station, or use BCAST */
  2367. case IEEE80211_IF_TYPE_AP:
  2368. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2369. if (sta_id != IWL_INVALID_STATION)
  2370. return sta_id;
  2371. return priv->hw_setting.bcast_sta_id;
  2372. /* If this frame is going out to an IBSS network, find the station,
  2373. * or create a new station table entry */
  2374. case IEEE80211_IF_TYPE_IBSS:
  2375. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2376. if (sta_id != IWL_INVALID_STATION)
  2377. return sta_id;
  2378. /* Create new station table entry */
  2379. sta_id = iwl4965_add_station_flags(priv, hdr->addr1, 0, CMD_ASYNC);
  2380. if (sta_id != IWL_INVALID_STATION)
  2381. return sta_id;
  2382. IWL_DEBUG_DROP("Station %s not in station map. "
  2383. "Defaulting to broadcast...\n",
  2384. print_mac(mac, hdr->addr1));
  2385. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2386. return priv->hw_setting.bcast_sta_id;
  2387. default:
  2388. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2389. return priv->hw_setting.bcast_sta_id;
  2390. }
  2391. }
  2392. /*
  2393. * start REPLY_TX command process
  2394. */
  2395. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2396. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2397. {
  2398. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2399. struct iwl4965_tfd_frame *tfd;
  2400. u32 *control_flags;
  2401. int txq_id = ctl->queue;
  2402. struct iwl4965_tx_queue *txq = NULL;
  2403. struct iwl4965_queue *q = NULL;
  2404. dma_addr_t phys_addr;
  2405. dma_addr_t txcmd_phys;
  2406. struct iwl4965_cmd *out_cmd = NULL;
  2407. u16 len, idx, len_org;
  2408. u8 id, hdr_len, unicast;
  2409. u8 sta_id;
  2410. u16 seq_number = 0;
  2411. u16 fc;
  2412. __le16 *qc;
  2413. u8 wait_write_ptr = 0;
  2414. unsigned long flags;
  2415. int rc;
  2416. spin_lock_irqsave(&priv->lock, flags);
  2417. if (iwl4965_is_rfkill(priv)) {
  2418. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2419. goto drop_unlock;
  2420. }
  2421. if (!priv->interface_id) {
  2422. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2423. goto drop_unlock;
  2424. }
  2425. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2426. IWL_ERROR("ERROR: No TX rate available.\n");
  2427. goto drop_unlock;
  2428. }
  2429. unicast = !is_multicast_ether_addr(hdr->addr1);
  2430. id = 0;
  2431. fc = le16_to_cpu(hdr->frame_control);
  2432. #ifdef CONFIG_IWL4965_DEBUG
  2433. if (ieee80211_is_auth(fc))
  2434. IWL_DEBUG_TX("Sending AUTH frame\n");
  2435. else if (ieee80211_is_assoc_request(fc))
  2436. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2437. else if (ieee80211_is_reassoc_request(fc))
  2438. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2439. #endif
  2440. /* drop all data frame if we are not associated */
  2441. if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
  2442. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2443. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2444. goto drop_unlock;
  2445. }
  2446. spin_unlock_irqrestore(&priv->lock, flags);
  2447. hdr_len = ieee80211_get_hdrlen(fc);
  2448. /* Find (or create) index into station table for destination station */
  2449. sta_id = iwl4965_get_sta_id(priv, hdr);
  2450. if (sta_id == IWL_INVALID_STATION) {
  2451. DECLARE_MAC_BUF(mac);
  2452. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2453. print_mac(mac, hdr->addr1));
  2454. goto drop;
  2455. }
  2456. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2457. qc = ieee80211_get_qos_ctrl(hdr);
  2458. if (qc) {
  2459. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2460. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2461. IEEE80211_SCTL_SEQ;
  2462. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2463. (hdr->seq_ctrl &
  2464. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2465. seq_number += 0x10;
  2466. #ifdef CONFIG_IWL4965_HT
  2467. #ifdef CONFIG_IWL4965_HT_AGG
  2468. /* aggregation is on for this <sta,tid> */
  2469. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2470. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2471. #endif /* CONFIG_IWL4965_HT_AGG */
  2472. #endif /* CONFIG_IWL4965_HT */
  2473. }
  2474. /* Descriptor for chosen Tx queue */
  2475. txq = &priv->txq[txq_id];
  2476. q = &txq->q;
  2477. spin_lock_irqsave(&priv->lock, flags);
  2478. /* Set up first empty TFD within this queue's circular TFD buffer */
  2479. tfd = &txq->bd[q->write_ptr];
  2480. memset(tfd, 0, sizeof(*tfd));
  2481. control_flags = (u32 *) tfd;
  2482. idx = get_cmd_index(q, q->write_ptr, 0);
  2483. /* Set up driver data for this TFD */
  2484. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2485. txq->txb[q->write_ptr].skb[0] = skb;
  2486. memcpy(&(txq->txb[q->write_ptr].status.control),
  2487. ctl, sizeof(struct ieee80211_tx_control));
  2488. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2489. out_cmd = &txq->cmd[idx];
  2490. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2491. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2492. /*
  2493. * Set up the Tx-command (not MAC!) header.
  2494. * Store the chosen Tx queue and TFD index within the sequence field;
  2495. * after Tx, uCode's Tx response will return this value so driver can
  2496. * locate the frame within the tx queue and do post-tx processing.
  2497. */
  2498. out_cmd->hdr.cmd = REPLY_TX;
  2499. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2500. INDEX_TO_SEQ(q->write_ptr)));
  2501. /* Copy MAC header from skb into command buffer */
  2502. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2503. /*
  2504. * Use the first empty entry in this queue's command buffer array
  2505. * to contain the Tx command and MAC header concatenated together
  2506. * (payload data will be in another buffer).
  2507. * Size of this varies, due to varying MAC header length.
  2508. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2509. * of the MAC header (device reads on dword boundaries).
  2510. * We'll tell device about this padding later.
  2511. */
  2512. len = priv->hw_setting.tx_cmd_len +
  2513. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2514. len_org = len;
  2515. len = (len + 3) & ~3;
  2516. if (len_org != len)
  2517. len_org = 1;
  2518. else
  2519. len_org = 0;
  2520. /* Physical address of this Tx command's header (not MAC header!),
  2521. * within command buffer array. */
  2522. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2523. offsetof(struct iwl4965_cmd, hdr);
  2524. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2525. * first entry */
  2526. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2527. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2528. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2529. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2530. * if any (802.11 null frames have no payload). */
  2531. len = skb->len - hdr_len;
  2532. if (len) {
  2533. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2534. len, PCI_DMA_TODEVICE);
  2535. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2536. }
  2537. /* Tell 4965 about any 2-byte padding after MAC header */
  2538. if (len_org)
  2539. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2540. /* Total # bytes to be transmitted */
  2541. len = (u16)skb->len;
  2542. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2543. /* TODO need this for burst mode later on */
  2544. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2545. /* set is_hcca to 0; it probably will never be implemented */
  2546. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2547. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2548. hdr, hdr_len, ctl, NULL);
  2549. if (!ieee80211_get_morefrag(hdr)) {
  2550. txq->need_update = 1;
  2551. if (qc) {
  2552. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2553. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2554. }
  2555. } else {
  2556. wait_write_ptr = 1;
  2557. txq->need_update = 0;
  2558. }
  2559. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2560. sizeof(out_cmd->cmd.tx));
  2561. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2562. ieee80211_get_hdrlen(fc));
  2563. /* Set up entry for this TFD in Tx byte-count array */
  2564. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2565. /* Tell device the write index *just past* this latest filled TFD */
  2566. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2567. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2568. spin_unlock_irqrestore(&priv->lock, flags);
  2569. if (rc)
  2570. return rc;
  2571. if ((iwl4965_queue_space(q) < q->high_mark)
  2572. && priv->mac80211_registered) {
  2573. if (wait_write_ptr) {
  2574. spin_lock_irqsave(&priv->lock, flags);
  2575. txq->need_update = 1;
  2576. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2577. spin_unlock_irqrestore(&priv->lock, flags);
  2578. }
  2579. ieee80211_stop_queue(priv->hw, ctl->queue);
  2580. }
  2581. return 0;
  2582. drop_unlock:
  2583. spin_unlock_irqrestore(&priv->lock, flags);
  2584. drop:
  2585. return -1;
  2586. }
  2587. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2588. {
  2589. const struct ieee80211_hw_mode *hw = NULL;
  2590. struct ieee80211_rate *rate;
  2591. int i;
  2592. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2593. if (!hw) {
  2594. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2595. return;
  2596. }
  2597. priv->active_rate = 0;
  2598. priv->active_rate_basic = 0;
  2599. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2600. hw->mode == MODE_IEEE80211A ?
  2601. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2602. for (i = 0; i < hw->num_rates; i++) {
  2603. rate = &(hw->rates[i]);
  2604. if ((rate->val < IWL_RATE_COUNT) &&
  2605. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2606. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2607. rate->val, iwl4965_rates[rate->val].plcp,
  2608. (rate->flags & IEEE80211_RATE_BASIC) ?
  2609. "*" : "");
  2610. priv->active_rate |= (1 << rate->val);
  2611. if (rate->flags & IEEE80211_RATE_BASIC)
  2612. priv->active_rate_basic |= (1 << rate->val);
  2613. } else
  2614. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2615. rate->val, iwl4965_rates[rate->val].plcp);
  2616. }
  2617. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2618. priv->active_rate, priv->active_rate_basic);
  2619. /*
  2620. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2621. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2622. * OFDM
  2623. */
  2624. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2625. priv->staging_rxon.cck_basic_rates =
  2626. ((priv->active_rate_basic &
  2627. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2628. else
  2629. priv->staging_rxon.cck_basic_rates =
  2630. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2631. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2632. priv->staging_rxon.ofdm_basic_rates =
  2633. ((priv->active_rate_basic &
  2634. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2635. IWL_FIRST_OFDM_RATE) & 0xFF;
  2636. else
  2637. priv->staging_rxon.ofdm_basic_rates =
  2638. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2639. }
  2640. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2641. {
  2642. unsigned long flags;
  2643. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2644. return;
  2645. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2646. disable_radio ? "OFF" : "ON");
  2647. if (disable_radio) {
  2648. iwl4965_scan_cancel(priv);
  2649. /* FIXME: This is a workaround for AP */
  2650. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2651. spin_lock_irqsave(&priv->lock, flags);
  2652. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2653. CSR_UCODE_SW_BIT_RFKILL);
  2654. spin_unlock_irqrestore(&priv->lock, flags);
  2655. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2656. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2657. }
  2658. return;
  2659. }
  2660. spin_lock_irqsave(&priv->lock, flags);
  2661. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2662. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2663. spin_unlock_irqrestore(&priv->lock, flags);
  2664. /* wake up ucode */
  2665. msleep(10);
  2666. spin_lock_irqsave(&priv->lock, flags);
  2667. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2668. if (!iwl4965_grab_nic_access(priv))
  2669. iwl4965_release_nic_access(priv);
  2670. spin_unlock_irqrestore(&priv->lock, flags);
  2671. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2672. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2673. "disabled by HW switch\n");
  2674. return;
  2675. }
  2676. queue_work(priv->workqueue, &priv->restart);
  2677. return;
  2678. }
  2679. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2680. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2681. {
  2682. u16 fc =
  2683. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2684. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2685. return;
  2686. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2687. return;
  2688. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2689. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2690. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2691. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2692. RX_RES_STATUS_BAD_ICV_MIC)
  2693. stats->flag |= RX_FLAG_MMIC_ERROR;
  2694. case RX_RES_STATUS_SEC_TYPE_WEP:
  2695. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2696. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2697. RX_RES_STATUS_DECRYPT_OK) {
  2698. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2699. stats->flag |= RX_FLAG_DECRYPTED;
  2700. }
  2701. break;
  2702. default:
  2703. break;
  2704. }
  2705. }
  2706. void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
  2707. struct iwl4965_rx_mem_buffer *rxb,
  2708. void *data, short len,
  2709. struct ieee80211_rx_status *stats,
  2710. u16 phy_flags)
  2711. {
  2712. struct iwl4965_rt_rx_hdr *iwl4965_rt;
  2713. /* First cache any information we need before we overwrite
  2714. * the information provided in the skb from the hardware */
  2715. s8 signal = stats->ssi;
  2716. s8 noise = 0;
  2717. int rate = stats->rate;
  2718. u64 tsf = stats->mactime;
  2719. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2720. /* We received data from the HW, so stop the watchdog */
  2721. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl4965_rt)) {
  2722. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2723. return;
  2724. }
  2725. /* copy the frame data to write after where the radiotap header goes */
  2726. iwl4965_rt = (void *)rxb->skb->data;
  2727. memmove(iwl4965_rt->payload, data, len);
  2728. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2729. iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2730. /* total header + data */
  2731. iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt));
  2732. /* Set the size of the skb to the size of the frame */
  2733. skb_put(rxb->skb, sizeof(*iwl4965_rt) + len);
  2734. /* Big bitfield of all the fields we provide in radiotap */
  2735. iwl4965_rt->rt_hdr.it_present =
  2736. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2737. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2738. (1 << IEEE80211_RADIOTAP_RATE) |
  2739. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2740. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2741. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2742. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2743. /* Zero the flags, we'll add to them as we go */
  2744. iwl4965_rt->rt_flags = 0;
  2745. iwl4965_rt->rt_tsf = cpu_to_le64(tsf);
  2746. /* Convert to dBm */
  2747. iwl4965_rt->rt_dbmsignal = signal;
  2748. iwl4965_rt->rt_dbmnoise = noise;
  2749. /* Convert the channel frequency and set the flags */
  2750. iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2751. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2752. iwl4965_rt->rt_chbitmask =
  2753. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2754. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2755. iwl4965_rt->rt_chbitmask =
  2756. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2757. else /* 802.11g */
  2758. iwl4965_rt->rt_chbitmask =
  2759. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2760. rate = iwl4965_rate_index_from_plcp(rate);
  2761. if (rate == -1)
  2762. iwl4965_rt->rt_rate = 0;
  2763. else
  2764. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2765. /* antenna number */
  2766. iwl4965_rt->rt_antenna =
  2767. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2768. /* set the preamble flag if we have it */
  2769. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2770. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2771. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2772. stats->flag |= RX_FLAG_RADIOTAP;
  2773. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2774. rxb->skb = NULL;
  2775. }
  2776. #define IWL_PACKET_RETRY_TIME HZ
  2777. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2778. {
  2779. u16 sc = le16_to_cpu(header->seq_ctrl);
  2780. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2781. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2782. u16 *last_seq, *last_frag;
  2783. unsigned long *last_time;
  2784. switch (priv->iw_mode) {
  2785. case IEEE80211_IF_TYPE_IBSS:{
  2786. struct list_head *p;
  2787. struct iwl4965_ibss_seq *entry = NULL;
  2788. u8 *mac = header->addr2;
  2789. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2790. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2791. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2792. if (!compare_ether_addr(entry->mac, mac))
  2793. break;
  2794. }
  2795. if (p == &priv->ibss_mac_hash[index]) {
  2796. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2797. if (!entry) {
  2798. IWL_ERROR("Cannot malloc new mac entry\n");
  2799. return 0;
  2800. }
  2801. memcpy(entry->mac, mac, ETH_ALEN);
  2802. entry->seq_num = seq;
  2803. entry->frag_num = frag;
  2804. entry->packet_time = jiffies;
  2805. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2806. return 0;
  2807. }
  2808. last_seq = &entry->seq_num;
  2809. last_frag = &entry->frag_num;
  2810. last_time = &entry->packet_time;
  2811. break;
  2812. }
  2813. case IEEE80211_IF_TYPE_STA:
  2814. last_seq = &priv->last_seq_num;
  2815. last_frag = &priv->last_frag_num;
  2816. last_time = &priv->last_packet_time;
  2817. break;
  2818. default:
  2819. return 0;
  2820. }
  2821. if ((*last_seq == seq) &&
  2822. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2823. if (*last_frag == frag)
  2824. goto drop;
  2825. if (*last_frag + 1 != frag)
  2826. /* out-of-order fragment */
  2827. goto drop;
  2828. } else
  2829. *last_seq = seq;
  2830. *last_frag = frag;
  2831. *last_time = jiffies;
  2832. return 0;
  2833. drop:
  2834. return 1;
  2835. }
  2836. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2837. #include "iwl-spectrum.h"
  2838. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2839. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2840. #define TIME_UNIT 1024
  2841. /*
  2842. * extended beacon time format
  2843. * time in usec will be changed into a 32-bit value in 8:24 format
  2844. * the high 1 byte is the beacon counts
  2845. * the lower 3 bytes is the time in usec within one beacon interval
  2846. */
  2847. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2848. {
  2849. u32 quot;
  2850. u32 rem;
  2851. u32 interval = beacon_interval * 1024;
  2852. if (!interval || !usec)
  2853. return 0;
  2854. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2855. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2856. return (quot << 24) + rem;
  2857. }
  2858. /* base is usually what we get from ucode with each received frame,
  2859. * the same as HW timer counter counting down
  2860. */
  2861. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2862. {
  2863. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2864. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2865. u32 interval = beacon_interval * TIME_UNIT;
  2866. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2867. (addon & BEACON_TIME_MASK_HIGH);
  2868. if (base_low > addon_low)
  2869. res += base_low - addon_low;
  2870. else if (base_low < addon_low) {
  2871. res += interval + base_low - addon_low;
  2872. res += (1 << 24);
  2873. } else
  2874. res += (1 << 24);
  2875. return cpu_to_le32(res);
  2876. }
  2877. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2878. struct ieee80211_measurement_params *params,
  2879. u8 type)
  2880. {
  2881. struct iwl4965_spectrum_cmd spectrum;
  2882. struct iwl4965_rx_packet *res;
  2883. struct iwl4965_host_cmd cmd = {
  2884. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2885. .data = (void *)&spectrum,
  2886. .meta.flags = CMD_WANT_SKB,
  2887. };
  2888. u32 add_time = le64_to_cpu(params->start_time);
  2889. int rc;
  2890. int spectrum_resp_status;
  2891. int duration = le16_to_cpu(params->duration);
  2892. if (iwl4965_is_associated(priv))
  2893. add_time =
  2894. iwl4965_usecs_to_beacons(
  2895. le64_to_cpu(params->start_time) - priv->last_tsf,
  2896. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2897. memset(&spectrum, 0, sizeof(spectrum));
  2898. spectrum.channel_count = cpu_to_le16(1);
  2899. spectrum.flags =
  2900. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2901. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2902. cmd.len = sizeof(spectrum);
  2903. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2904. if (iwl4965_is_associated(priv))
  2905. spectrum.start_time =
  2906. iwl4965_add_beacon_time(priv->last_beacon_time,
  2907. add_time,
  2908. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2909. else
  2910. spectrum.start_time = 0;
  2911. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2912. spectrum.channels[0].channel = params->channel;
  2913. spectrum.channels[0].type = type;
  2914. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2915. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2916. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2917. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2918. if (rc)
  2919. return rc;
  2920. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2921. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2922. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2923. rc = -EIO;
  2924. }
  2925. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2926. switch (spectrum_resp_status) {
  2927. case 0: /* Command will be handled */
  2928. if (res->u.spectrum.id != 0xff) {
  2929. IWL_DEBUG_INFO
  2930. ("Replaced existing measurement: %d\n",
  2931. res->u.spectrum.id);
  2932. priv->measurement_status &= ~MEASUREMENT_READY;
  2933. }
  2934. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2935. rc = 0;
  2936. break;
  2937. case 1: /* Command will not be handled */
  2938. rc = -EAGAIN;
  2939. break;
  2940. }
  2941. dev_kfree_skb_any(cmd.meta.u.skb);
  2942. return rc;
  2943. }
  2944. #endif
  2945. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2946. struct iwl4965_tx_info *tx_sta)
  2947. {
  2948. tx_sta->status.ack_signal = 0;
  2949. tx_sta->status.excessive_retries = 0;
  2950. tx_sta->status.queue_length = 0;
  2951. tx_sta->status.queue_number = 0;
  2952. if (in_interrupt())
  2953. ieee80211_tx_status_irqsafe(priv->hw,
  2954. tx_sta->skb[0], &(tx_sta->status));
  2955. else
  2956. ieee80211_tx_status(priv->hw,
  2957. tx_sta->skb[0], &(tx_sta->status));
  2958. tx_sta->skb[0] = NULL;
  2959. }
  2960. /**
  2961. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2962. *
  2963. * When FW advances 'R' index, all entries between old and new 'R' index
  2964. * need to be reclaimed. As result, some free space forms. If there is
  2965. * enough free space (> low mark), wake the stack that feeds us.
  2966. */
  2967. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2968. {
  2969. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2970. struct iwl4965_queue *q = &txq->q;
  2971. int nfreed = 0;
  2972. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2973. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2974. "is out of range [0-%d] %d %d.\n", txq_id,
  2975. index, q->n_bd, q->write_ptr, q->read_ptr);
  2976. return 0;
  2977. }
  2978. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2979. q->read_ptr != index;
  2980. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2981. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2982. iwl4965_txstatus_to_ieee(priv,
  2983. &(txq->txb[txq->q.read_ptr]));
  2984. iwl4965_hw_txq_free_tfd(priv, txq);
  2985. } else if (nfreed > 1) {
  2986. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2987. q->write_ptr, q->read_ptr);
  2988. queue_work(priv->workqueue, &priv->restart);
  2989. }
  2990. nfreed++;
  2991. }
  2992. if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2993. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2994. priv->mac80211_registered)
  2995. ieee80211_wake_queue(priv->hw, txq_id);
  2996. return nfreed;
  2997. }
  2998. static int iwl4965_is_tx_success(u32 status)
  2999. {
  3000. status &= TX_STATUS_MSK;
  3001. return (status == TX_STATUS_SUCCESS)
  3002. || (status == TX_STATUS_DIRECT_DONE);
  3003. }
  3004. /******************************************************************************
  3005. *
  3006. * Generic RX handler implementations
  3007. *
  3008. ******************************************************************************/
  3009. #ifdef CONFIG_IWL4965_HT
  3010. #ifdef CONFIG_IWL4965_HT_AGG
  3011. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  3012. struct ieee80211_hdr *hdr)
  3013. {
  3014. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  3015. return IWL_AP_ID;
  3016. else {
  3017. u8 *da = ieee80211_get_DA(hdr);
  3018. return iwl4965_hw_find_station(priv, da);
  3019. }
  3020. }
  3021. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  3022. struct iwl4965_priv *priv, int txq_id, int idx)
  3023. {
  3024. if (priv->txq[txq_id].txb[idx].skb[0])
  3025. return (struct ieee80211_hdr *)priv->txq[txq_id].
  3026. txb[idx].skb[0]->data;
  3027. return NULL;
  3028. }
  3029. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  3030. {
  3031. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  3032. tx_resp->frame_count);
  3033. return le32_to_cpu(*scd_ssn) & MAX_SN;
  3034. }
  3035. /**
  3036. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  3037. */
  3038. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  3039. struct iwl4965_ht_agg *agg,
  3040. struct iwl4965_tx_resp *tx_resp,
  3041. u16 start_idx)
  3042. {
  3043. u32 status;
  3044. __le32 *frame_status = &tx_resp->status;
  3045. struct ieee80211_tx_status *tx_status = NULL;
  3046. struct ieee80211_hdr *hdr = NULL;
  3047. int i, sh;
  3048. int txq_id, idx;
  3049. u16 seq;
  3050. if (agg->wait_for_ba)
  3051. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  3052. agg->frame_count = tx_resp->frame_count;
  3053. agg->start_idx = start_idx;
  3054. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3055. agg->bitmap0 = agg->bitmap1 = 0;
  3056. /* # frames attempted by Tx command */
  3057. if (agg->frame_count == 1) {
  3058. /* Only one frame was attempted; no block-ack will arrive */
  3059. struct iwl4965_tx_queue *txq ;
  3060. status = le32_to_cpu(frame_status[0]);
  3061. txq_id = agg->txq_id;
  3062. txq = &priv->txq[txq_id];
  3063. /* FIXME: code repetition */
  3064. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  3065. agg->frame_count, agg->start_idx);
  3066. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  3067. tx_status->retry_count = tx_resp->failure_frame;
  3068. tx_status->queue_number = status & 0xff;
  3069. tx_status->queue_length = tx_resp->bt_kill_count;
  3070. tx_status->queue_length |= tx_resp->failure_rts;
  3071. tx_status->flags = iwl4965_is_tx_success(status)?
  3072. IEEE80211_TX_STATUS_ACK : 0;
  3073. tx_status->control.tx_rate =
  3074. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3075. /* FIXME: code repetition end */
  3076. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3077. status & 0xff, tx_resp->failure_frame);
  3078. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3079. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3080. agg->wait_for_ba = 0;
  3081. } else {
  3082. /* Two or more frames were attempted; expect block-ack */
  3083. u64 bitmap = 0;
  3084. int start = agg->start_idx;
  3085. /* Construct bit-map of pending frames within Tx window */
  3086. for (i = 0; i < agg->frame_count; i++) {
  3087. u16 sc;
  3088. status = le32_to_cpu(frame_status[i]);
  3089. seq = status >> 16;
  3090. idx = SEQ_TO_INDEX(seq);
  3091. txq_id = SEQ_TO_QUEUE(seq);
  3092. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3093. AGG_TX_STATE_ABORT_MSK))
  3094. continue;
  3095. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3096. agg->frame_count, txq_id, idx);
  3097. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3098. sc = le16_to_cpu(hdr->seq_ctrl);
  3099. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3100. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3101. " idx=%d, seq_idx=%d, seq=%d\n",
  3102. idx, SEQ_TO_SN(sc),
  3103. hdr->seq_ctrl);
  3104. return -1;
  3105. }
  3106. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3107. i, idx, SEQ_TO_SN(sc));
  3108. sh = idx - start;
  3109. if (sh > 64) {
  3110. sh = (start - idx) + 0xff;
  3111. bitmap = bitmap << sh;
  3112. sh = 0;
  3113. start = idx;
  3114. } else if (sh < -64)
  3115. sh = 0xff - (start - idx);
  3116. else if (sh < 0) {
  3117. sh = start - idx;
  3118. start = idx;
  3119. bitmap = bitmap << sh;
  3120. sh = 0;
  3121. }
  3122. bitmap |= (1 << sh);
  3123. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3124. start, (u32)(bitmap & 0xFFFFFFFF));
  3125. }
  3126. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3127. agg->bitmap1 = bitmap >> 32;
  3128. agg->start_idx = start;
  3129. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3130. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3131. agg->frame_count, agg->start_idx,
  3132. agg->bitmap0);
  3133. if (bitmap)
  3134. agg->wait_for_ba = 1;
  3135. }
  3136. return 0;
  3137. }
  3138. #endif
  3139. #endif
  3140. /**
  3141. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3142. */
  3143. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3144. struct iwl4965_rx_mem_buffer *rxb)
  3145. {
  3146. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3147. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3148. int txq_id = SEQ_TO_QUEUE(sequence);
  3149. int index = SEQ_TO_INDEX(sequence);
  3150. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3151. struct ieee80211_tx_status *tx_status;
  3152. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3153. u32 status = le32_to_cpu(tx_resp->status);
  3154. #ifdef CONFIG_IWL4965_HT
  3155. #ifdef CONFIG_IWL4965_HT_AGG
  3156. int tid, sta_id;
  3157. #endif
  3158. #endif
  3159. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3160. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3161. "is out of range [0-%d] %d %d\n", txq_id,
  3162. index, txq->q.n_bd, txq->q.write_ptr,
  3163. txq->q.read_ptr);
  3164. return;
  3165. }
  3166. #ifdef CONFIG_IWL4965_HT
  3167. #ifdef CONFIG_IWL4965_HT_AGG
  3168. if (txq->sched_retry) {
  3169. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3170. struct ieee80211_hdr *hdr =
  3171. iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3172. struct iwl4965_ht_agg *agg = NULL;
  3173. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3174. if (qc == NULL) {
  3175. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3176. return;
  3177. }
  3178. tid = le16_to_cpu(*qc) & 0xf;
  3179. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3180. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3181. IWL_ERROR("Station not known for\n");
  3182. return;
  3183. }
  3184. agg = &priv->stations[sta_id].tid[tid].agg;
  3185. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3186. if ((tx_resp->frame_count == 1) &&
  3187. !iwl4965_is_tx_success(status)) {
  3188. /* TODO: send BAR */
  3189. }
  3190. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3191. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3192. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3193. "%d index %d\n", scd_ssn , index);
  3194. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3195. }
  3196. } else {
  3197. #endif /* CONFIG_IWL4965_HT_AGG */
  3198. #endif /* CONFIG_IWL4965_HT */
  3199. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3200. tx_status->retry_count = tx_resp->failure_frame;
  3201. tx_status->queue_number = status;
  3202. tx_status->queue_length = tx_resp->bt_kill_count;
  3203. tx_status->queue_length |= tx_resp->failure_rts;
  3204. tx_status->flags =
  3205. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3206. tx_status->control.tx_rate =
  3207. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3208. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3209. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3210. status, le32_to_cpu(tx_resp->rate_n_flags),
  3211. tx_resp->failure_frame);
  3212. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3213. if (index != -1)
  3214. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3215. #ifdef CONFIG_IWL4965_HT
  3216. #ifdef CONFIG_IWL4965_HT_AGG
  3217. }
  3218. #endif /* CONFIG_IWL4965_HT_AGG */
  3219. #endif /* CONFIG_IWL4965_HT */
  3220. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3221. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3222. }
  3223. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3224. struct iwl4965_rx_mem_buffer *rxb)
  3225. {
  3226. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3227. struct iwl4965_alive_resp *palive;
  3228. struct delayed_work *pwork;
  3229. palive = &pkt->u.alive_frame;
  3230. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3231. "0x%01X 0x%01X\n",
  3232. palive->is_valid, palive->ver_type,
  3233. palive->ver_subtype);
  3234. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3235. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3236. memcpy(&priv->card_alive_init,
  3237. &pkt->u.alive_frame,
  3238. sizeof(struct iwl4965_init_alive_resp));
  3239. pwork = &priv->init_alive_start;
  3240. } else {
  3241. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3242. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3243. sizeof(struct iwl4965_alive_resp));
  3244. pwork = &priv->alive_start;
  3245. }
  3246. /* We delay the ALIVE response by 5ms to
  3247. * give the HW RF Kill time to activate... */
  3248. if (palive->is_valid == UCODE_VALID_OK)
  3249. queue_delayed_work(priv->workqueue, pwork,
  3250. msecs_to_jiffies(5));
  3251. else
  3252. IWL_WARNING("uCode did not respond OK.\n");
  3253. }
  3254. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3255. struct iwl4965_rx_mem_buffer *rxb)
  3256. {
  3257. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3258. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3259. return;
  3260. }
  3261. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3262. struct iwl4965_rx_mem_buffer *rxb)
  3263. {
  3264. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3265. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3266. "seq 0x%04X ser 0x%08X\n",
  3267. le32_to_cpu(pkt->u.err_resp.error_type),
  3268. get_cmd_string(pkt->u.err_resp.cmd_id),
  3269. pkt->u.err_resp.cmd_id,
  3270. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3271. le32_to_cpu(pkt->u.err_resp.error_info));
  3272. }
  3273. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3274. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3275. {
  3276. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3277. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3278. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3279. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3280. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3281. rxon->channel = csa->channel;
  3282. priv->staging_rxon.channel = csa->channel;
  3283. }
  3284. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3285. struct iwl4965_rx_mem_buffer *rxb)
  3286. {
  3287. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3288. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3289. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3290. if (!report->state) {
  3291. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3292. "Spectrum Measure Notification: Start\n");
  3293. return;
  3294. }
  3295. memcpy(&priv->measure_report, report, sizeof(*report));
  3296. priv->measurement_status |= MEASUREMENT_READY;
  3297. #endif
  3298. }
  3299. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3300. struct iwl4965_rx_mem_buffer *rxb)
  3301. {
  3302. #ifdef CONFIG_IWL4965_DEBUG
  3303. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3304. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3305. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3306. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3307. #endif
  3308. }
  3309. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3310. struct iwl4965_rx_mem_buffer *rxb)
  3311. {
  3312. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3313. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3314. "notification for %s:\n",
  3315. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3316. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3317. }
  3318. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3319. {
  3320. struct iwl4965_priv *priv =
  3321. container_of(work, struct iwl4965_priv, beacon_update);
  3322. struct sk_buff *beacon;
  3323. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3324. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3325. if (!beacon) {
  3326. IWL_ERROR("update beacon failed\n");
  3327. return;
  3328. }
  3329. mutex_lock(&priv->mutex);
  3330. /* new beacon skb is allocated every time; dispose previous.*/
  3331. if (priv->ibss_beacon)
  3332. dev_kfree_skb(priv->ibss_beacon);
  3333. priv->ibss_beacon = beacon;
  3334. mutex_unlock(&priv->mutex);
  3335. iwl4965_send_beacon_cmd(priv);
  3336. }
  3337. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3338. struct iwl4965_rx_mem_buffer *rxb)
  3339. {
  3340. #ifdef CONFIG_IWL4965_DEBUG
  3341. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3342. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3343. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3344. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3345. "tsf %d %d rate %d\n",
  3346. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3347. beacon->beacon_notify_hdr.failure_frame,
  3348. le32_to_cpu(beacon->ibss_mgr_status),
  3349. le32_to_cpu(beacon->high_tsf),
  3350. le32_to_cpu(beacon->low_tsf), rate);
  3351. #endif
  3352. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3353. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3354. queue_work(priv->workqueue, &priv->beacon_update);
  3355. }
  3356. /* Service response to REPLY_SCAN_CMD (0x80) */
  3357. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3358. struct iwl4965_rx_mem_buffer *rxb)
  3359. {
  3360. #ifdef CONFIG_IWL4965_DEBUG
  3361. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3362. struct iwl4965_scanreq_notification *notif =
  3363. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3364. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3365. #endif
  3366. }
  3367. /* Service SCAN_START_NOTIFICATION (0x82) */
  3368. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3369. struct iwl4965_rx_mem_buffer *rxb)
  3370. {
  3371. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3372. struct iwl4965_scanstart_notification *notif =
  3373. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3374. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3375. IWL_DEBUG_SCAN("Scan start: "
  3376. "%d [802.11%s] "
  3377. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3378. notif->channel,
  3379. notif->band ? "bg" : "a",
  3380. notif->tsf_high,
  3381. notif->tsf_low, notif->status, notif->beacon_timer);
  3382. }
  3383. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3384. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3385. struct iwl4965_rx_mem_buffer *rxb)
  3386. {
  3387. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3388. struct iwl4965_scanresults_notification *notif =
  3389. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3390. IWL_DEBUG_SCAN("Scan ch.res: "
  3391. "%d [802.11%s] "
  3392. "(TSF: 0x%08X:%08X) - %d "
  3393. "elapsed=%lu usec (%dms since last)\n",
  3394. notif->channel,
  3395. notif->band ? "bg" : "a",
  3396. le32_to_cpu(notif->tsf_high),
  3397. le32_to_cpu(notif->tsf_low),
  3398. le32_to_cpu(notif->statistics[0]),
  3399. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3400. jiffies_to_msecs(elapsed_jiffies
  3401. (priv->last_scan_jiffies, jiffies)));
  3402. priv->last_scan_jiffies = jiffies;
  3403. priv->next_scan_jiffies = 0;
  3404. }
  3405. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3406. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3407. struct iwl4965_rx_mem_buffer *rxb)
  3408. {
  3409. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3410. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3411. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3412. scan_notif->scanned_channels,
  3413. scan_notif->tsf_low,
  3414. scan_notif->tsf_high, scan_notif->status);
  3415. /* The HW is no longer scanning */
  3416. clear_bit(STATUS_SCAN_HW, &priv->status);
  3417. /* The scan completion notification came in, so kill that timer... */
  3418. cancel_delayed_work(&priv->scan_check);
  3419. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3420. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3421. jiffies_to_msecs(elapsed_jiffies
  3422. (priv->scan_pass_start, jiffies)));
  3423. /* Remove this scanned band from the list
  3424. * of pending bands to scan */
  3425. priv->scan_bands--;
  3426. /* If a request to abort was given, or the scan did not succeed
  3427. * then we reset the scan state machine and terminate,
  3428. * re-queuing another scan if one has been requested */
  3429. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3430. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3431. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3432. } else {
  3433. /* If there are more bands on this scan pass reschedule */
  3434. if (priv->scan_bands > 0)
  3435. goto reschedule;
  3436. }
  3437. priv->last_scan_jiffies = jiffies;
  3438. priv->next_scan_jiffies = 0;
  3439. IWL_DEBUG_INFO("Setting scan to off\n");
  3440. clear_bit(STATUS_SCANNING, &priv->status);
  3441. IWL_DEBUG_INFO("Scan took %dms\n",
  3442. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3443. queue_work(priv->workqueue, &priv->scan_completed);
  3444. return;
  3445. reschedule:
  3446. priv->scan_pass_start = jiffies;
  3447. queue_work(priv->workqueue, &priv->request_scan);
  3448. }
  3449. /* Handle notification from uCode that card's power state is changing
  3450. * due to software, hardware, or critical temperature RFKILL */
  3451. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3452. struct iwl4965_rx_mem_buffer *rxb)
  3453. {
  3454. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3455. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3456. unsigned long status = priv->status;
  3457. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3458. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3459. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3460. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3461. RF_CARD_DISABLED)) {
  3462. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3463. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3464. if (!iwl4965_grab_nic_access(priv)) {
  3465. iwl4965_write_direct32(
  3466. priv, HBUS_TARG_MBX_C,
  3467. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3468. iwl4965_release_nic_access(priv);
  3469. }
  3470. if (!(flags & RXON_CARD_DISABLED)) {
  3471. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3472. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3473. if (!iwl4965_grab_nic_access(priv)) {
  3474. iwl4965_write_direct32(
  3475. priv, HBUS_TARG_MBX_C,
  3476. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3477. iwl4965_release_nic_access(priv);
  3478. }
  3479. }
  3480. if (flags & RF_CARD_DISABLED) {
  3481. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3482. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3483. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3484. if (!iwl4965_grab_nic_access(priv))
  3485. iwl4965_release_nic_access(priv);
  3486. }
  3487. }
  3488. if (flags & HW_CARD_DISABLED)
  3489. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3490. else
  3491. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3492. if (flags & SW_CARD_DISABLED)
  3493. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3494. else
  3495. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3496. if (!(flags & RXON_CARD_DISABLED))
  3497. iwl4965_scan_cancel(priv);
  3498. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3499. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3500. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3501. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3502. queue_work(priv->workqueue, &priv->rf_kill);
  3503. else
  3504. wake_up_interruptible(&priv->wait_command_queue);
  3505. }
  3506. /**
  3507. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3508. *
  3509. * Setup the RX handlers for each of the reply types sent from the uCode
  3510. * to the host.
  3511. *
  3512. * This function chains into the hardware specific files for them to setup
  3513. * any hardware specific handlers as well.
  3514. */
  3515. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3516. {
  3517. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3518. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3519. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3520. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3521. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3522. iwl4965_rx_spectrum_measure_notif;
  3523. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3524. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3525. iwl4965_rx_pm_debug_statistics_notif;
  3526. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3527. /*
  3528. * The same handler is used for both the REPLY to a discrete
  3529. * statistics request from the host as well as for the periodic
  3530. * statistics notifications (after received beacons) from the uCode.
  3531. */
  3532. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3533. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3534. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3535. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3536. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3537. iwl4965_rx_scan_results_notif;
  3538. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3539. iwl4965_rx_scan_complete_notif;
  3540. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3541. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3542. /* Set up hardware specific Rx handlers */
  3543. iwl4965_hw_rx_handler_setup(priv);
  3544. }
  3545. /**
  3546. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3547. * @rxb: Rx buffer to reclaim
  3548. *
  3549. * If an Rx buffer has an async callback associated with it the callback
  3550. * will be executed. The attached skb (if present) will only be freed
  3551. * if the callback returns 1
  3552. */
  3553. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3554. struct iwl4965_rx_mem_buffer *rxb)
  3555. {
  3556. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3557. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3558. int txq_id = SEQ_TO_QUEUE(sequence);
  3559. int index = SEQ_TO_INDEX(sequence);
  3560. int huge = sequence & SEQ_HUGE_FRAME;
  3561. int cmd_index;
  3562. struct iwl4965_cmd *cmd;
  3563. /* If a Tx command is being handled and it isn't in the actual
  3564. * command queue then there a command routing bug has been introduced
  3565. * in the queue management code. */
  3566. if (txq_id != IWL_CMD_QUEUE_NUM)
  3567. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3568. txq_id, pkt->hdr.cmd);
  3569. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3570. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3571. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3572. /* Input error checking is done when commands are added to queue. */
  3573. if (cmd->meta.flags & CMD_WANT_SKB) {
  3574. cmd->meta.source->u.skb = rxb->skb;
  3575. rxb->skb = NULL;
  3576. } else if (cmd->meta.u.callback &&
  3577. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3578. rxb->skb = NULL;
  3579. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3580. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3581. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3582. wake_up_interruptible(&priv->wait_command_queue);
  3583. }
  3584. }
  3585. /************************** RX-FUNCTIONS ****************************/
  3586. /*
  3587. * Rx theory of operation
  3588. *
  3589. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3590. * each of which point to Receive Buffers to be filled by 4965. These get
  3591. * used not only for Rx frames, but for any command response or notification
  3592. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3593. * of indexes into the circular buffer.
  3594. *
  3595. * Rx Queue Indexes
  3596. * The host/firmware share two index registers for managing the Rx buffers.
  3597. *
  3598. * The READ index maps to the first position that the firmware may be writing
  3599. * to -- the driver can read up to (but not including) this position and get
  3600. * good data.
  3601. * The READ index is managed by the firmware once the card is enabled.
  3602. *
  3603. * The WRITE index maps to the last position the driver has read from -- the
  3604. * position preceding WRITE is the last slot the firmware can place a packet.
  3605. *
  3606. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3607. * WRITE = READ.
  3608. *
  3609. * During initialization, the host sets up the READ queue position to the first
  3610. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3611. *
  3612. * When the firmware places a packet in a buffer, it will advance the READ index
  3613. * and fire the RX interrupt. The driver can then query the READ index and
  3614. * process as many packets as possible, moving the WRITE index forward as it
  3615. * resets the Rx queue buffers with new memory.
  3616. *
  3617. * The management in the driver is as follows:
  3618. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3619. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3620. * to replenish the iwl->rxq->rx_free.
  3621. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3622. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3623. * 'processed' and 'read' driver indexes as well)
  3624. * + A received packet is processed and handed to the kernel network stack,
  3625. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3626. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3627. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3628. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3629. * were enough free buffers and RX_STALLED is set it is cleared.
  3630. *
  3631. *
  3632. * Driver sequence:
  3633. *
  3634. * iwl4965_rx_queue_alloc() Allocates rx_free
  3635. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3636. * iwl4965_rx_queue_restock
  3637. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3638. * queue, updates firmware pointers, and updates
  3639. * the WRITE index. If insufficient rx_free buffers
  3640. * are available, schedules iwl4965_rx_replenish
  3641. *
  3642. * -- enable interrupts --
  3643. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3644. * READ INDEX, detaching the SKB from the pool.
  3645. * Moves the packet buffer from queue to rx_used.
  3646. * Calls iwl4965_rx_queue_restock to refill any empty
  3647. * slots.
  3648. * ...
  3649. *
  3650. */
  3651. /**
  3652. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3653. */
  3654. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3655. {
  3656. int s = q->read - q->write;
  3657. if (s <= 0)
  3658. s += RX_QUEUE_SIZE;
  3659. /* keep some buffer to not confuse full and empty queue */
  3660. s -= 2;
  3661. if (s < 0)
  3662. s = 0;
  3663. return s;
  3664. }
  3665. /**
  3666. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3667. */
  3668. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3669. {
  3670. u32 reg = 0;
  3671. int rc = 0;
  3672. unsigned long flags;
  3673. spin_lock_irqsave(&q->lock, flags);
  3674. if (q->need_update == 0)
  3675. goto exit_unlock;
  3676. /* If power-saving is in use, make sure device is awake */
  3677. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3678. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3679. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3680. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3681. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3682. goto exit_unlock;
  3683. }
  3684. rc = iwl4965_grab_nic_access(priv);
  3685. if (rc)
  3686. goto exit_unlock;
  3687. /* Device expects a multiple of 8 */
  3688. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3689. q->write & ~0x7);
  3690. iwl4965_release_nic_access(priv);
  3691. /* Else device is assumed to be awake */
  3692. } else
  3693. /* Device expects a multiple of 8 */
  3694. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3695. q->need_update = 0;
  3696. exit_unlock:
  3697. spin_unlock_irqrestore(&q->lock, flags);
  3698. return rc;
  3699. }
  3700. /**
  3701. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3702. */
  3703. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3704. dma_addr_t dma_addr)
  3705. {
  3706. return cpu_to_le32((u32)(dma_addr >> 8));
  3707. }
  3708. /**
  3709. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3710. *
  3711. * If there are slots in the RX queue that need to be restocked,
  3712. * and we have free pre-allocated buffers, fill the ranks as much
  3713. * as we can, pulling from rx_free.
  3714. *
  3715. * This moves the 'write' index forward to catch up with 'processed', and
  3716. * also updates the memory address in the firmware to reference the new
  3717. * target buffer.
  3718. */
  3719. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3720. {
  3721. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3722. struct list_head *element;
  3723. struct iwl4965_rx_mem_buffer *rxb;
  3724. unsigned long flags;
  3725. int write, rc;
  3726. spin_lock_irqsave(&rxq->lock, flags);
  3727. write = rxq->write & ~0x7;
  3728. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3729. /* Get next free Rx buffer, remove from free list */
  3730. element = rxq->rx_free.next;
  3731. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3732. list_del(element);
  3733. /* Point to Rx buffer via next RBD in circular buffer */
  3734. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3735. rxq->queue[rxq->write] = rxb;
  3736. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3737. rxq->free_count--;
  3738. }
  3739. spin_unlock_irqrestore(&rxq->lock, flags);
  3740. /* If the pre-allocated buffer pool is dropping low, schedule to
  3741. * refill it */
  3742. if (rxq->free_count <= RX_LOW_WATERMARK)
  3743. queue_work(priv->workqueue, &priv->rx_replenish);
  3744. /* If we've added more space for the firmware to place data, tell it.
  3745. * Increment device's write pointer in multiples of 8. */
  3746. if ((write != (rxq->write & ~0x7))
  3747. || (abs(rxq->write - rxq->read) > 7)) {
  3748. spin_lock_irqsave(&rxq->lock, flags);
  3749. rxq->need_update = 1;
  3750. spin_unlock_irqrestore(&rxq->lock, flags);
  3751. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3752. if (rc)
  3753. return rc;
  3754. }
  3755. return 0;
  3756. }
  3757. /**
  3758. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3759. *
  3760. * When moving to rx_free an SKB is allocated for the slot.
  3761. *
  3762. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3763. * This is called as a scheduled work item (except for during initialization)
  3764. */
  3765. void iwl4965_rx_replenish(void *data)
  3766. {
  3767. struct iwl4965_priv *priv = data;
  3768. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3769. struct list_head *element;
  3770. struct iwl4965_rx_mem_buffer *rxb;
  3771. unsigned long flags;
  3772. spin_lock_irqsave(&rxq->lock, flags);
  3773. while (!list_empty(&rxq->rx_used)) {
  3774. element = rxq->rx_used.next;
  3775. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3776. /* Alloc a new receive buffer */
  3777. rxb->skb =
  3778. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3779. if (!rxb->skb) {
  3780. if (net_ratelimit())
  3781. printk(KERN_CRIT DRV_NAME
  3782. ": Can not allocate SKB buffers\n");
  3783. /* We don't reschedule replenish work here -- we will
  3784. * call the restock method and if it still needs
  3785. * more buffers it will schedule replenish */
  3786. break;
  3787. }
  3788. priv->alloc_rxb_skb++;
  3789. list_del(element);
  3790. /* Get physical address of RB/SKB */
  3791. rxb->dma_addr =
  3792. pci_map_single(priv->pci_dev, rxb->skb->data,
  3793. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3794. list_add_tail(&rxb->list, &rxq->rx_free);
  3795. rxq->free_count++;
  3796. }
  3797. spin_unlock_irqrestore(&rxq->lock, flags);
  3798. spin_lock_irqsave(&priv->lock, flags);
  3799. iwl4965_rx_queue_restock(priv);
  3800. spin_unlock_irqrestore(&priv->lock, flags);
  3801. }
  3802. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3803. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3804. * This free routine walks the list of POOL entries and if SKB is set to
  3805. * non NULL it is unmapped and freed
  3806. */
  3807. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3808. {
  3809. int i;
  3810. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3811. if (rxq->pool[i].skb != NULL) {
  3812. pci_unmap_single(priv->pci_dev,
  3813. rxq->pool[i].dma_addr,
  3814. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3815. dev_kfree_skb(rxq->pool[i].skb);
  3816. }
  3817. }
  3818. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3819. rxq->dma_addr);
  3820. rxq->bd = NULL;
  3821. }
  3822. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3823. {
  3824. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3825. struct pci_dev *dev = priv->pci_dev;
  3826. int i;
  3827. spin_lock_init(&rxq->lock);
  3828. INIT_LIST_HEAD(&rxq->rx_free);
  3829. INIT_LIST_HEAD(&rxq->rx_used);
  3830. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3831. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3832. if (!rxq->bd)
  3833. return -ENOMEM;
  3834. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3835. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3836. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3837. /* Set us so that we have processed and used all buffers, but have
  3838. * not restocked the Rx queue with fresh buffers */
  3839. rxq->read = rxq->write = 0;
  3840. rxq->free_count = 0;
  3841. rxq->need_update = 0;
  3842. return 0;
  3843. }
  3844. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3845. {
  3846. unsigned long flags;
  3847. int i;
  3848. spin_lock_irqsave(&rxq->lock, flags);
  3849. INIT_LIST_HEAD(&rxq->rx_free);
  3850. INIT_LIST_HEAD(&rxq->rx_used);
  3851. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3852. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3853. /* In the reset function, these buffers may have been allocated
  3854. * to an SKB, so we need to unmap and free potential storage */
  3855. if (rxq->pool[i].skb != NULL) {
  3856. pci_unmap_single(priv->pci_dev,
  3857. rxq->pool[i].dma_addr,
  3858. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3859. priv->alloc_rxb_skb--;
  3860. dev_kfree_skb(rxq->pool[i].skb);
  3861. rxq->pool[i].skb = NULL;
  3862. }
  3863. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3864. }
  3865. /* Set us so that we have processed and used all buffers, but have
  3866. * not restocked the Rx queue with fresh buffers */
  3867. rxq->read = rxq->write = 0;
  3868. rxq->free_count = 0;
  3869. spin_unlock_irqrestore(&rxq->lock, flags);
  3870. }
  3871. /* Convert linear signal-to-noise ratio into dB */
  3872. static u8 ratio2dB[100] = {
  3873. /* 0 1 2 3 4 5 6 7 8 9 */
  3874. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3875. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3876. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3877. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3878. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3879. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3880. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3881. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3882. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3883. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3884. };
  3885. /* Calculates a relative dB value from a ratio of linear
  3886. * (i.e. not dB) signal levels.
  3887. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3888. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3889. {
  3890. /* 1000:1 or higher just report as 60 dB */
  3891. if (sig_ratio >= 1000)
  3892. return 60;
  3893. /* 100:1 or higher, divide by 10 and use table,
  3894. * add 20 dB to make up for divide by 10 */
  3895. if (sig_ratio >= 100)
  3896. return (20 + (int)ratio2dB[sig_ratio/10]);
  3897. /* We shouldn't see this */
  3898. if (sig_ratio < 1)
  3899. return 0;
  3900. /* Use table for ratios 1:1 - 99:1 */
  3901. return (int)ratio2dB[sig_ratio];
  3902. }
  3903. #define PERFECT_RSSI (-20) /* dBm */
  3904. #define WORST_RSSI (-95) /* dBm */
  3905. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3906. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3907. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3908. * about formulas used below. */
  3909. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3910. {
  3911. int sig_qual;
  3912. int degradation = PERFECT_RSSI - rssi_dbm;
  3913. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3914. * as indicator; formula is (signal dbm - noise dbm).
  3915. * SNR at or above 40 is a great signal (100%).
  3916. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3917. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3918. if (noise_dbm) {
  3919. if (rssi_dbm - noise_dbm >= 40)
  3920. return 100;
  3921. else if (rssi_dbm < noise_dbm)
  3922. return 0;
  3923. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3924. /* Else use just the signal level.
  3925. * This formula is a least squares fit of data points collected and
  3926. * compared with a reference system that had a percentage (%) display
  3927. * for signal quality. */
  3928. } else
  3929. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3930. (15 * RSSI_RANGE + 62 * degradation)) /
  3931. (RSSI_RANGE * RSSI_RANGE);
  3932. if (sig_qual > 100)
  3933. sig_qual = 100;
  3934. else if (sig_qual < 1)
  3935. sig_qual = 0;
  3936. return sig_qual;
  3937. }
  3938. /**
  3939. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3940. *
  3941. * Uses the priv->rx_handlers callback function array to invoke
  3942. * the appropriate handlers, including command responses,
  3943. * frame-received notifications, and other notifications.
  3944. */
  3945. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3946. {
  3947. struct iwl4965_rx_mem_buffer *rxb;
  3948. struct iwl4965_rx_packet *pkt;
  3949. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3950. u32 r, i;
  3951. int reclaim;
  3952. unsigned long flags;
  3953. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3954. * buffer that the driver may process (last buffer filled by ucode). */
  3955. r = iwl4965_hw_get_rx_read(priv);
  3956. i = rxq->read;
  3957. /* Rx interrupt, but nothing sent from uCode */
  3958. if (i == r)
  3959. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3960. while (i != r) {
  3961. rxb = rxq->queue[i];
  3962. /* If an RXB doesn't have a Rx queue slot associated with it,
  3963. * then a bug has been introduced in the queue refilling
  3964. * routines -- catch it here */
  3965. BUG_ON(rxb == NULL);
  3966. rxq->queue[i] = NULL;
  3967. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3968. IWL_RX_BUF_SIZE,
  3969. PCI_DMA_FROMDEVICE);
  3970. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3971. /* Reclaim a command buffer only if this packet is a response
  3972. * to a (driver-originated) command.
  3973. * If the packet (e.g. Rx frame) originated from uCode,
  3974. * there is no command buffer to reclaim.
  3975. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3976. * but apparently a few don't get set; catch them here. */
  3977. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3978. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3979. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3980. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3981. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3982. (pkt->hdr.cmd != REPLY_TX);
  3983. /* Based on type of command response or notification,
  3984. * handle those that need handling via function in
  3985. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3986. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3987. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3988. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3989. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3990. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3991. } else {
  3992. /* No handling needed */
  3993. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3994. "r %d i %d No handler needed for %s, 0x%02x\n",
  3995. r, i, get_cmd_string(pkt->hdr.cmd),
  3996. pkt->hdr.cmd);
  3997. }
  3998. if (reclaim) {
  3999. /* Invoke any callbacks, transfer the skb to caller, and
  4000. * fire off the (possibly) blocking iwl4965_send_cmd()
  4001. * as we reclaim the driver command queue */
  4002. if (rxb && rxb->skb)
  4003. iwl4965_tx_cmd_complete(priv, rxb);
  4004. else
  4005. IWL_WARNING("Claim null rxb?\n");
  4006. }
  4007. /* For now we just don't re-use anything. We can tweak this
  4008. * later to try and re-use notification packets and SKBs that
  4009. * fail to Rx correctly */
  4010. if (rxb->skb != NULL) {
  4011. priv->alloc_rxb_skb--;
  4012. dev_kfree_skb_any(rxb->skb);
  4013. rxb->skb = NULL;
  4014. }
  4015. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  4016. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  4017. spin_lock_irqsave(&rxq->lock, flags);
  4018. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  4019. spin_unlock_irqrestore(&rxq->lock, flags);
  4020. i = (i + 1) & RX_QUEUE_MASK;
  4021. }
  4022. /* Backtrack one entry */
  4023. priv->rxq.read = i;
  4024. iwl4965_rx_queue_restock(priv);
  4025. }
  4026. /**
  4027. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4028. */
  4029. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4030. struct iwl4965_tx_queue *txq)
  4031. {
  4032. u32 reg = 0;
  4033. int rc = 0;
  4034. int txq_id = txq->q.id;
  4035. if (txq->need_update == 0)
  4036. return rc;
  4037. /* if we're trying to save power */
  4038. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4039. /* wake up nic if it's powered down ...
  4040. * uCode will wake up, and interrupt us again, so next
  4041. * time we'll skip this part. */
  4042. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4043. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4044. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4045. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4046. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4047. return rc;
  4048. }
  4049. /* restore this queue's parameters in nic hardware. */
  4050. rc = iwl4965_grab_nic_access(priv);
  4051. if (rc)
  4052. return rc;
  4053. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4054. txq->q.write_ptr | (txq_id << 8));
  4055. iwl4965_release_nic_access(priv);
  4056. /* else not in power-save mode, uCode will never sleep when we're
  4057. * trying to tx (during RFKILL, we're not trying to tx). */
  4058. } else
  4059. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4060. txq->q.write_ptr | (txq_id << 8));
  4061. txq->need_update = 0;
  4062. return rc;
  4063. }
  4064. #ifdef CONFIG_IWL4965_DEBUG
  4065. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4066. {
  4067. DECLARE_MAC_BUF(mac);
  4068. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4069. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4070. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4071. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4072. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4073. le32_to_cpu(rxon->filter_flags));
  4074. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4075. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4076. rxon->ofdm_basic_rates);
  4077. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4078. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4079. print_mac(mac, rxon->node_addr));
  4080. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4081. print_mac(mac, rxon->bssid_addr));
  4082. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4083. }
  4084. #endif
  4085. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4086. {
  4087. IWL_DEBUG_ISR("Enabling interrupts\n");
  4088. set_bit(STATUS_INT_ENABLED, &priv->status);
  4089. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4090. }
  4091. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4092. {
  4093. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4094. /* disable interrupts from uCode/NIC to host */
  4095. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4096. /* acknowledge/clear/reset any interrupts still pending
  4097. * from uCode or flow handler (Rx/Tx DMA) */
  4098. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4099. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4100. IWL_DEBUG_ISR("Disabled interrupts\n");
  4101. }
  4102. static const char *desc_lookup(int i)
  4103. {
  4104. switch (i) {
  4105. case 1:
  4106. return "FAIL";
  4107. case 2:
  4108. return "BAD_PARAM";
  4109. case 3:
  4110. return "BAD_CHECKSUM";
  4111. case 4:
  4112. return "NMI_INTERRUPT";
  4113. case 5:
  4114. return "SYSASSERT";
  4115. case 6:
  4116. return "FATAL_ERROR";
  4117. }
  4118. return "UNKNOWN";
  4119. }
  4120. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4121. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4122. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4123. {
  4124. u32 data2, line;
  4125. u32 desc, time, count, base, data1;
  4126. u32 blink1, blink2, ilink1, ilink2;
  4127. int rc;
  4128. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4129. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4130. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4131. return;
  4132. }
  4133. rc = iwl4965_grab_nic_access(priv);
  4134. if (rc) {
  4135. IWL_WARNING("Can not read from adapter at this time.\n");
  4136. return;
  4137. }
  4138. count = iwl4965_read_targ_mem(priv, base);
  4139. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4140. IWL_ERROR("Start IWL Error Log Dump:\n");
  4141. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4142. priv->status, priv->config, count);
  4143. }
  4144. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4145. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4146. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4147. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4148. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4149. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4150. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4151. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4152. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4153. IWL_ERROR("Desc Time "
  4154. "data1 data2 line\n");
  4155. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4156. desc_lookup(desc), desc, time, data1, data2, line);
  4157. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4158. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4159. ilink1, ilink2);
  4160. iwl4965_release_nic_access(priv);
  4161. }
  4162. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4163. /**
  4164. * iwl4965_print_event_log - Dump error event log to syslog
  4165. *
  4166. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4167. */
  4168. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4169. u32 num_events, u32 mode)
  4170. {
  4171. u32 i;
  4172. u32 base; /* SRAM byte address of event log header */
  4173. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4174. u32 ptr; /* SRAM byte address of log data */
  4175. u32 ev, time, data; /* event log data */
  4176. if (num_events == 0)
  4177. return;
  4178. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4179. if (mode == 0)
  4180. event_size = 2 * sizeof(u32);
  4181. else
  4182. event_size = 3 * sizeof(u32);
  4183. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4184. /* "time" is actually "data" for mode 0 (no timestamp).
  4185. * place event id # at far right for easier visual parsing. */
  4186. for (i = 0; i < num_events; i++) {
  4187. ev = iwl4965_read_targ_mem(priv, ptr);
  4188. ptr += sizeof(u32);
  4189. time = iwl4965_read_targ_mem(priv, ptr);
  4190. ptr += sizeof(u32);
  4191. if (mode == 0)
  4192. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4193. else {
  4194. data = iwl4965_read_targ_mem(priv, ptr);
  4195. ptr += sizeof(u32);
  4196. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4197. }
  4198. }
  4199. }
  4200. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4201. {
  4202. int rc;
  4203. u32 base; /* SRAM byte address of event log header */
  4204. u32 capacity; /* event log capacity in # entries */
  4205. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4206. u32 num_wraps; /* # times uCode wrapped to top of log */
  4207. u32 next_entry; /* index of next entry to be written by uCode */
  4208. u32 size; /* # entries that we'll print */
  4209. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4210. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4211. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4212. return;
  4213. }
  4214. rc = iwl4965_grab_nic_access(priv);
  4215. if (rc) {
  4216. IWL_WARNING("Can not read from adapter at this time.\n");
  4217. return;
  4218. }
  4219. /* event log header */
  4220. capacity = iwl4965_read_targ_mem(priv, base);
  4221. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4222. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4223. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4224. size = num_wraps ? capacity : next_entry;
  4225. /* bail out if nothing in log */
  4226. if (size == 0) {
  4227. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4228. iwl4965_release_nic_access(priv);
  4229. return;
  4230. }
  4231. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4232. size, num_wraps);
  4233. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4234. * i.e the next one that uCode would fill. */
  4235. if (num_wraps)
  4236. iwl4965_print_event_log(priv, next_entry,
  4237. capacity - next_entry, mode);
  4238. /* (then/else) start at top of log */
  4239. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4240. iwl4965_release_nic_access(priv);
  4241. }
  4242. /**
  4243. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4244. */
  4245. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4246. {
  4247. /* Set the FW error flag -- cleared on iwl4965_down */
  4248. set_bit(STATUS_FW_ERROR, &priv->status);
  4249. /* Cancel currently queued command. */
  4250. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4251. #ifdef CONFIG_IWL4965_DEBUG
  4252. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4253. iwl4965_dump_nic_error_log(priv);
  4254. iwl4965_dump_nic_event_log(priv);
  4255. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4256. }
  4257. #endif
  4258. wake_up_interruptible(&priv->wait_command_queue);
  4259. /* Keep the restart process from trying to send host
  4260. * commands by clearing the INIT status bit */
  4261. clear_bit(STATUS_READY, &priv->status);
  4262. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4263. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4264. "Restarting adapter due to uCode error.\n");
  4265. if (iwl4965_is_associated(priv)) {
  4266. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4267. sizeof(priv->recovery_rxon));
  4268. priv->error_recovering = 1;
  4269. }
  4270. queue_work(priv->workqueue, &priv->restart);
  4271. }
  4272. }
  4273. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4274. {
  4275. unsigned long flags;
  4276. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4277. sizeof(priv->staging_rxon));
  4278. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4279. iwl4965_commit_rxon(priv);
  4280. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4281. spin_lock_irqsave(&priv->lock, flags);
  4282. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4283. priv->error_recovering = 0;
  4284. spin_unlock_irqrestore(&priv->lock, flags);
  4285. }
  4286. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4287. {
  4288. u32 inta, handled = 0;
  4289. u32 inta_fh;
  4290. unsigned long flags;
  4291. #ifdef CONFIG_IWL4965_DEBUG
  4292. u32 inta_mask;
  4293. #endif
  4294. spin_lock_irqsave(&priv->lock, flags);
  4295. /* Ack/clear/reset pending uCode interrupts.
  4296. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4297. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4298. inta = iwl4965_read32(priv, CSR_INT);
  4299. iwl4965_write32(priv, CSR_INT, inta);
  4300. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4301. * Any new interrupts that happen after this, either while we're
  4302. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4303. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4304. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4305. #ifdef CONFIG_IWL4965_DEBUG
  4306. if (iwl4965_debug_level & IWL_DL_ISR) {
  4307. /* just for debug */
  4308. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4309. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4310. inta, inta_mask, inta_fh);
  4311. }
  4312. #endif
  4313. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4314. * atomic, make sure that inta covers all the interrupts that
  4315. * we've discovered, even if FH interrupt came in just after
  4316. * reading CSR_INT. */
  4317. if (inta_fh & CSR_FH_INT_RX_MASK)
  4318. inta |= CSR_INT_BIT_FH_RX;
  4319. if (inta_fh & CSR_FH_INT_TX_MASK)
  4320. inta |= CSR_INT_BIT_FH_TX;
  4321. /* Now service all interrupt bits discovered above. */
  4322. if (inta & CSR_INT_BIT_HW_ERR) {
  4323. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4324. /* Tell the device to stop sending interrupts */
  4325. iwl4965_disable_interrupts(priv);
  4326. iwl4965_irq_handle_error(priv);
  4327. handled |= CSR_INT_BIT_HW_ERR;
  4328. spin_unlock_irqrestore(&priv->lock, flags);
  4329. return;
  4330. }
  4331. #ifdef CONFIG_IWL4965_DEBUG
  4332. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4333. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4334. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4335. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4336. /* Alive notification via Rx interrupt will do the real work */
  4337. if (inta & CSR_INT_BIT_ALIVE)
  4338. IWL_DEBUG_ISR("Alive interrupt\n");
  4339. }
  4340. #endif
  4341. /* Safely ignore these bits for debug checks below */
  4342. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4343. /* HW RF KILL switch toggled */
  4344. if (inta & CSR_INT_BIT_RF_KILL) {
  4345. int hw_rf_kill = 0;
  4346. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4347. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4348. hw_rf_kill = 1;
  4349. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4350. "RF_KILL bit toggled to %s.\n",
  4351. hw_rf_kill ? "disable radio":"enable radio");
  4352. /* Queue restart only if RF_KILL switch was set to "kill"
  4353. * when we loaded driver, and is now set to "enable".
  4354. * After we're Alive, RF_KILL gets handled by
  4355. * iwl_rx_card_state_notif() */
  4356. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4357. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4358. queue_work(priv->workqueue, &priv->restart);
  4359. }
  4360. handled |= CSR_INT_BIT_RF_KILL;
  4361. }
  4362. /* Chip got too hot and stopped itself */
  4363. if (inta & CSR_INT_BIT_CT_KILL) {
  4364. IWL_ERROR("Microcode CT kill error detected.\n");
  4365. handled |= CSR_INT_BIT_CT_KILL;
  4366. }
  4367. /* Error detected by uCode */
  4368. if (inta & CSR_INT_BIT_SW_ERR) {
  4369. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4370. inta);
  4371. iwl4965_irq_handle_error(priv);
  4372. handled |= CSR_INT_BIT_SW_ERR;
  4373. }
  4374. /* uCode wakes up after power-down sleep */
  4375. if (inta & CSR_INT_BIT_WAKEUP) {
  4376. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4377. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4378. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4379. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4380. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4381. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4382. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4383. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4384. handled |= CSR_INT_BIT_WAKEUP;
  4385. }
  4386. /* All uCode command responses, including Tx command responses,
  4387. * Rx "responses" (frame-received notification), and other
  4388. * notifications from uCode come through here*/
  4389. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4390. iwl4965_rx_handle(priv);
  4391. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4392. }
  4393. if (inta & CSR_INT_BIT_FH_TX) {
  4394. IWL_DEBUG_ISR("Tx interrupt\n");
  4395. handled |= CSR_INT_BIT_FH_TX;
  4396. }
  4397. if (inta & ~handled)
  4398. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4399. if (inta & ~CSR_INI_SET_MASK) {
  4400. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4401. inta & ~CSR_INI_SET_MASK);
  4402. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4403. }
  4404. /* Re-enable all interrupts */
  4405. iwl4965_enable_interrupts(priv);
  4406. #ifdef CONFIG_IWL4965_DEBUG
  4407. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4408. inta = iwl4965_read32(priv, CSR_INT);
  4409. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4410. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4411. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4412. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4413. }
  4414. #endif
  4415. spin_unlock_irqrestore(&priv->lock, flags);
  4416. }
  4417. static irqreturn_t iwl4965_isr(int irq, void *data)
  4418. {
  4419. struct iwl4965_priv *priv = data;
  4420. u32 inta, inta_mask;
  4421. u32 inta_fh;
  4422. if (!priv)
  4423. return IRQ_NONE;
  4424. spin_lock(&priv->lock);
  4425. /* Disable (but don't clear!) interrupts here to avoid
  4426. * back-to-back ISRs and sporadic interrupts from our NIC.
  4427. * If we have something to service, the tasklet will re-enable ints.
  4428. * If we *don't* have something, we'll re-enable before leaving here. */
  4429. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4430. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4431. /* Discover which interrupts are active/pending */
  4432. inta = iwl4965_read32(priv, CSR_INT);
  4433. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4434. /* Ignore interrupt if there's nothing in NIC to service.
  4435. * This may be due to IRQ shared with another device,
  4436. * or due to sporadic interrupts thrown from our NIC. */
  4437. if (!inta && !inta_fh) {
  4438. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4439. goto none;
  4440. }
  4441. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4442. /* Hardware disappeared. It might have already raised
  4443. * an interrupt */
  4444. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4445. goto unplugged;
  4446. }
  4447. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4448. inta, inta_mask, inta_fh);
  4449. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4450. tasklet_schedule(&priv->irq_tasklet);
  4451. unplugged:
  4452. spin_unlock(&priv->lock);
  4453. return IRQ_HANDLED;
  4454. none:
  4455. /* re-enable interrupts here since we don't have anything to service. */
  4456. iwl4965_enable_interrupts(priv);
  4457. spin_unlock(&priv->lock);
  4458. return IRQ_NONE;
  4459. }
  4460. /************************** EEPROM BANDS ****************************
  4461. *
  4462. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4463. * EEPROM contents to the specific channel number supported for each
  4464. * band.
  4465. *
  4466. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4467. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4468. * The specific geography and calibration information for that channel
  4469. * is contained in the eeprom map itself.
  4470. *
  4471. * During init, we copy the eeprom information and channel map
  4472. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4473. *
  4474. * channel_map_24/52 provides the index in the channel_info array for a
  4475. * given channel. We have to have two separate maps as there is channel
  4476. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4477. * band_2
  4478. *
  4479. * A value of 0xff stored in the channel_map indicates that the channel
  4480. * is not supported by the hardware at all.
  4481. *
  4482. * A value of 0xfe in the channel_map indicates that the channel is not
  4483. * valid for Tx with the current hardware. This means that
  4484. * while the system can tune and receive on a given channel, it may not
  4485. * be able to associate or transmit any frames on that
  4486. * channel. There is no corresponding channel information for that
  4487. * entry.
  4488. *
  4489. *********************************************************************/
  4490. /* 2.4 GHz */
  4491. static const u8 iwl4965_eeprom_band_1[14] = {
  4492. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4493. };
  4494. /* 5.2 GHz bands */
  4495. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4496. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4497. };
  4498. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4499. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4500. };
  4501. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4502. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4503. };
  4504. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4505. 145, 149, 153, 157, 161, 165
  4506. };
  4507. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4508. 1, 2, 3, 4, 5, 6, 7
  4509. };
  4510. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4511. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4512. };
  4513. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4514. int band,
  4515. int *eeprom_ch_count,
  4516. const struct iwl4965_eeprom_channel
  4517. **eeprom_ch_info,
  4518. const u8 **eeprom_ch_index)
  4519. {
  4520. switch (band) {
  4521. case 1: /* 2.4GHz band */
  4522. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4523. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4524. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4525. break;
  4526. case 2: /* 4.9GHz band */
  4527. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4528. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4529. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4530. break;
  4531. case 3: /* 5.2GHz band */
  4532. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4533. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4534. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4535. break;
  4536. case 4: /* 5.5GHz band */
  4537. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4538. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4539. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4540. break;
  4541. case 5: /* 5.7GHz band */
  4542. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4543. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4544. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4545. break;
  4546. case 6: /* 2.4GHz FAT channels */
  4547. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4548. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4549. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4550. break;
  4551. case 7: /* 5 GHz FAT channels */
  4552. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4553. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4554. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4555. break;
  4556. default:
  4557. BUG();
  4558. return;
  4559. }
  4560. }
  4561. /**
  4562. * iwl4965_get_channel_info - Find driver's private channel info
  4563. *
  4564. * Based on band and channel number.
  4565. */
  4566. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4567. int phymode, u16 channel)
  4568. {
  4569. int i;
  4570. switch (phymode) {
  4571. case MODE_IEEE80211A:
  4572. for (i = 14; i < priv->channel_count; i++) {
  4573. if (priv->channel_info[i].channel == channel)
  4574. return &priv->channel_info[i];
  4575. }
  4576. break;
  4577. case MODE_IEEE80211B:
  4578. case MODE_IEEE80211G:
  4579. if (channel >= 1 && channel <= 14)
  4580. return &priv->channel_info[channel - 1];
  4581. break;
  4582. }
  4583. return NULL;
  4584. }
  4585. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4586. ? # x " " : "")
  4587. /**
  4588. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4589. */
  4590. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4591. {
  4592. int eeprom_ch_count = 0;
  4593. const u8 *eeprom_ch_index = NULL;
  4594. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4595. int band, ch;
  4596. struct iwl4965_channel_info *ch_info;
  4597. if (priv->channel_count) {
  4598. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4599. return 0;
  4600. }
  4601. if (priv->eeprom.version < 0x2f) {
  4602. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4603. priv->eeprom.version);
  4604. return -EINVAL;
  4605. }
  4606. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4607. priv->channel_count =
  4608. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4609. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4610. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4611. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4612. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4613. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4614. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4615. priv->channel_count, GFP_KERNEL);
  4616. if (!priv->channel_info) {
  4617. IWL_ERROR("Could not allocate channel_info\n");
  4618. priv->channel_count = 0;
  4619. return -ENOMEM;
  4620. }
  4621. ch_info = priv->channel_info;
  4622. /* Loop through the 5 EEPROM bands adding them in order to the
  4623. * channel map we maintain (that contains additional information than
  4624. * what just in the EEPROM) */
  4625. for (band = 1; band <= 5; band++) {
  4626. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4627. &eeprom_ch_info, &eeprom_ch_index);
  4628. /* Loop through each band adding each of the channels */
  4629. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4630. ch_info->channel = eeprom_ch_index[ch];
  4631. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4632. MODE_IEEE80211A;
  4633. /* permanently store EEPROM's channel regulatory flags
  4634. * and max power in channel info database. */
  4635. ch_info->eeprom = eeprom_ch_info[ch];
  4636. /* Copy the run-time flags so they are there even on
  4637. * invalid channels */
  4638. ch_info->flags = eeprom_ch_info[ch].flags;
  4639. if (!(is_channel_valid(ch_info))) {
  4640. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4641. "No traffic\n",
  4642. ch_info->channel,
  4643. ch_info->flags,
  4644. is_channel_a_band(ch_info) ?
  4645. "5.2" : "2.4");
  4646. ch_info++;
  4647. continue;
  4648. }
  4649. /* Initialize regulatory-based run-time data */
  4650. ch_info->max_power_avg = ch_info->curr_txpow =
  4651. eeprom_ch_info[ch].max_power_avg;
  4652. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4653. ch_info->min_power = 0;
  4654. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4655. " %ddBm): Ad-Hoc %ssupported\n",
  4656. ch_info->channel,
  4657. is_channel_a_band(ch_info) ?
  4658. "5.2" : "2.4",
  4659. CHECK_AND_PRINT(IBSS),
  4660. CHECK_AND_PRINT(ACTIVE),
  4661. CHECK_AND_PRINT(RADAR),
  4662. CHECK_AND_PRINT(WIDE),
  4663. CHECK_AND_PRINT(NARROW),
  4664. CHECK_AND_PRINT(DFS),
  4665. eeprom_ch_info[ch].flags,
  4666. eeprom_ch_info[ch].max_power_avg,
  4667. ((eeprom_ch_info[ch].
  4668. flags & EEPROM_CHANNEL_IBSS)
  4669. && !(eeprom_ch_info[ch].
  4670. flags & EEPROM_CHANNEL_RADAR))
  4671. ? "" : "not ");
  4672. /* Set the user_txpower_limit to the highest power
  4673. * supported by any channel */
  4674. if (eeprom_ch_info[ch].max_power_avg >
  4675. priv->user_txpower_limit)
  4676. priv->user_txpower_limit =
  4677. eeprom_ch_info[ch].max_power_avg;
  4678. ch_info++;
  4679. }
  4680. }
  4681. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4682. for (band = 6; band <= 7; band++) {
  4683. int phymode;
  4684. u8 fat_extension_chan;
  4685. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4686. &eeprom_ch_info, &eeprom_ch_index);
  4687. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4688. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4689. /* Loop through each band adding each of the channels */
  4690. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4691. if ((band == 6) &&
  4692. ((eeprom_ch_index[ch] == 5) ||
  4693. (eeprom_ch_index[ch] == 6) ||
  4694. (eeprom_ch_index[ch] == 7)))
  4695. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4696. else
  4697. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4698. /* Set up driver's info for lower half */
  4699. iwl4965_set_fat_chan_info(priv, phymode,
  4700. eeprom_ch_index[ch],
  4701. &(eeprom_ch_info[ch]),
  4702. fat_extension_chan);
  4703. /* Set up driver's info for upper half */
  4704. iwl4965_set_fat_chan_info(priv, phymode,
  4705. (eeprom_ch_index[ch] + 4),
  4706. &(eeprom_ch_info[ch]),
  4707. HT_IE_EXT_CHANNEL_BELOW);
  4708. }
  4709. }
  4710. return 0;
  4711. }
  4712. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4713. * sending probe req. This should be set long enough to hear probe responses
  4714. * from more than one AP. */
  4715. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4716. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4717. /* For faster active scanning, scan will move to the next channel if fewer than
  4718. * PLCP_QUIET_THRESH packets are heard on this channel within
  4719. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4720. * time if it's a quiet channel (nothing responded to our probe, and there's
  4721. * no other traffic).
  4722. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4723. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4724. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4725. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4726. * Must be set longer than active dwell time.
  4727. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4728. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4729. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4730. #define IWL_PASSIVE_DWELL_BASE (100)
  4731. #define IWL_CHANNEL_TUNE_TIME 5
  4732. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4733. {
  4734. if (phymode == MODE_IEEE80211A)
  4735. return IWL_ACTIVE_DWELL_TIME_52;
  4736. else
  4737. return IWL_ACTIVE_DWELL_TIME_24;
  4738. }
  4739. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4740. {
  4741. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4742. u16 passive = (phymode != MODE_IEEE80211A) ?
  4743. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4744. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4745. if (iwl4965_is_associated(priv)) {
  4746. /* If we're associated, we clamp the maximum passive
  4747. * dwell time to be 98% of the beacon interval (minus
  4748. * 2 * channel tune time) */
  4749. passive = priv->beacon_int;
  4750. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4751. passive = IWL_PASSIVE_DWELL_BASE;
  4752. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4753. }
  4754. if (passive <= active)
  4755. passive = active + 1;
  4756. return passive;
  4757. }
  4758. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4759. u8 is_active, u8 direct_mask,
  4760. struct iwl4965_scan_channel *scan_ch)
  4761. {
  4762. const struct ieee80211_channel *channels = NULL;
  4763. const struct ieee80211_hw_mode *hw_mode;
  4764. const struct iwl4965_channel_info *ch_info;
  4765. u16 passive_dwell = 0;
  4766. u16 active_dwell = 0;
  4767. int added, i;
  4768. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4769. if (!hw_mode)
  4770. return 0;
  4771. channels = hw_mode->channels;
  4772. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4773. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4774. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4775. if (channels[i].chan ==
  4776. le16_to_cpu(priv->active_rxon.channel)) {
  4777. if (iwl4965_is_associated(priv)) {
  4778. IWL_DEBUG_SCAN
  4779. ("Skipping current channel %d\n",
  4780. le16_to_cpu(priv->active_rxon.channel));
  4781. continue;
  4782. }
  4783. } else if (priv->only_active_channel)
  4784. continue;
  4785. scan_ch->channel = channels[i].chan;
  4786. ch_info = iwl4965_get_channel_info(priv, phymode,
  4787. scan_ch->channel);
  4788. if (!is_channel_valid(ch_info)) {
  4789. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4790. scan_ch->channel);
  4791. continue;
  4792. }
  4793. if (!is_active || is_channel_passive(ch_info) ||
  4794. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4795. scan_ch->type = 0; /* passive */
  4796. else
  4797. scan_ch->type = 1; /* active */
  4798. if (scan_ch->type & 1)
  4799. scan_ch->type |= (direct_mask << 1);
  4800. if (is_channel_narrow(ch_info))
  4801. scan_ch->type |= (1 << 7);
  4802. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4803. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4804. /* Set txpower levels to defaults */
  4805. scan_ch->tpc.dsp_atten = 110;
  4806. /* scan_pwr_info->tpc.dsp_atten; */
  4807. /*scan_pwr_info->tpc.tx_gain; */
  4808. if (phymode == MODE_IEEE80211A)
  4809. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4810. else {
  4811. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4812. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4813. * power level:
  4814. * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4815. */
  4816. }
  4817. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4818. scan_ch->channel,
  4819. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4820. (scan_ch->type & 1) ?
  4821. active_dwell : passive_dwell);
  4822. scan_ch++;
  4823. added++;
  4824. }
  4825. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4826. return added;
  4827. }
  4828. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4829. {
  4830. int i, j;
  4831. for (i = 0; i < 3; i++) {
  4832. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4833. for (j = 0; j < hw_mode->num_channels; j++)
  4834. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4835. }
  4836. }
  4837. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4838. struct ieee80211_rate *rates)
  4839. {
  4840. int i;
  4841. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4842. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4843. rates[i].val = i; /* Rate scaling will work on indexes */
  4844. rates[i].val2 = i;
  4845. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4846. /* Only OFDM have the bits-per-symbol set */
  4847. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4848. rates[i].flags |= IEEE80211_RATE_OFDM;
  4849. else {
  4850. /*
  4851. * If CCK 1M then set rate flag to CCK else CCK_2
  4852. * which is CCK | PREAMBLE2
  4853. */
  4854. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4855. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4856. }
  4857. /* Set up which ones are basic rates... */
  4858. if (IWL_BASIC_RATES_MASK & (1 << i))
  4859. rates[i].flags |= IEEE80211_RATE_BASIC;
  4860. }
  4861. }
  4862. /**
  4863. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4864. */
  4865. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4866. {
  4867. struct iwl4965_channel_info *ch;
  4868. struct ieee80211_hw_mode *modes;
  4869. struct ieee80211_channel *channels;
  4870. struct ieee80211_channel *geo_ch;
  4871. struct ieee80211_rate *rates;
  4872. int i = 0;
  4873. enum {
  4874. A = 0,
  4875. B = 1,
  4876. G = 2,
  4877. A_11N = 3,
  4878. G_11N = 4,
  4879. };
  4880. int mode_count = 5;
  4881. if (priv->modes) {
  4882. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4883. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4884. return 0;
  4885. }
  4886. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4887. GFP_KERNEL);
  4888. if (!modes)
  4889. return -ENOMEM;
  4890. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4891. priv->channel_count, GFP_KERNEL);
  4892. if (!channels) {
  4893. kfree(modes);
  4894. return -ENOMEM;
  4895. }
  4896. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4897. GFP_KERNEL);
  4898. if (!rates) {
  4899. kfree(modes);
  4900. kfree(channels);
  4901. return -ENOMEM;
  4902. }
  4903. /* 0 = 802.11a
  4904. * 1 = 802.11b
  4905. * 2 = 802.11g
  4906. */
  4907. /* 5.2GHz channels start after the 2.4GHz channels */
  4908. modes[A].mode = MODE_IEEE80211A;
  4909. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4910. modes[A].rates = rates;
  4911. modes[A].num_rates = 8; /* just OFDM */
  4912. modes[A].rates = &rates[4];
  4913. modes[A].num_channels = 0;
  4914. modes[B].mode = MODE_IEEE80211B;
  4915. modes[B].channels = channels;
  4916. modes[B].rates = rates;
  4917. modes[B].num_rates = 4; /* just CCK */
  4918. modes[B].num_channels = 0;
  4919. modes[G].mode = MODE_IEEE80211G;
  4920. modes[G].channels = channels;
  4921. modes[G].rates = rates;
  4922. modes[G].num_rates = 12; /* OFDM & CCK */
  4923. modes[G].num_channels = 0;
  4924. modes[G_11N].mode = MODE_IEEE80211G;
  4925. modes[G_11N].channels = channels;
  4926. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4927. modes[G_11N].rates = rates;
  4928. modes[G_11N].num_channels = 0;
  4929. modes[A_11N].mode = MODE_IEEE80211A;
  4930. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4931. modes[A_11N].rates = &rates[4];
  4932. modes[A_11N].num_rates = 9; /* just OFDM */
  4933. modes[A_11N].num_channels = 0;
  4934. priv->ieee_channels = channels;
  4935. priv->ieee_rates = rates;
  4936. iwl4965_init_hw_rates(priv, rates);
  4937. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4938. ch = &priv->channel_info[i];
  4939. if (!is_channel_valid(ch)) {
  4940. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4941. "skipping.\n",
  4942. ch->channel, is_channel_a_band(ch) ?
  4943. "5.2" : "2.4");
  4944. continue;
  4945. }
  4946. if (is_channel_a_band(ch)) {
  4947. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4948. modes[A_11N].num_channels++;
  4949. } else {
  4950. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4951. modes[G].num_channels++;
  4952. modes[G_11N].num_channels++;
  4953. }
  4954. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4955. geo_ch->chan = ch->channel;
  4956. geo_ch->power_level = ch->max_power_avg;
  4957. geo_ch->antenna_max = 0xff;
  4958. if (is_channel_valid(ch)) {
  4959. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4960. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4961. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4962. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4963. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4964. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4965. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4966. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4967. priv->max_channel_txpower_limit =
  4968. ch->max_power_avg;
  4969. }
  4970. geo_ch->val = geo_ch->flag;
  4971. }
  4972. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4973. printk(KERN_INFO DRV_NAME
  4974. ": Incorrectly detected BG card as ABG. Please send "
  4975. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4976. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4977. priv->is_abg = 0;
  4978. }
  4979. printk(KERN_INFO DRV_NAME
  4980. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4981. modes[G].num_channels, modes[A].num_channels);
  4982. /*
  4983. * NOTE: We register these in preference of order -- the
  4984. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4985. * a phymode based on rates or AP capabilities but seems to
  4986. * configure it purely on if the channel being configured
  4987. * is supported by a mode -- and the first match is taken
  4988. */
  4989. if (modes[G].num_channels)
  4990. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4991. if (modes[B].num_channels)
  4992. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4993. if (modes[A].num_channels)
  4994. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4995. priv->modes = modes;
  4996. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4997. return 0;
  4998. }
  4999. /******************************************************************************
  5000. *
  5001. * uCode download functions
  5002. *
  5003. ******************************************************************************/
  5004. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  5005. {
  5006. if (priv->ucode_code.v_addr != NULL) {
  5007. pci_free_consistent(priv->pci_dev,
  5008. priv->ucode_code.len,
  5009. priv->ucode_code.v_addr,
  5010. priv->ucode_code.p_addr);
  5011. priv->ucode_code.v_addr = NULL;
  5012. }
  5013. if (priv->ucode_data.v_addr != NULL) {
  5014. pci_free_consistent(priv->pci_dev,
  5015. priv->ucode_data.len,
  5016. priv->ucode_data.v_addr,
  5017. priv->ucode_data.p_addr);
  5018. priv->ucode_data.v_addr = NULL;
  5019. }
  5020. if (priv->ucode_data_backup.v_addr != NULL) {
  5021. pci_free_consistent(priv->pci_dev,
  5022. priv->ucode_data_backup.len,
  5023. priv->ucode_data_backup.v_addr,
  5024. priv->ucode_data_backup.p_addr);
  5025. priv->ucode_data_backup.v_addr = NULL;
  5026. }
  5027. if (priv->ucode_init.v_addr != NULL) {
  5028. pci_free_consistent(priv->pci_dev,
  5029. priv->ucode_init.len,
  5030. priv->ucode_init.v_addr,
  5031. priv->ucode_init.p_addr);
  5032. priv->ucode_init.v_addr = NULL;
  5033. }
  5034. if (priv->ucode_init_data.v_addr != NULL) {
  5035. pci_free_consistent(priv->pci_dev,
  5036. priv->ucode_init_data.len,
  5037. priv->ucode_init_data.v_addr,
  5038. priv->ucode_init_data.p_addr);
  5039. priv->ucode_init_data.v_addr = NULL;
  5040. }
  5041. if (priv->ucode_boot.v_addr != NULL) {
  5042. pci_free_consistent(priv->pci_dev,
  5043. priv->ucode_boot.len,
  5044. priv->ucode_boot.v_addr,
  5045. priv->ucode_boot.p_addr);
  5046. priv->ucode_boot.v_addr = NULL;
  5047. }
  5048. }
  5049. /**
  5050. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  5051. * looking at all data.
  5052. */
  5053. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 * image,
  5054. u32 len)
  5055. {
  5056. u32 val;
  5057. u32 save_len = len;
  5058. int rc = 0;
  5059. u32 errcnt;
  5060. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5061. rc = iwl4965_grab_nic_access(priv);
  5062. if (rc)
  5063. return rc;
  5064. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5065. errcnt = 0;
  5066. for (; len > 0; len -= sizeof(u32), image++) {
  5067. /* read data comes through single port, auto-incr addr */
  5068. /* NOTE: Use the debugless read so we don't flood kernel log
  5069. * if IWL_DL_IO is set */
  5070. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5071. if (val != le32_to_cpu(*image)) {
  5072. IWL_ERROR("uCode INST section is invalid at "
  5073. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5074. save_len - len, val, le32_to_cpu(*image));
  5075. rc = -EIO;
  5076. errcnt++;
  5077. if (errcnt >= 20)
  5078. break;
  5079. }
  5080. }
  5081. iwl4965_release_nic_access(priv);
  5082. if (!errcnt)
  5083. IWL_DEBUG_INFO
  5084. ("ucode image in INSTRUCTION memory is good\n");
  5085. return rc;
  5086. }
  5087. /**
  5088. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5089. * using sample data 100 bytes apart. If these sample points are good,
  5090. * it's a pretty good bet that everything between them is good, too.
  5091. */
  5092. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5093. {
  5094. u32 val;
  5095. int rc = 0;
  5096. u32 errcnt = 0;
  5097. u32 i;
  5098. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5099. rc = iwl4965_grab_nic_access(priv);
  5100. if (rc)
  5101. return rc;
  5102. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5103. /* read data comes through single port, auto-incr addr */
  5104. /* NOTE: Use the debugless read so we don't flood kernel log
  5105. * if IWL_DL_IO is set */
  5106. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5107. i + RTC_INST_LOWER_BOUND);
  5108. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5109. if (val != le32_to_cpu(*image)) {
  5110. #if 0 /* Enable this if you want to see details */
  5111. IWL_ERROR("uCode INST section is invalid at "
  5112. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5113. i, val, *image);
  5114. #endif
  5115. rc = -EIO;
  5116. errcnt++;
  5117. if (errcnt >= 3)
  5118. break;
  5119. }
  5120. }
  5121. iwl4965_release_nic_access(priv);
  5122. return rc;
  5123. }
  5124. /**
  5125. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5126. * and verify its contents
  5127. */
  5128. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5129. {
  5130. __le32 *image;
  5131. u32 len;
  5132. int rc = 0;
  5133. /* Try bootstrap */
  5134. image = (__le32 *)priv->ucode_boot.v_addr;
  5135. len = priv->ucode_boot.len;
  5136. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5137. if (rc == 0) {
  5138. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5139. return 0;
  5140. }
  5141. /* Try initialize */
  5142. image = (__le32 *)priv->ucode_init.v_addr;
  5143. len = priv->ucode_init.len;
  5144. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5145. if (rc == 0) {
  5146. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5147. return 0;
  5148. }
  5149. /* Try runtime/protocol */
  5150. image = (__le32 *)priv->ucode_code.v_addr;
  5151. len = priv->ucode_code.len;
  5152. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5153. if (rc == 0) {
  5154. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5155. return 0;
  5156. }
  5157. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5158. /* Since nothing seems to match, show first several data entries in
  5159. * instruction SRAM, so maybe visual inspection will give a clue.
  5160. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5161. image = (__le32 *)priv->ucode_boot.v_addr;
  5162. len = priv->ucode_boot.len;
  5163. rc = iwl4965_verify_inst_full(priv, image, len);
  5164. return rc;
  5165. }
  5166. /* check contents of special bootstrap uCode SRAM */
  5167. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5168. {
  5169. __le32 *image = priv->ucode_boot.v_addr;
  5170. u32 len = priv->ucode_boot.len;
  5171. u32 reg;
  5172. u32 val;
  5173. IWL_DEBUG_INFO("Begin verify bsm\n");
  5174. /* verify BSM SRAM contents */
  5175. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5176. for (reg = BSM_SRAM_LOWER_BOUND;
  5177. reg < BSM_SRAM_LOWER_BOUND + len;
  5178. reg += sizeof(u32), image ++) {
  5179. val = iwl4965_read_prph(priv, reg);
  5180. if (val != le32_to_cpu(*image)) {
  5181. IWL_ERROR("BSM uCode verification failed at "
  5182. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5183. BSM_SRAM_LOWER_BOUND,
  5184. reg - BSM_SRAM_LOWER_BOUND, len,
  5185. val, le32_to_cpu(*image));
  5186. return -EIO;
  5187. }
  5188. }
  5189. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5190. return 0;
  5191. }
  5192. /**
  5193. * iwl4965_load_bsm - Load bootstrap instructions
  5194. *
  5195. * BSM operation:
  5196. *
  5197. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5198. * in special SRAM that does not power down during RFKILL. When powering back
  5199. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5200. * the bootstrap program into the on-board processor, and starts it.
  5201. *
  5202. * The bootstrap program loads (via DMA) instructions and data for a new
  5203. * program from host DRAM locations indicated by the host driver in the
  5204. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5205. * automatically.
  5206. *
  5207. * When initializing the NIC, the host driver points the BSM to the
  5208. * "initialize" uCode image. This uCode sets up some internal data, then
  5209. * notifies host via "initialize alive" that it is complete.
  5210. *
  5211. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5212. * normal runtime uCode instructions and a backup uCode data cache buffer
  5213. * (filled initially with starting data values for the on-board processor),
  5214. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5215. * which begins normal operation.
  5216. *
  5217. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5218. * the backup data cache in DRAM before SRAM is powered down.
  5219. *
  5220. * When powering back up, the BSM loads the bootstrap program. This reloads
  5221. * the runtime uCode instructions and the backup data cache into SRAM,
  5222. * and re-launches the runtime uCode from where it left off.
  5223. */
  5224. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5225. {
  5226. __le32 *image = priv->ucode_boot.v_addr;
  5227. u32 len = priv->ucode_boot.len;
  5228. dma_addr_t pinst;
  5229. dma_addr_t pdata;
  5230. u32 inst_len;
  5231. u32 data_len;
  5232. int rc;
  5233. int i;
  5234. u32 done;
  5235. u32 reg_offset;
  5236. IWL_DEBUG_INFO("Begin load bsm\n");
  5237. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5238. if (len > IWL_MAX_BSM_SIZE)
  5239. return -EINVAL;
  5240. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5241. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5242. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5243. * after the "initialize" uCode has run, to point to
  5244. * runtime/protocol instructions and backup data cache. */
  5245. pinst = priv->ucode_init.p_addr >> 4;
  5246. pdata = priv->ucode_init_data.p_addr >> 4;
  5247. inst_len = priv->ucode_init.len;
  5248. data_len = priv->ucode_init_data.len;
  5249. rc = iwl4965_grab_nic_access(priv);
  5250. if (rc)
  5251. return rc;
  5252. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5253. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5254. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5255. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5256. /* Fill BSM memory with bootstrap instructions */
  5257. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5258. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5259. reg_offset += sizeof(u32), image++)
  5260. _iwl4965_write_prph(priv, reg_offset,
  5261. le32_to_cpu(*image));
  5262. rc = iwl4965_verify_bsm(priv);
  5263. if (rc) {
  5264. iwl4965_release_nic_access(priv);
  5265. return rc;
  5266. }
  5267. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5268. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5269. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5270. RTC_INST_LOWER_BOUND);
  5271. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5272. /* Load bootstrap code into instruction SRAM now,
  5273. * to prepare to load "initialize" uCode */
  5274. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5275. BSM_WR_CTRL_REG_BIT_START);
  5276. /* Wait for load of bootstrap uCode to finish */
  5277. for (i = 0; i < 100; i++) {
  5278. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5279. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5280. break;
  5281. udelay(10);
  5282. }
  5283. if (i < 100)
  5284. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5285. else {
  5286. IWL_ERROR("BSM write did not complete!\n");
  5287. return -EIO;
  5288. }
  5289. /* Enable future boot loads whenever power management unit triggers it
  5290. * (e.g. when powering back up after power-save shutdown) */
  5291. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5292. BSM_WR_CTRL_REG_BIT_START_EN);
  5293. iwl4965_release_nic_access(priv);
  5294. return 0;
  5295. }
  5296. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5297. {
  5298. /* Remove all resets to allow NIC to operate */
  5299. iwl4965_write32(priv, CSR_RESET, 0);
  5300. }
  5301. static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
  5302. {
  5303. desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
  5304. return (desc->v_addr != NULL) ? 0 : -ENOMEM;
  5305. }
  5306. /**
  5307. * iwl4965_read_ucode - Read uCode images from disk file.
  5308. *
  5309. * Copy into buffers for card to fetch via bus-mastering
  5310. */
  5311. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5312. {
  5313. struct iwl4965_ucode *ucode;
  5314. int ret;
  5315. const struct firmware *ucode_raw;
  5316. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5317. u8 *src;
  5318. size_t len;
  5319. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5320. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5321. * request_firmware() is synchronous, file is in memory on return. */
  5322. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5323. if (ret < 0) {
  5324. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5325. name, ret);
  5326. goto error;
  5327. }
  5328. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5329. name, ucode_raw->size);
  5330. /* Make sure that we got at least our header! */
  5331. if (ucode_raw->size < sizeof(*ucode)) {
  5332. IWL_ERROR("File size way too small!\n");
  5333. ret = -EINVAL;
  5334. goto err_release;
  5335. }
  5336. /* Data from ucode file: header followed by uCode images */
  5337. ucode = (void *)ucode_raw->data;
  5338. ver = le32_to_cpu(ucode->ver);
  5339. inst_size = le32_to_cpu(ucode->inst_size);
  5340. data_size = le32_to_cpu(ucode->data_size);
  5341. init_size = le32_to_cpu(ucode->init_size);
  5342. init_data_size = le32_to_cpu(ucode->init_data_size);
  5343. boot_size = le32_to_cpu(ucode->boot_size);
  5344. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5345. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5346. inst_size);
  5347. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5348. data_size);
  5349. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5350. init_size);
  5351. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5352. init_data_size);
  5353. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5354. boot_size);
  5355. /* Verify size of file vs. image size info in file's header */
  5356. if (ucode_raw->size < sizeof(*ucode) +
  5357. inst_size + data_size + init_size +
  5358. init_data_size + boot_size) {
  5359. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5360. (int)ucode_raw->size);
  5361. ret = -EINVAL;
  5362. goto err_release;
  5363. }
  5364. /* Verify that uCode images will fit in card's SRAM */
  5365. if (inst_size > IWL_MAX_INST_SIZE) {
  5366. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5367. inst_size);
  5368. ret = -EINVAL;
  5369. goto err_release;
  5370. }
  5371. if (data_size > IWL_MAX_DATA_SIZE) {
  5372. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5373. data_size);
  5374. ret = -EINVAL;
  5375. goto err_release;
  5376. }
  5377. if (init_size > IWL_MAX_INST_SIZE) {
  5378. IWL_DEBUG_INFO
  5379. ("uCode init instr len %d too large to fit in\n",
  5380. init_size);
  5381. ret = -EINVAL;
  5382. goto err_release;
  5383. }
  5384. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5385. IWL_DEBUG_INFO
  5386. ("uCode init data len %d too large to fit in\n",
  5387. init_data_size);
  5388. ret = -EINVAL;
  5389. goto err_release;
  5390. }
  5391. if (boot_size > IWL_MAX_BSM_SIZE) {
  5392. IWL_DEBUG_INFO
  5393. ("uCode boot instr len %d too large to fit in\n",
  5394. boot_size);
  5395. ret = -EINVAL;
  5396. goto err_release;
  5397. }
  5398. /* Allocate ucode buffers for card's bus-master loading ... */
  5399. /* Runtime instructions and 2 copies of data:
  5400. * 1) unmodified from disk
  5401. * 2) backup cache for save/restore during power-downs */
  5402. priv->ucode_code.len = inst_size;
  5403. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5404. priv->ucode_data.len = data_size;
  5405. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5406. priv->ucode_data_backup.len = data_size;
  5407. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5408. /* Initialization instructions and data */
  5409. if (init_size && init_data_size) {
  5410. priv->ucode_init.len = init_size;
  5411. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5412. priv->ucode_init_data.len = init_data_size;
  5413. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5414. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5415. goto err_pci_alloc;
  5416. }
  5417. /* Bootstrap (instructions only, no data) */
  5418. if (boot_size) {
  5419. priv->ucode_boot.len = boot_size;
  5420. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5421. if (!priv->ucode_boot.v_addr)
  5422. goto err_pci_alloc;
  5423. }
  5424. /* Copy images into buffers for card's bus-master reads ... */
  5425. /* Runtime instructions (first block of data in file) */
  5426. src = &ucode->data[0];
  5427. len = priv->ucode_code.len;
  5428. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5429. memcpy(priv->ucode_code.v_addr, src, len);
  5430. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5431. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5432. /* Runtime data (2nd block)
  5433. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5434. src = &ucode->data[inst_size];
  5435. len = priv->ucode_data.len;
  5436. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5437. memcpy(priv->ucode_data.v_addr, src, len);
  5438. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5439. /* Initialization instructions (3rd block) */
  5440. if (init_size) {
  5441. src = &ucode->data[inst_size + data_size];
  5442. len = priv->ucode_init.len;
  5443. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5444. len);
  5445. memcpy(priv->ucode_init.v_addr, src, len);
  5446. }
  5447. /* Initialization data (4th block) */
  5448. if (init_data_size) {
  5449. src = &ucode->data[inst_size + data_size + init_size];
  5450. len = priv->ucode_init_data.len;
  5451. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5452. len);
  5453. memcpy(priv->ucode_init_data.v_addr, src, len);
  5454. }
  5455. /* Bootstrap instructions (5th block) */
  5456. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5457. len = priv->ucode_boot.len;
  5458. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5459. memcpy(priv->ucode_boot.v_addr, src, len);
  5460. /* We have our copies now, allow OS release its copies */
  5461. release_firmware(ucode_raw);
  5462. return 0;
  5463. err_pci_alloc:
  5464. IWL_ERROR("failed to allocate pci memory\n");
  5465. ret = -ENOMEM;
  5466. iwl4965_dealloc_ucode_pci(priv);
  5467. err_release:
  5468. release_firmware(ucode_raw);
  5469. error:
  5470. return ret;
  5471. }
  5472. /**
  5473. * iwl4965_set_ucode_ptrs - Set uCode address location
  5474. *
  5475. * Tell initialization uCode where to find runtime uCode.
  5476. *
  5477. * BSM registers initially contain pointers to initialization uCode.
  5478. * We need to replace them to load runtime uCode inst and data,
  5479. * and to save runtime data when powering down.
  5480. */
  5481. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5482. {
  5483. dma_addr_t pinst;
  5484. dma_addr_t pdata;
  5485. int rc = 0;
  5486. unsigned long flags;
  5487. /* bits 35:4 for 4965 */
  5488. pinst = priv->ucode_code.p_addr >> 4;
  5489. pdata = priv->ucode_data_backup.p_addr >> 4;
  5490. spin_lock_irqsave(&priv->lock, flags);
  5491. rc = iwl4965_grab_nic_access(priv);
  5492. if (rc) {
  5493. spin_unlock_irqrestore(&priv->lock, flags);
  5494. return rc;
  5495. }
  5496. /* Tell bootstrap uCode where to find image to load */
  5497. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5498. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5499. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5500. priv->ucode_data.len);
  5501. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5502. * that all new ptr/size info is in place */
  5503. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5504. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5505. iwl4965_release_nic_access(priv);
  5506. spin_unlock_irqrestore(&priv->lock, flags);
  5507. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5508. return rc;
  5509. }
  5510. /**
  5511. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5512. *
  5513. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5514. *
  5515. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5516. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5517. * (3945 does not contain this data).
  5518. *
  5519. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5520. */
  5521. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5522. {
  5523. /* Check alive response for "valid" sign from uCode */
  5524. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5525. /* We had an error bringing up the hardware, so take it
  5526. * all the way back down so we can try again */
  5527. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5528. goto restart;
  5529. }
  5530. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5531. * This is a paranoid check, because we would not have gotten the
  5532. * "initialize" alive if code weren't properly loaded. */
  5533. if (iwl4965_verify_ucode(priv)) {
  5534. /* Runtime instruction load was bad;
  5535. * take it all the way back down so we can try again */
  5536. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5537. goto restart;
  5538. }
  5539. /* Calculate temperature */
  5540. priv->temperature = iwl4965_get_temperature(priv);
  5541. /* Send pointers to protocol/runtime uCode image ... init code will
  5542. * load and launch runtime uCode, which will send us another "Alive"
  5543. * notification. */
  5544. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5545. if (iwl4965_set_ucode_ptrs(priv)) {
  5546. /* Runtime instruction load won't happen;
  5547. * take it all the way back down so we can try again */
  5548. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5549. goto restart;
  5550. }
  5551. return;
  5552. restart:
  5553. queue_work(priv->workqueue, &priv->restart);
  5554. }
  5555. /**
  5556. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5557. * from protocol/runtime uCode (initialization uCode's
  5558. * Alive gets handled by iwl4965_init_alive_start()).
  5559. */
  5560. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5561. {
  5562. int rc = 0;
  5563. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5564. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5565. /* We had an error bringing up the hardware, so take it
  5566. * all the way back down so we can try again */
  5567. IWL_DEBUG_INFO("Alive failed.\n");
  5568. goto restart;
  5569. }
  5570. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5571. * This is a paranoid check, because we would not have gotten the
  5572. * "runtime" alive if code weren't properly loaded. */
  5573. if (iwl4965_verify_ucode(priv)) {
  5574. /* Runtime instruction load was bad;
  5575. * take it all the way back down so we can try again */
  5576. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5577. goto restart;
  5578. }
  5579. iwl4965_clear_stations_table(priv);
  5580. rc = iwl4965_alive_notify(priv);
  5581. if (rc) {
  5582. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5583. rc);
  5584. goto restart;
  5585. }
  5586. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5587. set_bit(STATUS_ALIVE, &priv->status);
  5588. /* Clear out the uCode error bit if it is set */
  5589. clear_bit(STATUS_FW_ERROR, &priv->status);
  5590. rc = iwl4965_init_channel_map(priv);
  5591. if (rc) {
  5592. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5593. return;
  5594. }
  5595. iwl4965_init_geos(priv);
  5596. if (iwl4965_is_rfkill(priv))
  5597. return;
  5598. if (!priv->mac80211_registered) {
  5599. /* Unlock so any user space entry points can call back into
  5600. * the driver without a deadlock... */
  5601. mutex_unlock(&priv->mutex);
  5602. iwl4965_rate_control_register(priv->hw);
  5603. rc = ieee80211_register_hw(priv->hw);
  5604. priv->hw->conf.beacon_int = 100;
  5605. mutex_lock(&priv->mutex);
  5606. if (rc) {
  5607. iwl4965_rate_control_unregister(priv->hw);
  5608. IWL_ERROR("Failed to register network "
  5609. "device (error %d)\n", rc);
  5610. return;
  5611. }
  5612. priv->mac80211_registered = 1;
  5613. iwl4965_reset_channel_flag(priv);
  5614. } else
  5615. ieee80211_start_queues(priv->hw);
  5616. priv->active_rate = priv->rates_mask;
  5617. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5618. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5619. if (iwl4965_is_associated(priv)) {
  5620. struct iwl4965_rxon_cmd *active_rxon =
  5621. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5622. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5623. sizeof(priv->staging_rxon));
  5624. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5625. } else {
  5626. /* Initialize our rx_config data */
  5627. iwl4965_connection_init_rx_config(priv);
  5628. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5629. }
  5630. /* Configure Bluetooth device coexistence support */
  5631. iwl4965_send_bt_config(priv);
  5632. /* Configure the adapter for unassociated operation */
  5633. iwl4965_commit_rxon(priv);
  5634. /* At this point, the NIC is initialized and operational */
  5635. priv->notif_missed_beacons = 0;
  5636. set_bit(STATUS_READY, &priv->status);
  5637. iwl4965_rf_kill_ct_config(priv);
  5638. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5639. if (priv->error_recovering)
  5640. iwl4965_error_recovery(priv);
  5641. return;
  5642. restart:
  5643. queue_work(priv->workqueue, &priv->restart);
  5644. }
  5645. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5646. static void __iwl4965_down(struct iwl4965_priv *priv)
  5647. {
  5648. unsigned long flags;
  5649. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5650. struct ieee80211_conf *conf = NULL;
  5651. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5652. conf = ieee80211_get_hw_conf(priv->hw);
  5653. if (!exit_pending)
  5654. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5655. iwl4965_clear_stations_table(priv);
  5656. /* Unblock any waiting calls */
  5657. wake_up_interruptible_all(&priv->wait_command_queue);
  5658. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5659. * exiting the module */
  5660. if (!exit_pending)
  5661. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5662. /* stop and reset the on-board processor */
  5663. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5664. /* tell the device to stop sending interrupts */
  5665. iwl4965_disable_interrupts(priv);
  5666. if (priv->mac80211_registered)
  5667. ieee80211_stop_queues(priv->hw);
  5668. /* If we have not previously called iwl4965_init() then
  5669. * clear all bits but the RF Kill and SUSPEND bits and return */
  5670. if (!iwl4965_is_init(priv)) {
  5671. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5672. STATUS_RF_KILL_HW |
  5673. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5674. STATUS_RF_KILL_SW |
  5675. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5676. STATUS_IN_SUSPEND;
  5677. goto exit;
  5678. }
  5679. /* ...otherwise clear out all the status bits but the RF Kill and
  5680. * SUSPEND bits and continue taking the NIC down. */
  5681. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5682. STATUS_RF_KILL_HW |
  5683. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5684. STATUS_RF_KILL_SW |
  5685. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5686. STATUS_IN_SUSPEND |
  5687. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5688. STATUS_FW_ERROR;
  5689. spin_lock_irqsave(&priv->lock, flags);
  5690. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5691. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5692. spin_unlock_irqrestore(&priv->lock, flags);
  5693. iwl4965_hw_txq_ctx_stop(priv);
  5694. iwl4965_hw_rxq_stop(priv);
  5695. spin_lock_irqsave(&priv->lock, flags);
  5696. if (!iwl4965_grab_nic_access(priv)) {
  5697. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5698. APMG_CLK_VAL_DMA_CLK_RQT);
  5699. iwl4965_release_nic_access(priv);
  5700. }
  5701. spin_unlock_irqrestore(&priv->lock, flags);
  5702. udelay(5);
  5703. iwl4965_hw_nic_stop_master(priv);
  5704. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5705. iwl4965_hw_nic_reset(priv);
  5706. exit:
  5707. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5708. if (priv->ibss_beacon)
  5709. dev_kfree_skb(priv->ibss_beacon);
  5710. priv->ibss_beacon = NULL;
  5711. /* clear out any free frames */
  5712. iwl4965_clear_free_frames(priv);
  5713. }
  5714. static void iwl4965_down(struct iwl4965_priv *priv)
  5715. {
  5716. mutex_lock(&priv->mutex);
  5717. __iwl4965_down(priv);
  5718. mutex_unlock(&priv->mutex);
  5719. iwl4965_cancel_deferred_work(priv);
  5720. }
  5721. #define MAX_HW_RESTARTS 5
  5722. static int __iwl4965_up(struct iwl4965_priv *priv)
  5723. {
  5724. DECLARE_MAC_BUF(mac);
  5725. int rc, i;
  5726. u32 hw_rf_kill = 0;
  5727. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5728. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5729. return -EIO;
  5730. }
  5731. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5732. IWL_WARNING("Radio disabled by SW RF kill (module "
  5733. "parameter)\n");
  5734. return 0;
  5735. }
  5736. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5737. IWL_ERROR("ucode not available for device bringup\n");
  5738. return -EIO;
  5739. }
  5740. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5741. rc = iwl4965_hw_nic_init(priv);
  5742. if (rc) {
  5743. IWL_ERROR("Unable to int nic\n");
  5744. return rc;
  5745. }
  5746. /* make sure rfkill handshake bits are cleared */
  5747. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5748. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5749. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5750. /* clear (again), then enable host interrupts */
  5751. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5752. iwl4965_enable_interrupts(priv);
  5753. /* really make sure rfkill handshake bits are cleared */
  5754. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5755. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5756. /* Copy original ucode data image from disk into backup cache.
  5757. * This will be used to initialize the on-board processor's
  5758. * data SRAM for a clean start when the runtime program first loads. */
  5759. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5760. priv->ucode_data.len);
  5761. /* If platform's RF_KILL switch is set to KILL,
  5762. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5763. * and getting things started */
  5764. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  5765. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5766. hw_rf_kill = 1;
  5767. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5768. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5769. return 0;
  5770. }
  5771. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5772. iwl4965_clear_stations_table(priv);
  5773. /* load bootstrap state machine,
  5774. * load bootstrap program into processor's memory,
  5775. * prepare to load the "initialize" uCode */
  5776. rc = iwl4965_load_bsm(priv);
  5777. if (rc) {
  5778. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5779. continue;
  5780. }
  5781. /* start card; "initialize" will load runtime ucode */
  5782. iwl4965_nic_start(priv);
  5783. /* MAC Address location in EEPROM is same for 3945/4965 */
  5784. get_eeprom_mac(priv, priv->mac_addr);
  5785. IWL_DEBUG_INFO("MAC address: %s\n",
  5786. print_mac(mac, priv->mac_addr));
  5787. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5788. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5789. return 0;
  5790. }
  5791. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5792. __iwl4965_down(priv);
  5793. /* tried to restart and config the device for as long as our
  5794. * patience could withstand */
  5795. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5796. return -EIO;
  5797. }
  5798. /*****************************************************************************
  5799. *
  5800. * Workqueue callbacks
  5801. *
  5802. *****************************************************************************/
  5803. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5804. {
  5805. struct iwl4965_priv *priv =
  5806. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5807. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5808. return;
  5809. mutex_lock(&priv->mutex);
  5810. iwl4965_init_alive_start(priv);
  5811. mutex_unlock(&priv->mutex);
  5812. }
  5813. static void iwl4965_bg_alive_start(struct work_struct *data)
  5814. {
  5815. struct iwl4965_priv *priv =
  5816. container_of(data, struct iwl4965_priv, alive_start.work);
  5817. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5818. return;
  5819. mutex_lock(&priv->mutex);
  5820. iwl4965_alive_start(priv);
  5821. mutex_unlock(&priv->mutex);
  5822. }
  5823. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5824. {
  5825. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5826. wake_up_interruptible(&priv->wait_command_queue);
  5827. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5828. return;
  5829. mutex_lock(&priv->mutex);
  5830. if (!iwl4965_is_rfkill(priv)) {
  5831. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5832. "HW and/or SW RF Kill no longer active, restarting "
  5833. "device\n");
  5834. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5835. queue_work(priv->workqueue, &priv->restart);
  5836. } else {
  5837. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5838. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5839. "disabled by SW switch\n");
  5840. else
  5841. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5842. "Kill switch must be turned off for "
  5843. "wireless networking to work.\n");
  5844. }
  5845. mutex_unlock(&priv->mutex);
  5846. }
  5847. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5848. static void iwl4965_bg_scan_check(struct work_struct *data)
  5849. {
  5850. struct iwl4965_priv *priv =
  5851. container_of(data, struct iwl4965_priv, scan_check.work);
  5852. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5853. return;
  5854. mutex_lock(&priv->mutex);
  5855. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5856. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5857. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5858. "Scan completion watchdog resetting adapter (%dms)\n",
  5859. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5860. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5861. iwl4965_send_scan_abort(priv);
  5862. }
  5863. mutex_unlock(&priv->mutex);
  5864. }
  5865. static void iwl4965_bg_request_scan(struct work_struct *data)
  5866. {
  5867. struct iwl4965_priv *priv =
  5868. container_of(data, struct iwl4965_priv, request_scan);
  5869. struct iwl4965_host_cmd cmd = {
  5870. .id = REPLY_SCAN_CMD,
  5871. .len = sizeof(struct iwl4965_scan_cmd),
  5872. .meta.flags = CMD_SIZE_HUGE,
  5873. };
  5874. int rc = 0;
  5875. struct iwl4965_scan_cmd *scan;
  5876. struct ieee80211_conf *conf = NULL;
  5877. u8 direct_mask;
  5878. int phymode;
  5879. conf = ieee80211_get_hw_conf(priv->hw);
  5880. mutex_lock(&priv->mutex);
  5881. if (!iwl4965_is_ready(priv)) {
  5882. IWL_WARNING("request scan called when driver not ready.\n");
  5883. goto done;
  5884. }
  5885. /* Make sure the scan wasn't cancelled before this queued work
  5886. * was given the chance to run... */
  5887. if (!test_bit(STATUS_SCANNING, &priv->status))
  5888. goto done;
  5889. /* This should never be called or scheduled if there is currently
  5890. * a scan active in the hardware. */
  5891. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5892. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5893. "Ignoring second request.\n");
  5894. rc = -EIO;
  5895. goto done;
  5896. }
  5897. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5898. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5899. goto done;
  5900. }
  5901. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5902. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5903. goto done;
  5904. }
  5905. if (iwl4965_is_rfkill(priv)) {
  5906. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5907. goto done;
  5908. }
  5909. if (!test_bit(STATUS_READY, &priv->status)) {
  5910. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5911. goto done;
  5912. }
  5913. if (!priv->scan_bands) {
  5914. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5915. goto done;
  5916. }
  5917. if (!priv->scan) {
  5918. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5919. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5920. if (!priv->scan) {
  5921. rc = -ENOMEM;
  5922. goto done;
  5923. }
  5924. }
  5925. scan = priv->scan;
  5926. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5927. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5928. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5929. if (iwl4965_is_associated(priv)) {
  5930. u16 interval = 0;
  5931. u32 extra;
  5932. u32 suspend_time = 100;
  5933. u32 scan_suspend_time = 100;
  5934. unsigned long flags;
  5935. IWL_DEBUG_INFO("Scanning while associated...\n");
  5936. spin_lock_irqsave(&priv->lock, flags);
  5937. interval = priv->beacon_int;
  5938. spin_unlock_irqrestore(&priv->lock, flags);
  5939. scan->suspend_time = 0;
  5940. scan->max_out_time = cpu_to_le32(200 * 1024);
  5941. if (!interval)
  5942. interval = suspend_time;
  5943. extra = (suspend_time / interval) << 22;
  5944. scan_suspend_time = (extra |
  5945. ((suspend_time % interval) * 1024));
  5946. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5947. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5948. scan_suspend_time, interval);
  5949. }
  5950. /* We should add the ability for user to lock to PASSIVE ONLY */
  5951. if (priv->one_direct_scan) {
  5952. IWL_DEBUG_SCAN
  5953. ("Kicking off one direct scan for '%s'\n",
  5954. iwl4965_escape_essid(priv->direct_ssid,
  5955. priv->direct_ssid_len));
  5956. scan->direct_scan[0].id = WLAN_EID_SSID;
  5957. scan->direct_scan[0].len = priv->direct_ssid_len;
  5958. memcpy(scan->direct_scan[0].ssid,
  5959. priv->direct_ssid, priv->direct_ssid_len);
  5960. direct_mask = 1;
  5961. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5962. scan->direct_scan[0].id = WLAN_EID_SSID;
  5963. scan->direct_scan[0].len = priv->essid_len;
  5964. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5965. direct_mask = 1;
  5966. } else
  5967. direct_mask = 0;
  5968. /* We don't build a direct scan probe request; the uCode will do
  5969. * that based on the direct_mask added to each channel entry */
  5970. scan->tx_cmd.len = cpu_to_le16(
  5971. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5972. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5973. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5974. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5975. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5976. /* flags + rate selection */
  5977. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5978. switch (priv->scan_bands) {
  5979. case 2:
  5980. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5981. scan->tx_cmd.rate_n_flags =
  5982. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5983. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5984. scan->good_CRC_th = 0;
  5985. phymode = MODE_IEEE80211G;
  5986. break;
  5987. case 1:
  5988. scan->tx_cmd.rate_n_flags =
  5989. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5990. RATE_MCS_ANT_B_MSK);
  5991. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5992. phymode = MODE_IEEE80211A;
  5993. break;
  5994. default:
  5995. IWL_WARNING("Invalid scan band count\n");
  5996. goto done;
  5997. }
  5998. /* select Rx chains */
  5999. /* Force use of chains B and C (0x6) for scan Rx.
  6000. * Avoid A (0x1) because of its off-channel reception on A-band.
  6001. * MIMO is not used here, but value is required to make uCode happy. */
  6002. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  6003. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  6004. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  6005. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  6006. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  6007. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  6008. if (direct_mask)
  6009. IWL_DEBUG_SCAN
  6010. ("Initiating direct scan for %s.\n",
  6011. iwl4965_escape_essid(priv->essid, priv->essid_len));
  6012. else
  6013. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  6014. scan->channel_count =
  6015. iwl4965_get_channels_for_scan(
  6016. priv, phymode, 1, /* active */
  6017. direct_mask,
  6018. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  6019. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  6020. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  6021. cmd.data = scan;
  6022. scan->len = cpu_to_le16(cmd.len);
  6023. set_bit(STATUS_SCAN_HW, &priv->status);
  6024. rc = iwl4965_send_cmd_sync(priv, &cmd);
  6025. if (rc)
  6026. goto done;
  6027. queue_delayed_work(priv->workqueue, &priv->scan_check,
  6028. IWL_SCAN_CHECK_WATCHDOG);
  6029. mutex_unlock(&priv->mutex);
  6030. return;
  6031. done:
  6032. /* inform mac80211 scan aborted */
  6033. queue_work(priv->workqueue, &priv->scan_completed);
  6034. mutex_unlock(&priv->mutex);
  6035. }
  6036. static void iwl4965_bg_up(struct work_struct *data)
  6037. {
  6038. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  6039. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6040. return;
  6041. mutex_lock(&priv->mutex);
  6042. __iwl4965_up(priv);
  6043. mutex_unlock(&priv->mutex);
  6044. }
  6045. static void iwl4965_bg_restart(struct work_struct *data)
  6046. {
  6047. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  6048. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6049. return;
  6050. iwl4965_down(priv);
  6051. queue_work(priv->workqueue, &priv->up);
  6052. }
  6053. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  6054. {
  6055. struct iwl4965_priv *priv =
  6056. container_of(data, struct iwl4965_priv, rx_replenish);
  6057. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6058. return;
  6059. mutex_lock(&priv->mutex);
  6060. iwl4965_rx_replenish(priv);
  6061. mutex_unlock(&priv->mutex);
  6062. }
  6063. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6064. static void iwl4965_bg_post_associate(struct work_struct *data)
  6065. {
  6066. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  6067. post_associate.work);
  6068. int rc = 0;
  6069. struct ieee80211_conf *conf = NULL;
  6070. DECLARE_MAC_BUF(mac);
  6071. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6072. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  6073. return;
  6074. }
  6075. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  6076. priv->assoc_id,
  6077. print_mac(mac, priv->active_rxon.bssid_addr));
  6078. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6079. return;
  6080. mutex_lock(&priv->mutex);
  6081. if (!priv->interface_id || !priv->is_open) {
  6082. mutex_unlock(&priv->mutex);
  6083. return;
  6084. }
  6085. iwl4965_scan_cancel_timeout(priv, 200);
  6086. conf = ieee80211_get_hw_conf(priv->hw);
  6087. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6088. iwl4965_commit_rxon(priv);
  6089. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6090. iwl4965_setup_rxon_timing(priv);
  6091. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6092. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6093. if (rc)
  6094. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6095. "Attempting to continue.\n");
  6096. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6097. #ifdef CONFIG_IWL4965_HT
  6098. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  6099. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  6100. else {
  6101. priv->active_rate_ht[0] = 0;
  6102. priv->active_rate_ht[1] = 0;
  6103. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  6104. }
  6105. #endif /* CONFIG_IWL4965_HT*/
  6106. iwl4965_set_rxon_chain(priv);
  6107. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6108. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6109. priv->assoc_id, priv->beacon_int);
  6110. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6111. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6112. else
  6113. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6114. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6115. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6116. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6117. else
  6118. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6119. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6120. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6121. }
  6122. iwl4965_commit_rxon(priv);
  6123. switch (priv->iw_mode) {
  6124. case IEEE80211_IF_TYPE_STA:
  6125. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6126. break;
  6127. case IEEE80211_IF_TYPE_IBSS:
  6128. /* clear out the station table */
  6129. iwl4965_clear_stations_table(priv);
  6130. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6131. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6132. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6133. iwl4965_send_beacon_cmd(priv);
  6134. break;
  6135. default:
  6136. IWL_ERROR("%s Should not be called in %d mode\n",
  6137. __FUNCTION__, priv->iw_mode);
  6138. break;
  6139. }
  6140. iwl4965_sequence_reset(priv);
  6141. #ifdef CONFIG_IWL4965_SENSITIVITY
  6142. /* Enable Rx differential gain and sensitivity calibrations */
  6143. iwl4965_chain_noise_reset(priv);
  6144. priv->start_calib = 1;
  6145. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6146. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6147. priv->assoc_station_added = 1;
  6148. #ifdef CONFIG_IWL4965_QOS
  6149. iwl4965_activate_qos(priv, 0);
  6150. #endif /* CONFIG_IWL4965_QOS */
  6151. /* we have just associated, don't start scan too early */
  6152. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6153. mutex_unlock(&priv->mutex);
  6154. }
  6155. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6156. {
  6157. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6158. if (!iwl4965_is_ready(priv))
  6159. return;
  6160. mutex_lock(&priv->mutex);
  6161. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6162. iwl4965_send_scan_abort(priv);
  6163. mutex_unlock(&priv->mutex);
  6164. }
  6165. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6166. {
  6167. struct iwl4965_priv *priv =
  6168. container_of(work, struct iwl4965_priv, scan_completed);
  6169. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6170. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6171. return;
  6172. ieee80211_scan_completed(priv->hw);
  6173. /* Since setting the TXPOWER may have been deferred while
  6174. * performing the scan, fire one off */
  6175. mutex_lock(&priv->mutex);
  6176. iwl4965_hw_reg_send_txpower(priv);
  6177. mutex_unlock(&priv->mutex);
  6178. }
  6179. /*****************************************************************************
  6180. *
  6181. * mac80211 entry point functions
  6182. *
  6183. *****************************************************************************/
  6184. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6185. {
  6186. struct iwl4965_priv *priv = hw->priv;
  6187. IWL_DEBUG_MAC80211("enter\n");
  6188. /* we should be verifying the device is ready to be opened */
  6189. mutex_lock(&priv->mutex);
  6190. priv->is_open = 1;
  6191. if (!iwl4965_is_rfkill(priv))
  6192. ieee80211_start_queues(priv->hw);
  6193. mutex_unlock(&priv->mutex);
  6194. IWL_DEBUG_MAC80211("leave\n");
  6195. return 0;
  6196. }
  6197. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6198. {
  6199. struct iwl4965_priv *priv = hw->priv;
  6200. IWL_DEBUG_MAC80211("enter\n");
  6201. mutex_lock(&priv->mutex);
  6202. /* stop mac, cancel any scan request and clear
  6203. * RXON_FILTER_ASSOC_MSK BIT
  6204. */
  6205. priv->is_open = 0;
  6206. iwl4965_scan_cancel_timeout(priv, 100);
  6207. cancel_delayed_work(&priv->post_associate);
  6208. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6209. iwl4965_commit_rxon(priv);
  6210. mutex_unlock(&priv->mutex);
  6211. IWL_DEBUG_MAC80211("leave\n");
  6212. }
  6213. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6214. struct ieee80211_tx_control *ctl)
  6215. {
  6216. struct iwl4965_priv *priv = hw->priv;
  6217. IWL_DEBUG_MAC80211("enter\n");
  6218. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6219. IWL_DEBUG_MAC80211("leave - monitor\n");
  6220. return -1;
  6221. }
  6222. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6223. ctl->tx_rate);
  6224. if (iwl4965_tx_skb(priv, skb, ctl))
  6225. dev_kfree_skb_any(skb);
  6226. IWL_DEBUG_MAC80211("leave\n");
  6227. return 0;
  6228. }
  6229. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6230. struct ieee80211_if_init_conf *conf)
  6231. {
  6232. struct iwl4965_priv *priv = hw->priv;
  6233. unsigned long flags;
  6234. DECLARE_MAC_BUF(mac);
  6235. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6236. if (priv->interface_id) {
  6237. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6238. return 0;
  6239. }
  6240. spin_lock_irqsave(&priv->lock, flags);
  6241. priv->interface_id = conf->if_id;
  6242. spin_unlock_irqrestore(&priv->lock, flags);
  6243. mutex_lock(&priv->mutex);
  6244. if (conf->mac_addr) {
  6245. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6246. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6247. }
  6248. iwl4965_set_mode(priv, conf->type);
  6249. IWL_DEBUG_MAC80211("leave\n");
  6250. mutex_unlock(&priv->mutex);
  6251. return 0;
  6252. }
  6253. /**
  6254. * iwl4965_mac_config - mac80211 config callback
  6255. *
  6256. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6257. * be set inappropriately and the driver currently sets the hardware up to
  6258. * use it whenever needed.
  6259. */
  6260. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6261. {
  6262. struct iwl4965_priv *priv = hw->priv;
  6263. const struct iwl4965_channel_info *ch_info;
  6264. unsigned long flags;
  6265. mutex_lock(&priv->mutex);
  6266. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6267. if (!iwl4965_is_ready(priv)) {
  6268. IWL_DEBUG_MAC80211("leave - not ready\n");
  6269. mutex_unlock(&priv->mutex);
  6270. return -EIO;
  6271. }
  6272. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6273. * what is exposed through include/ declarations */
  6274. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6275. test_bit(STATUS_SCANNING, &priv->status))) {
  6276. IWL_DEBUG_MAC80211("leave - scanning\n");
  6277. mutex_unlock(&priv->mutex);
  6278. return 0;
  6279. }
  6280. spin_lock_irqsave(&priv->lock, flags);
  6281. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6282. if (!is_channel_valid(ch_info)) {
  6283. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6284. conf->channel, conf->phymode);
  6285. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6286. spin_unlock_irqrestore(&priv->lock, flags);
  6287. mutex_unlock(&priv->mutex);
  6288. return -EINVAL;
  6289. }
  6290. #ifdef CONFIG_IWL4965_HT
  6291. /* if we are switching fron ht to 2.4 clear flags
  6292. * from any ht related info since 2.4 does not
  6293. * support ht */
  6294. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6295. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6296. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6297. #endif
  6298. )
  6299. priv->staging_rxon.flags = 0;
  6300. #endif /* CONFIG_IWL4965_HT */
  6301. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6302. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6303. /* The list of supported rates and rate mask can be different
  6304. * for each phymode; since the phymode may have changed, reset
  6305. * the rate mask to what mac80211 lists */
  6306. iwl4965_set_rate(priv);
  6307. spin_unlock_irqrestore(&priv->lock, flags);
  6308. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6309. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6310. iwl4965_hw_channel_switch(priv, conf->channel);
  6311. mutex_unlock(&priv->mutex);
  6312. return 0;
  6313. }
  6314. #endif
  6315. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6316. if (!conf->radio_enabled) {
  6317. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6318. mutex_unlock(&priv->mutex);
  6319. return 0;
  6320. }
  6321. if (iwl4965_is_rfkill(priv)) {
  6322. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6323. mutex_unlock(&priv->mutex);
  6324. return -EIO;
  6325. }
  6326. iwl4965_set_rate(priv);
  6327. if (memcmp(&priv->active_rxon,
  6328. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6329. iwl4965_commit_rxon(priv);
  6330. else
  6331. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6332. IWL_DEBUG_MAC80211("leave\n");
  6333. mutex_unlock(&priv->mutex);
  6334. return 0;
  6335. }
  6336. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6337. {
  6338. int rc = 0;
  6339. if (priv->status & STATUS_EXIT_PENDING)
  6340. return;
  6341. /* The following should be done only at AP bring up */
  6342. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6343. /* RXON - unassoc (to set timing command) */
  6344. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6345. iwl4965_commit_rxon(priv);
  6346. /* RXON Timing */
  6347. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6348. iwl4965_setup_rxon_timing(priv);
  6349. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6350. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6351. if (rc)
  6352. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6353. "Attempting to continue.\n");
  6354. iwl4965_set_rxon_chain(priv);
  6355. /* FIXME: what should be the assoc_id for AP? */
  6356. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6357. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6358. priv->staging_rxon.flags |=
  6359. RXON_FLG_SHORT_PREAMBLE_MSK;
  6360. else
  6361. priv->staging_rxon.flags &=
  6362. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6363. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6364. if (priv->assoc_capability &
  6365. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6366. priv->staging_rxon.flags |=
  6367. RXON_FLG_SHORT_SLOT_MSK;
  6368. else
  6369. priv->staging_rxon.flags &=
  6370. ~RXON_FLG_SHORT_SLOT_MSK;
  6371. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6372. priv->staging_rxon.flags &=
  6373. ~RXON_FLG_SHORT_SLOT_MSK;
  6374. }
  6375. /* restore RXON assoc */
  6376. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6377. iwl4965_commit_rxon(priv);
  6378. #ifdef CONFIG_IWL4965_QOS
  6379. iwl4965_activate_qos(priv, 1);
  6380. #endif
  6381. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6382. }
  6383. iwl4965_send_beacon_cmd(priv);
  6384. /* FIXME - we need to add code here to detect a totally new
  6385. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6386. * clear sta table, add BCAST sta... */
  6387. }
  6388. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6389. struct ieee80211_if_conf *conf)
  6390. {
  6391. struct iwl4965_priv *priv = hw->priv;
  6392. DECLARE_MAC_BUF(mac);
  6393. unsigned long flags;
  6394. int rc;
  6395. if (conf == NULL)
  6396. return -EIO;
  6397. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6398. (!conf->beacon || !conf->ssid_len)) {
  6399. IWL_DEBUG_MAC80211
  6400. ("Leaving in AP mode because HostAPD is not ready.\n");
  6401. return 0;
  6402. }
  6403. mutex_lock(&priv->mutex);
  6404. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6405. if (conf->bssid)
  6406. IWL_DEBUG_MAC80211("bssid: %s\n",
  6407. print_mac(mac, conf->bssid));
  6408. /*
  6409. * very dubious code was here; the probe filtering flag is never set:
  6410. *
  6411. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6412. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6413. */
  6414. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6415. IWL_DEBUG_MAC80211("leave - scanning\n");
  6416. mutex_unlock(&priv->mutex);
  6417. return 0;
  6418. }
  6419. if (priv->interface_id != if_id) {
  6420. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6421. mutex_unlock(&priv->mutex);
  6422. return 0;
  6423. }
  6424. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6425. if (!conf->bssid) {
  6426. conf->bssid = priv->mac_addr;
  6427. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6428. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6429. print_mac(mac, conf->bssid));
  6430. }
  6431. if (priv->ibss_beacon)
  6432. dev_kfree_skb(priv->ibss_beacon);
  6433. priv->ibss_beacon = conf->beacon;
  6434. }
  6435. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6436. !is_multicast_ether_addr(conf->bssid)) {
  6437. /* If there is currently a HW scan going on in the background
  6438. * then we need to cancel it else the RXON below will fail. */
  6439. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6440. IWL_WARNING("Aborted scan still in progress "
  6441. "after 100ms\n");
  6442. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6443. mutex_unlock(&priv->mutex);
  6444. return -EAGAIN;
  6445. }
  6446. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6447. /* TODO: Audit driver for usage of these members and see
  6448. * if mac80211 deprecates them (priv->bssid looks like it
  6449. * shouldn't be there, but I haven't scanned the IBSS code
  6450. * to verify) - jpk */
  6451. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6452. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6453. iwl4965_config_ap(priv);
  6454. else {
  6455. rc = iwl4965_commit_rxon(priv);
  6456. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6457. iwl4965_rxon_add_station(
  6458. priv, priv->active_rxon.bssid_addr, 1);
  6459. }
  6460. } else {
  6461. iwl4965_scan_cancel_timeout(priv, 100);
  6462. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6463. iwl4965_commit_rxon(priv);
  6464. }
  6465. spin_lock_irqsave(&priv->lock, flags);
  6466. if (!conf->ssid_len)
  6467. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6468. else
  6469. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6470. priv->essid_len = conf->ssid_len;
  6471. spin_unlock_irqrestore(&priv->lock, flags);
  6472. IWL_DEBUG_MAC80211("leave\n");
  6473. mutex_unlock(&priv->mutex);
  6474. return 0;
  6475. }
  6476. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6477. unsigned int changed_flags,
  6478. unsigned int *total_flags,
  6479. int mc_count, struct dev_addr_list *mc_list)
  6480. {
  6481. /*
  6482. * XXX: dummy
  6483. * see also iwl4965_connection_init_rx_config
  6484. */
  6485. *total_flags = 0;
  6486. }
  6487. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6488. struct ieee80211_if_init_conf *conf)
  6489. {
  6490. struct iwl4965_priv *priv = hw->priv;
  6491. IWL_DEBUG_MAC80211("enter\n");
  6492. mutex_lock(&priv->mutex);
  6493. iwl4965_scan_cancel_timeout(priv, 100);
  6494. cancel_delayed_work(&priv->post_associate);
  6495. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6496. iwl4965_commit_rxon(priv);
  6497. if (priv->interface_id == conf->if_id) {
  6498. priv->interface_id = 0;
  6499. memset(priv->bssid, 0, ETH_ALEN);
  6500. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6501. priv->essid_len = 0;
  6502. }
  6503. mutex_unlock(&priv->mutex);
  6504. IWL_DEBUG_MAC80211("leave\n");
  6505. }
  6506. static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw,
  6507. u8 changes, int cts_protection, int preamble)
  6508. {
  6509. struct iwl4965_priv *priv = hw->priv;
  6510. if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
  6511. if (preamble == WLAN_ERP_PREAMBLE_SHORT)
  6512. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6513. else
  6514. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6515. }
  6516. if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
  6517. if (cts_protection && (priv->phymode != MODE_IEEE80211A))
  6518. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6519. else
  6520. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6521. }
  6522. if (iwl4965_is_associated(priv))
  6523. iwl4965_send_rxon_assoc(priv);
  6524. }
  6525. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6526. {
  6527. int rc = 0;
  6528. unsigned long flags;
  6529. struct iwl4965_priv *priv = hw->priv;
  6530. IWL_DEBUG_MAC80211("enter\n");
  6531. mutex_lock(&priv->mutex);
  6532. spin_lock_irqsave(&priv->lock, flags);
  6533. if (!iwl4965_is_ready_rf(priv)) {
  6534. rc = -EIO;
  6535. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6536. goto out_unlock;
  6537. }
  6538. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6539. rc = -EIO;
  6540. IWL_ERROR("ERROR: APs don't scan\n");
  6541. goto out_unlock;
  6542. }
  6543. /* we don't schedule scan within next_scan_jiffies period */
  6544. if (priv->next_scan_jiffies &&
  6545. time_after(priv->next_scan_jiffies, jiffies)) {
  6546. rc = -EAGAIN;
  6547. goto out_unlock;
  6548. }
  6549. /* if we just finished scan ask for delay */
  6550. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6551. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6552. rc = -EAGAIN;
  6553. goto out_unlock;
  6554. }
  6555. if (len) {
  6556. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6557. iwl4965_escape_essid(ssid, len), (int)len);
  6558. priv->one_direct_scan = 1;
  6559. priv->direct_ssid_len = (u8)
  6560. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6561. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6562. } else
  6563. priv->one_direct_scan = 0;
  6564. rc = iwl4965_scan_initiate(priv);
  6565. IWL_DEBUG_MAC80211("leave\n");
  6566. out_unlock:
  6567. spin_unlock_irqrestore(&priv->lock, flags);
  6568. mutex_unlock(&priv->mutex);
  6569. return rc;
  6570. }
  6571. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6572. const u8 *local_addr, const u8 *addr,
  6573. struct ieee80211_key_conf *key)
  6574. {
  6575. struct iwl4965_priv *priv = hw->priv;
  6576. DECLARE_MAC_BUF(mac);
  6577. int rc = 0;
  6578. u8 sta_id;
  6579. IWL_DEBUG_MAC80211("enter\n");
  6580. if (!iwl4965_param_hwcrypto) {
  6581. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6582. return -EOPNOTSUPP;
  6583. }
  6584. if (is_zero_ether_addr(addr))
  6585. /* only support pairwise keys */
  6586. return -EOPNOTSUPP;
  6587. sta_id = iwl4965_hw_find_station(priv, addr);
  6588. if (sta_id == IWL_INVALID_STATION) {
  6589. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6590. print_mac(mac, addr));
  6591. return -EINVAL;
  6592. }
  6593. mutex_lock(&priv->mutex);
  6594. iwl4965_scan_cancel_timeout(priv, 100);
  6595. switch (cmd) {
  6596. case SET_KEY:
  6597. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6598. if (!rc) {
  6599. iwl4965_set_rxon_hwcrypto(priv, 1);
  6600. iwl4965_commit_rxon(priv);
  6601. key->hw_key_idx = sta_id;
  6602. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6603. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6604. }
  6605. break;
  6606. case DISABLE_KEY:
  6607. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6608. if (!rc) {
  6609. iwl4965_set_rxon_hwcrypto(priv, 0);
  6610. iwl4965_commit_rxon(priv);
  6611. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6612. }
  6613. break;
  6614. default:
  6615. rc = -EINVAL;
  6616. }
  6617. IWL_DEBUG_MAC80211("leave\n");
  6618. mutex_unlock(&priv->mutex);
  6619. return rc;
  6620. }
  6621. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6622. const struct ieee80211_tx_queue_params *params)
  6623. {
  6624. struct iwl4965_priv *priv = hw->priv;
  6625. #ifdef CONFIG_IWL4965_QOS
  6626. unsigned long flags;
  6627. int q;
  6628. #endif /* CONFIG_IWL4965_QOS */
  6629. IWL_DEBUG_MAC80211("enter\n");
  6630. if (!iwl4965_is_ready_rf(priv)) {
  6631. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6632. return -EIO;
  6633. }
  6634. if (queue >= AC_NUM) {
  6635. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6636. return 0;
  6637. }
  6638. #ifdef CONFIG_IWL4965_QOS
  6639. if (!priv->qos_data.qos_enable) {
  6640. priv->qos_data.qos_active = 0;
  6641. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6642. return 0;
  6643. }
  6644. q = AC_NUM - 1 - queue;
  6645. spin_lock_irqsave(&priv->lock, flags);
  6646. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6647. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6648. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6649. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6650. cpu_to_le16((params->burst_time * 100));
  6651. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6652. priv->qos_data.qos_active = 1;
  6653. spin_unlock_irqrestore(&priv->lock, flags);
  6654. mutex_lock(&priv->mutex);
  6655. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6656. iwl4965_activate_qos(priv, 1);
  6657. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6658. iwl4965_activate_qos(priv, 0);
  6659. mutex_unlock(&priv->mutex);
  6660. #endif /*CONFIG_IWL4965_QOS */
  6661. IWL_DEBUG_MAC80211("leave\n");
  6662. return 0;
  6663. }
  6664. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6665. struct ieee80211_tx_queue_stats *stats)
  6666. {
  6667. struct iwl4965_priv *priv = hw->priv;
  6668. int i, avail;
  6669. struct iwl4965_tx_queue *txq;
  6670. struct iwl4965_queue *q;
  6671. unsigned long flags;
  6672. IWL_DEBUG_MAC80211("enter\n");
  6673. if (!iwl4965_is_ready_rf(priv)) {
  6674. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6675. return -EIO;
  6676. }
  6677. spin_lock_irqsave(&priv->lock, flags);
  6678. for (i = 0; i < AC_NUM; i++) {
  6679. txq = &priv->txq[i];
  6680. q = &txq->q;
  6681. avail = iwl4965_queue_space(q);
  6682. stats->data[i].len = q->n_window - avail;
  6683. stats->data[i].limit = q->n_window - q->high_mark;
  6684. stats->data[i].count = q->n_window;
  6685. }
  6686. spin_unlock_irqrestore(&priv->lock, flags);
  6687. IWL_DEBUG_MAC80211("leave\n");
  6688. return 0;
  6689. }
  6690. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6691. struct ieee80211_low_level_stats *stats)
  6692. {
  6693. IWL_DEBUG_MAC80211("enter\n");
  6694. IWL_DEBUG_MAC80211("leave\n");
  6695. return 0;
  6696. }
  6697. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6698. {
  6699. IWL_DEBUG_MAC80211("enter\n");
  6700. IWL_DEBUG_MAC80211("leave\n");
  6701. return 0;
  6702. }
  6703. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6704. {
  6705. struct iwl4965_priv *priv = hw->priv;
  6706. unsigned long flags;
  6707. mutex_lock(&priv->mutex);
  6708. IWL_DEBUG_MAC80211("enter\n");
  6709. priv->lq_mngr.lq_ready = 0;
  6710. #ifdef CONFIG_IWL4965_HT
  6711. spin_lock_irqsave(&priv->lock, flags);
  6712. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6713. spin_unlock_irqrestore(&priv->lock, flags);
  6714. #ifdef CONFIG_IWL4965_HT_AGG
  6715. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6716. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6717. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6718. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6719. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6720. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6721. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6722. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6723. #endif /*CONFIG_IWL4965_HT_AGG */
  6724. #endif /* CONFIG_IWL4965_HT */
  6725. #ifdef CONFIG_IWL4965_QOS
  6726. iwl4965_reset_qos(priv);
  6727. #endif
  6728. cancel_delayed_work(&priv->post_associate);
  6729. spin_lock_irqsave(&priv->lock, flags);
  6730. priv->assoc_id = 0;
  6731. priv->assoc_capability = 0;
  6732. priv->call_post_assoc_from_beacon = 0;
  6733. priv->assoc_station_added = 0;
  6734. /* new association get rid of ibss beacon skb */
  6735. if (priv->ibss_beacon)
  6736. dev_kfree_skb(priv->ibss_beacon);
  6737. priv->ibss_beacon = NULL;
  6738. priv->beacon_int = priv->hw->conf.beacon_int;
  6739. priv->timestamp1 = 0;
  6740. priv->timestamp0 = 0;
  6741. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6742. priv->beacon_int = 0;
  6743. spin_unlock_irqrestore(&priv->lock, flags);
  6744. /* we are restarting association process
  6745. * clear RXON_FILTER_ASSOC_MSK bit
  6746. */
  6747. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6748. iwl4965_scan_cancel_timeout(priv, 100);
  6749. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6750. iwl4965_commit_rxon(priv);
  6751. }
  6752. /* Per mac80211.h: This is only used in IBSS mode... */
  6753. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6754. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6755. mutex_unlock(&priv->mutex);
  6756. return;
  6757. }
  6758. if (!iwl4965_is_ready_rf(priv)) {
  6759. IWL_DEBUG_MAC80211("leave - not ready\n");
  6760. mutex_unlock(&priv->mutex);
  6761. return;
  6762. }
  6763. priv->only_active_channel = 0;
  6764. iwl4965_set_rate(priv);
  6765. mutex_unlock(&priv->mutex);
  6766. IWL_DEBUG_MAC80211("leave\n");
  6767. }
  6768. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6769. struct ieee80211_tx_control *control)
  6770. {
  6771. struct iwl4965_priv *priv = hw->priv;
  6772. unsigned long flags;
  6773. mutex_lock(&priv->mutex);
  6774. IWL_DEBUG_MAC80211("enter\n");
  6775. if (!iwl4965_is_ready_rf(priv)) {
  6776. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6777. mutex_unlock(&priv->mutex);
  6778. return -EIO;
  6779. }
  6780. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6781. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6782. mutex_unlock(&priv->mutex);
  6783. return -EIO;
  6784. }
  6785. spin_lock_irqsave(&priv->lock, flags);
  6786. if (priv->ibss_beacon)
  6787. dev_kfree_skb(priv->ibss_beacon);
  6788. priv->ibss_beacon = skb;
  6789. priv->assoc_id = 0;
  6790. IWL_DEBUG_MAC80211("leave\n");
  6791. spin_unlock_irqrestore(&priv->lock, flags);
  6792. #ifdef CONFIG_IWL4965_QOS
  6793. iwl4965_reset_qos(priv);
  6794. #endif
  6795. queue_work(priv->workqueue, &priv->post_associate.work);
  6796. mutex_unlock(&priv->mutex);
  6797. return 0;
  6798. }
  6799. #ifdef CONFIG_IWL4965_HT
  6800. union ht_cap_info {
  6801. struct {
  6802. u16 advanced_coding_cap :1;
  6803. u16 supported_chan_width_set :1;
  6804. u16 mimo_power_save_mode :2;
  6805. u16 green_field :1;
  6806. u16 short_GI20 :1;
  6807. u16 short_GI40 :1;
  6808. u16 tx_stbc :1;
  6809. u16 rx_stbc :1;
  6810. u16 beam_forming :1;
  6811. u16 delayed_ba :1;
  6812. u16 maximal_amsdu_size :1;
  6813. u16 cck_mode_at_40MHz :1;
  6814. u16 psmp_support :1;
  6815. u16 stbc_ctrl_frame_support :1;
  6816. u16 sig_txop_protection_support :1;
  6817. };
  6818. u16 val;
  6819. } __attribute__ ((packed));
  6820. union ht_param_info{
  6821. struct {
  6822. u8 max_rx_ampdu_factor :2;
  6823. u8 mpdu_density :3;
  6824. u8 reserved :3;
  6825. };
  6826. u8 val;
  6827. } __attribute__ ((packed));
  6828. union ht_exra_param_info {
  6829. struct {
  6830. u8 ext_chan_offset :2;
  6831. u8 tx_chan_width :1;
  6832. u8 rifs_mode :1;
  6833. u8 controlled_access_only :1;
  6834. u8 service_interval_granularity :3;
  6835. };
  6836. u8 val;
  6837. } __attribute__ ((packed));
  6838. union ht_operation_mode{
  6839. struct {
  6840. u16 op_mode :2;
  6841. u16 non_GF :1;
  6842. u16 reserved :13;
  6843. };
  6844. u16 val;
  6845. } __attribute__ ((packed));
  6846. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6847. struct ieee80211_ht_additional_info *ht_extra,
  6848. struct sta_ht_info *ht_info_ap,
  6849. struct sta_ht_info *ht_info)
  6850. {
  6851. union ht_cap_info cap;
  6852. union ht_operation_mode op_mode;
  6853. union ht_param_info param_info;
  6854. union ht_exra_param_info extra_param_info;
  6855. IWL_DEBUG_MAC80211("enter: \n");
  6856. if (!ht_info) {
  6857. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6858. return -1;
  6859. }
  6860. if (ht_cap) {
  6861. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6862. param_info.val = ht_cap->mac_ht_params_info;
  6863. ht_info->is_ht = 1;
  6864. if (cap.short_GI20)
  6865. ht_info->sgf |= 0x1;
  6866. if (cap.short_GI40)
  6867. ht_info->sgf |= 0x2;
  6868. ht_info->is_green_field = cap.green_field;
  6869. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6870. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6871. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6872. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6873. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6874. ht_info->mpdu_density = param_info.mpdu_density;
  6875. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6876. ht_cap->supported_mcs_set[0],
  6877. ht_cap->supported_mcs_set[1]);
  6878. if (ht_info_ap) {
  6879. ht_info->control_channel = ht_info_ap->control_channel;
  6880. ht_info->extension_chan_offset =
  6881. ht_info_ap->extension_chan_offset;
  6882. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6883. ht_info->operating_mode = ht_info_ap->operating_mode;
  6884. }
  6885. if (ht_extra) {
  6886. extra_param_info.val = ht_extra->ht_param;
  6887. ht_info->control_channel = ht_extra->control_chan;
  6888. ht_info->extension_chan_offset =
  6889. extra_param_info.ext_chan_offset;
  6890. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6891. op_mode.val = (u16)
  6892. le16_to_cpu(ht_extra->operation_mode);
  6893. ht_info->operating_mode = op_mode.op_mode;
  6894. IWL_DEBUG_MAC80211("control channel %d\n",
  6895. ht_extra->control_chan);
  6896. }
  6897. } else
  6898. ht_info->is_ht = 0;
  6899. IWL_DEBUG_MAC80211("leave\n");
  6900. return 0;
  6901. }
  6902. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6903. struct ieee80211_ht_capability *ht_cap,
  6904. struct ieee80211_ht_additional_info *ht_extra)
  6905. {
  6906. struct iwl4965_priv *priv = hw->priv;
  6907. int rs;
  6908. IWL_DEBUG_MAC80211("enter: \n");
  6909. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6910. iwl4965_set_rxon_chain(priv);
  6911. if (priv && priv->assoc_id &&
  6912. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6913. unsigned long flags;
  6914. spin_lock_irqsave(&priv->lock, flags);
  6915. if (priv->beacon_int)
  6916. queue_work(priv->workqueue, &priv->post_associate.work);
  6917. else
  6918. priv->call_post_assoc_from_beacon = 1;
  6919. spin_unlock_irqrestore(&priv->lock, flags);
  6920. }
  6921. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6922. ht_extra->control_chan);
  6923. return rs;
  6924. }
  6925. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6926. struct ieee80211_ht_capability *ht_cap,
  6927. u8 use_wide_chan)
  6928. {
  6929. union ht_cap_info cap;
  6930. union ht_param_info param_info;
  6931. memset(&cap, 0, sizeof(union ht_cap_info));
  6932. memset(&param_info, 0, sizeof(union ht_param_info));
  6933. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6934. cap.green_field = 1;
  6935. cap.short_GI20 = 1;
  6936. cap.short_GI40 = 1;
  6937. cap.supported_chan_width_set = use_wide_chan;
  6938. cap.mimo_power_save_mode = 0x3;
  6939. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6940. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6941. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6942. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6943. ht_cap->supported_mcs_set[0] = 0xff;
  6944. ht_cap->supported_mcs_set[1] = 0xff;
  6945. ht_cap->supported_mcs_set[4] =
  6946. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6947. }
  6948. static void iwl4965_mac_get_ht_capab(struct ieee80211_hw *hw,
  6949. struct ieee80211_ht_capability *ht_cap)
  6950. {
  6951. u8 use_wide_channel = 1;
  6952. struct iwl4965_priv *priv = hw->priv;
  6953. IWL_DEBUG_MAC80211("enter: \n");
  6954. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6955. use_wide_channel = 0;
  6956. /* no fat tx allowed on 2.4GHZ */
  6957. if (priv->phymode != MODE_IEEE80211A)
  6958. use_wide_channel = 0;
  6959. iwl4965_set_ht_capab(hw, ht_cap, use_wide_channel);
  6960. IWL_DEBUG_MAC80211("leave: \n");
  6961. }
  6962. #endif /*CONFIG_IWL4965_HT*/
  6963. /*****************************************************************************
  6964. *
  6965. * sysfs attributes
  6966. *
  6967. *****************************************************************************/
  6968. #ifdef CONFIG_IWL4965_DEBUG
  6969. /*
  6970. * The following adds a new attribute to the sysfs representation
  6971. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6972. * used for controlling the debug level.
  6973. *
  6974. * See the level definitions in iwl for details.
  6975. */
  6976. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6977. {
  6978. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6979. }
  6980. static ssize_t store_debug_level(struct device_driver *d,
  6981. const char *buf, size_t count)
  6982. {
  6983. char *p = (char *)buf;
  6984. u32 val;
  6985. val = simple_strtoul(p, &p, 0);
  6986. if (p == buf)
  6987. printk(KERN_INFO DRV_NAME
  6988. ": %s is not in hex or decimal form.\n", buf);
  6989. else
  6990. iwl4965_debug_level = val;
  6991. return strnlen(buf, count);
  6992. }
  6993. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6994. show_debug_level, store_debug_level);
  6995. #endif /* CONFIG_IWL4965_DEBUG */
  6996. static ssize_t show_rf_kill(struct device *d,
  6997. struct device_attribute *attr, char *buf)
  6998. {
  6999. /*
  7000. * 0 - RF kill not enabled
  7001. * 1 - SW based RF kill active (sysfs)
  7002. * 2 - HW based RF kill active
  7003. * 3 - Both HW and SW based RF kill active
  7004. */
  7005. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7006. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  7007. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  7008. return sprintf(buf, "%i\n", val);
  7009. }
  7010. static ssize_t store_rf_kill(struct device *d,
  7011. struct device_attribute *attr,
  7012. const char *buf, size_t count)
  7013. {
  7014. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7015. mutex_lock(&priv->mutex);
  7016. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  7017. mutex_unlock(&priv->mutex);
  7018. return count;
  7019. }
  7020. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  7021. static ssize_t show_temperature(struct device *d,
  7022. struct device_attribute *attr, char *buf)
  7023. {
  7024. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7025. if (!iwl4965_is_alive(priv))
  7026. return -EAGAIN;
  7027. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  7028. }
  7029. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  7030. static ssize_t show_rs_window(struct device *d,
  7031. struct device_attribute *attr,
  7032. char *buf)
  7033. {
  7034. struct iwl4965_priv *priv = d->driver_data;
  7035. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  7036. }
  7037. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  7038. static ssize_t show_tx_power(struct device *d,
  7039. struct device_attribute *attr, char *buf)
  7040. {
  7041. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7042. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  7043. }
  7044. static ssize_t store_tx_power(struct device *d,
  7045. struct device_attribute *attr,
  7046. const char *buf, size_t count)
  7047. {
  7048. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7049. char *p = (char *)buf;
  7050. u32 val;
  7051. val = simple_strtoul(p, &p, 10);
  7052. if (p == buf)
  7053. printk(KERN_INFO DRV_NAME
  7054. ": %s is not in decimal form.\n", buf);
  7055. else
  7056. iwl4965_hw_reg_set_txpower(priv, val);
  7057. return count;
  7058. }
  7059. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  7060. static ssize_t show_flags(struct device *d,
  7061. struct device_attribute *attr, char *buf)
  7062. {
  7063. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7064. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  7065. }
  7066. static ssize_t store_flags(struct device *d,
  7067. struct device_attribute *attr,
  7068. const char *buf, size_t count)
  7069. {
  7070. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7071. u32 flags = simple_strtoul(buf, NULL, 0);
  7072. mutex_lock(&priv->mutex);
  7073. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  7074. /* Cancel any currently running scans... */
  7075. if (iwl4965_scan_cancel_timeout(priv, 100))
  7076. IWL_WARNING("Could not cancel scan.\n");
  7077. else {
  7078. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  7079. flags);
  7080. priv->staging_rxon.flags = cpu_to_le32(flags);
  7081. iwl4965_commit_rxon(priv);
  7082. }
  7083. }
  7084. mutex_unlock(&priv->mutex);
  7085. return count;
  7086. }
  7087. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  7088. static ssize_t show_filter_flags(struct device *d,
  7089. struct device_attribute *attr, char *buf)
  7090. {
  7091. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7092. return sprintf(buf, "0x%04X\n",
  7093. le32_to_cpu(priv->active_rxon.filter_flags));
  7094. }
  7095. static ssize_t store_filter_flags(struct device *d,
  7096. struct device_attribute *attr,
  7097. const char *buf, size_t count)
  7098. {
  7099. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7100. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7101. mutex_lock(&priv->mutex);
  7102. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7103. /* Cancel any currently running scans... */
  7104. if (iwl4965_scan_cancel_timeout(priv, 100))
  7105. IWL_WARNING("Could not cancel scan.\n");
  7106. else {
  7107. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7108. "0x%04X\n", filter_flags);
  7109. priv->staging_rxon.filter_flags =
  7110. cpu_to_le32(filter_flags);
  7111. iwl4965_commit_rxon(priv);
  7112. }
  7113. }
  7114. mutex_unlock(&priv->mutex);
  7115. return count;
  7116. }
  7117. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7118. store_filter_flags);
  7119. static ssize_t show_tune(struct device *d,
  7120. struct device_attribute *attr, char *buf)
  7121. {
  7122. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7123. return sprintf(buf, "0x%04X\n",
  7124. (priv->phymode << 8) |
  7125. le16_to_cpu(priv->active_rxon.channel));
  7126. }
  7127. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7128. static ssize_t store_tune(struct device *d,
  7129. struct device_attribute *attr,
  7130. const char *buf, size_t count)
  7131. {
  7132. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7133. char *p = (char *)buf;
  7134. u16 tune = simple_strtoul(p, &p, 0);
  7135. u8 phymode = (tune >> 8) & 0xff;
  7136. u16 channel = tune & 0xff;
  7137. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7138. mutex_lock(&priv->mutex);
  7139. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7140. (priv->phymode != phymode)) {
  7141. const struct iwl4965_channel_info *ch_info;
  7142. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7143. if (!ch_info) {
  7144. IWL_WARNING("Requested invalid phymode/channel "
  7145. "combination: %d %d\n", phymode, channel);
  7146. mutex_unlock(&priv->mutex);
  7147. return -EINVAL;
  7148. }
  7149. /* Cancel any currently running scans... */
  7150. if (iwl4965_scan_cancel_timeout(priv, 100))
  7151. IWL_WARNING("Could not cancel scan.\n");
  7152. else {
  7153. IWL_DEBUG_INFO("Committing phymode and "
  7154. "rxon.channel = %d %d\n",
  7155. phymode, channel);
  7156. iwl4965_set_rxon_channel(priv, phymode, channel);
  7157. iwl4965_set_flags_for_phymode(priv, phymode);
  7158. iwl4965_set_rate(priv);
  7159. iwl4965_commit_rxon(priv);
  7160. }
  7161. }
  7162. mutex_unlock(&priv->mutex);
  7163. return count;
  7164. }
  7165. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7166. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7167. static ssize_t show_measurement(struct device *d,
  7168. struct device_attribute *attr, char *buf)
  7169. {
  7170. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7171. struct iwl4965_spectrum_notification measure_report;
  7172. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7173. u8 *data = (u8 *) & measure_report;
  7174. unsigned long flags;
  7175. spin_lock_irqsave(&priv->lock, flags);
  7176. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7177. spin_unlock_irqrestore(&priv->lock, flags);
  7178. return 0;
  7179. }
  7180. memcpy(&measure_report, &priv->measure_report, size);
  7181. priv->measurement_status = 0;
  7182. spin_unlock_irqrestore(&priv->lock, flags);
  7183. while (size && (PAGE_SIZE - len)) {
  7184. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7185. PAGE_SIZE - len, 1);
  7186. len = strlen(buf);
  7187. if (PAGE_SIZE - len)
  7188. buf[len++] = '\n';
  7189. ofs += 16;
  7190. size -= min(size, 16U);
  7191. }
  7192. return len;
  7193. }
  7194. static ssize_t store_measurement(struct device *d,
  7195. struct device_attribute *attr,
  7196. const char *buf, size_t count)
  7197. {
  7198. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7199. struct ieee80211_measurement_params params = {
  7200. .channel = le16_to_cpu(priv->active_rxon.channel),
  7201. .start_time = cpu_to_le64(priv->last_tsf),
  7202. .duration = cpu_to_le16(1),
  7203. };
  7204. u8 type = IWL_MEASURE_BASIC;
  7205. u8 buffer[32];
  7206. u8 channel;
  7207. if (count) {
  7208. char *p = buffer;
  7209. strncpy(buffer, buf, min(sizeof(buffer), count));
  7210. channel = simple_strtoul(p, NULL, 0);
  7211. if (channel)
  7212. params.channel = channel;
  7213. p = buffer;
  7214. while (*p && *p != ' ')
  7215. p++;
  7216. if (*p)
  7217. type = simple_strtoul(p + 1, NULL, 0);
  7218. }
  7219. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7220. "channel %d (for '%s')\n", type, params.channel, buf);
  7221. iwl4965_get_measurement(priv, &params, type);
  7222. return count;
  7223. }
  7224. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7225. show_measurement, store_measurement);
  7226. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7227. static ssize_t store_retry_rate(struct device *d,
  7228. struct device_attribute *attr,
  7229. const char *buf, size_t count)
  7230. {
  7231. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7232. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7233. if (priv->retry_rate <= 0)
  7234. priv->retry_rate = 1;
  7235. return count;
  7236. }
  7237. static ssize_t show_retry_rate(struct device *d,
  7238. struct device_attribute *attr, char *buf)
  7239. {
  7240. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7241. return sprintf(buf, "%d", priv->retry_rate);
  7242. }
  7243. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7244. store_retry_rate);
  7245. static ssize_t store_power_level(struct device *d,
  7246. struct device_attribute *attr,
  7247. const char *buf, size_t count)
  7248. {
  7249. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7250. int rc;
  7251. int mode;
  7252. mode = simple_strtoul(buf, NULL, 0);
  7253. mutex_lock(&priv->mutex);
  7254. if (!iwl4965_is_ready(priv)) {
  7255. rc = -EAGAIN;
  7256. goto out;
  7257. }
  7258. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7259. mode = IWL_POWER_AC;
  7260. else
  7261. mode |= IWL_POWER_ENABLED;
  7262. if (mode != priv->power_mode) {
  7263. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7264. if (rc) {
  7265. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7266. goto out;
  7267. }
  7268. priv->power_mode = mode;
  7269. }
  7270. rc = count;
  7271. out:
  7272. mutex_unlock(&priv->mutex);
  7273. return rc;
  7274. }
  7275. #define MAX_WX_STRING 80
  7276. /* Values are in microsecond */
  7277. static const s32 timeout_duration[] = {
  7278. 350000,
  7279. 250000,
  7280. 75000,
  7281. 37000,
  7282. 25000,
  7283. };
  7284. static const s32 period_duration[] = {
  7285. 400000,
  7286. 700000,
  7287. 1000000,
  7288. 1000000,
  7289. 1000000
  7290. };
  7291. static ssize_t show_power_level(struct device *d,
  7292. struct device_attribute *attr, char *buf)
  7293. {
  7294. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7295. int level = IWL_POWER_LEVEL(priv->power_mode);
  7296. char *p = buf;
  7297. p += sprintf(p, "%d ", level);
  7298. switch (level) {
  7299. case IWL_POWER_MODE_CAM:
  7300. case IWL_POWER_AC:
  7301. p += sprintf(p, "(AC)");
  7302. break;
  7303. case IWL_POWER_BATTERY:
  7304. p += sprintf(p, "(BATTERY)");
  7305. break;
  7306. default:
  7307. p += sprintf(p,
  7308. "(Timeout %dms, Period %dms)",
  7309. timeout_duration[level - 1] / 1000,
  7310. period_duration[level - 1] / 1000);
  7311. }
  7312. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7313. p += sprintf(p, " OFF\n");
  7314. else
  7315. p += sprintf(p, " \n");
  7316. return (p - buf + 1);
  7317. }
  7318. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7319. store_power_level);
  7320. static ssize_t show_channels(struct device *d,
  7321. struct device_attribute *attr, char *buf)
  7322. {
  7323. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7324. int len = 0, i;
  7325. struct ieee80211_channel *channels = NULL;
  7326. const struct ieee80211_hw_mode *hw_mode = NULL;
  7327. int count = 0;
  7328. if (!iwl4965_is_ready(priv))
  7329. return -EAGAIN;
  7330. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7331. if (!hw_mode)
  7332. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7333. if (hw_mode) {
  7334. channels = hw_mode->channels;
  7335. count = hw_mode->num_channels;
  7336. }
  7337. len +=
  7338. sprintf(&buf[len],
  7339. "Displaying %d channels in 2.4GHz band "
  7340. "(802.11bg):\n", count);
  7341. for (i = 0; i < count; i++)
  7342. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7343. channels[i].chan,
  7344. channels[i].power_level,
  7345. channels[i].
  7346. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7347. " (IEEE 802.11h required)" : "",
  7348. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7349. || (channels[i].
  7350. flag &
  7351. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7352. ", IBSS",
  7353. channels[i].
  7354. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7355. "active/passive" : "passive only");
  7356. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7357. if (hw_mode) {
  7358. channels = hw_mode->channels;
  7359. count = hw_mode->num_channels;
  7360. } else {
  7361. channels = NULL;
  7362. count = 0;
  7363. }
  7364. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7365. "(802.11a):\n", count);
  7366. for (i = 0; i < count; i++)
  7367. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7368. channels[i].chan,
  7369. channels[i].power_level,
  7370. channels[i].
  7371. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7372. " (IEEE 802.11h required)" : "",
  7373. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7374. || (channels[i].
  7375. flag &
  7376. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7377. ", IBSS",
  7378. channels[i].
  7379. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7380. "active/passive" : "passive only");
  7381. return len;
  7382. }
  7383. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7384. static ssize_t show_statistics(struct device *d,
  7385. struct device_attribute *attr, char *buf)
  7386. {
  7387. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7388. u32 size = sizeof(struct iwl4965_notif_statistics);
  7389. u32 len = 0, ofs = 0;
  7390. u8 *data = (u8 *) & priv->statistics;
  7391. int rc = 0;
  7392. if (!iwl4965_is_alive(priv))
  7393. return -EAGAIN;
  7394. mutex_lock(&priv->mutex);
  7395. rc = iwl4965_send_statistics_request(priv);
  7396. mutex_unlock(&priv->mutex);
  7397. if (rc) {
  7398. len = sprintf(buf,
  7399. "Error sending statistics request: 0x%08X\n", rc);
  7400. return len;
  7401. }
  7402. while (size && (PAGE_SIZE - len)) {
  7403. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7404. PAGE_SIZE - len, 1);
  7405. len = strlen(buf);
  7406. if (PAGE_SIZE - len)
  7407. buf[len++] = '\n';
  7408. ofs += 16;
  7409. size -= min(size, 16U);
  7410. }
  7411. return len;
  7412. }
  7413. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7414. static ssize_t show_antenna(struct device *d,
  7415. struct device_attribute *attr, char *buf)
  7416. {
  7417. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7418. if (!iwl4965_is_alive(priv))
  7419. return -EAGAIN;
  7420. return sprintf(buf, "%d\n", priv->antenna);
  7421. }
  7422. static ssize_t store_antenna(struct device *d,
  7423. struct device_attribute *attr,
  7424. const char *buf, size_t count)
  7425. {
  7426. int ant;
  7427. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7428. if (count == 0)
  7429. return 0;
  7430. if (sscanf(buf, "%1i", &ant) != 1) {
  7431. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7432. return count;
  7433. }
  7434. if ((ant >= 0) && (ant <= 2)) {
  7435. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7436. priv->antenna = (enum iwl4965_antenna)ant;
  7437. } else
  7438. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7439. return count;
  7440. }
  7441. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7442. static ssize_t show_status(struct device *d,
  7443. struct device_attribute *attr, char *buf)
  7444. {
  7445. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7446. if (!iwl4965_is_alive(priv))
  7447. return -EAGAIN;
  7448. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7449. }
  7450. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7451. static ssize_t dump_error_log(struct device *d,
  7452. struct device_attribute *attr,
  7453. const char *buf, size_t count)
  7454. {
  7455. char *p = (char *)buf;
  7456. if (p[0] == '1')
  7457. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7458. return strnlen(buf, count);
  7459. }
  7460. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7461. static ssize_t dump_event_log(struct device *d,
  7462. struct device_attribute *attr,
  7463. const char *buf, size_t count)
  7464. {
  7465. char *p = (char *)buf;
  7466. if (p[0] == '1')
  7467. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7468. return strnlen(buf, count);
  7469. }
  7470. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7471. /*****************************************************************************
  7472. *
  7473. * driver setup and teardown
  7474. *
  7475. *****************************************************************************/
  7476. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7477. {
  7478. priv->workqueue = create_workqueue(DRV_NAME);
  7479. init_waitqueue_head(&priv->wait_command_queue);
  7480. INIT_WORK(&priv->up, iwl4965_bg_up);
  7481. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7482. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7483. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7484. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7485. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7486. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7487. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7488. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7489. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7490. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7491. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7492. iwl4965_hw_setup_deferred_work(priv);
  7493. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7494. iwl4965_irq_tasklet, (unsigned long)priv);
  7495. }
  7496. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7497. {
  7498. iwl4965_hw_cancel_deferred_work(priv);
  7499. cancel_delayed_work_sync(&priv->init_alive_start);
  7500. cancel_delayed_work(&priv->scan_check);
  7501. cancel_delayed_work(&priv->alive_start);
  7502. cancel_delayed_work(&priv->post_associate);
  7503. cancel_work_sync(&priv->beacon_update);
  7504. }
  7505. static struct attribute *iwl4965_sysfs_entries[] = {
  7506. &dev_attr_antenna.attr,
  7507. &dev_attr_channels.attr,
  7508. &dev_attr_dump_errors.attr,
  7509. &dev_attr_dump_events.attr,
  7510. &dev_attr_flags.attr,
  7511. &dev_attr_filter_flags.attr,
  7512. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7513. &dev_attr_measurement.attr,
  7514. #endif
  7515. &dev_attr_power_level.attr,
  7516. &dev_attr_retry_rate.attr,
  7517. &dev_attr_rf_kill.attr,
  7518. &dev_attr_rs_window.attr,
  7519. &dev_attr_statistics.attr,
  7520. &dev_attr_status.attr,
  7521. &dev_attr_temperature.attr,
  7522. &dev_attr_tune.attr,
  7523. &dev_attr_tx_power.attr,
  7524. NULL
  7525. };
  7526. static struct attribute_group iwl4965_attribute_group = {
  7527. .name = NULL, /* put in device directory */
  7528. .attrs = iwl4965_sysfs_entries,
  7529. };
  7530. static struct ieee80211_ops iwl4965_hw_ops = {
  7531. .tx = iwl4965_mac_tx,
  7532. .start = iwl4965_mac_start,
  7533. .stop = iwl4965_mac_stop,
  7534. .add_interface = iwl4965_mac_add_interface,
  7535. .remove_interface = iwl4965_mac_remove_interface,
  7536. .config = iwl4965_mac_config,
  7537. .config_interface = iwl4965_mac_config_interface,
  7538. .configure_filter = iwl4965_configure_filter,
  7539. .set_key = iwl4965_mac_set_key,
  7540. .get_stats = iwl4965_mac_get_stats,
  7541. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7542. .conf_tx = iwl4965_mac_conf_tx,
  7543. .get_tsf = iwl4965_mac_get_tsf,
  7544. .reset_tsf = iwl4965_mac_reset_tsf,
  7545. .beacon_update = iwl4965_mac_beacon_update,
  7546. .erp_ie_changed = iwl4965_mac_erp_ie_changed,
  7547. #ifdef CONFIG_IWL4965_HT
  7548. .conf_ht = iwl4965_mac_conf_ht,
  7549. .get_ht_capab = iwl4965_mac_get_ht_capab,
  7550. #ifdef CONFIG_IWL4965_HT_AGG
  7551. .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
  7552. .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
  7553. .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start,
  7554. .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop,
  7555. #endif /* CONFIG_IWL4965_HT_AGG */
  7556. #endif /* CONFIG_IWL4965_HT */
  7557. .hw_scan = iwl4965_mac_hw_scan
  7558. };
  7559. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7560. {
  7561. int err = 0;
  7562. struct iwl4965_priv *priv;
  7563. struct ieee80211_hw *hw;
  7564. int i;
  7565. /* Disabling hardware scan means that mac80211 will perform scans
  7566. * "the hard way", rather than using device's scan. */
  7567. if (iwl4965_param_disable_hw_scan) {
  7568. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7569. iwl4965_hw_ops.hw_scan = NULL;
  7570. }
  7571. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7572. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7573. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7574. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7575. err = -EINVAL;
  7576. goto out;
  7577. }
  7578. /* mac80211 allocates memory for this device instance, including
  7579. * space for this driver's private structure */
  7580. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7581. if (hw == NULL) {
  7582. IWL_ERROR("Can not allocate network device\n");
  7583. err = -ENOMEM;
  7584. goto out;
  7585. }
  7586. SET_IEEE80211_DEV(hw, &pdev->dev);
  7587. hw->rate_control_algorithm = "iwl-4965-rs";
  7588. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7589. priv = hw->priv;
  7590. priv->hw = hw;
  7591. priv->pci_dev = pdev;
  7592. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7593. #ifdef CONFIG_IWL4965_DEBUG
  7594. iwl4965_debug_level = iwl4965_param_debug;
  7595. atomic_set(&priv->restrict_refcnt, 0);
  7596. #endif
  7597. priv->retry_rate = 1;
  7598. priv->ibss_beacon = NULL;
  7599. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7600. * the range of signal quality values that we'll provide.
  7601. * Negative values for level/noise indicate that we'll provide dBm.
  7602. * For WE, at least, non-0 values here *enable* display of values
  7603. * in app (iwconfig). */
  7604. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7605. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7606. hw->max_signal = 100; /* link quality indication (%) */
  7607. /* Tell mac80211 our Tx characteristics */
  7608. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7609. /* Default value; 4 EDCA QOS priorities */
  7610. hw->queues = 4;
  7611. #ifdef CONFIG_IWL4965_HT
  7612. #ifdef CONFIG_IWL4965_HT_AGG
  7613. /* Enhanced value; more queues, to support 11n aggregation */
  7614. hw->queues = 16;
  7615. #endif /* CONFIG_IWL4965_HT_AGG */
  7616. #endif /* CONFIG_IWL4965_HT */
  7617. spin_lock_init(&priv->lock);
  7618. spin_lock_init(&priv->power_data.lock);
  7619. spin_lock_init(&priv->sta_lock);
  7620. spin_lock_init(&priv->hcmd_lock);
  7621. spin_lock_init(&priv->lq_mngr.lock);
  7622. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7623. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7624. INIT_LIST_HEAD(&priv->free_frames);
  7625. mutex_init(&priv->mutex);
  7626. if (pci_enable_device(pdev)) {
  7627. err = -ENODEV;
  7628. goto out_ieee80211_free_hw;
  7629. }
  7630. pci_set_master(pdev);
  7631. /* Clear the driver's (not device's) station table */
  7632. iwl4965_clear_stations_table(priv);
  7633. priv->data_retry_limit = -1;
  7634. priv->ieee_channels = NULL;
  7635. priv->ieee_rates = NULL;
  7636. priv->phymode = -1;
  7637. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7638. if (!err)
  7639. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7640. if (err) {
  7641. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7642. goto out_pci_disable_device;
  7643. }
  7644. pci_set_drvdata(pdev, priv);
  7645. err = pci_request_regions(pdev, DRV_NAME);
  7646. if (err)
  7647. goto out_pci_disable_device;
  7648. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7649. * PCI Tx retries from interfering with C3 CPU state */
  7650. pci_write_config_byte(pdev, 0x41, 0x00);
  7651. priv->hw_base = pci_iomap(pdev, 0, 0);
  7652. if (!priv->hw_base) {
  7653. err = -ENODEV;
  7654. goto out_pci_release_regions;
  7655. }
  7656. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7657. (unsigned long long) pci_resource_len(pdev, 0));
  7658. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7659. /* Initialize module parameter values here */
  7660. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7661. if (iwl4965_param_disable) {
  7662. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7663. IWL_DEBUG_INFO("Radio disabled.\n");
  7664. }
  7665. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7666. priv->ps_mode = 0;
  7667. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7668. priv->is_ht_enabled = 1;
  7669. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7670. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7671. priv->ps_mode = IWL_MIMO_PS_NONE;
  7672. /* Choose which receivers/antennas to use */
  7673. iwl4965_set_rxon_chain(priv);
  7674. printk(KERN_INFO DRV_NAME
  7675. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7676. /* Device-specific setup */
  7677. if (iwl4965_hw_set_hw_setting(priv)) {
  7678. IWL_ERROR("failed to set hw settings\n");
  7679. mutex_unlock(&priv->mutex);
  7680. goto out_iounmap;
  7681. }
  7682. #ifdef CONFIG_IWL4965_QOS
  7683. if (iwl4965_param_qos_enable)
  7684. priv->qos_data.qos_enable = 1;
  7685. iwl4965_reset_qos(priv);
  7686. priv->qos_data.qos_active = 0;
  7687. priv->qos_data.qos_cap.val = 0;
  7688. #endif /* CONFIG_IWL4965_QOS */
  7689. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7690. iwl4965_setup_deferred_work(priv);
  7691. iwl4965_setup_rx_handlers(priv);
  7692. priv->rates_mask = IWL_RATES_MASK;
  7693. /* If power management is turned on, default to AC mode */
  7694. priv->power_mode = IWL_POWER_AC;
  7695. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7696. iwl4965_disable_interrupts(priv);
  7697. pci_enable_msi(pdev);
  7698. err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
  7699. if (err) {
  7700. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7701. goto out_disable_msi;
  7702. }
  7703. mutex_lock(&priv->mutex);
  7704. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7705. if (err) {
  7706. IWL_ERROR("failed to create sysfs device attributes\n");
  7707. mutex_unlock(&priv->mutex);
  7708. goto out_release_irq;
  7709. }
  7710. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7711. * ucode filename and max sizes are card-specific. */
  7712. err = iwl4965_read_ucode(priv);
  7713. if (err) {
  7714. IWL_ERROR("Could not read microcode: %d\n", err);
  7715. mutex_unlock(&priv->mutex);
  7716. goto out_pci_alloc;
  7717. }
  7718. mutex_unlock(&priv->mutex);
  7719. IWL_DEBUG_INFO("Queueing UP work.\n");
  7720. queue_work(priv->workqueue, &priv->up);
  7721. return 0;
  7722. out_pci_alloc:
  7723. iwl4965_dealloc_ucode_pci(priv);
  7724. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7725. out_release_irq:
  7726. free_irq(pdev->irq, priv);
  7727. out_disable_msi:
  7728. pci_disable_msi(pdev);
  7729. destroy_workqueue(priv->workqueue);
  7730. priv->workqueue = NULL;
  7731. iwl4965_unset_hw_setting(priv);
  7732. out_iounmap:
  7733. pci_iounmap(pdev, priv->hw_base);
  7734. out_pci_release_regions:
  7735. pci_release_regions(pdev);
  7736. out_pci_disable_device:
  7737. pci_disable_device(pdev);
  7738. pci_set_drvdata(pdev, NULL);
  7739. out_ieee80211_free_hw:
  7740. ieee80211_free_hw(priv->hw);
  7741. out:
  7742. return err;
  7743. }
  7744. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7745. {
  7746. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7747. struct list_head *p, *q;
  7748. int i;
  7749. if (!priv)
  7750. return;
  7751. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7752. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7753. iwl4965_down(priv);
  7754. /* Free MAC hash list for ADHOC */
  7755. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7756. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7757. list_del(p);
  7758. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7759. }
  7760. }
  7761. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7762. iwl4965_dealloc_ucode_pci(priv);
  7763. if (priv->rxq.bd)
  7764. iwl4965_rx_queue_free(priv, &priv->rxq);
  7765. iwl4965_hw_txq_ctx_free(priv);
  7766. iwl4965_unset_hw_setting(priv);
  7767. iwl4965_clear_stations_table(priv);
  7768. if (priv->mac80211_registered) {
  7769. ieee80211_unregister_hw(priv->hw);
  7770. iwl4965_rate_control_unregister(priv->hw);
  7771. }
  7772. /*netif_stop_queue(dev); */
  7773. flush_workqueue(priv->workqueue);
  7774. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7775. * priv->workqueue... so we can't take down the workqueue
  7776. * until now... */
  7777. destroy_workqueue(priv->workqueue);
  7778. priv->workqueue = NULL;
  7779. free_irq(pdev->irq, priv);
  7780. pci_disable_msi(pdev);
  7781. pci_iounmap(pdev, priv->hw_base);
  7782. pci_release_regions(pdev);
  7783. pci_disable_device(pdev);
  7784. pci_set_drvdata(pdev, NULL);
  7785. kfree(priv->channel_info);
  7786. kfree(priv->ieee_channels);
  7787. kfree(priv->ieee_rates);
  7788. if (priv->ibss_beacon)
  7789. dev_kfree_skb(priv->ibss_beacon);
  7790. ieee80211_free_hw(priv->hw);
  7791. }
  7792. #ifdef CONFIG_PM
  7793. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7794. {
  7795. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7796. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7797. /* Take down the device; powers it off, etc. */
  7798. iwl4965_down(priv);
  7799. if (priv->mac80211_registered)
  7800. ieee80211_stop_queues(priv->hw);
  7801. pci_save_state(pdev);
  7802. pci_disable_device(pdev);
  7803. pci_set_power_state(pdev, PCI_D3hot);
  7804. return 0;
  7805. }
  7806. static void iwl4965_resume(struct iwl4965_priv *priv)
  7807. {
  7808. unsigned long flags;
  7809. /* The following it a temporary work around due to the
  7810. * suspend / resume not fully initializing the NIC correctly.
  7811. * Without all of the following, resume will not attempt to take
  7812. * down the NIC (it shouldn't really need to) and will just try
  7813. * and bring the NIC back up. However that fails during the
  7814. * ucode verification process. This then causes iwl4965_down to be
  7815. * called *after* iwl4965_hw_nic_init() has succeeded -- which
  7816. * then lets the next init sequence succeed. So, we've
  7817. * replicated all of that NIC init code here... */
  7818. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7819. iwl4965_hw_nic_init(priv);
  7820. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7821. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7822. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7823. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7824. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7825. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7826. /* tell the device to stop sending interrupts */
  7827. iwl4965_disable_interrupts(priv);
  7828. spin_lock_irqsave(&priv->lock, flags);
  7829. iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7830. if (!iwl4965_grab_nic_access(priv)) {
  7831. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  7832. APMG_CLK_VAL_DMA_CLK_RQT);
  7833. iwl4965_release_nic_access(priv);
  7834. }
  7835. spin_unlock_irqrestore(&priv->lock, flags);
  7836. udelay(5);
  7837. iwl4965_hw_nic_reset(priv);
  7838. /* Bring the device back up */
  7839. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7840. queue_work(priv->workqueue, &priv->up);
  7841. }
  7842. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7843. {
  7844. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7845. int err;
  7846. printk(KERN_INFO "Coming out of suspend...\n");
  7847. pci_set_power_state(pdev, PCI_D0);
  7848. err = pci_enable_device(pdev);
  7849. pci_restore_state(pdev);
  7850. /*
  7851. * Suspend/Resume resets the PCI configuration space, so we have to
  7852. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7853. * from interfering with C3 CPU state. pci_restore_state won't help
  7854. * here since it only restores the first 64 bytes pci config header.
  7855. */
  7856. pci_write_config_byte(pdev, 0x41, 0x00);
  7857. iwl4965_resume(priv);
  7858. return 0;
  7859. }
  7860. #endif /* CONFIG_PM */
  7861. /*****************************************************************************
  7862. *
  7863. * driver and module entry point
  7864. *
  7865. *****************************************************************************/
  7866. static struct pci_driver iwl4965_driver = {
  7867. .name = DRV_NAME,
  7868. .id_table = iwl4965_hw_card_ids,
  7869. .probe = iwl4965_pci_probe,
  7870. .remove = __devexit_p(iwl4965_pci_remove),
  7871. #ifdef CONFIG_PM
  7872. .suspend = iwl4965_pci_suspend,
  7873. .resume = iwl4965_pci_resume,
  7874. #endif
  7875. };
  7876. static int __init iwl4965_init(void)
  7877. {
  7878. int ret;
  7879. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7880. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7881. ret = pci_register_driver(&iwl4965_driver);
  7882. if (ret) {
  7883. IWL_ERROR("Unable to initialize PCI module\n");
  7884. return ret;
  7885. }
  7886. #ifdef CONFIG_IWL4965_DEBUG
  7887. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7888. if (ret) {
  7889. IWL_ERROR("Unable to create driver sysfs file\n");
  7890. pci_unregister_driver(&iwl4965_driver);
  7891. return ret;
  7892. }
  7893. #endif
  7894. return ret;
  7895. }
  7896. static void __exit iwl4965_exit(void)
  7897. {
  7898. #ifdef CONFIG_IWL4965_DEBUG
  7899. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7900. #endif
  7901. pci_unregister_driver(&iwl4965_driver);
  7902. }
  7903. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7904. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7905. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7906. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7907. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7908. MODULE_PARM_DESC(hwcrypto,
  7909. "using hardware crypto engine (default 0 [software])\n");
  7910. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7911. MODULE_PARM_DESC(debug, "debug output mask");
  7912. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7913. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7914. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7915. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7916. /* QoS */
  7917. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7918. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7919. module_exit(iwl4965_exit);
  7920. module_init(iwl4965_init);