radeon_mode.h 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399
  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c-id.h>
  36. #include <linux/i2c-algo-bit.h>
  37. #include "radeon_fixed.h"
  38. struct radeon_device;
  39. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  40. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  41. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  42. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  43. enum radeon_connector_type {
  44. CONNECTOR_NONE,
  45. CONNECTOR_VGA,
  46. CONNECTOR_DVI_I,
  47. CONNECTOR_DVI_D,
  48. CONNECTOR_DVI_A,
  49. CONNECTOR_STV,
  50. CONNECTOR_CTV,
  51. CONNECTOR_LVDS,
  52. CONNECTOR_DIGITAL,
  53. CONNECTOR_SCART,
  54. CONNECTOR_HDMI_TYPE_A,
  55. CONNECTOR_HDMI_TYPE_B,
  56. CONNECTOR_0XC,
  57. CONNECTOR_0XD,
  58. CONNECTOR_DIN,
  59. CONNECTOR_DISPLAY_PORT,
  60. CONNECTOR_UNSUPPORTED
  61. };
  62. enum radeon_dvi_type {
  63. DVI_AUTO,
  64. DVI_DIGITAL,
  65. DVI_ANALOG
  66. };
  67. enum radeon_rmx_type {
  68. RMX_OFF,
  69. RMX_FULL,
  70. RMX_CENTER,
  71. RMX_ASPECT
  72. };
  73. enum radeon_tv_std {
  74. TV_STD_NTSC,
  75. TV_STD_PAL,
  76. TV_STD_PAL_M,
  77. TV_STD_PAL_60,
  78. TV_STD_NTSC_J,
  79. TV_STD_SCART_PAL,
  80. TV_STD_SECAM,
  81. TV_STD_PAL_CN,
  82. };
  83. struct radeon_i2c_bus_rec {
  84. bool valid;
  85. uint32_t mask_clk_reg;
  86. uint32_t mask_data_reg;
  87. uint32_t a_clk_reg;
  88. uint32_t a_data_reg;
  89. uint32_t put_clk_reg;
  90. uint32_t put_data_reg;
  91. uint32_t get_clk_reg;
  92. uint32_t get_data_reg;
  93. uint32_t mask_clk_mask;
  94. uint32_t mask_data_mask;
  95. uint32_t put_clk_mask;
  96. uint32_t put_data_mask;
  97. uint32_t get_clk_mask;
  98. uint32_t get_data_mask;
  99. uint32_t a_clk_mask;
  100. uint32_t a_data_mask;
  101. };
  102. struct radeon_tmds_pll {
  103. uint32_t freq;
  104. uint32_t value;
  105. };
  106. #define RADEON_MAX_BIOS_CONNECTOR 16
  107. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  108. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  109. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  110. #define RADEON_PLL_LEGACY (1 << 3)
  111. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  112. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  113. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  114. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  115. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  116. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  117. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  118. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  119. struct radeon_pll {
  120. uint16_t reference_freq;
  121. uint16_t reference_div;
  122. uint32_t pll_in_min;
  123. uint32_t pll_in_max;
  124. uint32_t pll_out_min;
  125. uint32_t pll_out_max;
  126. uint16_t xclk;
  127. uint32_t min_ref_div;
  128. uint32_t max_ref_div;
  129. uint32_t min_post_div;
  130. uint32_t max_post_div;
  131. uint32_t min_feedback_div;
  132. uint32_t max_feedback_div;
  133. uint32_t min_frac_feedback_div;
  134. uint32_t max_frac_feedback_div;
  135. uint32_t best_vco;
  136. };
  137. struct radeon_i2c_chan {
  138. struct drm_device *dev;
  139. struct i2c_adapter adapter;
  140. struct i2c_algo_bit_data algo;
  141. struct radeon_i2c_bus_rec rec;
  142. };
  143. /* mostly for macs, but really any system without connector tables */
  144. enum radeon_connector_table {
  145. CT_NONE,
  146. CT_GENERIC,
  147. CT_IBOOK,
  148. CT_POWERBOOK_EXTERNAL,
  149. CT_POWERBOOK_INTERNAL,
  150. CT_POWERBOOK_VGA,
  151. CT_MINI_EXTERNAL,
  152. CT_MINI_INTERNAL,
  153. CT_IMAC_G5_ISIGHT,
  154. CT_EMAC,
  155. };
  156. struct radeon_mode_info {
  157. struct atom_context *atom_context;
  158. enum radeon_connector_table connector_table;
  159. bool mode_config_initialized;
  160. struct radeon_crtc *crtcs[2];
  161. };
  162. struct radeon_native_mode {
  163. /* preferred mode */
  164. uint32_t panel_xres, panel_yres;
  165. uint32_t hoverplus, hsync_width;
  166. uint32_t hblank;
  167. uint32_t voverplus, vsync_width;
  168. uint32_t vblank;
  169. uint32_t dotclock;
  170. uint32_t flags;
  171. };
  172. struct radeon_crtc {
  173. struct drm_crtc base;
  174. int crtc_id;
  175. u16 lut_r[256], lut_g[256], lut_b[256];
  176. bool enabled;
  177. bool can_tile;
  178. uint32_t crtc_offset;
  179. struct drm_gem_object *cursor_bo;
  180. uint64_t cursor_addr;
  181. int cursor_width;
  182. int cursor_height;
  183. uint32_t legacy_display_base_addr;
  184. uint32_t legacy_cursor_offset;
  185. enum radeon_rmx_type rmx_type;
  186. uint32_t devices;
  187. fixed20_12 vsc;
  188. fixed20_12 hsc;
  189. struct radeon_native_mode native_mode;
  190. };
  191. struct radeon_encoder_primary_dac {
  192. /* legacy primary dac */
  193. uint32_t ps2_pdac_adj;
  194. };
  195. struct radeon_encoder_lvds {
  196. /* legacy lvds */
  197. uint16_t panel_vcc_delay;
  198. uint8_t panel_pwr_delay;
  199. uint8_t panel_digon_delay;
  200. uint8_t panel_blon_delay;
  201. uint16_t panel_ref_divider;
  202. uint8_t panel_post_divider;
  203. uint16_t panel_fb_divider;
  204. bool use_bios_dividers;
  205. uint32_t lvds_gen_cntl;
  206. /* panel mode */
  207. struct radeon_native_mode native_mode;
  208. };
  209. struct radeon_encoder_tv_dac {
  210. /* legacy tv dac */
  211. uint32_t ps2_tvdac_adj;
  212. uint32_t ntsc_tvdac_adj;
  213. uint32_t pal_tvdac_adj;
  214. enum radeon_tv_std tv_std;
  215. };
  216. struct radeon_encoder_int_tmds {
  217. /* legacy int tmds */
  218. struct radeon_tmds_pll tmds_pll[4];
  219. };
  220. struct radeon_encoder_atom_dig {
  221. /* atom dig */
  222. bool coherent_mode;
  223. int dig_block;
  224. /* atom lvds */
  225. uint32_t lvds_misc;
  226. uint16_t panel_pwr_delay;
  227. /* panel mode */
  228. struct radeon_native_mode native_mode;
  229. };
  230. struct radeon_encoder {
  231. struct drm_encoder base;
  232. uint32_t encoder_id;
  233. uint32_t devices;
  234. uint32_t flags;
  235. uint32_t pixel_clock;
  236. enum radeon_rmx_type rmx_type;
  237. struct radeon_native_mode native_mode;
  238. void *enc_priv;
  239. };
  240. struct radeon_connector_atom_dig {
  241. uint32_t igp_lane_info;
  242. bool linkb;
  243. };
  244. struct radeon_connector {
  245. struct drm_connector base;
  246. uint32_t connector_id;
  247. uint32_t devices;
  248. struct radeon_i2c_chan *ddc_bus;
  249. int use_digital;
  250. void *con_priv;
  251. };
  252. struct radeon_framebuffer {
  253. struct drm_framebuffer base;
  254. struct drm_gem_object *obj;
  255. };
  256. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  257. struct radeon_i2c_bus_rec *rec,
  258. const char *name);
  259. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  260. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  261. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  262. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  263. extern void radeon_compute_pll(struct radeon_pll *pll,
  264. uint64_t freq,
  265. uint32_t *dot_clock_p,
  266. uint32_t *fb_div_p,
  267. uint32_t *frac_fb_div_p,
  268. uint32_t *ref_div_p,
  269. uint32_t *post_div_p,
  270. int flags);
  271. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  272. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  273. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  274. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  275. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  276. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  277. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  278. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  279. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  280. struct drm_framebuffer *old_fb);
  281. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  282. struct drm_display_mode *mode,
  283. struct drm_display_mode *adjusted_mode,
  284. int x, int y,
  285. struct drm_framebuffer *old_fb);
  286. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  287. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  288. struct drm_framebuffer *old_fb);
  289. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  290. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  291. struct drm_file *file_priv,
  292. uint32_t handle,
  293. uint32_t width,
  294. uint32_t height);
  295. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  296. int x, int y);
  297. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  298. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  299. extern struct radeon_encoder_atom_dig *
  300. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  301. extern struct radeon_encoder_int_tmds *
  302. radeon_atombios_get_tmds_info(struct radeon_encoder *encoder);
  303. extern struct radeon_encoder_primary_dac *
  304. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  305. extern struct radeon_encoder_tv_dac *
  306. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  307. extern struct radeon_encoder_lvds *
  308. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  309. extern struct radeon_encoder_int_tmds *
  310. radeon_combios_get_tmds_info(struct radeon_encoder *encoder);
  311. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  312. extern struct radeon_encoder_tv_dac *
  313. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  314. extern struct radeon_encoder_primary_dac *
  315. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  316. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  317. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  318. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  319. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  320. extern void
  321. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  322. extern void
  323. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  324. extern void
  325. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  326. extern void
  327. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  328. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  329. u16 blue, int regno);
  330. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  331. struct drm_mode_fb_cmd *mode_cmd,
  332. struct drm_gem_object *obj);
  333. int radeonfb_probe(struct drm_device *dev);
  334. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  335. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  336. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  337. void radeon_atombios_init_crtc(struct drm_device *dev,
  338. struct radeon_crtc *radeon_crtc);
  339. void radeon_legacy_init_crtc(struct drm_device *dev,
  340. struct radeon_crtc *radeon_crtc);
  341. void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
  342. void radeon_get_clock_info(struct drm_device *dev);
  343. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  344. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  345. void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
  346. struct drm_display_mode *mode,
  347. struct drm_display_mode *adjusted_mode);
  348. void radeon_enc_destroy(struct drm_encoder *encoder);
  349. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  350. void radeon_combios_asic_init(struct drm_device *dev);
  351. extern int radeon_static_clocks_init(struct drm_device *dev);
  352. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  353. struct drm_display_mode *mode,
  354. struct drm_display_mode *adjusted_mode);
  355. void atom_rv515_force_tv_scaler(struct radeon_device *rdev);
  356. #endif