regcache.c 12 KB

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  1. /*
  2. * Register cache access API
  3. *
  4. * Copyright 2011 Wolfson Microelectronics plc
  5. *
  6. * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/export.h>
  14. #include <linux/device.h>
  15. #include <trace/events/regmap.h>
  16. #include <linux/bsearch.h>
  17. #include <linux/sort.h>
  18. #include "internal.h"
  19. static const struct regcache_ops *cache_types[] = {
  20. &regcache_rbtree_ops,
  21. &regcache_lzo_ops,
  22. &regcache_flat_ops,
  23. };
  24. static int regcache_hw_init(struct regmap *map)
  25. {
  26. int i, j;
  27. int ret;
  28. int count;
  29. unsigned int val;
  30. void *tmp_buf;
  31. if (!map->num_reg_defaults_raw)
  32. return -EINVAL;
  33. if (!map->reg_defaults_raw) {
  34. u32 cache_bypass = map->cache_bypass;
  35. dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  36. /* Bypass the cache access till data read from HW*/
  37. map->cache_bypass = 1;
  38. tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  39. if (!tmp_buf)
  40. return -EINVAL;
  41. ret = regmap_raw_read(map, 0, tmp_buf,
  42. map->num_reg_defaults_raw);
  43. map->cache_bypass = cache_bypass;
  44. if (ret < 0) {
  45. kfree(tmp_buf);
  46. return ret;
  47. }
  48. map->reg_defaults_raw = tmp_buf;
  49. map->cache_free = 1;
  50. }
  51. /* calculate the size of reg_defaults */
  52. for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
  53. val = regcache_get_val(map, map->reg_defaults_raw, i);
  54. if (regmap_volatile(map, i * map->reg_stride))
  55. continue;
  56. count++;
  57. }
  58. map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
  59. GFP_KERNEL);
  60. if (!map->reg_defaults) {
  61. ret = -ENOMEM;
  62. goto err_free;
  63. }
  64. /* fill the reg_defaults */
  65. map->num_reg_defaults = count;
  66. for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  67. val = regcache_get_val(map, map->reg_defaults_raw, i);
  68. if (regmap_volatile(map, i * map->reg_stride))
  69. continue;
  70. map->reg_defaults[j].reg = i * map->reg_stride;
  71. map->reg_defaults[j].def = val;
  72. j++;
  73. }
  74. return 0;
  75. err_free:
  76. if (map->cache_free)
  77. kfree(map->reg_defaults_raw);
  78. return ret;
  79. }
  80. int regcache_init(struct regmap *map, const struct regmap_config *config)
  81. {
  82. int ret;
  83. int i;
  84. void *tmp_buf;
  85. for (i = 0; i < config->num_reg_defaults; i++)
  86. if (config->reg_defaults[i].reg % map->reg_stride)
  87. return -EINVAL;
  88. if (map->cache_type == REGCACHE_NONE) {
  89. map->cache_bypass = true;
  90. return 0;
  91. }
  92. for (i = 0; i < ARRAY_SIZE(cache_types); i++)
  93. if (cache_types[i]->type == map->cache_type)
  94. break;
  95. if (i == ARRAY_SIZE(cache_types)) {
  96. dev_err(map->dev, "Could not match compress type: %d\n",
  97. map->cache_type);
  98. return -EINVAL;
  99. }
  100. map->num_reg_defaults = config->num_reg_defaults;
  101. map->num_reg_defaults_raw = config->num_reg_defaults_raw;
  102. map->reg_defaults_raw = config->reg_defaults_raw;
  103. map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
  104. map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
  105. map->cache_present = NULL;
  106. map->cache_present_nbits = 0;
  107. map->cache = NULL;
  108. map->cache_ops = cache_types[i];
  109. if (!map->cache_ops->read ||
  110. !map->cache_ops->write ||
  111. !map->cache_ops->name)
  112. return -EINVAL;
  113. /* We still need to ensure that the reg_defaults
  114. * won't vanish from under us. We'll need to make
  115. * a copy of it.
  116. */
  117. if (config->reg_defaults) {
  118. if (!map->num_reg_defaults)
  119. return -EINVAL;
  120. tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
  121. sizeof(struct reg_default), GFP_KERNEL);
  122. if (!tmp_buf)
  123. return -ENOMEM;
  124. map->reg_defaults = tmp_buf;
  125. } else if (map->num_reg_defaults_raw) {
  126. /* Some devices such as PMICs don't have cache defaults,
  127. * we cope with this by reading back the HW registers and
  128. * crafting the cache defaults by hand.
  129. */
  130. ret = regcache_hw_init(map);
  131. if (ret < 0)
  132. return ret;
  133. }
  134. if (!map->max_register)
  135. map->max_register = map->num_reg_defaults_raw;
  136. if (map->cache_ops->init) {
  137. dev_dbg(map->dev, "Initializing %s cache\n",
  138. map->cache_ops->name);
  139. ret = map->cache_ops->init(map);
  140. if (ret)
  141. goto err_free;
  142. }
  143. return 0;
  144. err_free:
  145. kfree(map->reg_defaults);
  146. if (map->cache_free)
  147. kfree(map->reg_defaults_raw);
  148. return ret;
  149. }
  150. void regcache_exit(struct regmap *map)
  151. {
  152. if (map->cache_type == REGCACHE_NONE)
  153. return;
  154. BUG_ON(!map->cache_ops);
  155. kfree(map->cache_present);
  156. kfree(map->reg_defaults);
  157. if (map->cache_free)
  158. kfree(map->reg_defaults_raw);
  159. if (map->cache_ops->exit) {
  160. dev_dbg(map->dev, "Destroying %s cache\n",
  161. map->cache_ops->name);
  162. map->cache_ops->exit(map);
  163. }
  164. }
  165. /**
  166. * regcache_read: Fetch the value of a given register from the cache.
  167. *
  168. * @map: map to configure.
  169. * @reg: The register index.
  170. * @value: The value to be returned.
  171. *
  172. * Return a negative value on failure, 0 on success.
  173. */
  174. int regcache_read(struct regmap *map,
  175. unsigned int reg, unsigned int *value)
  176. {
  177. int ret;
  178. if (map->cache_type == REGCACHE_NONE)
  179. return -ENOSYS;
  180. BUG_ON(!map->cache_ops);
  181. if (!regmap_volatile(map, reg)) {
  182. ret = map->cache_ops->read(map, reg, value);
  183. if (ret == 0)
  184. trace_regmap_reg_read_cache(map->dev, reg, *value);
  185. return ret;
  186. }
  187. return -EINVAL;
  188. }
  189. /**
  190. * regcache_write: Set the value of a given register in the cache.
  191. *
  192. * @map: map to configure.
  193. * @reg: The register index.
  194. * @value: The new register value.
  195. *
  196. * Return a negative value on failure, 0 on success.
  197. */
  198. int regcache_write(struct regmap *map,
  199. unsigned int reg, unsigned int value)
  200. {
  201. if (map->cache_type == REGCACHE_NONE)
  202. return 0;
  203. BUG_ON(!map->cache_ops);
  204. if (!regmap_writeable(map, reg))
  205. return -EIO;
  206. if (!regmap_volatile(map, reg))
  207. return map->cache_ops->write(map, reg, value);
  208. return 0;
  209. }
  210. /**
  211. * regcache_sync: Sync the register cache with the hardware.
  212. *
  213. * @map: map to configure.
  214. *
  215. * Any registers that should not be synced should be marked as
  216. * volatile. In general drivers can choose not to use the provided
  217. * syncing functionality if they so require.
  218. *
  219. * Return a negative value on failure, 0 on success.
  220. */
  221. int regcache_sync(struct regmap *map)
  222. {
  223. int ret = 0;
  224. unsigned int i;
  225. const char *name;
  226. unsigned int bypass;
  227. BUG_ON(!map->cache_ops || !map->cache_ops->sync);
  228. map->lock(map);
  229. /* Remember the initial bypass state */
  230. bypass = map->cache_bypass;
  231. dev_dbg(map->dev, "Syncing %s cache\n",
  232. map->cache_ops->name);
  233. name = map->cache_ops->name;
  234. trace_regcache_sync(map->dev, name, "start");
  235. if (!map->cache_dirty)
  236. goto out;
  237. /* Apply any patch first */
  238. map->cache_bypass = 1;
  239. for (i = 0; i < map->patch_regs; i++) {
  240. if (map->patch[i].reg % map->reg_stride) {
  241. ret = -EINVAL;
  242. goto out;
  243. }
  244. ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
  245. if (ret != 0) {
  246. dev_err(map->dev, "Failed to write %x = %x: %d\n",
  247. map->patch[i].reg, map->patch[i].def, ret);
  248. goto out;
  249. }
  250. }
  251. map->cache_bypass = 0;
  252. ret = map->cache_ops->sync(map, 0, map->max_register);
  253. if (ret == 0)
  254. map->cache_dirty = false;
  255. out:
  256. trace_regcache_sync(map->dev, name, "stop");
  257. /* Restore the bypass state */
  258. map->cache_bypass = bypass;
  259. map->unlock(map);
  260. return ret;
  261. }
  262. EXPORT_SYMBOL_GPL(regcache_sync);
  263. /**
  264. * regcache_sync_region: Sync part of the register cache with the hardware.
  265. *
  266. * @map: map to sync.
  267. * @min: first register to sync
  268. * @max: last register to sync
  269. *
  270. * Write all non-default register values in the specified region to
  271. * the hardware.
  272. *
  273. * Return a negative value on failure, 0 on success.
  274. */
  275. int regcache_sync_region(struct regmap *map, unsigned int min,
  276. unsigned int max)
  277. {
  278. int ret = 0;
  279. const char *name;
  280. unsigned int bypass;
  281. BUG_ON(!map->cache_ops || !map->cache_ops->sync);
  282. map->lock(map);
  283. /* Remember the initial bypass state */
  284. bypass = map->cache_bypass;
  285. name = map->cache_ops->name;
  286. dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
  287. trace_regcache_sync(map->dev, name, "start region");
  288. if (!map->cache_dirty)
  289. goto out;
  290. ret = map->cache_ops->sync(map, min, max);
  291. out:
  292. trace_regcache_sync(map->dev, name, "stop region");
  293. /* Restore the bypass state */
  294. map->cache_bypass = bypass;
  295. map->unlock(map);
  296. return ret;
  297. }
  298. EXPORT_SYMBOL_GPL(regcache_sync_region);
  299. /**
  300. * regcache_cache_only: Put a register map into cache only mode
  301. *
  302. * @map: map to configure
  303. * @cache_only: flag if changes should be written to the hardware
  304. *
  305. * When a register map is marked as cache only writes to the register
  306. * map API will only update the register cache, they will not cause
  307. * any hardware changes. This is useful for allowing portions of
  308. * drivers to act as though the device were functioning as normal when
  309. * it is disabled for power saving reasons.
  310. */
  311. void regcache_cache_only(struct regmap *map, bool enable)
  312. {
  313. map->lock(map);
  314. WARN_ON(map->cache_bypass && enable);
  315. map->cache_only = enable;
  316. trace_regmap_cache_only(map->dev, enable);
  317. map->unlock(map);
  318. }
  319. EXPORT_SYMBOL_GPL(regcache_cache_only);
  320. /**
  321. * regcache_mark_dirty: Mark the register cache as dirty
  322. *
  323. * @map: map to mark
  324. *
  325. * Mark the register cache as dirty, for example due to the device
  326. * having been powered down for suspend. If the cache is not marked
  327. * as dirty then the cache sync will be suppressed.
  328. */
  329. void regcache_mark_dirty(struct regmap *map)
  330. {
  331. map->lock(map);
  332. map->cache_dirty = true;
  333. map->unlock(map);
  334. }
  335. EXPORT_SYMBOL_GPL(regcache_mark_dirty);
  336. /**
  337. * regcache_cache_bypass: Put a register map into cache bypass mode
  338. *
  339. * @map: map to configure
  340. * @cache_bypass: flag if changes should not be written to the hardware
  341. *
  342. * When a register map is marked with the cache bypass option, writes
  343. * to the register map API will only update the hardware and not the
  344. * the cache directly. This is useful when syncing the cache back to
  345. * the hardware.
  346. */
  347. void regcache_cache_bypass(struct regmap *map, bool enable)
  348. {
  349. map->lock(map);
  350. WARN_ON(map->cache_only && enable);
  351. map->cache_bypass = enable;
  352. trace_regmap_cache_bypass(map->dev, enable);
  353. map->unlock(map);
  354. }
  355. EXPORT_SYMBOL_GPL(regcache_cache_bypass);
  356. int regcache_set_reg_present(struct regmap *map, unsigned int reg)
  357. {
  358. unsigned long *cache_present;
  359. unsigned int cache_present_size;
  360. unsigned int nregs;
  361. int i;
  362. nregs = reg + 1;
  363. cache_present_size = BITS_TO_LONGS(nregs);
  364. cache_present_size *= sizeof(long);
  365. if (!map->cache_present) {
  366. cache_present = kmalloc(cache_present_size, GFP_KERNEL);
  367. if (!cache_present)
  368. return -ENOMEM;
  369. bitmap_zero(cache_present, nregs);
  370. map->cache_present = cache_present;
  371. map->cache_present_nbits = nregs;
  372. }
  373. if (nregs > map->cache_present_nbits) {
  374. cache_present = krealloc(map->cache_present,
  375. cache_present_size, GFP_KERNEL);
  376. if (!cache_present)
  377. return -ENOMEM;
  378. for (i = 0; i < nregs; i++)
  379. if (i >= map->cache_present_nbits)
  380. clear_bit(i, cache_present);
  381. map->cache_present = cache_present;
  382. map->cache_present_nbits = nregs;
  383. }
  384. set_bit(reg, map->cache_present);
  385. return 0;
  386. }
  387. bool regcache_set_val(struct regmap *map, void *base, unsigned int idx,
  388. unsigned int val)
  389. {
  390. if (regcache_get_val(map, base, idx) == val)
  391. return true;
  392. /* Use device native format if possible */
  393. if (map->format.format_val) {
  394. map->format.format_val(base + (map->cache_word_size * idx),
  395. val, 0);
  396. return false;
  397. }
  398. switch (map->cache_word_size) {
  399. case 1: {
  400. u8 *cache = base;
  401. cache[idx] = val;
  402. break;
  403. }
  404. case 2: {
  405. u16 *cache = base;
  406. cache[idx] = val;
  407. break;
  408. }
  409. case 4: {
  410. u32 *cache = base;
  411. cache[idx] = val;
  412. break;
  413. }
  414. default:
  415. BUG();
  416. }
  417. return false;
  418. }
  419. unsigned int regcache_get_val(struct regmap *map, const void *base,
  420. unsigned int idx)
  421. {
  422. if (!base)
  423. return -EINVAL;
  424. /* Use device native format if possible */
  425. if (map->format.parse_val)
  426. return map->format.parse_val(regcache_get_val_addr(map, base,
  427. idx));
  428. switch (map->cache_word_size) {
  429. case 1: {
  430. const u8 *cache = base;
  431. return cache[idx];
  432. }
  433. case 2: {
  434. const u16 *cache = base;
  435. return cache[idx];
  436. }
  437. case 4: {
  438. const u32 *cache = base;
  439. return cache[idx];
  440. }
  441. default:
  442. BUG();
  443. }
  444. /* unreachable */
  445. return -1;
  446. }
  447. static int regcache_default_cmp(const void *a, const void *b)
  448. {
  449. const struct reg_default *_a = a;
  450. const struct reg_default *_b = b;
  451. return _a->reg - _b->reg;
  452. }
  453. int regcache_lookup_reg(struct regmap *map, unsigned int reg)
  454. {
  455. struct reg_default key;
  456. struct reg_default *r;
  457. key.reg = reg;
  458. key.def = 0;
  459. r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
  460. sizeof(struct reg_default), regcache_default_cmp);
  461. if (r)
  462. return r - map->reg_defaults;
  463. else
  464. return -ENOENT;
  465. }