main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. enum ath9k_power_mode power_mode;
  87. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  88. if (++sc->ps_usecount != 1)
  89. goto unlock;
  90. power_mode = sc->sc_ah->power_mode;
  91. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  92. /*
  93. * While the hardware is asleep, the cycle counters contain no
  94. * useful data. Better clear them now so that they don't mess up
  95. * survey data results.
  96. */
  97. if (power_mode != ATH9K_PM_AWAKE) {
  98. spin_lock(&common->cc_lock);
  99. ath_hw_cycle_counters_update(common);
  100. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  101. spin_unlock(&common->cc_lock);
  102. }
  103. unlock:
  104. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  105. }
  106. void ath9k_ps_restore(struct ath_softc *sc)
  107. {
  108. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  109. unsigned long flags;
  110. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  111. if (--sc->ps_usecount != 0)
  112. goto unlock;
  113. spin_lock(&common->cc_lock);
  114. ath_hw_cycle_counters_update(common);
  115. spin_unlock(&common->cc_lock);
  116. if (sc->ps_idle)
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  118. else if (sc->ps_enabled &&
  119. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  120. PS_WAIT_FOR_CAB |
  121. PS_WAIT_FOR_PSPOLL_DATA |
  122. PS_WAIT_FOR_TX_ACK)))
  123. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  124. unlock:
  125. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  126. }
  127. static void ath_start_ani(struct ath_common *common)
  128. {
  129. struct ath_hw *ah = common->ah;
  130. unsigned long timestamp = jiffies_to_msecs(jiffies);
  131. struct ath_softc *sc = (struct ath_softc *) common->priv;
  132. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  133. return;
  134. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  135. return;
  136. common->ani.longcal_timer = timestamp;
  137. common->ani.shortcal_timer = timestamp;
  138. common->ani.checkani_timer = timestamp;
  139. mod_timer(&common->ani.timer,
  140. jiffies +
  141. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  142. }
  143. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  144. {
  145. struct ath_hw *ah = sc->sc_ah;
  146. struct ath9k_channel *chan = &ah->channels[channel];
  147. struct survey_info *survey = &sc->survey[channel];
  148. if (chan->noisefloor) {
  149. survey->filled |= SURVEY_INFO_NOISE_DBM;
  150. survey->noise = chan->noisefloor;
  151. }
  152. }
  153. static void ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. if (!ah->curchan)
  162. return;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. }
  178. /*
  179. * Set/change channels. If the channel is really being changed, it's done
  180. * by reseting the chip. To accomplish this we must first cleanup any pending
  181. * DMA, then restart stuff.
  182. */
  183. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  184. struct ath9k_channel *hchan)
  185. {
  186. struct ath_wiphy *aphy = hw->priv;
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. del_timer_sync(&common->ani.timer);
  197. cancel_work_sync(&sc->paprd_work);
  198. cancel_work_sync(&sc->hw_check_work);
  199. cancel_delayed_work_sync(&sc->tx_complete_work);
  200. ath9k_ps_wakeup(sc);
  201. spin_lock_bh(&sc->sc_pcu_lock);
  202. /*
  203. * This is only performed if the channel settings have
  204. * actually changed.
  205. *
  206. * To switch channels clear any pending DMA operations;
  207. * wait long enough for the RX fifo to drain, reset the
  208. * hardware at the new frequency, and then re-enable
  209. * the relevant bits of the h/w.
  210. */
  211. ath9k_hw_disable_interrupts(ah);
  212. stopped = ath_drain_all_txq(sc, false);
  213. if (!ath_stoprecv(sc))
  214. stopped = false;
  215. /* XXX: do not flush receive queue here. We don't want
  216. * to flush data frames already in queue because of
  217. * changing channel. */
  218. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  219. fastcc = false;
  220. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  221. caldata = &aphy->caldata;
  222. ath_dbg(common, ATH_DBG_CONFIG,
  223. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  224. sc->sc_ah->curchan->channel,
  225. channel->center_freq, conf_is_ht40(conf),
  226. fastcc);
  227. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  228. if (r) {
  229. ath_err(common,
  230. "Unable to reset channel (%u MHz), reset status %d\n",
  231. channel->center_freq, r);
  232. goto ps_restore;
  233. }
  234. if (ath_startrecv(sc) != 0) {
  235. ath_err(common, "Unable to restart recv logic\n");
  236. r = -EIO;
  237. goto ps_restore;
  238. }
  239. ath_update_txpow(sc);
  240. ath9k_hw_set_interrupts(ah, ah->imask);
  241. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  242. if (sc->sc_flags & SC_OP_BEACONS)
  243. ath_beacon_config(sc, NULL);
  244. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  245. ath_start_ani(common);
  246. }
  247. ps_restore:
  248. spin_unlock_bh(&sc->sc_pcu_lock);
  249. ath9k_ps_restore(sc);
  250. return r;
  251. }
  252. static void ath_paprd_activate(struct ath_softc *sc)
  253. {
  254. struct ath_hw *ah = sc->sc_ah;
  255. struct ath9k_hw_cal_data *caldata = ah->caldata;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. int chain;
  258. if (!caldata || !caldata->paprd_done)
  259. return;
  260. ath9k_ps_wakeup(sc);
  261. ar9003_paprd_enable(ah, false);
  262. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  263. if (!(common->tx_chainmask & BIT(chain)))
  264. continue;
  265. ar9003_paprd_populate_single_table(ah, caldata, chain);
  266. }
  267. ar9003_paprd_enable(ah, true);
  268. ath9k_ps_restore(sc);
  269. }
  270. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  271. {
  272. struct ieee80211_hw *hw = sc->hw;
  273. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  274. struct ath_tx_control txctl;
  275. int time_left;
  276. memset(&txctl, 0, sizeof(txctl));
  277. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  278. memset(tx_info, 0, sizeof(*tx_info));
  279. tx_info->band = hw->conf.channel->band;
  280. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  281. tx_info->control.rates[0].idx = 0;
  282. tx_info->control.rates[0].count = 1;
  283. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  284. tx_info->control.rates[1].idx = -1;
  285. init_completion(&sc->paprd_complete);
  286. sc->paprd_pending = true;
  287. txctl.paprd = BIT(chain);
  288. if (ath_tx_start(hw, skb, &txctl) != 0)
  289. return false;
  290. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  291. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  292. sc->paprd_pending = false;
  293. if (!time_left)
  294. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
  295. "Timeout waiting for paprd training on TX chain %d\n",
  296. chain);
  297. return !!time_left;
  298. }
  299. void ath_paprd_calibrate(struct work_struct *work)
  300. {
  301. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  302. struct ieee80211_hw *hw = sc->hw;
  303. struct ath_hw *ah = sc->sc_ah;
  304. struct ieee80211_hdr *hdr;
  305. struct sk_buff *skb = NULL;
  306. struct ath9k_hw_cal_data *caldata = ah->caldata;
  307. struct ath_common *common = ath9k_hw_common(ah);
  308. int ftype;
  309. int chain_ok = 0;
  310. int chain;
  311. int len = 1800;
  312. if (!caldata)
  313. return;
  314. if (ar9003_paprd_init_table(ah) < 0)
  315. return;
  316. skb = alloc_skb(len, GFP_KERNEL);
  317. if (!skb)
  318. return;
  319. skb_put(skb, len);
  320. memset(skb->data, 0, len);
  321. hdr = (struct ieee80211_hdr *)skb->data;
  322. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  323. hdr->frame_control = cpu_to_le16(ftype);
  324. hdr->duration_id = cpu_to_le16(10);
  325. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  326. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  327. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  328. ath9k_ps_wakeup(sc);
  329. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  330. if (!(common->tx_chainmask & BIT(chain)))
  331. continue;
  332. chain_ok = 0;
  333. ath_dbg(common, ATH_DBG_CALIBRATE,
  334. "Sending PAPRD frame for thermal measurement "
  335. "on chain %d\n", chain);
  336. if (!ath_paprd_send_frame(sc, skb, chain))
  337. goto fail_paprd;
  338. ar9003_paprd_setup_gain_table(ah, chain);
  339. ath_dbg(common, ATH_DBG_CALIBRATE,
  340. "Sending PAPRD training frame on chain %d\n", chain);
  341. if (!ath_paprd_send_frame(sc, skb, chain))
  342. goto fail_paprd;
  343. if (!ar9003_paprd_is_done(ah))
  344. break;
  345. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  346. break;
  347. chain_ok = 1;
  348. }
  349. kfree_skb(skb);
  350. if (chain_ok) {
  351. caldata->paprd_done = true;
  352. ath_paprd_activate(sc);
  353. }
  354. fail_paprd:
  355. ath9k_ps_restore(sc);
  356. }
  357. /*
  358. * This routine performs the periodic noise floor calibration function
  359. * that is used to adjust and optimize the chip performance. This
  360. * takes environmental changes (location, temperature) into account.
  361. * When the task is complete, it reschedules itself depending on the
  362. * appropriate interval that was calculated.
  363. */
  364. void ath_ani_calibrate(unsigned long data)
  365. {
  366. struct ath_softc *sc = (struct ath_softc *)data;
  367. struct ath_hw *ah = sc->sc_ah;
  368. struct ath_common *common = ath9k_hw_common(ah);
  369. bool longcal = false;
  370. bool shortcal = false;
  371. bool aniflag = false;
  372. unsigned int timestamp = jiffies_to_msecs(jiffies);
  373. u32 cal_interval, short_cal_interval, long_cal_interval;
  374. unsigned long flags;
  375. if (ah->caldata && ah->caldata->nfcal_interference)
  376. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  377. else
  378. long_cal_interval = ATH_LONG_CALINTERVAL;
  379. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  380. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  381. /* Only calibrate if awake */
  382. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  383. goto set_timer;
  384. ath9k_ps_wakeup(sc);
  385. /* Long calibration runs independently of short calibration. */
  386. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  387. longcal = true;
  388. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  389. common->ani.longcal_timer = timestamp;
  390. }
  391. /* Short calibration applies only while caldone is false */
  392. if (!common->ani.caldone) {
  393. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  394. shortcal = true;
  395. ath_dbg(common, ATH_DBG_ANI,
  396. "shortcal @%lu\n", jiffies);
  397. common->ani.shortcal_timer = timestamp;
  398. common->ani.resetcal_timer = timestamp;
  399. }
  400. } else {
  401. if ((timestamp - common->ani.resetcal_timer) >=
  402. ATH_RESTART_CALINTERVAL) {
  403. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  404. if (common->ani.caldone)
  405. common->ani.resetcal_timer = timestamp;
  406. }
  407. }
  408. /* Verify whether we must check ANI */
  409. if ((timestamp - common->ani.checkani_timer) >=
  410. ah->config.ani_poll_interval) {
  411. aniflag = true;
  412. common->ani.checkani_timer = timestamp;
  413. }
  414. /* Skip all processing if there's nothing to do. */
  415. if (longcal || shortcal || aniflag) {
  416. /* Call ANI routine if necessary */
  417. if (aniflag) {
  418. spin_lock_irqsave(&common->cc_lock, flags);
  419. ath9k_hw_ani_monitor(ah, ah->curchan);
  420. ath_update_survey_stats(sc);
  421. spin_unlock_irqrestore(&common->cc_lock, flags);
  422. }
  423. /* Perform calibration if necessary */
  424. if (longcal || shortcal) {
  425. common->ani.caldone =
  426. ath9k_hw_calibrate(ah,
  427. ah->curchan,
  428. common->rx_chainmask,
  429. longcal);
  430. }
  431. }
  432. ath9k_ps_restore(sc);
  433. set_timer:
  434. /*
  435. * Set timer interval based on previous results.
  436. * The interval must be the shortest necessary to satisfy ANI,
  437. * short calibration and long calibration.
  438. */
  439. cal_interval = ATH_LONG_CALINTERVAL;
  440. if (sc->sc_ah->config.enable_ani)
  441. cal_interval = min(cal_interval,
  442. (u32)ah->config.ani_poll_interval);
  443. if (!common->ani.caldone)
  444. cal_interval = min(cal_interval, (u32)short_cal_interval);
  445. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  446. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  447. if (!ah->caldata->paprd_done)
  448. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  449. else if (!ah->paprd_table_write_done)
  450. ath_paprd_activate(sc);
  451. }
  452. }
  453. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  454. {
  455. struct ath_node *an;
  456. struct ath_hw *ah = sc->sc_ah;
  457. an = (struct ath_node *)sta->drv_priv;
  458. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  459. sc->sc_flags |= SC_OP_ENABLE_APM;
  460. if (sc->sc_flags & SC_OP_TXAGGR) {
  461. ath_tx_node_init(sc, an);
  462. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  463. sta->ht_cap.ampdu_factor);
  464. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  465. }
  466. }
  467. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  468. {
  469. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  470. if (sc->sc_flags & SC_OP_TXAGGR)
  471. ath_tx_node_cleanup(sc, an);
  472. }
  473. void ath_hw_check(struct work_struct *work)
  474. {
  475. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  476. int i;
  477. ath9k_ps_wakeup(sc);
  478. for (i = 0; i < 3; i++) {
  479. if (ath9k_hw_check_alive(sc->sc_ah))
  480. goto out;
  481. msleep(1);
  482. }
  483. ath_reset(sc, true);
  484. out:
  485. ath9k_ps_restore(sc);
  486. }
  487. void ath9k_tasklet(unsigned long data)
  488. {
  489. struct ath_softc *sc = (struct ath_softc *)data;
  490. struct ath_hw *ah = sc->sc_ah;
  491. struct ath_common *common = ath9k_hw_common(ah);
  492. u32 status = sc->intrstatus;
  493. u32 rxmask;
  494. if (status & ATH9K_INT_FATAL) {
  495. ath_reset(sc, true);
  496. return;
  497. }
  498. ath9k_ps_wakeup(sc);
  499. spin_lock(&sc->sc_pcu_lock);
  500. if (!ath9k_hw_check_alive(ah))
  501. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  502. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  503. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  504. ATH9K_INT_RXORN);
  505. else
  506. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  507. if (status & rxmask) {
  508. /* Check for high priority Rx first */
  509. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  510. (status & ATH9K_INT_RXHP))
  511. ath_rx_tasklet(sc, 0, true);
  512. ath_rx_tasklet(sc, 0, false);
  513. }
  514. if (status & ATH9K_INT_TX) {
  515. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  516. ath_tx_edma_tasklet(sc);
  517. else
  518. ath_tx_tasklet(sc);
  519. }
  520. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  521. /*
  522. * TSF sync does not look correct; remain awake to sync with
  523. * the next Beacon.
  524. */
  525. ath_dbg(common, ATH_DBG_PS,
  526. "TSFOOR - Sync with next Beacon\n");
  527. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  528. }
  529. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  530. if (status & ATH9K_INT_GENTIMER)
  531. ath_gen_timer_isr(sc->sc_ah);
  532. /* re-enable hardware interrupt */
  533. ath9k_hw_enable_interrupts(ah);
  534. spin_unlock(&sc->sc_pcu_lock);
  535. ath9k_ps_restore(sc);
  536. }
  537. irqreturn_t ath_isr(int irq, void *dev)
  538. {
  539. #define SCHED_INTR ( \
  540. ATH9K_INT_FATAL | \
  541. ATH9K_INT_RXORN | \
  542. ATH9K_INT_RXEOL | \
  543. ATH9K_INT_RX | \
  544. ATH9K_INT_RXLP | \
  545. ATH9K_INT_RXHP | \
  546. ATH9K_INT_TX | \
  547. ATH9K_INT_BMISS | \
  548. ATH9K_INT_CST | \
  549. ATH9K_INT_TSFOOR | \
  550. ATH9K_INT_GENTIMER)
  551. struct ath_softc *sc = dev;
  552. struct ath_hw *ah = sc->sc_ah;
  553. struct ath_common *common = ath9k_hw_common(ah);
  554. enum ath9k_int status;
  555. bool sched = false;
  556. /*
  557. * The hardware is not ready/present, don't
  558. * touch anything. Note this can happen early
  559. * on if the IRQ is shared.
  560. */
  561. if (sc->sc_flags & SC_OP_INVALID)
  562. return IRQ_NONE;
  563. /* shared irq, not for us */
  564. if (!ath9k_hw_intrpend(ah))
  565. return IRQ_NONE;
  566. /*
  567. * Figure out the reason(s) for the interrupt. Note
  568. * that the hal returns a pseudo-ISR that may include
  569. * bits we haven't explicitly enabled so we mask the
  570. * value to insure we only process bits we requested.
  571. */
  572. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  573. status &= ah->imask; /* discard unasked-for bits */
  574. /*
  575. * If there are no status bits set, then this interrupt was not
  576. * for me (should have been caught above).
  577. */
  578. if (!status)
  579. return IRQ_NONE;
  580. /* Cache the status */
  581. sc->intrstatus = status;
  582. if (status & SCHED_INTR)
  583. sched = true;
  584. /*
  585. * If a FATAL or RXORN interrupt is received, we have to reset the
  586. * chip immediately.
  587. */
  588. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  589. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  590. goto chip_reset;
  591. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  592. (status & ATH9K_INT_BB_WATCHDOG)) {
  593. spin_lock(&common->cc_lock);
  594. ath_hw_cycle_counters_update(common);
  595. ar9003_hw_bb_watchdog_dbg_info(ah);
  596. spin_unlock(&common->cc_lock);
  597. goto chip_reset;
  598. }
  599. if (status & ATH9K_INT_SWBA)
  600. tasklet_schedule(&sc->bcon_tasklet);
  601. if (status & ATH9K_INT_TXURN)
  602. ath9k_hw_updatetxtriglevel(ah, true);
  603. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  604. if (status & ATH9K_INT_RXEOL) {
  605. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  606. ath9k_hw_set_interrupts(ah, ah->imask);
  607. }
  608. }
  609. if (status & ATH9K_INT_MIB) {
  610. /*
  611. * Disable interrupts until we service the MIB
  612. * interrupt; otherwise it will continue to
  613. * fire.
  614. */
  615. ath9k_hw_disable_interrupts(ah);
  616. /*
  617. * Let the hal handle the event. We assume
  618. * it will clear whatever condition caused
  619. * the interrupt.
  620. */
  621. spin_lock(&common->cc_lock);
  622. ath9k_hw_proc_mib_event(ah);
  623. spin_unlock(&common->cc_lock);
  624. ath9k_hw_enable_interrupts(ah);
  625. }
  626. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  627. if (status & ATH9K_INT_TIM_TIMER) {
  628. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  629. goto chip_reset;
  630. /* Clear RxAbort bit so that we can
  631. * receive frames */
  632. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  633. ath9k_hw_setrxabort(sc->sc_ah, 0);
  634. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  635. }
  636. chip_reset:
  637. ath_debug_stat_interrupt(sc, status);
  638. if (sched) {
  639. /* turn off every interrupt */
  640. ath9k_hw_disable_interrupts(ah);
  641. tasklet_schedule(&sc->intr_tq);
  642. }
  643. return IRQ_HANDLED;
  644. #undef SCHED_INTR
  645. }
  646. static u32 ath_get_extchanmode(struct ath_softc *sc,
  647. struct ieee80211_channel *chan,
  648. enum nl80211_channel_type channel_type)
  649. {
  650. u32 chanmode = 0;
  651. switch (chan->band) {
  652. case IEEE80211_BAND_2GHZ:
  653. switch(channel_type) {
  654. case NL80211_CHAN_NO_HT:
  655. case NL80211_CHAN_HT20:
  656. chanmode = CHANNEL_G_HT20;
  657. break;
  658. case NL80211_CHAN_HT40PLUS:
  659. chanmode = CHANNEL_G_HT40PLUS;
  660. break;
  661. case NL80211_CHAN_HT40MINUS:
  662. chanmode = CHANNEL_G_HT40MINUS;
  663. break;
  664. }
  665. break;
  666. case IEEE80211_BAND_5GHZ:
  667. switch(channel_type) {
  668. case NL80211_CHAN_NO_HT:
  669. case NL80211_CHAN_HT20:
  670. chanmode = CHANNEL_A_HT20;
  671. break;
  672. case NL80211_CHAN_HT40PLUS:
  673. chanmode = CHANNEL_A_HT40PLUS;
  674. break;
  675. case NL80211_CHAN_HT40MINUS:
  676. chanmode = CHANNEL_A_HT40MINUS;
  677. break;
  678. }
  679. break;
  680. default:
  681. break;
  682. }
  683. return chanmode;
  684. }
  685. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  686. struct ieee80211_hw *hw,
  687. struct ieee80211_vif *vif,
  688. struct ieee80211_bss_conf *bss_conf)
  689. {
  690. struct ath_wiphy *aphy = hw->priv;
  691. struct ath_hw *ah = sc->sc_ah;
  692. struct ath_common *common = ath9k_hw_common(ah);
  693. if (bss_conf->assoc) {
  694. ath_dbg(common, ATH_DBG_CONFIG,
  695. "Bss Info ASSOC %d, bssid: %pM\n",
  696. bss_conf->aid, common->curbssid);
  697. /* New association, store aid */
  698. common->curaid = bss_conf->aid;
  699. ath9k_hw_write_associd(ah);
  700. /*
  701. * Request a re-configuration of Beacon related timers
  702. * on the receipt of the first Beacon frame (i.e.,
  703. * after time sync with the AP).
  704. */
  705. sc->ps_flags |= PS_BEACON_SYNC;
  706. /* Configure the beacon */
  707. ath_beacon_config(sc, vif);
  708. /* Reset rssi stats */
  709. aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
  710. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  711. sc->sc_flags |= SC_OP_ANI_RUN;
  712. ath_start_ani(common);
  713. } else {
  714. ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  715. common->curaid = 0;
  716. /* Stop ANI */
  717. sc->sc_flags &= ~SC_OP_ANI_RUN;
  718. del_timer_sync(&common->ani.timer);
  719. }
  720. }
  721. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  722. {
  723. struct ath_hw *ah = sc->sc_ah;
  724. struct ath_common *common = ath9k_hw_common(ah);
  725. struct ieee80211_channel *channel = hw->conf.channel;
  726. int r;
  727. ath9k_ps_wakeup(sc);
  728. spin_lock_bh(&sc->sc_pcu_lock);
  729. ath9k_hw_configpcipowersave(ah, 0, 0);
  730. if (!ah->curchan)
  731. ah->curchan = ath_get_curchannel(sc, sc->hw);
  732. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  733. if (r) {
  734. ath_err(common,
  735. "Unable to reset channel (%u MHz), reset status %d\n",
  736. channel->center_freq, r);
  737. }
  738. ath_update_txpow(sc);
  739. if (ath_startrecv(sc) != 0) {
  740. ath_err(common, "Unable to restart recv logic\n");
  741. goto out;
  742. }
  743. if (sc->sc_flags & SC_OP_BEACONS)
  744. ath_beacon_config(sc, NULL); /* restart beacons */
  745. /* Re-Enable interrupts */
  746. ath9k_hw_set_interrupts(ah, ah->imask);
  747. /* Enable LED */
  748. ath9k_hw_cfg_output(ah, ah->led_pin,
  749. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  750. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  751. ieee80211_wake_queues(hw);
  752. out:
  753. spin_unlock_bh(&sc->sc_pcu_lock);
  754. ath9k_ps_restore(sc);
  755. }
  756. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  757. {
  758. struct ath_hw *ah = sc->sc_ah;
  759. struct ieee80211_channel *channel = hw->conf.channel;
  760. int r;
  761. ath9k_ps_wakeup(sc);
  762. spin_lock_bh(&sc->sc_pcu_lock);
  763. ieee80211_stop_queues(hw);
  764. /*
  765. * Keep the LED on when the radio is disabled
  766. * during idle unassociated state.
  767. */
  768. if (!sc->ps_idle) {
  769. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  770. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  771. }
  772. /* Disable interrupts */
  773. ath9k_hw_disable_interrupts(ah);
  774. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  775. ath_stoprecv(sc); /* turn off frame recv */
  776. ath_flushrecv(sc); /* flush recv queue */
  777. if (!ah->curchan)
  778. ah->curchan = ath_get_curchannel(sc, hw);
  779. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  780. if (r) {
  781. ath_err(ath9k_hw_common(sc->sc_ah),
  782. "Unable to reset channel (%u MHz), reset status %d\n",
  783. channel->center_freq, r);
  784. }
  785. ath9k_hw_phy_disable(ah);
  786. ath9k_hw_configpcipowersave(ah, 1, 1);
  787. spin_unlock_bh(&sc->sc_pcu_lock);
  788. ath9k_ps_restore(sc);
  789. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  790. }
  791. int ath_reset(struct ath_softc *sc, bool retry_tx)
  792. {
  793. struct ath_hw *ah = sc->sc_ah;
  794. struct ath_common *common = ath9k_hw_common(ah);
  795. struct ieee80211_hw *hw = sc->hw;
  796. int r;
  797. /* Stop ANI */
  798. del_timer_sync(&common->ani.timer);
  799. ath9k_ps_wakeup(sc);
  800. spin_lock_bh(&sc->sc_pcu_lock);
  801. ieee80211_stop_queues(hw);
  802. ath9k_hw_disable_interrupts(ah);
  803. ath_drain_all_txq(sc, retry_tx);
  804. ath_stoprecv(sc);
  805. ath_flushrecv(sc);
  806. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  807. if (r)
  808. ath_err(common,
  809. "Unable to reset hardware; reset status %d\n", r);
  810. if (ath_startrecv(sc) != 0)
  811. ath_err(common, "Unable to start recv logic\n");
  812. /*
  813. * We may be doing a reset in response to a request
  814. * that changes the channel so update any state that
  815. * might change as a result.
  816. */
  817. ath_update_txpow(sc);
  818. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  819. ath_beacon_config(sc, NULL); /* restart beacons */
  820. ath9k_hw_set_interrupts(ah, ah->imask);
  821. if (retry_tx) {
  822. int i;
  823. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  824. if (ATH_TXQ_SETUP(sc, i)) {
  825. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  826. ath_txq_schedule(sc, &sc->tx.txq[i]);
  827. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  828. }
  829. }
  830. }
  831. ieee80211_wake_queues(hw);
  832. spin_unlock_bh(&sc->sc_pcu_lock);
  833. /* Start ANI */
  834. ath_start_ani(common);
  835. ath9k_ps_restore(sc);
  836. return r;
  837. }
  838. /* XXX: Remove me once we don't depend on ath9k_channel for all
  839. * this redundant data */
  840. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  841. struct ath9k_channel *ichan)
  842. {
  843. struct ieee80211_channel *chan = hw->conf.channel;
  844. struct ieee80211_conf *conf = &hw->conf;
  845. ichan->channel = chan->center_freq;
  846. ichan->chan = chan;
  847. if (chan->band == IEEE80211_BAND_2GHZ) {
  848. ichan->chanmode = CHANNEL_G;
  849. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  850. } else {
  851. ichan->chanmode = CHANNEL_A;
  852. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  853. }
  854. if (conf_is_ht(conf))
  855. ichan->chanmode = ath_get_extchanmode(sc, chan,
  856. conf->channel_type);
  857. }
  858. /**********************/
  859. /* mac80211 callbacks */
  860. /**********************/
  861. static int ath9k_start(struct ieee80211_hw *hw)
  862. {
  863. struct ath_wiphy *aphy = hw->priv;
  864. struct ath_softc *sc = aphy->sc;
  865. struct ath_hw *ah = sc->sc_ah;
  866. struct ath_common *common = ath9k_hw_common(ah);
  867. struct ieee80211_channel *curchan = hw->conf.channel;
  868. struct ath9k_channel *init_channel;
  869. int r;
  870. ath_dbg(common, ATH_DBG_CONFIG,
  871. "Starting driver with initial channel: %d MHz\n",
  872. curchan->center_freq);
  873. mutex_lock(&sc->mutex);
  874. if (ath9k_wiphy_started(sc)) {
  875. if (sc->chan_idx == curchan->hw_value) {
  876. /*
  877. * Already on the operational channel, the new wiphy
  878. * can be marked active.
  879. */
  880. aphy->state = ATH_WIPHY_ACTIVE;
  881. ieee80211_wake_queues(hw);
  882. } else {
  883. /*
  884. * Another wiphy is on another channel, start the new
  885. * wiphy in paused state.
  886. */
  887. aphy->state = ATH_WIPHY_PAUSED;
  888. ieee80211_stop_queues(hw);
  889. }
  890. mutex_unlock(&sc->mutex);
  891. return 0;
  892. }
  893. aphy->state = ATH_WIPHY_ACTIVE;
  894. /* setup initial channel */
  895. sc->chan_idx = curchan->hw_value;
  896. init_channel = ath_get_curchannel(sc, hw);
  897. /* Reset SERDES registers */
  898. ath9k_hw_configpcipowersave(ah, 0, 0);
  899. /*
  900. * The basic interface to setting the hardware in a good
  901. * state is ``reset''. On return the hardware is known to
  902. * be powered up and with interrupts disabled. This must
  903. * be followed by initialization of the appropriate bits
  904. * and then setup of the interrupt mask.
  905. */
  906. spin_lock_bh(&sc->sc_pcu_lock);
  907. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  908. if (r) {
  909. ath_err(common,
  910. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  911. r, curchan->center_freq);
  912. spin_unlock_bh(&sc->sc_pcu_lock);
  913. goto mutex_unlock;
  914. }
  915. /*
  916. * This is needed only to setup initial state
  917. * but it's best done after a reset.
  918. */
  919. ath_update_txpow(sc);
  920. /*
  921. * Setup the hardware after reset:
  922. * The receive engine is set going.
  923. * Frame transmit is handled entirely
  924. * in the frame output path; there's nothing to do
  925. * here except setup the interrupt mask.
  926. */
  927. if (ath_startrecv(sc) != 0) {
  928. ath_err(common, "Unable to start recv logic\n");
  929. r = -EIO;
  930. spin_unlock_bh(&sc->sc_pcu_lock);
  931. goto mutex_unlock;
  932. }
  933. spin_unlock_bh(&sc->sc_pcu_lock);
  934. /* Setup our intr mask. */
  935. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  936. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  937. ATH9K_INT_GLOBAL;
  938. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  939. ah->imask |= ATH9K_INT_RXHP |
  940. ATH9K_INT_RXLP |
  941. ATH9K_INT_BB_WATCHDOG;
  942. else
  943. ah->imask |= ATH9K_INT_RX;
  944. ah->imask |= ATH9K_INT_GTT;
  945. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  946. ah->imask |= ATH9K_INT_CST;
  947. sc->sc_flags &= ~SC_OP_INVALID;
  948. sc->sc_ah->is_monitoring = false;
  949. /* Disable BMISS interrupt when we're not associated */
  950. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  951. ath9k_hw_set_interrupts(ah, ah->imask);
  952. ieee80211_wake_queues(hw);
  953. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  954. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  955. !ah->btcoex_hw.enabled) {
  956. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  957. AR_STOMP_LOW_WLAN_WGHT);
  958. ath9k_hw_btcoex_enable(ah);
  959. if (common->bus_ops->bt_coex_prep)
  960. common->bus_ops->bt_coex_prep(common);
  961. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  962. ath9k_btcoex_timer_resume(sc);
  963. }
  964. /* User has the option to provide pm-qos value as a module
  965. * parameter rather than using the default value of
  966. * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
  967. */
  968. pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
  969. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  970. common->bus_ops->extn_synch_en(common);
  971. mutex_unlock:
  972. mutex_unlock(&sc->mutex);
  973. return r;
  974. }
  975. static int ath9k_tx(struct ieee80211_hw *hw,
  976. struct sk_buff *skb)
  977. {
  978. struct ath_wiphy *aphy = hw->priv;
  979. struct ath_softc *sc = aphy->sc;
  980. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  981. struct ath_tx_control txctl;
  982. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  983. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  984. ath_dbg(common, ATH_DBG_XMIT,
  985. "ath9k: %s: TX in unexpected wiphy state %d\n",
  986. wiphy_name(hw->wiphy), aphy->state);
  987. goto exit;
  988. }
  989. if (sc->ps_enabled) {
  990. /*
  991. * mac80211 does not set PM field for normal data frames, so we
  992. * need to update that based on the current PS mode.
  993. */
  994. if (ieee80211_is_data(hdr->frame_control) &&
  995. !ieee80211_is_nullfunc(hdr->frame_control) &&
  996. !ieee80211_has_pm(hdr->frame_control)) {
  997. ath_dbg(common, ATH_DBG_PS,
  998. "Add PM=1 for a TX frame while in PS mode\n");
  999. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1000. }
  1001. }
  1002. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1003. /*
  1004. * We are using PS-Poll and mac80211 can request TX while in
  1005. * power save mode. Need to wake up hardware for the TX to be
  1006. * completed and if needed, also for RX of buffered frames.
  1007. */
  1008. ath9k_ps_wakeup(sc);
  1009. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1010. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1011. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1012. ath_dbg(common, ATH_DBG_PS,
  1013. "Sending PS-Poll to pick a buffered frame\n");
  1014. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1015. } else {
  1016. ath_dbg(common, ATH_DBG_PS,
  1017. "Wake up to complete TX\n");
  1018. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1019. }
  1020. /*
  1021. * The actual restore operation will happen only after
  1022. * the sc_flags bit is cleared. We are just dropping
  1023. * the ps_usecount here.
  1024. */
  1025. ath9k_ps_restore(sc);
  1026. }
  1027. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1028. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  1029. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1030. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1031. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  1032. goto exit;
  1033. }
  1034. return 0;
  1035. exit:
  1036. dev_kfree_skb_any(skb);
  1037. return 0;
  1038. }
  1039. static void ath9k_stop(struct ieee80211_hw *hw)
  1040. {
  1041. struct ath_wiphy *aphy = hw->priv;
  1042. struct ath_softc *sc = aphy->sc;
  1043. struct ath_hw *ah = sc->sc_ah;
  1044. struct ath_common *common = ath9k_hw_common(ah);
  1045. int i;
  1046. mutex_lock(&sc->mutex);
  1047. aphy->state = ATH_WIPHY_INACTIVE;
  1048. if (led_blink)
  1049. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1050. cancel_delayed_work_sync(&sc->tx_complete_work);
  1051. cancel_work_sync(&sc->paprd_work);
  1052. cancel_work_sync(&sc->hw_check_work);
  1053. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1054. if (sc->sec_wiphy[i])
  1055. break;
  1056. }
  1057. if (i == sc->num_sec_wiphy) {
  1058. cancel_delayed_work_sync(&sc->wiphy_work);
  1059. cancel_work_sync(&sc->chan_work);
  1060. }
  1061. if (sc->sc_flags & SC_OP_INVALID) {
  1062. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1063. mutex_unlock(&sc->mutex);
  1064. return;
  1065. }
  1066. if (ath9k_wiphy_started(sc)) {
  1067. mutex_unlock(&sc->mutex);
  1068. return; /* another wiphy still in use */
  1069. }
  1070. /* Ensure HW is awake when we try to shut it down. */
  1071. ath9k_ps_wakeup(sc);
  1072. if (ah->btcoex_hw.enabled) {
  1073. ath9k_hw_btcoex_disable(ah);
  1074. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1075. ath9k_btcoex_timer_pause(sc);
  1076. }
  1077. spin_lock_bh(&sc->sc_pcu_lock);
  1078. /* make sure h/w will not generate any interrupt
  1079. * before setting the invalid flag. */
  1080. ath9k_hw_disable_interrupts(ah);
  1081. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1082. ath_drain_all_txq(sc, false);
  1083. ath_stoprecv(sc);
  1084. ath9k_hw_phy_disable(ah);
  1085. } else
  1086. sc->rx.rxlink = NULL;
  1087. /* disable HAL and put h/w to sleep */
  1088. ath9k_hw_disable(ah);
  1089. ath9k_hw_configpcipowersave(ah, 1, 1);
  1090. spin_unlock_bh(&sc->sc_pcu_lock);
  1091. ath9k_ps_restore(sc);
  1092. sc->ps_idle = true;
  1093. ath9k_set_wiphy_idle(aphy, true);
  1094. ath_radio_disable(sc, hw);
  1095. sc->sc_flags |= SC_OP_INVALID;
  1096. pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
  1097. mutex_unlock(&sc->mutex);
  1098. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1099. }
  1100. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1101. struct ieee80211_vif *vif)
  1102. {
  1103. struct ath_wiphy *aphy = hw->priv;
  1104. struct ath_softc *sc = aphy->sc;
  1105. struct ath_hw *ah = sc->sc_ah;
  1106. struct ath_common *common = ath9k_hw_common(ah);
  1107. struct ath_vif *avp = (void *)vif->drv_priv;
  1108. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1109. int ret = 0;
  1110. mutex_lock(&sc->mutex);
  1111. switch (vif->type) {
  1112. case NL80211_IFTYPE_STATION:
  1113. ic_opmode = NL80211_IFTYPE_STATION;
  1114. break;
  1115. case NL80211_IFTYPE_WDS:
  1116. ic_opmode = NL80211_IFTYPE_WDS;
  1117. break;
  1118. case NL80211_IFTYPE_ADHOC:
  1119. case NL80211_IFTYPE_AP:
  1120. case NL80211_IFTYPE_MESH_POINT:
  1121. if (sc->nbcnvifs >= ATH_BCBUF) {
  1122. ret = -ENOBUFS;
  1123. goto out;
  1124. }
  1125. ic_opmode = vif->type;
  1126. break;
  1127. default:
  1128. ath_err(common, "Interface type %d not yet supported\n",
  1129. vif->type);
  1130. ret = -EOPNOTSUPP;
  1131. goto out;
  1132. }
  1133. ath_dbg(common, ATH_DBG_CONFIG,
  1134. "Attach a VIF of type: %d\n", ic_opmode);
  1135. /* Set the VIF opmode */
  1136. avp->av_opmode = ic_opmode;
  1137. avp->av_bslot = -1;
  1138. sc->nvifs++;
  1139. ath9k_set_bssid_mask(hw, vif);
  1140. if (sc->nvifs > 1)
  1141. goto out; /* skip global settings for secondary vif */
  1142. if (ic_opmode == NL80211_IFTYPE_AP) {
  1143. ath9k_hw_set_tsfadjust(ah, 1);
  1144. sc->sc_flags |= SC_OP_TSF_RESET;
  1145. }
  1146. /* Set the device opmode */
  1147. ah->opmode = ic_opmode;
  1148. /*
  1149. * Enable MIB interrupts when there are hardware phy counters.
  1150. * Note we only do this (at the moment) for station mode.
  1151. */
  1152. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1153. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1154. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1155. if (ah->config.enable_ani)
  1156. ah->imask |= ATH9K_INT_MIB;
  1157. ah->imask |= ATH9K_INT_TSFOOR;
  1158. }
  1159. ath9k_hw_set_interrupts(ah, ah->imask);
  1160. if (vif->type == NL80211_IFTYPE_AP ||
  1161. vif->type == NL80211_IFTYPE_ADHOC) {
  1162. sc->sc_flags |= SC_OP_ANI_RUN;
  1163. ath_start_ani(common);
  1164. }
  1165. out:
  1166. mutex_unlock(&sc->mutex);
  1167. return ret;
  1168. }
  1169. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1170. struct ieee80211_vif *vif)
  1171. {
  1172. struct ath_vif *avp = (void *)vif->drv_priv;
  1173. /* Disable SWBA interrupt */
  1174. sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
  1175. ath9k_ps_wakeup(sc);
  1176. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1177. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1178. tasklet_kill(&sc->bcon_tasklet);
  1179. ath9k_ps_restore(sc);
  1180. ath_beacon_return(sc, avp);
  1181. sc->sc_flags &= ~SC_OP_BEACONS;
  1182. if (sc->nbcnvifs > 0) {
  1183. /* Re-enable beaconing */
  1184. sc->sc_ah->imask |= ATH9K_INT_SWBA;
  1185. ath9k_ps_wakeup(sc);
  1186. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1187. ath9k_ps_restore(sc);
  1188. }
  1189. }
  1190. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1191. struct ieee80211_vif *vif,
  1192. enum nl80211_iftype new_type,
  1193. bool p2p)
  1194. {
  1195. struct ath_wiphy *aphy = hw->priv;
  1196. struct ath_softc *sc = aphy->sc;
  1197. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1198. int ret = 0;
  1199. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1200. mutex_lock(&sc->mutex);
  1201. switch (new_type) {
  1202. case NL80211_IFTYPE_AP:
  1203. case NL80211_IFTYPE_ADHOC:
  1204. if (sc->nbcnvifs >= ATH_BCBUF) {
  1205. ath_err(common, "No beacon slot available\n");
  1206. ret = -ENOBUFS;
  1207. goto out;
  1208. }
  1209. break;
  1210. case NL80211_IFTYPE_STATION:
  1211. /* Stop ANI */
  1212. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1213. del_timer_sync(&common->ani.timer);
  1214. if ((vif->type == NL80211_IFTYPE_AP) ||
  1215. (vif->type == NL80211_IFTYPE_ADHOC))
  1216. ath9k_reclaim_beacon(sc, vif);
  1217. break;
  1218. default:
  1219. ath_err(common, "Interface type %d not yet supported\n",
  1220. vif->type);
  1221. ret = -ENOTSUPP;
  1222. goto out;
  1223. }
  1224. vif->type = new_type;
  1225. vif->p2p = p2p;
  1226. out:
  1227. mutex_unlock(&sc->mutex);
  1228. return ret;
  1229. }
  1230. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1231. struct ieee80211_vif *vif)
  1232. {
  1233. struct ath_wiphy *aphy = hw->priv;
  1234. struct ath_softc *sc = aphy->sc;
  1235. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1236. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1237. mutex_lock(&sc->mutex);
  1238. /* Stop ANI */
  1239. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1240. del_timer_sync(&common->ani.timer);
  1241. /* Reclaim beacon resources */
  1242. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1243. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1244. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
  1245. ath9k_reclaim_beacon(sc, vif);
  1246. sc->nvifs--;
  1247. mutex_unlock(&sc->mutex);
  1248. }
  1249. static void ath9k_enable_ps(struct ath_softc *sc)
  1250. {
  1251. struct ath_hw *ah = sc->sc_ah;
  1252. sc->ps_enabled = true;
  1253. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1254. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1255. ah->imask |= ATH9K_INT_TIM_TIMER;
  1256. ath9k_hw_set_interrupts(ah, ah->imask);
  1257. }
  1258. ath9k_hw_setrxabort(ah, 1);
  1259. }
  1260. }
  1261. static void ath9k_disable_ps(struct ath_softc *sc)
  1262. {
  1263. struct ath_hw *ah = sc->sc_ah;
  1264. sc->ps_enabled = false;
  1265. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1266. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1267. ath9k_hw_setrxabort(ah, 0);
  1268. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1269. PS_WAIT_FOR_CAB |
  1270. PS_WAIT_FOR_PSPOLL_DATA |
  1271. PS_WAIT_FOR_TX_ACK);
  1272. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1273. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1274. ath9k_hw_set_interrupts(ah, ah->imask);
  1275. }
  1276. }
  1277. }
  1278. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1279. {
  1280. struct ath_wiphy *aphy = hw->priv;
  1281. struct ath_softc *sc = aphy->sc;
  1282. struct ath_hw *ah = sc->sc_ah;
  1283. struct ath_common *common = ath9k_hw_common(ah);
  1284. struct ieee80211_conf *conf = &hw->conf;
  1285. bool disable_radio;
  1286. mutex_lock(&sc->mutex);
  1287. /*
  1288. * Leave this as the first check because we need to turn on the
  1289. * radio if it was disabled before prior to processing the rest
  1290. * of the changes. Likewise we must only disable the radio towards
  1291. * the end.
  1292. */
  1293. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1294. bool enable_radio;
  1295. bool all_wiphys_idle;
  1296. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1297. spin_lock_bh(&sc->wiphy_lock);
  1298. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1299. ath9k_set_wiphy_idle(aphy, idle);
  1300. enable_radio = (!idle && all_wiphys_idle);
  1301. /*
  1302. * After we unlock here its possible another wiphy
  1303. * can be re-renabled so to account for that we will
  1304. * only disable the radio toward the end of this routine
  1305. * if by then all wiphys are still idle.
  1306. */
  1307. spin_unlock_bh(&sc->wiphy_lock);
  1308. if (enable_radio) {
  1309. sc->ps_idle = false;
  1310. ath_radio_enable(sc, hw);
  1311. ath_dbg(common, ATH_DBG_CONFIG,
  1312. "not-idle: enabling radio\n");
  1313. }
  1314. }
  1315. /*
  1316. * We just prepare to enable PS. We have to wait until our AP has
  1317. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1318. * those ACKs and end up retransmitting the same null data frames.
  1319. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1320. */
  1321. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1322. unsigned long flags;
  1323. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1324. if (conf->flags & IEEE80211_CONF_PS)
  1325. ath9k_enable_ps(sc);
  1326. else
  1327. ath9k_disable_ps(sc);
  1328. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1329. }
  1330. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1331. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1332. ath_dbg(common, ATH_DBG_CONFIG,
  1333. "Monitor mode is enabled\n");
  1334. sc->sc_ah->is_monitoring = true;
  1335. } else {
  1336. ath_dbg(common, ATH_DBG_CONFIG,
  1337. "Monitor mode is disabled\n");
  1338. sc->sc_ah->is_monitoring = false;
  1339. }
  1340. }
  1341. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1342. struct ieee80211_channel *curchan = hw->conf.channel;
  1343. int pos = curchan->hw_value;
  1344. int old_pos = -1;
  1345. unsigned long flags;
  1346. if (ah->curchan)
  1347. old_pos = ah->curchan - &ah->channels[0];
  1348. aphy->chan_idx = pos;
  1349. aphy->chan_is_ht = conf_is_ht(conf);
  1350. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1351. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1352. else
  1353. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1354. if (aphy->state == ATH_WIPHY_SCAN ||
  1355. aphy->state == ATH_WIPHY_ACTIVE)
  1356. ath9k_wiphy_pause_all_forced(sc, aphy);
  1357. else {
  1358. /*
  1359. * Do not change operational channel based on a paused
  1360. * wiphy changes.
  1361. */
  1362. goto skip_chan_change;
  1363. }
  1364. ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1365. curchan->center_freq);
  1366. /* XXX: remove me eventualy */
  1367. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1368. /* update survey stats for the old channel before switching */
  1369. spin_lock_irqsave(&common->cc_lock, flags);
  1370. ath_update_survey_stats(sc);
  1371. spin_unlock_irqrestore(&common->cc_lock, flags);
  1372. /*
  1373. * If the operating channel changes, change the survey in-use flags
  1374. * along with it.
  1375. * Reset the survey data for the new channel, unless we're switching
  1376. * back to the operating channel from an off-channel operation.
  1377. */
  1378. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1379. sc->cur_survey != &sc->survey[pos]) {
  1380. if (sc->cur_survey)
  1381. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1382. sc->cur_survey = &sc->survey[pos];
  1383. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1384. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1385. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1386. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1387. }
  1388. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1389. ath_err(common, "Unable to set channel\n");
  1390. mutex_unlock(&sc->mutex);
  1391. return -EINVAL;
  1392. }
  1393. /*
  1394. * The most recent snapshot of channel->noisefloor for the old
  1395. * channel is only available after the hardware reset. Copy it to
  1396. * the survey stats now.
  1397. */
  1398. if (old_pos >= 0)
  1399. ath_update_survey_nf(sc, old_pos);
  1400. }
  1401. skip_chan_change:
  1402. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1403. sc->config.txpowlimit = 2 * conf->power_level;
  1404. ath9k_ps_wakeup(sc);
  1405. ath_update_txpow(sc);
  1406. ath9k_ps_restore(sc);
  1407. }
  1408. spin_lock_bh(&sc->wiphy_lock);
  1409. disable_radio = ath9k_all_wiphys_idle(sc);
  1410. spin_unlock_bh(&sc->wiphy_lock);
  1411. if (disable_radio) {
  1412. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1413. sc->ps_idle = true;
  1414. ath_radio_disable(sc, hw);
  1415. }
  1416. mutex_unlock(&sc->mutex);
  1417. return 0;
  1418. }
  1419. #define SUPPORTED_FILTERS \
  1420. (FIF_PROMISC_IN_BSS | \
  1421. FIF_ALLMULTI | \
  1422. FIF_CONTROL | \
  1423. FIF_PSPOLL | \
  1424. FIF_OTHER_BSS | \
  1425. FIF_BCN_PRBRESP_PROMISC | \
  1426. FIF_PROBE_REQ | \
  1427. FIF_FCSFAIL)
  1428. /* FIXME: sc->sc_full_reset ? */
  1429. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1430. unsigned int changed_flags,
  1431. unsigned int *total_flags,
  1432. u64 multicast)
  1433. {
  1434. struct ath_wiphy *aphy = hw->priv;
  1435. struct ath_softc *sc = aphy->sc;
  1436. u32 rfilt;
  1437. changed_flags &= SUPPORTED_FILTERS;
  1438. *total_flags &= SUPPORTED_FILTERS;
  1439. sc->rx.rxfilter = *total_flags;
  1440. ath9k_ps_wakeup(sc);
  1441. rfilt = ath_calcrxfilter(sc);
  1442. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1443. ath9k_ps_restore(sc);
  1444. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1445. "Set HW RX filter: 0x%x\n", rfilt);
  1446. }
  1447. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1448. struct ieee80211_vif *vif,
  1449. struct ieee80211_sta *sta)
  1450. {
  1451. struct ath_wiphy *aphy = hw->priv;
  1452. struct ath_softc *sc = aphy->sc;
  1453. ath_node_attach(sc, sta);
  1454. return 0;
  1455. }
  1456. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1457. struct ieee80211_vif *vif,
  1458. struct ieee80211_sta *sta)
  1459. {
  1460. struct ath_wiphy *aphy = hw->priv;
  1461. struct ath_softc *sc = aphy->sc;
  1462. ath_node_detach(sc, sta);
  1463. return 0;
  1464. }
  1465. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1466. const struct ieee80211_tx_queue_params *params)
  1467. {
  1468. struct ath_wiphy *aphy = hw->priv;
  1469. struct ath_softc *sc = aphy->sc;
  1470. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1471. struct ath_txq *txq;
  1472. struct ath9k_tx_queue_info qi;
  1473. int ret = 0;
  1474. if (queue >= WME_NUM_AC)
  1475. return 0;
  1476. txq = sc->tx.txq_map[queue];
  1477. mutex_lock(&sc->mutex);
  1478. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1479. qi.tqi_aifs = params->aifs;
  1480. qi.tqi_cwmin = params->cw_min;
  1481. qi.tqi_cwmax = params->cw_max;
  1482. qi.tqi_burstTime = params->txop;
  1483. ath_dbg(common, ATH_DBG_CONFIG,
  1484. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1485. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1486. params->cw_max, params->txop);
  1487. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1488. if (ret)
  1489. ath_err(common, "TXQ Update failed\n");
  1490. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1491. if (queue == WME_AC_BE && !ret)
  1492. ath_beaconq_config(sc);
  1493. mutex_unlock(&sc->mutex);
  1494. return ret;
  1495. }
  1496. static int ath9k_set_key(struct ieee80211_hw *hw,
  1497. enum set_key_cmd cmd,
  1498. struct ieee80211_vif *vif,
  1499. struct ieee80211_sta *sta,
  1500. struct ieee80211_key_conf *key)
  1501. {
  1502. struct ath_wiphy *aphy = hw->priv;
  1503. struct ath_softc *sc = aphy->sc;
  1504. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1505. int ret = 0;
  1506. if (ath9k_modparam_nohwcrypt)
  1507. return -ENOSPC;
  1508. mutex_lock(&sc->mutex);
  1509. ath9k_ps_wakeup(sc);
  1510. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1511. switch (cmd) {
  1512. case SET_KEY:
  1513. ret = ath_key_config(common, vif, sta, key);
  1514. if (ret >= 0) {
  1515. key->hw_key_idx = ret;
  1516. /* push IV and Michael MIC generation to stack */
  1517. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1518. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1519. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1520. if (sc->sc_ah->sw_mgmt_crypto &&
  1521. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1522. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1523. ret = 0;
  1524. }
  1525. break;
  1526. case DISABLE_KEY:
  1527. ath_key_delete(common, key);
  1528. break;
  1529. default:
  1530. ret = -EINVAL;
  1531. }
  1532. ath9k_ps_restore(sc);
  1533. mutex_unlock(&sc->mutex);
  1534. return ret;
  1535. }
  1536. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1537. struct ieee80211_vif *vif,
  1538. struct ieee80211_bss_conf *bss_conf,
  1539. u32 changed)
  1540. {
  1541. struct ath_wiphy *aphy = hw->priv;
  1542. struct ath_softc *sc = aphy->sc;
  1543. struct ath_hw *ah = sc->sc_ah;
  1544. struct ath_common *common = ath9k_hw_common(ah);
  1545. struct ath_vif *avp = (void *)vif->drv_priv;
  1546. int slottime;
  1547. int error;
  1548. mutex_lock(&sc->mutex);
  1549. if (changed & BSS_CHANGED_BSSID) {
  1550. /* Set BSSID */
  1551. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1552. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1553. common->curaid = 0;
  1554. ath9k_hw_write_associd(ah);
  1555. /* Set aggregation protection mode parameters */
  1556. sc->config.ath_aggr_prot = 0;
  1557. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1558. common->curbssid, common->curaid);
  1559. /* need to reconfigure the beacon */
  1560. sc->sc_flags &= ~SC_OP_BEACONS ;
  1561. }
  1562. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1563. if ((changed & BSS_CHANGED_BEACON) ||
  1564. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1565. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1566. error = ath_beacon_alloc(aphy, vif);
  1567. if (!error)
  1568. ath_beacon_config(sc, vif);
  1569. }
  1570. if (changed & BSS_CHANGED_ERP_SLOT) {
  1571. if (bss_conf->use_short_slot)
  1572. slottime = 9;
  1573. else
  1574. slottime = 20;
  1575. if (vif->type == NL80211_IFTYPE_AP) {
  1576. /*
  1577. * Defer update, so that connected stations can adjust
  1578. * their settings at the same time.
  1579. * See beacon.c for more details
  1580. */
  1581. sc->beacon.slottime = slottime;
  1582. sc->beacon.updateslot = UPDATE;
  1583. } else {
  1584. ah->slottime = slottime;
  1585. ath9k_hw_init_global_settings(ah);
  1586. }
  1587. }
  1588. /* Disable transmission of beacons */
  1589. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1590. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1591. if (changed & BSS_CHANGED_BEACON_INT) {
  1592. sc->beacon_interval = bss_conf->beacon_int;
  1593. /*
  1594. * In case of AP mode, the HW TSF has to be reset
  1595. * when the beacon interval changes.
  1596. */
  1597. if (vif->type == NL80211_IFTYPE_AP) {
  1598. sc->sc_flags |= SC_OP_TSF_RESET;
  1599. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1600. error = ath_beacon_alloc(aphy, vif);
  1601. if (!error)
  1602. ath_beacon_config(sc, vif);
  1603. } else {
  1604. ath_beacon_config(sc, vif);
  1605. }
  1606. }
  1607. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1608. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1609. bss_conf->use_short_preamble);
  1610. if (bss_conf->use_short_preamble)
  1611. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1612. else
  1613. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1614. }
  1615. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1616. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1617. bss_conf->use_cts_prot);
  1618. if (bss_conf->use_cts_prot &&
  1619. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1620. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1621. else
  1622. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1623. }
  1624. if (changed & BSS_CHANGED_ASSOC) {
  1625. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1626. bss_conf->assoc);
  1627. ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
  1628. }
  1629. mutex_unlock(&sc->mutex);
  1630. }
  1631. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1632. {
  1633. u64 tsf;
  1634. struct ath_wiphy *aphy = hw->priv;
  1635. struct ath_softc *sc = aphy->sc;
  1636. mutex_lock(&sc->mutex);
  1637. ath9k_ps_wakeup(sc);
  1638. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1639. ath9k_ps_restore(sc);
  1640. mutex_unlock(&sc->mutex);
  1641. return tsf;
  1642. }
  1643. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1644. {
  1645. struct ath_wiphy *aphy = hw->priv;
  1646. struct ath_softc *sc = aphy->sc;
  1647. mutex_lock(&sc->mutex);
  1648. ath9k_ps_wakeup(sc);
  1649. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1650. ath9k_ps_restore(sc);
  1651. mutex_unlock(&sc->mutex);
  1652. }
  1653. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1654. {
  1655. struct ath_wiphy *aphy = hw->priv;
  1656. struct ath_softc *sc = aphy->sc;
  1657. mutex_lock(&sc->mutex);
  1658. ath9k_ps_wakeup(sc);
  1659. ath9k_hw_reset_tsf(sc->sc_ah);
  1660. ath9k_ps_restore(sc);
  1661. mutex_unlock(&sc->mutex);
  1662. }
  1663. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1664. struct ieee80211_vif *vif,
  1665. enum ieee80211_ampdu_mlme_action action,
  1666. struct ieee80211_sta *sta,
  1667. u16 tid, u16 *ssn)
  1668. {
  1669. struct ath_wiphy *aphy = hw->priv;
  1670. struct ath_softc *sc = aphy->sc;
  1671. int ret = 0;
  1672. local_bh_disable();
  1673. switch (action) {
  1674. case IEEE80211_AMPDU_RX_START:
  1675. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1676. ret = -ENOTSUPP;
  1677. break;
  1678. case IEEE80211_AMPDU_RX_STOP:
  1679. break;
  1680. case IEEE80211_AMPDU_TX_START:
  1681. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1682. return -EOPNOTSUPP;
  1683. ath9k_ps_wakeup(sc);
  1684. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1685. if (!ret)
  1686. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1687. ath9k_ps_restore(sc);
  1688. break;
  1689. case IEEE80211_AMPDU_TX_STOP:
  1690. ath9k_ps_wakeup(sc);
  1691. ath_tx_aggr_stop(sc, sta, tid);
  1692. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1693. ath9k_ps_restore(sc);
  1694. break;
  1695. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1696. ath9k_ps_wakeup(sc);
  1697. ath_tx_aggr_resume(sc, sta, tid);
  1698. ath9k_ps_restore(sc);
  1699. break;
  1700. default:
  1701. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1702. }
  1703. local_bh_enable();
  1704. return ret;
  1705. }
  1706. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1707. struct survey_info *survey)
  1708. {
  1709. struct ath_wiphy *aphy = hw->priv;
  1710. struct ath_softc *sc = aphy->sc;
  1711. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1712. struct ieee80211_supported_band *sband;
  1713. struct ieee80211_channel *chan;
  1714. unsigned long flags;
  1715. int pos;
  1716. spin_lock_irqsave(&common->cc_lock, flags);
  1717. if (idx == 0)
  1718. ath_update_survey_stats(sc);
  1719. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1720. if (sband && idx >= sband->n_channels) {
  1721. idx -= sband->n_channels;
  1722. sband = NULL;
  1723. }
  1724. if (!sband)
  1725. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1726. if (!sband || idx >= sband->n_channels) {
  1727. spin_unlock_irqrestore(&common->cc_lock, flags);
  1728. return -ENOENT;
  1729. }
  1730. chan = &sband->channels[idx];
  1731. pos = chan->hw_value;
  1732. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1733. survey->channel = chan;
  1734. spin_unlock_irqrestore(&common->cc_lock, flags);
  1735. return 0;
  1736. }
  1737. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1738. {
  1739. struct ath_wiphy *aphy = hw->priv;
  1740. struct ath_softc *sc = aphy->sc;
  1741. mutex_lock(&sc->mutex);
  1742. if (ath9k_wiphy_scanning(sc)) {
  1743. /*
  1744. * There is a race here in mac80211 but fixing it requires
  1745. * we revisit how we handle the scan complete callback.
  1746. * After mac80211 fixes we will not have configured hardware
  1747. * to the home channel nor would we have configured the RX
  1748. * filter yet.
  1749. */
  1750. mutex_unlock(&sc->mutex);
  1751. return;
  1752. }
  1753. aphy->state = ATH_WIPHY_SCAN;
  1754. ath9k_wiphy_pause_all_forced(sc, aphy);
  1755. mutex_unlock(&sc->mutex);
  1756. }
  1757. /*
  1758. * XXX: this requires a revisit after the driver
  1759. * scan_complete gets moved to another place/removed in mac80211.
  1760. */
  1761. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1762. {
  1763. struct ath_wiphy *aphy = hw->priv;
  1764. struct ath_softc *sc = aphy->sc;
  1765. mutex_lock(&sc->mutex);
  1766. aphy->state = ATH_WIPHY_ACTIVE;
  1767. mutex_unlock(&sc->mutex);
  1768. }
  1769. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1770. {
  1771. struct ath_wiphy *aphy = hw->priv;
  1772. struct ath_softc *sc = aphy->sc;
  1773. struct ath_hw *ah = sc->sc_ah;
  1774. mutex_lock(&sc->mutex);
  1775. ah->coverage_class = coverage_class;
  1776. ath9k_hw_init_global_settings(ah);
  1777. mutex_unlock(&sc->mutex);
  1778. }
  1779. struct ieee80211_ops ath9k_ops = {
  1780. .tx = ath9k_tx,
  1781. .start = ath9k_start,
  1782. .stop = ath9k_stop,
  1783. .add_interface = ath9k_add_interface,
  1784. .change_interface = ath9k_change_interface,
  1785. .remove_interface = ath9k_remove_interface,
  1786. .config = ath9k_config,
  1787. .configure_filter = ath9k_configure_filter,
  1788. .sta_add = ath9k_sta_add,
  1789. .sta_remove = ath9k_sta_remove,
  1790. .conf_tx = ath9k_conf_tx,
  1791. .bss_info_changed = ath9k_bss_info_changed,
  1792. .set_key = ath9k_set_key,
  1793. .get_tsf = ath9k_get_tsf,
  1794. .set_tsf = ath9k_set_tsf,
  1795. .reset_tsf = ath9k_reset_tsf,
  1796. .ampdu_action = ath9k_ampdu_action,
  1797. .get_survey = ath9k_get_survey,
  1798. .sw_scan_start = ath9k_sw_scan_start,
  1799. .sw_scan_complete = ath9k_sw_scan_complete,
  1800. .rfkill_poll = ath9k_rfkill_poll_state,
  1801. .set_coverage_class = ath9k_set_coverage_class,
  1802. };