netxen_nic_init.c 35 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_phan_reg.h"
  38. struct crb_addr_pair {
  39. u32 addr;
  40. u32 data;
  41. };
  42. #define NETXEN_MAX_CRB_XFORM 60
  43. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  44. #define NETXEN_ADDR_ERROR (0xffffffff)
  45. #define crb_addr_transform(name) \
  46. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  47. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  48. #define NETXEN_NIC_XDMA_RESET 0x8000ff
  49. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  50. uint32_t ctx, uint32_t ringid);
  51. #if 0
  52. static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  53. unsigned long off, int *data)
  54. {
  55. void __iomem *addr = pci_base_offset(adapter, off);
  56. writel(*data, addr);
  57. }
  58. #endif /* 0 */
  59. static void crb_addr_transform_setup(void)
  60. {
  61. crb_addr_transform(XDMA);
  62. crb_addr_transform(TIMR);
  63. crb_addr_transform(SRE);
  64. crb_addr_transform(SQN3);
  65. crb_addr_transform(SQN2);
  66. crb_addr_transform(SQN1);
  67. crb_addr_transform(SQN0);
  68. crb_addr_transform(SQS3);
  69. crb_addr_transform(SQS2);
  70. crb_addr_transform(SQS1);
  71. crb_addr_transform(SQS0);
  72. crb_addr_transform(RPMX7);
  73. crb_addr_transform(RPMX6);
  74. crb_addr_transform(RPMX5);
  75. crb_addr_transform(RPMX4);
  76. crb_addr_transform(RPMX3);
  77. crb_addr_transform(RPMX2);
  78. crb_addr_transform(RPMX1);
  79. crb_addr_transform(RPMX0);
  80. crb_addr_transform(ROMUSB);
  81. crb_addr_transform(SN);
  82. crb_addr_transform(QMN);
  83. crb_addr_transform(QMS);
  84. crb_addr_transform(PGNI);
  85. crb_addr_transform(PGND);
  86. crb_addr_transform(PGN3);
  87. crb_addr_transform(PGN2);
  88. crb_addr_transform(PGN1);
  89. crb_addr_transform(PGN0);
  90. crb_addr_transform(PGSI);
  91. crb_addr_transform(PGSD);
  92. crb_addr_transform(PGS3);
  93. crb_addr_transform(PGS2);
  94. crb_addr_transform(PGS1);
  95. crb_addr_transform(PGS0);
  96. crb_addr_transform(PS);
  97. crb_addr_transform(PH);
  98. crb_addr_transform(NIU);
  99. crb_addr_transform(I2Q);
  100. crb_addr_transform(EG);
  101. crb_addr_transform(MN);
  102. crb_addr_transform(MS);
  103. crb_addr_transform(CAS2);
  104. crb_addr_transform(CAS1);
  105. crb_addr_transform(CAS0);
  106. crb_addr_transform(CAM);
  107. crb_addr_transform(C2C1);
  108. crb_addr_transform(C2C0);
  109. crb_addr_transform(SMB);
  110. }
  111. int netxen_init_firmware(struct netxen_adapter *adapter)
  112. {
  113. u32 state = 0, loops = 0, err = 0;
  114. /* Window 1 call */
  115. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  116. if (state == PHAN_INITIALIZE_ACK)
  117. return 0;
  118. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  119. udelay(100);
  120. /* Window 1 call */
  121. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  122. loops++;
  123. }
  124. if (loops >= 2000) {
  125. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  126. state);
  127. err = -EIO;
  128. return err;
  129. }
  130. /* Window 1 call */
  131. writel(INTR_SCHEME_PERPORT,
  132. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
  133. writel(MSI_MODE_MULTIFUNC,
  134. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST));
  135. writel(MPORT_MULTI_FUNCTION_MODE,
  136. NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
  137. writel(PHAN_INITIALIZE_ACK,
  138. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  139. return err;
  140. }
  141. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  142. {
  143. int ctxid, ring;
  144. u32 i;
  145. u32 num_rx_bufs = 0;
  146. struct netxen_rcv_desc_ctx *rcv_desc;
  147. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  148. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  149. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  150. struct netxen_rx_buffer *rx_buf;
  151. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  152. rcv_desc->begin_alloc = 0;
  153. rx_buf = rcv_desc->rx_buf_arr;
  154. num_rx_bufs = rcv_desc->max_rx_desc_count;
  155. /*
  156. * Now go through all of them, set reference handles
  157. * and put them in the queues.
  158. */
  159. for (i = 0; i < num_rx_bufs; i++) {
  160. rx_buf->ref_handle = i;
  161. rx_buf->state = NETXEN_BUFFER_FREE;
  162. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  163. "%p\n", ctxid, i, rx_buf);
  164. rx_buf++;
  165. }
  166. }
  167. }
  168. }
  169. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  170. {
  171. switch (adapter->ahw.board_type) {
  172. case NETXEN_NIC_GBE:
  173. adapter->enable_phy_interrupts =
  174. netxen_niu_gbe_enable_phy_interrupts;
  175. adapter->disable_phy_interrupts =
  176. netxen_niu_gbe_disable_phy_interrupts;
  177. adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  178. adapter->macaddr_set = netxen_niu_macaddr_set;
  179. adapter->set_mtu = netxen_nic_set_mtu_gb;
  180. adapter->set_promisc = netxen_niu_set_promiscuous_mode;
  181. adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
  182. adapter->phy_read = netxen_niu_gbe_phy_read;
  183. adapter->phy_write = netxen_niu_gbe_phy_write;
  184. adapter->init_niu = netxen_nic_init_niu_gb;
  185. adapter->stop_port = netxen_niu_disable_gbe_port;
  186. break;
  187. case NETXEN_NIC_XGBE:
  188. adapter->enable_phy_interrupts =
  189. netxen_niu_xgbe_enable_phy_interrupts;
  190. adapter->disable_phy_interrupts =
  191. netxen_niu_xgbe_disable_phy_interrupts;
  192. adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  193. adapter->macaddr_set = netxen_niu_xg_macaddr_set;
  194. adapter->set_mtu = netxen_nic_set_mtu_xgb;
  195. adapter->init_port = netxen_niu_xg_init_port;
  196. adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  197. adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
  198. adapter->stop_port = netxen_niu_disable_xg_port;
  199. break;
  200. default:
  201. break;
  202. }
  203. }
  204. /*
  205. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  206. * address to external PCI CRB address.
  207. */
  208. static u32 netxen_decode_crb_addr(u32 addr)
  209. {
  210. int i;
  211. u32 base_addr, offset, pci_base;
  212. crb_addr_transform_setup();
  213. pci_base = NETXEN_ADDR_ERROR;
  214. base_addr = addr & 0xfff00000;
  215. offset = addr & 0x000fffff;
  216. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  217. if (crb_addr_xform[i] == base_addr) {
  218. pci_base = i << 20;
  219. break;
  220. }
  221. }
  222. if (pci_base == NETXEN_ADDR_ERROR)
  223. return pci_base;
  224. else
  225. return (pci_base + offset);
  226. }
  227. static long rom_max_timeout = 100;
  228. static long rom_lock_timeout = 10000;
  229. #if 0
  230. static long rom_write_timeout = 700;
  231. #endif
  232. static int rom_lock(struct netxen_adapter *adapter)
  233. {
  234. int iter;
  235. u32 done = 0;
  236. int timeout = 0;
  237. while (!done) {
  238. /* acquire semaphore2 from PCI HW block */
  239. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  240. &done);
  241. if (done == 1)
  242. break;
  243. if (timeout >= rom_lock_timeout)
  244. return -EIO;
  245. timeout++;
  246. /*
  247. * Yield CPU
  248. */
  249. if (!in_atomic())
  250. schedule();
  251. else {
  252. for (iter = 0; iter < 20; iter++)
  253. cpu_relax(); /*This a nop instr on i386 */
  254. }
  255. }
  256. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  257. return 0;
  258. }
  259. static int netxen_wait_rom_done(struct netxen_adapter *adapter)
  260. {
  261. long timeout = 0;
  262. long done = 0;
  263. while (done == 0) {
  264. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  265. done &= 2;
  266. timeout++;
  267. if (timeout >= rom_max_timeout) {
  268. printk("Timeout reached waiting for rom done");
  269. return -EIO;
  270. }
  271. }
  272. return 0;
  273. }
  274. #if 0
  275. static int netxen_rom_wren(struct netxen_adapter *adapter)
  276. {
  277. /* Set write enable latch in ROM status register */
  278. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  279. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  280. M25P_INSTR_WREN);
  281. if (netxen_wait_rom_done(adapter)) {
  282. return -1;
  283. }
  284. return 0;
  285. }
  286. static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
  287. unsigned int addr)
  288. {
  289. unsigned int data = 0xdeaddead;
  290. data = netxen_nic_reg_read(adapter, addr);
  291. return data;
  292. }
  293. static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
  294. {
  295. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  296. M25P_INSTR_RDSR);
  297. if (netxen_wait_rom_done(adapter)) {
  298. return -1;
  299. }
  300. return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
  301. }
  302. #endif
  303. static void netxen_rom_unlock(struct netxen_adapter *adapter)
  304. {
  305. u32 val;
  306. /* release semaphore2 */
  307. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  308. }
  309. #if 0
  310. static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
  311. {
  312. long timeout = 0;
  313. long wip = 1;
  314. int val;
  315. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  316. while (wip != 0) {
  317. val = netxen_do_rom_rdsr(adapter);
  318. wip = val & 1;
  319. timeout++;
  320. if (timeout > rom_max_timeout) {
  321. return -1;
  322. }
  323. }
  324. return 0;
  325. }
  326. static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
  327. int data)
  328. {
  329. if (netxen_rom_wren(adapter)) {
  330. return -1;
  331. }
  332. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  333. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  334. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  335. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  336. M25P_INSTR_PP);
  337. if (netxen_wait_rom_done(adapter)) {
  338. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  339. return -1;
  340. }
  341. return netxen_rom_wip_poll(adapter);
  342. }
  343. #endif
  344. static int do_rom_fast_read(struct netxen_adapter *adapter,
  345. int addr, int *valp)
  346. {
  347. cond_resched();
  348. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  349. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  350. udelay(100); /* prevent bursting on CRB */
  351. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  352. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  353. if (netxen_wait_rom_done(adapter)) {
  354. printk("Error waiting for rom done\n");
  355. return -EIO;
  356. }
  357. /* reset abyte_cnt and dummy_byte_cnt */
  358. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  359. udelay(100); /* prevent bursting on CRB */
  360. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  361. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  362. return 0;
  363. }
  364. static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  365. u8 *bytes, size_t size)
  366. {
  367. int addridx;
  368. int ret = 0;
  369. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  370. int v;
  371. ret = do_rom_fast_read(adapter, addridx, &v);
  372. if (ret != 0)
  373. break;
  374. *(__le32 *)bytes = cpu_to_le32(v);
  375. bytes += 4;
  376. }
  377. return ret;
  378. }
  379. int
  380. netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  381. u8 *bytes, size_t size)
  382. {
  383. int ret;
  384. ret = rom_lock(adapter);
  385. if (ret < 0)
  386. return ret;
  387. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  388. netxen_rom_unlock(adapter);
  389. return ret;
  390. }
  391. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  392. {
  393. int ret;
  394. if (rom_lock(adapter) != 0)
  395. return -EIO;
  396. ret = do_rom_fast_read(adapter, addr, valp);
  397. netxen_rom_unlock(adapter);
  398. return ret;
  399. }
  400. #if 0
  401. int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
  402. {
  403. int ret = 0;
  404. if (rom_lock(adapter) != 0) {
  405. return -1;
  406. }
  407. ret = do_rom_fast_write(adapter, addr, data);
  408. netxen_rom_unlock(adapter);
  409. return ret;
  410. }
  411. static int do_rom_fast_write_words(struct netxen_adapter *adapter,
  412. int addr, u8 *bytes, size_t size)
  413. {
  414. int addridx = addr;
  415. int ret = 0;
  416. while (addridx < (addr + size)) {
  417. int last_attempt = 0;
  418. int timeout = 0;
  419. int data;
  420. data = le32_to_cpu((*(__le32*)bytes));
  421. ret = do_rom_fast_write(adapter, addridx, data);
  422. if (ret < 0)
  423. return ret;
  424. while(1) {
  425. int data1;
  426. ret = do_rom_fast_read(adapter, addridx, &data1);
  427. if (ret < 0)
  428. return ret;
  429. if (data1 == data)
  430. break;
  431. if (timeout++ >= rom_write_timeout) {
  432. if (last_attempt++ < 4) {
  433. ret = do_rom_fast_write(adapter,
  434. addridx, data);
  435. if (ret < 0)
  436. return ret;
  437. }
  438. else {
  439. printk(KERN_INFO "Data write did not "
  440. "succeed at address 0x%x\n", addridx);
  441. break;
  442. }
  443. }
  444. }
  445. bytes += 4;
  446. addridx += 4;
  447. }
  448. return ret;
  449. }
  450. int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
  451. u8 *bytes, size_t size)
  452. {
  453. int ret = 0;
  454. ret = rom_lock(adapter);
  455. if (ret < 0)
  456. return ret;
  457. ret = do_rom_fast_write_words(adapter, addr, bytes, size);
  458. netxen_rom_unlock(adapter);
  459. return ret;
  460. }
  461. static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
  462. {
  463. int ret;
  464. ret = netxen_rom_wren(adapter);
  465. if (ret < 0)
  466. return ret;
  467. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  468. netxen_crb_writelit_adapter(adapter,
  469. NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
  470. ret = netxen_wait_rom_done(adapter);
  471. if (ret < 0)
  472. return ret;
  473. return netxen_rom_wip_poll(adapter);
  474. }
  475. static int netxen_rom_rdsr(struct netxen_adapter *adapter)
  476. {
  477. int ret;
  478. ret = rom_lock(adapter);
  479. if (ret < 0)
  480. return ret;
  481. ret = netxen_do_rom_rdsr(adapter);
  482. netxen_rom_unlock(adapter);
  483. return ret;
  484. }
  485. int netxen_backup_crbinit(struct netxen_adapter *adapter)
  486. {
  487. int ret = FLASH_SUCCESS;
  488. int val;
  489. char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
  490. if (!buffer)
  491. return -ENOMEM;
  492. /* unlock sector 63 */
  493. val = netxen_rom_rdsr(adapter);
  494. val = val & 0xe3;
  495. ret = netxen_rom_wrsr(adapter, val);
  496. if (ret != FLASH_SUCCESS)
  497. goto out_kfree;
  498. ret = netxen_rom_wip_poll(adapter);
  499. if (ret != FLASH_SUCCESS)
  500. goto out_kfree;
  501. /* copy sector 0 to sector 63 */
  502. ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
  503. buffer, NETXEN_FLASH_SECTOR_SIZE);
  504. if (ret != FLASH_SUCCESS)
  505. goto out_kfree;
  506. ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
  507. buffer, NETXEN_FLASH_SECTOR_SIZE);
  508. if (ret != FLASH_SUCCESS)
  509. goto out_kfree;
  510. /* lock sector 63 */
  511. val = netxen_rom_rdsr(adapter);
  512. if (!(val & 0x8)) {
  513. val |= (0x1 << 2);
  514. /* lock sector 63 */
  515. if (netxen_rom_wrsr(adapter, val) == 0) {
  516. ret = netxen_rom_wip_poll(adapter);
  517. if (ret != FLASH_SUCCESS)
  518. goto out_kfree;
  519. /* lock SR writes */
  520. ret = netxen_rom_wip_poll(adapter);
  521. if (ret != FLASH_SUCCESS)
  522. goto out_kfree;
  523. }
  524. }
  525. out_kfree:
  526. kfree(buffer);
  527. return ret;
  528. }
  529. static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
  530. {
  531. netxen_rom_wren(adapter);
  532. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  533. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  534. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  535. M25P_INSTR_SE);
  536. if (netxen_wait_rom_done(adapter)) {
  537. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  538. return -1;
  539. }
  540. return netxen_rom_wip_poll(adapter);
  541. }
  542. static void check_erased_flash(struct netxen_adapter *adapter, int addr)
  543. {
  544. int i;
  545. int val;
  546. int count = 0, erased_errors = 0;
  547. int range;
  548. range = (addr == NETXEN_USER_START) ?
  549. NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
  550. for (i = addr; i < range; i += 4) {
  551. netxen_rom_fast_read(adapter, i, &val);
  552. if (val != 0xffffffff)
  553. erased_errors++;
  554. count++;
  555. }
  556. if (erased_errors)
  557. printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
  558. "for sector address: %x\n", erased_errors, count, addr);
  559. }
  560. int netxen_rom_se(struct netxen_adapter *adapter, int addr)
  561. {
  562. int ret = 0;
  563. if (rom_lock(adapter) != 0) {
  564. return -1;
  565. }
  566. ret = netxen_do_rom_se(adapter, addr);
  567. netxen_rom_unlock(adapter);
  568. msleep(30);
  569. check_erased_flash(adapter, addr);
  570. return ret;
  571. }
  572. static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
  573. int start, int end)
  574. {
  575. int ret = FLASH_SUCCESS;
  576. int i;
  577. for (i = start; i < end; i++) {
  578. ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
  579. if (ret)
  580. break;
  581. ret = netxen_rom_wip_poll(adapter);
  582. if (ret < 0)
  583. return ret;
  584. }
  585. return ret;
  586. }
  587. int
  588. netxen_flash_erase_secondary(struct netxen_adapter *adapter)
  589. {
  590. int ret = FLASH_SUCCESS;
  591. int start, end;
  592. start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  593. end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
  594. ret = netxen_flash_erase_sections(adapter, start, end);
  595. return ret;
  596. }
  597. int
  598. netxen_flash_erase_primary(struct netxen_adapter *adapter)
  599. {
  600. int ret = FLASH_SUCCESS;
  601. int start, end;
  602. start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
  603. end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  604. ret = netxen_flash_erase_sections(adapter, start, end);
  605. return ret;
  606. }
  607. void netxen_halt_pegs(struct netxen_adapter *adapter)
  608. {
  609. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
  610. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
  611. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
  612. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
  613. }
  614. int netxen_flash_unlock(struct netxen_adapter *adapter)
  615. {
  616. int ret = 0;
  617. ret = netxen_rom_wrsr(adapter, 0);
  618. if (ret < 0)
  619. return ret;
  620. ret = netxen_rom_wren(adapter);
  621. if (ret < 0)
  622. return ret;
  623. return ret;
  624. }
  625. #endif /* 0 */
  626. #define NETXEN_BOARDTYPE 0x4008
  627. #define NETXEN_BOARDNUM 0x400c
  628. #define NETXEN_CHIPNUM 0x4010
  629. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  630. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  631. {
  632. int addr, val;
  633. int n, i;
  634. int init_delay = 0;
  635. struct crb_addr_pair *buf;
  636. u32 off;
  637. /* resetall */
  638. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  639. NETXEN_ROMBUS_RESET);
  640. if (verbose) {
  641. int val;
  642. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  643. printk("P2 ROM board type: 0x%08x\n", val);
  644. else
  645. printk("Could not read board type\n");
  646. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  647. printk("P2 ROM board num: 0x%08x\n", val);
  648. else
  649. printk("Could not read board number\n");
  650. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  651. printk("P2 ROM chip num: 0x%08x\n", val);
  652. else
  653. printk("Could not read chip number\n");
  654. }
  655. if (netxen_rom_fast_read(adapter, 0, &n) == 0 && (n & 0x80000000)) {
  656. n &= ~0x80000000;
  657. if (n < 0x400) {
  658. if (verbose)
  659. printk("%s: %d CRB init values found"
  660. " in ROM.\n", netxen_nic_driver_name, n);
  661. } else {
  662. printk("%s:n=0x%x Error! NetXen card flash not"
  663. " initialized.\n", __FUNCTION__, n);
  664. return -EIO;
  665. }
  666. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  667. if (buf == NULL) {
  668. printk("%s: netxen_pinit_from_rom: Unable to calloc "
  669. "memory.\n", netxen_nic_driver_name);
  670. return -ENOMEM;
  671. }
  672. for (i = 0; i < n; i++) {
  673. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  674. || netxen_rom_fast_read(adapter, 8 * i + 8,
  675. &addr) != 0)
  676. return -EIO;
  677. buf[i].addr = addr;
  678. buf[i].data = val;
  679. if (verbose)
  680. printk("%s: PCI: 0x%08x == 0x%08x\n",
  681. netxen_nic_driver_name, (unsigned int)
  682. netxen_decode_crb_addr(addr), val);
  683. }
  684. for (i = 0; i < n; i++) {
  685. off = netxen_decode_crb_addr(buf[i].addr);
  686. if (off == NETXEN_ADDR_ERROR) {
  687. printk(KERN_ERR"CRB init value out of range %x\n",
  688. buf[i].addr);
  689. continue;
  690. }
  691. off += NETXEN_PCI_CRBSPACE;
  692. /* skipping cold reboot MAGIC */
  693. if (off == NETXEN_CAM_RAM(0x1fc))
  694. continue;
  695. /* After writing this register, HW needs time for CRB */
  696. /* to quiet down (else crb_window returns 0xffffffff) */
  697. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  698. init_delay = 1;
  699. /* hold xdma in reset also */
  700. buf[i].data = NETXEN_NIC_XDMA_RESET;
  701. }
  702. netxen_nic_hw_write_wx(adapter, off, &buf[i].data, 4);
  703. if (init_delay == 1) {
  704. msleep(1000);
  705. init_delay = 0;
  706. }
  707. msleep(1);
  708. }
  709. kfree(buf);
  710. /* disable_peg_cache_all */
  711. /* unreset_net_cache */
  712. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  713. 4);
  714. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  715. (val & 0xffffff0f));
  716. /* p2dn replyCount */
  717. netxen_crb_writelit_adapter(adapter,
  718. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  719. /* disable_peg_cache 0 */
  720. netxen_crb_writelit_adapter(adapter,
  721. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  722. /* disable_peg_cache 1 */
  723. netxen_crb_writelit_adapter(adapter,
  724. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  725. /* peg_clr_all */
  726. /* peg_clr 0 */
  727. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  728. 0);
  729. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  730. 0);
  731. /* peg_clr 1 */
  732. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  733. 0);
  734. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  735. 0);
  736. /* peg_clr 2 */
  737. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  738. 0);
  739. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  740. 0);
  741. /* peg_clr 3 */
  742. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  743. 0);
  744. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  745. 0);
  746. }
  747. return 0;
  748. }
  749. int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
  750. {
  751. uint64_t addr;
  752. uint32_t hi;
  753. uint32_t lo;
  754. adapter->dummy_dma.addr =
  755. pci_alloc_consistent(adapter->pdev,
  756. NETXEN_HOST_DUMMY_DMA_SIZE,
  757. &adapter->dummy_dma.phys_addr);
  758. if (adapter->dummy_dma.addr == NULL) {
  759. printk("%s: ERROR: Could not allocate dummy DMA memory\n",
  760. __FUNCTION__);
  761. return -ENOMEM;
  762. }
  763. addr = (uint64_t) adapter->dummy_dma.phys_addr;
  764. hi = (addr >> 32) & 0xffffffff;
  765. lo = addr & 0xffffffff;
  766. writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
  767. writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
  768. return 0;
  769. }
  770. void netxen_free_adapter_offload(struct netxen_adapter *adapter)
  771. {
  772. int i;
  773. if (adapter->dummy_dma.addr) {
  774. i = 100;
  775. do {
  776. if (dma_watchdog_shutdown_request(adapter) == 1)
  777. break;
  778. msleep(50);
  779. if (dma_watchdog_shutdown_poll_result(adapter) == 1)
  780. break;
  781. } while (--i);
  782. if (i) {
  783. pci_free_consistent(adapter->pdev,
  784. NETXEN_HOST_DUMMY_DMA_SIZE,
  785. adapter->dummy_dma.addr,
  786. adapter->dummy_dma.phys_addr);
  787. adapter->dummy_dma.addr = NULL;
  788. } else {
  789. printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
  790. adapter->netdev->name);
  791. }
  792. }
  793. }
  794. int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
  795. {
  796. u32 val = 0;
  797. int retries = 30;
  798. if (!pegtune_val) {
  799. do {
  800. val = readl(NETXEN_CRB_NORMALIZE
  801. (adapter, CRB_CMDPEG_STATE));
  802. pegtune_val = readl(NETXEN_CRB_NORMALIZE
  803. (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
  804. if (val == PHAN_INITIALIZE_COMPLETE ||
  805. val == PHAN_INITIALIZE_ACK)
  806. return 0;
  807. msleep(1000);
  808. } while (--retries);
  809. if (!retries) {
  810. printk(KERN_WARNING "netxen_phantom_init: init failed, "
  811. "pegtune_val=%x\n", pegtune_val);
  812. return -1;
  813. }
  814. }
  815. return 0;
  816. }
  817. static int netxen_nic_check_temp(struct netxen_adapter *adapter)
  818. {
  819. struct net_device *netdev = adapter->netdev;
  820. uint32_t temp, temp_state, temp_val;
  821. int rv = 0;
  822. temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
  823. temp_state = nx_get_temp_state(temp);
  824. temp_val = nx_get_temp_val(temp);
  825. if (temp_state == NX_TEMP_PANIC) {
  826. printk(KERN_ALERT
  827. "%s: Device temperature %d degrees C exceeds"
  828. " maximum allowed. Hardware has been shut down.\n",
  829. netxen_nic_driver_name, temp_val);
  830. netif_carrier_off(netdev);
  831. netif_stop_queue(netdev);
  832. rv = 1;
  833. } else if (temp_state == NX_TEMP_WARN) {
  834. if (adapter->temp == NX_TEMP_NORMAL) {
  835. printk(KERN_ALERT
  836. "%s: Device temperature %d degrees C "
  837. "exceeds operating range."
  838. " Immediate action needed.\n",
  839. netxen_nic_driver_name, temp_val);
  840. }
  841. } else {
  842. if (adapter->temp == NX_TEMP_WARN) {
  843. printk(KERN_INFO
  844. "%s: Device temperature is now %d degrees C"
  845. " in normal range.\n", netxen_nic_driver_name,
  846. temp_val);
  847. }
  848. }
  849. adapter->temp = temp_state;
  850. return rv;
  851. }
  852. void netxen_watchdog_task(struct work_struct *work)
  853. {
  854. struct netxen_adapter *adapter =
  855. container_of(work, struct netxen_adapter, watchdog_task);
  856. if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
  857. return;
  858. if (adapter->handle_phy_intr)
  859. adapter->handle_phy_intr(adapter);
  860. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  861. }
  862. /*
  863. * netxen_process_rcv() send the received packet to the protocol stack.
  864. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  865. * invoke the routine to send more rx buffers to the Phantom...
  866. */
  867. static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  868. struct status_desc *desc)
  869. {
  870. struct pci_dev *pdev = adapter->pdev;
  871. struct net_device *netdev = adapter->netdev;
  872. u64 sts_data = le64_to_cpu(desc->status_desc_data);
  873. int index = netxen_get_sts_refhandle(sts_data);
  874. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  875. struct netxen_rx_buffer *buffer;
  876. struct sk_buff *skb;
  877. u32 length = netxen_get_sts_totallength(sts_data);
  878. u32 desc_ctx;
  879. struct netxen_rcv_desc_ctx *rcv_desc;
  880. int ret;
  881. desc_ctx = netxen_get_sts_type(sts_data);
  882. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  883. printk("%s: %s Bad Rcv descriptor ring\n",
  884. netxen_nic_driver_name, netdev->name);
  885. return;
  886. }
  887. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  888. if (unlikely(index > rcv_desc->max_rx_desc_count)) {
  889. DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
  890. index, rcv_desc->max_rx_desc_count);
  891. return;
  892. }
  893. buffer = &rcv_desc->rx_buf_arr[index];
  894. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  895. buffer->lro_current_frags++;
  896. if (netxen_get_sts_desc_lro_last_frag(desc)) {
  897. buffer->lro_expected_frags =
  898. netxen_get_sts_desc_lro_cnt(desc);
  899. buffer->lro_length = length;
  900. }
  901. if (buffer->lro_current_frags != buffer->lro_expected_frags) {
  902. if (buffer->lro_expected_frags != 0) {
  903. printk("LRO: (refhandle:%x) recv frag. "
  904. "wait for last. flags: %x expected:%d "
  905. "have:%d\n", index,
  906. netxen_get_sts_desc_lro_last_frag(desc),
  907. buffer->lro_expected_frags,
  908. buffer->lro_current_frags);
  909. }
  910. return;
  911. }
  912. }
  913. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  914. PCI_DMA_FROMDEVICE);
  915. skb = (struct sk_buff *)buffer->skb;
  916. if (likely(adapter->rx_csum &&
  917. netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
  918. adapter->stats.csummed++;
  919. skb->ip_summed = CHECKSUM_UNNECESSARY;
  920. } else
  921. skb->ip_summed = CHECKSUM_NONE;
  922. skb->dev = netdev;
  923. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  924. /* True length was only available on the last pkt */
  925. skb_put(skb, buffer->lro_length);
  926. } else {
  927. skb_put(skb, length);
  928. }
  929. skb->protocol = eth_type_trans(skb, netdev);
  930. ret = netif_receive_skb(skb);
  931. netdev->last_rx = jiffies;
  932. /*
  933. * We just consumed one buffer so post a buffer.
  934. */
  935. buffer->skb = NULL;
  936. buffer->state = NETXEN_BUFFER_FREE;
  937. buffer->lro_current_frags = 0;
  938. buffer->lro_expected_frags = 0;
  939. adapter->stats.no_rcv++;
  940. adapter->stats.rxbytes += length;
  941. }
  942. /* Process Receive status ring */
  943. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  944. {
  945. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  946. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  947. struct status_desc *desc; /* used to read status desc here */
  948. u32 consumer = recv_ctx->status_rx_consumer;
  949. int count = 0, ring;
  950. while (count < max) {
  951. desc = &desc_head[consumer];
  952. if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
  953. DPRINTK(ERR, "desc %p ownedby %x\n", desc,
  954. netxen_get_sts_owner(desc));
  955. break;
  956. }
  957. netxen_process_rcv(adapter, ctxid, desc);
  958. netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
  959. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  960. count++;
  961. }
  962. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++)
  963. netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
  964. /* update the consumer index in phantom */
  965. if (count) {
  966. recv_ctx->status_rx_consumer = consumer;
  967. /* Window = 1 */
  968. writel(consumer, NETXEN_CRB_NORMALIZE(adapter,
  969. recv_ctx->crb_sts_consumer));
  970. }
  971. return count;
  972. }
  973. /* Process Command status ring */
  974. int netxen_process_cmd_ring(struct netxen_adapter *adapter)
  975. {
  976. u32 last_consumer, consumer;
  977. int count = 0, i;
  978. struct netxen_cmd_buffer *buffer;
  979. struct pci_dev *pdev = adapter->pdev;
  980. struct net_device *netdev = adapter->netdev;
  981. struct netxen_skb_frag *frag;
  982. int done = 0;
  983. last_consumer = adapter->last_cmd_consumer;
  984. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  985. while (last_consumer != consumer) {
  986. buffer = &adapter->cmd_buf_arr[last_consumer];
  987. if (buffer->skb) {
  988. frag = &buffer->frag_array[0];
  989. pci_unmap_single(pdev, frag->dma, frag->length,
  990. PCI_DMA_TODEVICE);
  991. frag->dma = 0ULL;
  992. for (i = 1; i < buffer->frag_count; i++) {
  993. frag++; /* Get the next frag */
  994. pci_unmap_page(pdev, frag->dma, frag->length,
  995. PCI_DMA_TODEVICE);
  996. frag->dma = 0ULL;
  997. }
  998. adapter->stats.xmitfinished++;
  999. dev_kfree_skb_any(buffer->skb);
  1000. buffer->skb = NULL;
  1001. }
  1002. last_consumer = get_next_index(last_consumer,
  1003. adapter->max_tx_desc_count);
  1004. if (++count >= MAX_STATUS_HANDLE)
  1005. break;
  1006. }
  1007. if (count) {
  1008. adapter->last_cmd_consumer = last_consumer;
  1009. smp_mb();
  1010. if (netif_queue_stopped(netdev) && netif_running(netdev)) {
  1011. netif_tx_lock(netdev);
  1012. netif_wake_queue(netdev);
  1013. smp_mb();
  1014. netif_tx_unlock(netdev);
  1015. }
  1016. }
  1017. /*
  1018. * If everything is freed up to consumer then check if the ring is full
  1019. * If the ring is full then check if more needs to be freed and
  1020. * schedule the call back again.
  1021. *
  1022. * This happens when there are 2 CPUs. One could be freeing and the
  1023. * other filling it. If the ring is full when we get out of here and
  1024. * the card has already interrupted the host then the host can miss the
  1025. * interrupt.
  1026. *
  1027. * There is still a possible race condition and the host could miss an
  1028. * interrupt. The card has to take care of this.
  1029. */
  1030. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1031. done = (last_consumer == consumer);
  1032. return (done);
  1033. }
  1034. /*
  1035. * netxen_post_rx_buffers puts buffer in the Phantom memory
  1036. */
  1037. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  1038. {
  1039. struct pci_dev *pdev = adapter->pdev;
  1040. struct sk_buff *skb;
  1041. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1042. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1043. uint producer;
  1044. struct rcv_desc *pdesc;
  1045. struct netxen_rx_buffer *buffer;
  1046. int count = 0;
  1047. int index = 0;
  1048. netxen_ctx_msg msg = 0;
  1049. dma_addr_t dma;
  1050. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1051. producer = rcv_desc->producer;
  1052. index = rcv_desc->begin_alloc;
  1053. buffer = &rcv_desc->rx_buf_arr[index];
  1054. /* We can start writing rx descriptors into the phantom memory. */
  1055. while (buffer->state == NETXEN_BUFFER_FREE) {
  1056. skb = dev_alloc_skb(rcv_desc->skb_size);
  1057. if (unlikely(!skb)) {
  1058. /*
  1059. * TODO
  1060. * We need to schedule the posting of buffers to the pegs.
  1061. */
  1062. rcv_desc->begin_alloc = index;
  1063. DPRINTK(ERR, "netxen_post_rx_buffers: "
  1064. " allocated only %d buffers\n", count);
  1065. break;
  1066. }
  1067. count++; /* now there should be no failure */
  1068. pdesc = &rcv_desc->desc_head[producer];
  1069. #if defined(XGB_DEBUG)
  1070. *(unsigned long *)(skb->head) = 0xc0debabe;
  1071. if (skb_is_nonlinear(skb)) {
  1072. printk("Allocated SKB @%p is nonlinear\n");
  1073. }
  1074. #endif
  1075. skb_reserve(skb, 2);
  1076. /* This will be setup when we receive the
  1077. * buffer after it has been filled FSL TBD TBD
  1078. * skb->dev = netdev;
  1079. */
  1080. dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
  1081. PCI_DMA_FROMDEVICE);
  1082. pdesc->addr_buffer = cpu_to_le64(dma);
  1083. buffer->skb = skb;
  1084. buffer->state = NETXEN_BUFFER_BUSY;
  1085. buffer->dma = dma;
  1086. /* make a rcv descriptor */
  1087. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1088. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1089. DPRINTK(INFO, "done writing descripter\n");
  1090. producer =
  1091. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1092. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1093. buffer = &rcv_desc->rx_buf_arr[index];
  1094. }
  1095. /* if we did allocate buffers, then write the count to Phantom */
  1096. if (count) {
  1097. rcv_desc->begin_alloc = index;
  1098. rcv_desc->producer = producer;
  1099. /* Window = 1 */
  1100. writel((producer - 1) & (rcv_desc->max_rx_desc_count - 1),
  1101. NETXEN_CRB_NORMALIZE(adapter,
  1102. rcv_desc->crb_rcv_producer));
  1103. /*
  1104. * Write a doorbell msg to tell phanmon of change in
  1105. * receive ring producer
  1106. */
  1107. netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
  1108. netxen_set_msg_privid(msg);
  1109. netxen_set_msg_count(msg,
  1110. ((producer -
  1111. 1) & (rcv_desc->
  1112. max_rx_desc_count - 1)));
  1113. netxen_set_msg_ctxid(msg, adapter->portnum);
  1114. netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
  1115. writel(msg,
  1116. DB_NORMALIZE(adapter,
  1117. NETXEN_RCV_PRODUCER_OFFSET));
  1118. }
  1119. }
  1120. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  1121. uint32_t ctx, uint32_t ringid)
  1122. {
  1123. struct pci_dev *pdev = adapter->pdev;
  1124. struct sk_buff *skb;
  1125. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1126. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1127. u32 producer;
  1128. struct rcv_desc *pdesc;
  1129. struct netxen_rx_buffer *buffer;
  1130. int count = 0;
  1131. int index = 0;
  1132. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1133. producer = rcv_desc->producer;
  1134. index = rcv_desc->begin_alloc;
  1135. buffer = &rcv_desc->rx_buf_arr[index];
  1136. /* We can start writing rx descriptors into the phantom memory. */
  1137. while (buffer->state == NETXEN_BUFFER_FREE) {
  1138. skb = dev_alloc_skb(rcv_desc->skb_size);
  1139. if (unlikely(!skb)) {
  1140. /*
  1141. * We need to schedule the posting of buffers to the pegs.
  1142. */
  1143. rcv_desc->begin_alloc = index;
  1144. DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
  1145. " allocated only %d buffers\n", count);
  1146. break;
  1147. }
  1148. count++; /* now there should be no failure */
  1149. pdesc = &rcv_desc->desc_head[producer];
  1150. skb_reserve(skb, 2);
  1151. /*
  1152. * This will be setup when we receive the
  1153. * buffer after it has been filled
  1154. * skb->dev = netdev;
  1155. */
  1156. buffer->skb = skb;
  1157. buffer->state = NETXEN_BUFFER_BUSY;
  1158. buffer->dma = pci_map_single(pdev, skb->data,
  1159. rcv_desc->dma_size,
  1160. PCI_DMA_FROMDEVICE);
  1161. /* make a rcv descriptor */
  1162. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1163. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1164. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1165. producer =
  1166. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1167. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1168. buffer = &rcv_desc->rx_buf_arr[index];
  1169. }
  1170. /* if we did allocate buffers, then write the count to Phantom */
  1171. if (count) {
  1172. rcv_desc->begin_alloc = index;
  1173. rcv_desc->producer = producer;
  1174. /* Window = 1 */
  1175. writel((producer - 1) & (rcv_desc->max_rx_desc_count - 1),
  1176. NETXEN_CRB_NORMALIZE(adapter,
  1177. rcv_desc->crb_rcv_producer));
  1178. wmb();
  1179. }
  1180. }
  1181. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  1182. {
  1183. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1184. return;
  1185. }