omap_hwmod.c 64 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cm44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. #include "mux.h"
  150. /* Maximum microseconds to wait for OMAP module to softreset */
  151. #define MAX_MODULE_SOFTRESET_WAIT 10000
  152. /* Name of the OMAP hwmod for the MPU */
  153. #define MPU_INITIATOR_NAME "mpu"
  154. /* omap_hwmod_list contains all registered struct omap_hwmods */
  155. static LIST_HEAD(omap_hwmod_list);
  156. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  157. static struct omap_hwmod *mpu_oh;
  158. /* Private functions */
  159. /**
  160. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  161. * @oh: struct omap_hwmod *
  162. *
  163. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  164. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  165. * OCP_SYSCONFIG register or 0 upon success.
  166. */
  167. static int _update_sysc_cache(struct omap_hwmod *oh)
  168. {
  169. if (!oh->class->sysc) {
  170. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  171. return -EINVAL;
  172. }
  173. /* XXX ensure module interface clock is up */
  174. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  175. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  176. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  177. return 0;
  178. }
  179. /**
  180. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  181. * @v: OCP_SYSCONFIG value to write
  182. * @oh: struct omap_hwmod *
  183. *
  184. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  185. * one. No return value.
  186. */
  187. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  188. {
  189. if (!oh->class->sysc) {
  190. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  191. return;
  192. }
  193. /* XXX ensure module interface clock is up */
  194. /* Module might have lost context, always update cache and register */
  195. oh->_sysc_cache = v;
  196. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  197. }
  198. /**
  199. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  200. * @oh: struct omap_hwmod *
  201. * @standbymode: MIDLEMODE field bits
  202. * @v: pointer to register contents to modify
  203. *
  204. * Update the master standby mode bits in @v to be @standbymode for
  205. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  206. * upon error or 0 upon success.
  207. */
  208. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  209. u32 *v)
  210. {
  211. u32 mstandby_mask;
  212. u8 mstandby_shift;
  213. if (!oh->class->sysc ||
  214. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  215. return -EINVAL;
  216. if (!oh->class->sysc->sysc_fields) {
  217. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  218. return -EINVAL;
  219. }
  220. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  221. mstandby_mask = (0x3 << mstandby_shift);
  222. *v &= ~mstandby_mask;
  223. *v |= __ffs(standbymode) << mstandby_shift;
  224. return 0;
  225. }
  226. /**
  227. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  228. * @oh: struct omap_hwmod *
  229. * @idlemode: SIDLEMODE field bits
  230. * @v: pointer to register contents to modify
  231. *
  232. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  233. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  234. * or 0 upon success.
  235. */
  236. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  237. {
  238. u32 sidle_mask;
  239. u8 sidle_shift;
  240. if (!oh->class->sysc ||
  241. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  242. return -EINVAL;
  243. if (!oh->class->sysc->sysc_fields) {
  244. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  245. return -EINVAL;
  246. }
  247. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  248. sidle_mask = (0x3 << sidle_shift);
  249. *v &= ~sidle_mask;
  250. *v |= __ffs(idlemode) << sidle_shift;
  251. return 0;
  252. }
  253. /**
  254. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  255. * @oh: struct omap_hwmod *
  256. * @clockact: CLOCKACTIVITY field bits
  257. * @v: pointer to register contents to modify
  258. *
  259. * Update the clockactivity mode bits in @v to be @clockact for the
  260. * @oh hwmod. Used for additional powersaving on some modules. Does
  261. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  262. * success.
  263. */
  264. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  265. {
  266. u32 clkact_mask;
  267. u8 clkact_shift;
  268. if (!oh->class->sysc ||
  269. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  270. return -EINVAL;
  271. if (!oh->class->sysc->sysc_fields) {
  272. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  273. return -EINVAL;
  274. }
  275. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  276. clkact_mask = (0x3 << clkact_shift);
  277. *v &= ~clkact_mask;
  278. *v |= clockact << clkact_shift;
  279. return 0;
  280. }
  281. /**
  282. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  283. * @oh: struct omap_hwmod *
  284. * @v: pointer to register contents to modify
  285. *
  286. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  287. * error or 0 upon success.
  288. */
  289. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  290. {
  291. u32 softrst_mask;
  292. if (!oh->class->sysc ||
  293. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  294. return -EINVAL;
  295. if (!oh->class->sysc->sysc_fields) {
  296. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  297. return -EINVAL;
  298. }
  299. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  300. *v |= softrst_mask;
  301. return 0;
  302. }
  303. /**
  304. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  305. * @oh: struct omap_hwmod *
  306. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  307. * @v: pointer to register contents to modify
  308. *
  309. * Update the module autoidle bit in @v to be @autoidle for the @oh
  310. * hwmod. The autoidle bit controls whether the module can gate
  311. * internal clocks automatically when it isn't doing anything; the
  312. * exact function of this bit varies on a per-module basis. This
  313. * function does not write to the hardware. Returns -EINVAL upon
  314. * error or 0 upon success.
  315. */
  316. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  317. u32 *v)
  318. {
  319. u32 autoidle_mask;
  320. u8 autoidle_shift;
  321. if (!oh->class->sysc ||
  322. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  323. return -EINVAL;
  324. if (!oh->class->sysc->sysc_fields) {
  325. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  326. return -EINVAL;
  327. }
  328. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  329. autoidle_mask = (0x1 << autoidle_shift);
  330. *v &= ~autoidle_mask;
  331. *v |= autoidle << autoidle_shift;
  332. return 0;
  333. }
  334. /**
  335. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  336. * @oh: struct omap_hwmod *
  337. *
  338. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  339. * upon error or 0 upon success.
  340. */
  341. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  342. {
  343. u32 wakeup_mask;
  344. if (!oh->class->sysc ||
  345. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  346. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  347. return -EINVAL;
  348. if (!oh->class->sysc->sysc_fields) {
  349. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  350. return -EINVAL;
  351. }
  352. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  353. *v |= wakeup_mask;
  354. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  355. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  356. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  357. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  358. return 0;
  359. }
  360. /**
  361. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  362. * @oh: struct omap_hwmod *
  363. *
  364. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  365. * upon error or 0 upon success.
  366. */
  367. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  368. {
  369. u32 wakeup_mask;
  370. if (!oh->class->sysc ||
  371. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  372. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  373. return -EINVAL;
  374. if (!oh->class->sysc->sysc_fields) {
  375. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  376. return -EINVAL;
  377. }
  378. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  379. *v &= ~wakeup_mask;
  380. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  381. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  382. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  383. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  384. return 0;
  385. }
  386. /**
  387. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  388. * @oh: struct omap_hwmod *
  389. *
  390. * Prevent the hardware module @oh from entering idle while the
  391. * hardare module initiator @init_oh is active. Useful when a module
  392. * will be accessed by a particular initiator (e.g., if a module will
  393. * be accessed by the IVA, there should be a sleepdep between the IVA
  394. * initiator and the module). Only applies to modules in smart-idle
  395. * mode. If the clockdomain is marked as not needing autodeps, return
  396. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  397. * passes along clkdm_add_sleepdep() value upon success.
  398. */
  399. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  400. {
  401. if (!oh->_clk)
  402. return -EINVAL;
  403. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  404. return 0;
  405. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  406. }
  407. /**
  408. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  409. * @oh: struct omap_hwmod *
  410. *
  411. * Allow the hardware module @oh to enter idle while the hardare
  412. * module initiator @init_oh is active. Useful when a module will not
  413. * be accessed by a particular initiator (e.g., if a module will not
  414. * be accessed by the IVA, there should be no sleepdep between the IVA
  415. * initiator and the module). Only applies to modules in smart-idle
  416. * mode. If the clockdomain is marked as not needing autodeps, return
  417. * 0 without doing anything. Returns -EINVAL upon error or passes
  418. * along clkdm_del_sleepdep() value upon success.
  419. */
  420. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  421. {
  422. if (!oh->_clk)
  423. return -EINVAL;
  424. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  425. return 0;
  426. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  427. }
  428. /**
  429. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  430. * @oh: struct omap_hwmod *
  431. *
  432. * Called from _init_clocks(). Populates the @oh _clk (main
  433. * functional clock pointer) if a main_clk is present. Returns 0 on
  434. * success or -EINVAL on error.
  435. */
  436. static int _init_main_clk(struct omap_hwmod *oh)
  437. {
  438. int ret = 0;
  439. if (!oh->main_clk)
  440. return 0;
  441. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  442. if (!oh->_clk) {
  443. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  444. oh->name, oh->main_clk);
  445. return -EINVAL;
  446. }
  447. if (!oh->_clk->clkdm)
  448. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  449. oh->main_clk, oh->_clk->name);
  450. return ret;
  451. }
  452. /**
  453. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  454. * @oh: struct omap_hwmod *
  455. *
  456. * Called from _init_clocks(). Populates the @oh OCP slave interface
  457. * clock pointers. Returns 0 on success or -EINVAL on error.
  458. */
  459. static int _init_interface_clks(struct omap_hwmod *oh)
  460. {
  461. struct clk *c;
  462. int i;
  463. int ret = 0;
  464. if (oh->slaves_cnt == 0)
  465. return 0;
  466. for (i = 0; i < oh->slaves_cnt; i++) {
  467. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  468. if (!os->clk)
  469. continue;
  470. c = omap_clk_get_by_name(os->clk);
  471. if (!c) {
  472. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  473. oh->name, os->clk);
  474. ret = -EINVAL;
  475. }
  476. os->_clk = c;
  477. }
  478. return ret;
  479. }
  480. /**
  481. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  482. * @oh: struct omap_hwmod *
  483. *
  484. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  485. * clock pointers. Returns 0 on success or -EINVAL on error.
  486. */
  487. static int _init_opt_clks(struct omap_hwmod *oh)
  488. {
  489. struct omap_hwmod_opt_clk *oc;
  490. struct clk *c;
  491. int i;
  492. int ret = 0;
  493. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  494. c = omap_clk_get_by_name(oc->clk);
  495. if (!c) {
  496. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  497. oh->name, oc->clk);
  498. ret = -EINVAL;
  499. }
  500. oc->_clk = c;
  501. }
  502. return ret;
  503. }
  504. /**
  505. * _enable_clocks - enable hwmod main clock and interface clocks
  506. * @oh: struct omap_hwmod *
  507. *
  508. * Enables all clocks necessary for register reads and writes to succeed
  509. * on the hwmod @oh. Returns 0.
  510. */
  511. static int _enable_clocks(struct omap_hwmod *oh)
  512. {
  513. int i;
  514. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  515. if (oh->_clk)
  516. clk_enable(oh->_clk);
  517. if (oh->slaves_cnt > 0) {
  518. for (i = 0; i < oh->slaves_cnt; i++) {
  519. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  520. struct clk *c = os->_clk;
  521. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  522. clk_enable(c);
  523. }
  524. }
  525. /* The opt clocks are controlled by the device driver. */
  526. return 0;
  527. }
  528. /**
  529. * _disable_clocks - disable hwmod main clock and interface clocks
  530. * @oh: struct omap_hwmod *
  531. *
  532. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  533. */
  534. static int _disable_clocks(struct omap_hwmod *oh)
  535. {
  536. int i;
  537. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  538. if (oh->_clk)
  539. clk_disable(oh->_clk);
  540. if (oh->slaves_cnt > 0) {
  541. for (i = 0; i < oh->slaves_cnt; i++) {
  542. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  543. struct clk *c = os->_clk;
  544. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  545. clk_disable(c);
  546. }
  547. }
  548. /* The opt clocks are controlled by the device driver. */
  549. return 0;
  550. }
  551. static void _enable_optional_clocks(struct omap_hwmod *oh)
  552. {
  553. struct omap_hwmod_opt_clk *oc;
  554. int i;
  555. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  556. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  557. if (oc->_clk) {
  558. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  559. oc->_clk->name);
  560. clk_enable(oc->_clk);
  561. }
  562. }
  563. static void _disable_optional_clocks(struct omap_hwmod *oh)
  564. {
  565. struct omap_hwmod_opt_clk *oc;
  566. int i;
  567. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  568. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  569. if (oc->_clk) {
  570. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  571. oc->_clk->name);
  572. clk_disable(oc->_clk);
  573. }
  574. }
  575. /**
  576. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  577. * @oh: struct omap_hwmod *oh
  578. *
  579. * Count and return the number of address space ranges associated with
  580. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  581. * if @oh is NULL.
  582. */
  583. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  584. {
  585. struct omap_hwmod_addr_space *mem;
  586. int i = 0;
  587. if (!os || !os->addr)
  588. return 0;
  589. do {
  590. mem = &os->addr[i++];
  591. } while (mem->pa_start != mem->pa_end);
  592. return i;
  593. }
  594. /**
  595. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  596. * @oh: struct omap_hwmod *
  597. *
  598. * Returns the array index of the OCP slave port that the MPU
  599. * addresses the device on, or -EINVAL upon error or not found.
  600. */
  601. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  602. {
  603. int i;
  604. int found = 0;
  605. if (!oh || oh->slaves_cnt == 0)
  606. return -EINVAL;
  607. for (i = 0; i < oh->slaves_cnt; i++) {
  608. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  609. if (os->user & OCP_USER_MPU) {
  610. found = 1;
  611. break;
  612. }
  613. }
  614. if (found)
  615. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  616. oh->name, i);
  617. else
  618. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  619. oh->name);
  620. return (found) ? i : -EINVAL;
  621. }
  622. /**
  623. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  624. * @oh: struct omap_hwmod *
  625. *
  626. * Return the virtual address of the base of the register target of
  627. * device @oh, or NULL on error.
  628. */
  629. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  630. {
  631. struct omap_hwmod_ocp_if *os;
  632. struct omap_hwmod_addr_space *mem;
  633. int i = 0, found = 0;
  634. void __iomem *va_start;
  635. if (!oh || oh->slaves_cnt == 0)
  636. return NULL;
  637. os = oh->slaves[index];
  638. if (!os->addr)
  639. return NULL;
  640. do {
  641. mem = &os->addr[i++];
  642. if (mem->flags & ADDR_TYPE_RT)
  643. found = 1;
  644. } while (!found && mem->pa_start != mem->pa_end);
  645. if (found) {
  646. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  647. if (!va_start) {
  648. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  649. return NULL;
  650. }
  651. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  652. oh->name, va_start);
  653. } else {
  654. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  655. oh->name);
  656. }
  657. return (found) ? va_start : NULL;
  658. }
  659. /**
  660. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  661. * @oh: struct omap_hwmod *
  662. *
  663. * If module is marked as SWSUP_SIDLE, force the module out of slave
  664. * idle; otherwise, configure it for smart-idle. If module is marked
  665. * as SWSUP_MSUSPEND, force the module out of master standby;
  666. * otherwise, configure it for smart-standby. No return value.
  667. */
  668. static void _enable_sysc(struct omap_hwmod *oh)
  669. {
  670. u8 idlemode, sf;
  671. u32 v;
  672. if (!oh->class->sysc)
  673. return;
  674. v = oh->_sysc_cache;
  675. sf = oh->class->sysc->sysc_flags;
  676. if (sf & SYSC_HAS_SIDLEMODE) {
  677. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  678. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  679. _set_slave_idlemode(oh, idlemode, &v);
  680. }
  681. if (sf & SYSC_HAS_MIDLEMODE) {
  682. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  683. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  684. _set_master_standbymode(oh, idlemode, &v);
  685. }
  686. /*
  687. * XXX The clock framework should handle this, by
  688. * calling into this code. But this must wait until the
  689. * clock structures are tagged with omap_hwmod entries
  690. */
  691. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  692. (sf & SYSC_HAS_CLOCKACTIVITY))
  693. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  694. /* If slave is in SMARTIDLE, also enable wakeup */
  695. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  696. _enable_wakeup(oh, &v);
  697. _write_sysconfig(v, oh);
  698. /*
  699. * Set the autoidle bit only after setting the smartidle bit
  700. * Setting this will not have any impact on the other modules.
  701. */
  702. if (sf & SYSC_HAS_AUTOIDLE) {
  703. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  704. 0 : 1;
  705. _set_module_autoidle(oh, idlemode, &v);
  706. _write_sysconfig(v, oh);
  707. }
  708. }
  709. /**
  710. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  711. * @oh: struct omap_hwmod *
  712. *
  713. * If module is marked as SWSUP_SIDLE, force the module into slave
  714. * idle; otherwise, configure it for smart-idle. If module is marked
  715. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  716. * configure it for smart-standby. No return value.
  717. */
  718. static void _idle_sysc(struct omap_hwmod *oh)
  719. {
  720. u8 idlemode, sf;
  721. u32 v;
  722. if (!oh->class->sysc)
  723. return;
  724. v = oh->_sysc_cache;
  725. sf = oh->class->sysc->sysc_flags;
  726. if (sf & SYSC_HAS_SIDLEMODE) {
  727. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  728. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  729. _set_slave_idlemode(oh, idlemode, &v);
  730. }
  731. if (sf & SYSC_HAS_MIDLEMODE) {
  732. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  733. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  734. _set_master_standbymode(oh, idlemode, &v);
  735. }
  736. /* If slave is in SMARTIDLE, also enable wakeup */
  737. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  738. _enable_wakeup(oh, &v);
  739. _write_sysconfig(v, oh);
  740. }
  741. /**
  742. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  743. * @oh: struct omap_hwmod *
  744. *
  745. * Force the module into slave idle and master suspend. No return
  746. * value.
  747. */
  748. static void _shutdown_sysc(struct omap_hwmod *oh)
  749. {
  750. u32 v;
  751. u8 sf;
  752. if (!oh->class->sysc)
  753. return;
  754. v = oh->_sysc_cache;
  755. sf = oh->class->sysc->sysc_flags;
  756. if (sf & SYSC_HAS_SIDLEMODE)
  757. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  758. if (sf & SYSC_HAS_MIDLEMODE)
  759. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  760. if (sf & SYSC_HAS_AUTOIDLE)
  761. _set_module_autoidle(oh, 1, &v);
  762. _write_sysconfig(v, oh);
  763. }
  764. /**
  765. * _lookup - find an omap_hwmod by name
  766. * @name: find an omap_hwmod by name
  767. *
  768. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  769. */
  770. static struct omap_hwmod *_lookup(const char *name)
  771. {
  772. struct omap_hwmod *oh, *temp_oh;
  773. oh = NULL;
  774. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  775. if (!strcmp(name, temp_oh->name)) {
  776. oh = temp_oh;
  777. break;
  778. }
  779. }
  780. return oh;
  781. }
  782. /**
  783. * _init_clocks - clk_get() all clocks associated with this hwmod
  784. * @oh: struct omap_hwmod *
  785. * @data: not used; pass NULL
  786. *
  787. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  788. * Resolves all clock names embedded in the hwmod. Returns 0 on
  789. * success, or a negative error code on failure.
  790. */
  791. static int _init_clocks(struct omap_hwmod *oh, void *data)
  792. {
  793. int ret = 0;
  794. if (oh->_state != _HWMOD_STATE_REGISTERED)
  795. return 0;
  796. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  797. ret |= _init_main_clk(oh);
  798. ret |= _init_interface_clks(oh);
  799. ret |= _init_opt_clks(oh);
  800. if (!ret)
  801. oh->_state = _HWMOD_STATE_CLKS_INITED;
  802. return ret;
  803. }
  804. /**
  805. * _wait_target_ready - wait for a module to leave slave idle
  806. * @oh: struct omap_hwmod *
  807. *
  808. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  809. * does not have an IDLEST bit or if the module successfully leaves
  810. * slave idle; otherwise, pass along the return value of the
  811. * appropriate *_cm_wait_module_ready() function.
  812. */
  813. static int _wait_target_ready(struct omap_hwmod *oh)
  814. {
  815. struct omap_hwmod_ocp_if *os;
  816. int ret;
  817. if (!oh)
  818. return -EINVAL;
  819. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  820. return 0;
  821. os = oh->slaves[oh->_mpu_port_index];
  822. if (oh->flags & HWMOD_NO_IDLEST)
  823. return 0;
  824. /* XXX check module SIDLEMODE */
  825. /* XXX check clock enable states */
  826. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  827. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  828. oh->prcm.omap2.idlest_reg_id,
  829. oh->prcm.omap2.idlest_idle_bit);
  830. } else if (cpu_is_omap44xx()) {
  831. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  832. } else {
  833. BUG();
  834. };
  835. return ret;
  836. }
  837. /**
  838. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  839. * @oh: struct omap_hwmod *
  840. * @name: name of the reset line in the context of this hwmod
  841. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  842. *
  843. * Return the bit position of the reset line that match the
  844. * input name. Return -ENOENT if not found.
  845. */
  846. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  847. struct omap_hwmod_rst_info *ohri)
  848. {
  849. int i;
  850. for (i = 0; i < oh->rst_lines_cnt; i++) {
  851. const char *rst_line = oh->rst_lines[i].name;
  852. if (!strcmp(rst_line, name)) {
  853. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  854. ohri->st_shift = oh->rst_lines[i].st_shift;
  855. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  856. oh->name, __func__, rst_line, ohri->rst_shift,
  857. ohri->st_shift);
  858. return 0;
  859. }
  860. }
  861. return -ENOENT;
  862. }
  863. /**
  864. * _assert_hardreset - assert the HW reset line of submodules
  865. * contained in the hwmod module.
  866. * @oh: struct omap_hwmod *
  867. * @name: name of the reset line to lookup and assert
  868. *
  869. * Some IP like dsp, ipu or iva contain processor that require
  870. * an HW reset line to be assert / deassert in order to enable fully
  871. * the IP.
  872. */
  873. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  874. {
  875. struct omap_hwmod_rst_info ohri;
  876. u8 ret;
  877. if (!oh)
  878. return -EINVAL;
  879. ret = _lookup_hardreset(oh, name, &ohri);
  880. if (IS_ERR_VALUE(ret))
  881. return ret;
  882. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  883. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  884. ohri.rst_shift);
  885. else if (cpu_is_omap44xx())
  886. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  887. ohri.rst_shift);
  888. else
  889. return -EINVAL;
  890. }
  891. /**
  892. * _deassert_hardreset - deassert the HW reset line of submodules contained
  893. * in the hwmod module.
  894. * @oh: struct omap_hwmod *
  895. * @name: name of the reset line to look up and deassert
  896. *
  897. * Some IP like dsp, ipu or iva contain processor that require
  898. * an HW reset line to be assert / deassert in order to enable fully
  899. * the IP.
  900. */
  901. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  902. {
  903. struct omap_hwmod_rst_info ohri;
  904. int ret;
  905. if (!oh)
  906. return -EINVAL;
  907. ret = _lookup_hardreset(oh, name, &ohri);
  908. if (IS_ERR_VALUE(ret))
  909. return ret;
  910. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  911. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  912. ohri.rst_shift,
  913. ohri.st_shift);
  914. } else if (cpu_is_omap44xx()) {
  915. if (ohri.st_shift)
  916. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  917. oh->name, name);
  918. ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  919. ohri.rst_shift);
  920. } else {
  921. return -EINVAL;
  922. }
  923. if (ret == -EBUSY)
  924. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  925. return ret;
  926. }
  927. /**
  928. * _read_hardreset - read the HW reset line state of submodules
  929. * contained in the hwmod module
  930. * @oh: struct omap_hwmod *
  931. * @name: name of the reset line to look up and read
  932. *
  933. * Return the state of the reset line.
  934. */
  935. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  936. {
  937. struct omap_hwmod_rst_info ohri;
  938. u8 ret;
  939. if (!oh)
  940. return -EINVAL;
  941. ret = _lookup_hardreset(oh, name, &ohri);
  942. if (IS_ERR_VALUE(ret))
  943. return ret;
  944. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  945. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  946. ohri.st_shift);
  947. } else if (cpu_is_omap44xx()) {
  948. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  949. ohri.rst_shift);
  950. } else {
  951. return -EINVAL;
  952. }
  953. }
  954. /**
  955. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  956. * @oh: struct omap_hwmod *
  957. *
  958. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  959. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  960. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  961. * the module did not reset in time, or 0 upon success.
  962. *
  963. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  964. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  965. * use the SYSCONFIG softreset bit to provide the status.
  966. *
  967. * Note that some IP like McBSP do have reset control but don't have
  968. * reset status.
  969. */
  970. static int _ocp_softreset(struct omap_hwmod *oh)
  971. {
  972. u32 v;
  973. int c = 0;
  974. int ret = 0;
  975. if (!oh->class->sysc ||
  976. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  977. return -EINVAL;
  978. /* clocks must be on for this operation */
  979. if (oh->_state != _HWMOD_STATE_ENABLED) {
  980. pr_warning("omap_hwmod: %s: reset can only be entered from "
  981. "enabled state\n", oh->name);
  982. return -EINVAL;
  983. }
  984. /* For some modules, all optionnal clocks need to be enabled as well */
  985. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  986. _enable_optional_clocks(oh);
  987. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  988. v = oh->_sysc_cache;
  989. ret = _set_softreset(oh, &v);
  990. if (ret)
  991. goto dis_opt_clks;
  992. _write_sysconfig(v, oh);
  993. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  994. omap_test_timeout((omap_hwmod_read(oh,
  995. oh->class->sysc->syss_offs)
  996. & SYSS_RESETDONE_MASK),
  997. MAX_MODULE_SOFTRESET_WAIT, c);
  998. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  999. omap_test_timeout(!(omap_hwmod_read(oh,
  1000. oh->class->sysc->sysc_offs)
  1001. & SYSC_TYPE2_SOFTRESET_MASK),
  1002. MAX_MODULE_SOFTRESET_WAIT, c);
  1003. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1004. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1005. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1006. else
  1007. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1008. /*
  1009. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1010. * _wait_target_ready() or _reset()
  1011. */
  1012. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1013. dis_opt_clks:
  1014. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1015. _disable_optional_clocks(oh);
  1016. return ret;
  1017. }
  1018. /**
  1019. * _reset - reset an omap_hwmod
  1020. * @oh: struct omap_hwmod *
  1021. *
  1022. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1023. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1024. * bit. However, some hwmods cannot be reset via this method: some
  1025. * are not targets and therefore have no OCP header registers to
  1026. * access; others (like the IVA) have idiosyncratic reset sequences.
  1027. * So for these relatively rare cases, custom reset code can be
  1028. * supplied in the struct omap_hwmod_class .reset function pointer.
  1029. * Passes along the return value from either _reset() or the custom
  1030. * reset function - these must return -EINVAL if the hwmod cannot be
  1031. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1032. * the module did not reset in time, or 0 upon success.
  1033. */
  1034. static int _reset(struct omap_hwmod *oh)
  1035. {
  1036. int ret;
  1037. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1038. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1039. return ret;
  1040. }
  1041. /**
  1042. * _enable - enable an omap_hwmod
  1043. * @oh: struct omap_hwmod *
  1044. *
  1045. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1046. * register target. Returns -EINVAL if the hwmod is in the wrong
  1047. * state or passes along the return value of _wait_target_ready().
  1048. */
  1049. static int _enable(struct omap_hwmod *oh)
  1050. {
  1051. int r;
  1052. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1053. oh->_state != _HWMOD_STATE_IDLE &&
  1054. oh->_state != _HWMOD_STATE_DISABLED) {
  1055. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1056. "from initialized, idle, or disabled state\n", oh->name);
  1057. return -EINVAL;
  1058. }
  1059. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1060. /*
  1061. * If an IP contains only one HW reset line, then de-assert it in order
  1062. * to allow to enable the clocks. Otherwise the PRCM will return
  1063. * Intransition status, and the init will failed.
  1064. */
  1065. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1066. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1067. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1068. /* Mux pins for device runtime if populated */
  1069. if (oh->mux && (!oh->mux->enabled ||
  1070. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1071. oh->mux->pads_dynamic)))
  1072. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1073. _add_initiator_dep(oh, mpu_oh);
  1074. _enable_clocks(oh);
  1075. r = _wait_target_ready(oh);
  1076. if (!r) {
  1077. oh->_state = _HWMOD_STATE_ENABLED;
  1078. /* Access the sysconfig only if the target is ready */
  1079. if (oh->class->sysc) {
  1080. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1081. _update_sysc_cache(oh);
  1082. _enable_sysc(oh);
  1083. }
  1084. } else {
  1085. _disable_clocks(oh);
  1086. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1087. oh->name, r);
  1088. }
  1089. return r;
  1090. }
  1091. /**
  1092. * _idle - idle an omap_hwmod
  1093. * @oh: struct omap_hwmod *
  1094. *
  1095. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1096. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1097. * state or returns 0.
  1098. */
  1099. static int _idle(struct omap_hwmod *oh)
  1100. {
  1101. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1102. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1103. "enabled state\n", oh->name);
  1104. return -EINVAL;
  1105. }
  1106. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1107. if (oh->class->sysc)
  1108. _idle_sysc(oh);
  1109. _del_initiator_dep(oh, mpu_oh);
  1110. _disable_clocks(oh);
  1111. /* Mux pins for device idle if populated */
  1112. if (oh->mux && oh->mux->pads_dynamic)
  1113. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1114. oh->_state = _HWMOD_STATE_IDLE;
  1115. return 0;
  1116. }
  1117. /**
  1118. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1119. * @oh: struct omap_hwmod *
  1120. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1121. *
  1122. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1123. * local copy. Intended to be used by drivers that require
  1124. * direct manipulation of the AUTOIDLE bits.
  1125. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1126. * along the return value from _set_module_autoidle().
  1127. *
  1128. * Any users of this function should be scrutinized carefully.
  1129. */
  1130. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1131. {
  1132. u32 v;
  1133. int retval = 0;
  1134. unsigned long flags;
  1135. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1136. return -EINVAL;
  1137. spin_lock_irqsave(&oh->_lock, flags);
  1138. v = oh->_sysc_cache;
  1139. retval = _set_module_autoidle(oh, autoidle, &v);
  1140. if (!retval)
  1141. _write_sysconfig(v, oh);
  1142. spin_unlock_irqrestore(&oh->_lock, flags);
  1143. return retval;
  1144. }
  1145. /**
  1146. * _shutdown - shutdown an omap_hwmod
  1147. * @oh: struct omap_hwmod *
  1148. *
  1149. * Shut down an omap_hwmod @oh. This should be called when the driver
  1150. * used for the hwmod is removed or unloaded or if the driver is not
  1151. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1152. * state or returns 0.
  1153. */
  1154. static int _shutdown(struct omap_hwmod *oh)
  1155. {
  1156. int ret;
  1157. u8 prev_state;
  1158. if (oh->_state != _HWMOD_STATE_IDLE &&
  1159. oh->_state != _HWMOD_STATE_ENABLED) {
  1160. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1161. "from idle, or enabled state\n", oh->name);
  1162. return -EINVAL;
  1163. }
  1164. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1165. if (oh->class->pre_shutdown) {
  1166. prev_state = oh->_state;
  1167. if (oh->_state == _HWMOD_STATE_IDLE)
  1168. _enable(oh);
  1169. ret = oh->class->pre_shutdown(oh);
  1170. if (ret) {
  1171. if (prev_state == _HWMOD_STATE_IDLE)
  1172. _idle(oh);
  1173. return ret;
  1174. }
  1175. }
  1176. if (oh->class->sysc)
  1177. _shutdown_sysc(oh);
  1178. /*
  1179. * If an IP contains only one HW reset line, then assert it
  1180. * before disabling the clocks and shutting down the IP.
  1181. */
  1182. if (oh->rst_lines_cnt == 1)
  1183. _assert_hardreset(oh, oh->rst_lines[0].name);
  1184. /* clocks and deps are already disabled in idle */
  1185. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1186. _del_initiator_dep(oh, mpu_oh);
  1187. /* XXX what about the other system initiators here? dma, dsp */
  1188. _disable_clocks(oh);
  1189. }
  1190. /* XXX Should this code also force-disable the optional clocks? */
  1191. /* Mux pins to safe mode or use populated off mode values */
  1192. if (oh->mux)
  1193. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1194. oh->_state = _HWMOD_STATE_DISABLED;
  1195. return 0;
  1196. }
  1197. /**
  1198. * _setup - do initial configuration of omap_hwmod
  1199. * @oh: struct omap_hwmod *
  1200. *
  1201. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1202. * OCP_SYSCONFIG register. Returns 0.
  1203. */
  1204. static int _setup(struct omap_hwmod *oh, void *data)
  1205. {
  1206. int i, r;
  1207. u8 postsetup_state;
  1208. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1209. return 0;
  1210. /* Set iclk autoidle mode */
  1211. if (oh->slaves_cnt > 0) {
  1212. for (i = 0; i < oh->slaves_cnt; i++) {
  1213. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1214. struct clk *c = os->_clk;
  1215. if (!c)
  1216. continue;
  1217. if (os->flags & OCPIF_SWSUP_IDLE) {
  1218. /* XXX omap_iclk_deny_idle(c); */
  1219. } else {
  1220. /* XXX omap_iclk_allow_idle(c); */
  1221. clk_enable(c);
  1222. }
  1223. }
  1224. }
  1225. oh->_state = _HWMOD_STATE_INITIALIZED;
  1226. /*
  1227. * In the case of hwmod with hardreset that should not be
  1228. * de-assert at boot time, we have to keep the module
  1229. * initialized, because we cannot enable it properly with the
  1230. * reset asserted. Exit without warning because that behavior is
  1231. * expected.
  1232. */
  1233. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1234. return 0;
  1235. r = _enable(oh);
  1236. if (r) {
  1237. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1238. oh->name, oh->_state);
  1239. return 0;
  1240. }
  1241. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1242. _reset(oh);
  1243. /*
  1244. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1245. * The _enable() function should be split to
  1246. * avoid the rewrite of the OCP_SYSCONFIG register.
  1247. */
  1248. if (oh->class->sysc) {
  1249. _update_sysc_cache(oh);
  1250. _enable_sysc(oh);
  1251. }
  1252. }
  1253. postsetup_state = oh->_postsetup_state;
  1254. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1255. postsetup_state = _HWMOD_STATE_ENABLED;
  1256. /*
  1257. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1258. * it should be set by the core code as a runtime flag during startup
  1259. */
  1260. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1261. (postsetup_state == _HWMOD_STATE_IDLE))
  1262. postsetup_state = _HWMOD_STATE_ENABLED;
  1263. if (postsetup_state == _HWMOD_STATE_IDLE)
  1264. _idle(oh);
  1265. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1266. _shutdown(oh);
  1267. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1268. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1269. oh->name, postsetup_state);
  1270. return 0;
  1271. }
  1272. /**
  1273. * _register - register a struct omap_hwmod
  1274. * @oh: struct omap_hwmod *
  1275. *
  1276. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1277. * already has been registered by the same name; -EINVAL if the
  1278. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1279. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1280. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1281. * success.
  1282. *
  1283. * XXX The data should be copied into bootmem, so the original data
  1284. * should be marked __initdata and freed after init. This would allow
  1285. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1286. * that the copy process would be relatively complex due to the large number
  1287. * of substructures.
  1288. */
  1289. static int __init _register(struct omap_hwmod *oh)
  1290. {
  1291. int ms_id;
  1292. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1293. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1294. return -EINVAL;
  1295. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1296. if (_lookup(oh->name))
  1297. return -EEXIST;
  1298. ms_id = _find_mpu_port_index(oh);
  1299. if (!IS_ERR_VALUE(ms_id))
  1300. oh->_mpu_port_index = ms_id;
  1301. else
  1302. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1303. list_add_tail(&oh->node, &omap_hwmod_list);
  1304. spin_lock_init(&oh->_lock);
  1305. oh->_state = _HWMOD_STATE_REGISTERED;
  1306. /*
  1307. * XXX Rather than doing a strcmp(), this should test a flag
  1308. * set in the hwmod data, inserted by the autogenerator code.
  1309. */
  1310. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1311. mpu_oh = oh;
  1312. return 0;
  1313. }
  1314. /* Public functions */
  1315. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1316. {
  1317. if (oh->flags & HWMOD_16BIT_REG)
  1318. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1319. else
  1320. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1321. }
  1322. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1323. {
  1324. if (oh->flags & HWMOD_16BIT_REG)
  1325. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1326. else
  1327. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1328. }
  1329. /**
  1330. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1331. * @oh: struct omap_hwmod *
  1332. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1333. *
  1334. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1335. * local copy. Intended to be used by drivers that have some erratum
  1336. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1337. * -EINVAL if @oh is null, or passes along the return value from
  1338. * _set_slave_idlemode().
  1339. *
  1340. * XXX Does this function have any current users? If not, we should
  1341. * remove it; it is better to let the rest of the hwmod code handle this.
  1342. * Any users of this function should be scrutinized carefully.
  1343. */
  1344. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1345. {
  1346. u32 v;
  1347. int retval = 0;
  1348. if (!oh)
  1349. return -EINVAL;
  1350. v = oh->_sysc_cache;
  1351. retval = _set_slave_idlemode(oh, idlemode, &v);
  1352. if (!retval)
  1353. _write_sysconfig(v, oh);
  1354. return retval;
  1355. }
  1356. /**
  1357. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1358. * @name: name of the omap_hwmod to look up
  1359. *
  1360. * Given a @name of an omap_hwmod, return a pointer to the registered
  1361. * struct omap_hwmod *, or NULL upon error.
  1362. */
  1363. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1364. {
  1365. struct omap_hwmod *oh;
  1366. if (!name)
  1367. return NULL;
  1368. oh = _lookup(name);
  1369. return oh;
  1370. }
  1371. /**
  1372. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1373. * @fn: pointer to a callback function
  1374. * @data: void * data to pass to callback function
  1375. *
  1376. * Call @fn for each registered omap_hwmod, passing @data to each
  1377. * function. @fn must return 0 for success or any other value for
  1378. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1379. * will stop and the non-zero return value will be passed to the
  1380. * caller of omap_hwmod_for_each(). @fn is called with
  1381. * omap_hwmod_for_each() held.
  1382. */
  1383. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1384. void *data)
  1385. {
  1386. struct omap_hwmod *temp_oh;
  1387. int ret = 0;
  1388. if (!fn)
  1389. return -EINVAL;
  1390. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1391. ret = (*fn)(temp_oh, data);
  1392. if (ret)
  1393. break;
  1394. }
  1395. return ret;
  1396. }
  1397. /**
  1398. * omap_hwmod_register - register an array of hwmods
  1399. * @ohs: pointer to an array of omap_hwmods to register
  1400. *
  1401. * Intended to be called early in boot before the clock framework is
  1402. * initialized. If @ohs is not null, will register all omap_hwmods
  1403. * listed in @ohs that are valid for this chip. Returns 0.
  1404. */
  1405. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1406. {
  1407. int r, i;
  1408. if (!ohs)
  1409. return 0;
  1410. i = 0;
  1411. do {
  1412. if (!omap_chip_is(ohs[i]->omap_chip))
  1413. continue;
  1414. r = _register(ohs[i]);
  1415. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1416. r);
  1417. } while (ohs[++i]);
  1418. return 0;
  1419. }
  1420. /*
  1421. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1422. *
  1423. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1424. * Assumes the caller takes care of locking if needed.
  1425. */
  1426. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1427. {
  1428. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1429. return 0;
  1430. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1431. return 0;
  1432. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1433. if (!oh->_mpu_rt_va)
  1434. pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
  1435. __func__, oh->name);
  1436. return 0;
  1437. }
  1438. /**
  1439. * omap_hwmod_setup_one - set up a single hwmod
  1440. * @oh_name: const char * name of the already-registered hwmod to set up
  1441. *
  1442. * Must be called after omap2_clk_init(). Resolves the struct clk
  1443. * names to struct clk pointers for each registered omap_hwmod. Also
  1444. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1445. * success.
  1446. */
  1447. int __init omap_hwmod_setup_one(const char *oh_name)
  1448. {
  1449. struct omap_hwmod *oh;
  1450. int r;
  1451. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1452. if (!mpu_oh) {
  1453. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1454. oh_name, MPU_INITIATOR_NAME);
  1455. return -EINVAL;
  1456. }
  1457. oh = _lookup(oh_name);
  1458. if (!oh) {
  1459. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1460. return -EINVAL;
  1461. }
  1462. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1463. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1464. r = _populate_mpu_rt_base(oh, NULL);
  1465. if (IS_ERR_VALUE(r)) {
  1466. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1467. return -EINVAL;
  1468. }
  1469. r = _init_clocks(oh, NULL);
  1470. if (IS_ERR_VALUE(r)) {
  1471. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1472. return -EINVAL;
  1473. }
  1474. _setup(oh, NULL);
  1475. return 0;
  1476. }
  1477. /**
  1478. * omap_hwmod_setup - do some post-clock framework initialization
  1479. *
  1480. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1481. * to struct clk pointers for each registered omap_hwmod. Also calls
  1482. * _setup() on each hwmod. Returns 0 upon success.
  1483. */
  1484. static int __init omap_hwmod_setup_all(void)
  1485. {
  1486. int r;
  1487. if (!mpu_oh) {
  1488. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1489. __func__, MPU_INITIATOR_NAME);
  1490. return -EINVAL;
  1491. }
  1492. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1493. r = omap_hwmod_for_each(_init_clocks, NULL);
  1494. WARN(IS_ERR_VALUE(r),
  1495. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1496. omap_hwmod_for_each(_setup, NULL);
  1497. return 0;
  1498. }
  1499. core_initcall(omap_hwmod_setup_all);
  1500. /**
  1501. * omap_hwmod_enable - enable an omap_hwmod
  1502. * @oh: struct omap_hwmod *
  1503. *
  1504. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1505. * Returns -EINVAL on error or passes along the return value from _enable().
  1506. */
  1507. int omap_hwmod_enable(struct omap_hwmod *oh)
  1508. {
  1509. int r;
  1510. unsigned long flags;
  1511. if (!oh)
  1512. return -EINVAL;
  1513. spin_lock_irqsave(&oh->_lock, flags);
  1514. r = _enable(oh);
  1515. spin_unlock_irqrestore(&oh->_lock, flags);
  1516. return r;
  1517. }
  1518. /**
  1519. * omap_hwmod_idle - idle an omap_hwmod
  1520. * @oh: struct omap_hwmod *
  1521. *
  1522. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1523. * Returns -EINVAL on error or passes along the return value from _idle().
  1524. */
  1525. int omap_hwmod_idle(struct omap_hwmod *oh)
  1526. {
  1527. unsigned long flags;
  1528. if (!oh)
  1529. return -EINVAL;
  1530. spin_lock_irqsave(&oh->_lock, flags);
  1531. _idle(oh);
  1532. spin_unlock_irqrestore(&oh->_lock, flags);
  1533. return 0;
  1534. }
  1535. /**
  1536. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1537. * @oh: struct omap_hwmod *
  1538. *
  1539. * Shutdown an omap_hwmod @oh. Intended to be called by
  1540. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1541. * the return value from _shutdown().
  1542. */
  1543. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1544. {
  1545. unsigned long flags;
  1546. if (!oh)
  1547. return -EINVAL;
  1548. spin_lock_irqsave(&oh->_lock, flags);
  1549. _shutdown(oh);
  1550. spin_unlock_irqrestore(&oh->_lock, flags);
  1551. return 0;
  1552. }
  1553. /**
  1554. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1555. * @oh: struct omap_hwmod *oh
  1556. *
  1557. * Intended to be called by the omap_device code.
  1558. */
  1559. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1560. {
  1561. unsigned long flags;
  1562. spin_lock_irqsave(&oh->_lock, flags);
  1563. _enable_clocks(oh);
  1564. spin_unlock_irqrestore(&oh->_lock, flags);
  1565. return 0;
  1566. }
  1567. /**
  1568. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1569. * @oh: struct omap_hwmod *oh
  1570. *
  1571. * Intended to be called by the omap_device code.
  1572. */
  1573. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1574. {
  1575. unsigned long flags;
  1576. spin_lock_irqsave(&oh->_lock, flags);
  1577. _disable_clocks(oh);
  1578. spin_unlock_irqrestore(&oh->_lock, flags);
  1579. return 0;
  1580. }
  1581. /**
  1582. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1583. * @oh: struct omap_hwmod *oh
  1584. *
  1585. * Intended to be called by drivers and core code when all posted
  1586. * writes to a device must complete before continuing further
  1587. * execution (for example, after clearing some device IRQSTATUS
  1588. * register bits)
  1589. *
  1590. * XXX what about targets with multiple OCP threads?
  1591. */
  1592. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1593. {
  1594. BUG_ON(!oh);
  1595. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1596. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1597. "device configuration\n", oh->name);
  1598. return;
  1599. }
  1600. /*
  1601. * Forces posted writes to complete on the OCP thread handling
  1602. * register writes
  1603. */
  1604. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1605. }
  1606. /**
  1607. * omap_hwmod_reset - reset the hwmod
  1608. * @oh: struct omap_hwmod *
  1609. *
  1610. * Under some conditions, a driver may wish to reset the entire device.
  1611. * Called from omap_device code. Returns -EINVAL on error or passes along
  1612. * the return value from _reset().
  1613. */
  1614. int omap_hwmod_reset(struct omap_hwmod *oh)
  1615. {
  1616. int r;
  1617. unsigned long flags;
  1618. if (!oh)
  1619. return -EINVAL;
  1620. spin_lock_irqsave(&oh->_lock, flags);
  1621. r = _reset(oh);
  1622. spin_unlock_irqrestore(&oh->_lock, flags);
  1623. return r;
  1624. }
  1625. /**
  1626. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1627. * @oh: struct omap_hwmod *
  1628. * @res: pointer to the first element of an array of struct resource to fill
  1629. *
  1630. * Count the number of struct resource array elements necessary to
  1631. * contain omap_hwmod @oh resources. Intended to be called by code
  1632. * that registers omap_devices. Intended to be used to determine the
  1633. * size of a dynamically-allocated struct resource array, before
  1634. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1635. * resource array elements needed.
  1636. *
  1637. * XXX This code is not optimized. It could attempt to merge adjacent
  1638. * resource IDs.
  1639. *
  1640. */
  1641. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1642. {
  1643. int ret, i;
  1644. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1645. for (i = 0; i < oh->slaves_cnt; i++)
  1646. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1647. return ret;
  1648. }
  1649. /**
  1650. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1651. * @oh: struct omap_hwmod *
  1652. * @res: pointer to the first element of an array of struct resource to fill
  1653. *
  1654. * Fill the struct resource array @res with resource data from the
  1655. * omap_hwmod @oh. Intended to be called by code that registers
  1656. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1657. * number of array elements filled.
  1658. */
  1659. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1660. {
  1661. int i, j;
  1662. int r = 0;
  1663. /* For each IRQ, DMA, memory area, fill in array.*/
  1664. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1665. (res + r)->name = (oh->mpu_irqs + i)->name;
  1666. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1667. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1668. (res + r)->flags = IORESOURCE_IRQ;
  1669. r++;
  1670. }
  1671. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1672. (res + r)->name = (oh->sdma_reqs + i)->name;
  1673. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1674. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1675. (res + r)->flags = IORESOURCE_DMA;
  1676. r++;
  1677. }
  1678. for (i = 0; i < oh->slaves_cnt; i++) {
  1679. struct omap_hwmod_ocp_if *os;
  1680. int addr_cnt;
  1681. os = oh->slaves[i];
  1682. addr_cnt = _count_ocp_if_addr_spaces(os);
  1683. for (j = 0; j < addr_cnt; j++) {
  1684. (res + r)->name = (os->addr + j)->name;
  1685. (res + r)->start = (os->addr + j)->pa_start;
  1686. (res + r)->end = (os->addr + j)->pa_end;
  1687. (res + r)->flags = IORESOURCE_MEM;
  1688. r++;
  1689. }
  1690. }
  1691. return r;
  1692. }
  1693. /**
  1694. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1695. * @oh: struct omap_hwmod *
  1696. *
  1697. * Return the powerdomain pointer associated with the OMAP module
  1698. * @oh's main clock. If @oh does not have a main clk, return the
  1699. * powerdomain associated with the interface clock associated with the
  1700. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1701. * instead?) Returns NULL on error, or a struct powerdomain * on
  1702. * success.
  1703. */
  1704. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1705. {
  1706. struct clk *c;
  1707. if (!oh)
  1708. return NULL;
  1709. if (oh->_clk) {
  1710. c = oh->_clk;
  1711. } else {
  1712. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1713. return NULL;
  1714. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1715. }
  1716. if (!c->clkdm)
  1717. return NULL;
  1718. return c->clkdm->pwrdm.ptr;
  1719. }
  1720. /**
  1721. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1722. * @oh: struct omap_hwmod *
  1723. *
  1724. * Returns the virtual address corresponding to the beginning of the
  1725. * module's register target, in the address range that is intended to
  1726. * be used by the MPU. Returns the virtual address upon success or NULL
  1727. * upon error.
  1728. */
  1729. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1730. {
  1731. if (!oh)
  1732. return NULL;
  1733. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1734. return NULL;
  1735. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1736. return NULL;
  1737. return oh->_mpu_rt_va;
  1738. }
  1739. /**
  1740. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1741. * @oh: struct omap_hwmod *
  1742. * @init_oh: struct omap_hwmod * (initiator)
  1743. *
  1744. * Add a sleep dependency between the initiator @init_oh and @oh.
  1745. * Intended to be called by DSP/Bridge code via platform_data for the
  1746. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1747. * code needs to add/del initiator dependencies dynamically
  1748. * before/after accessing a device. Returns the return value from
  1749. * _add_initiator_dep().
  1750. *
  1751. * XXX Keep a usecount in the clockdomain code
  1752. */
  1753. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1754. struct omap_hwmod *init_oh)
  1755. {
  1756. return _add_initiator_dep(oh, init_oh);
  1757. }
  1758. /*
  1759. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1760. * for context save/restore operations?
  1761. */
  1762. /**
  1763. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1764. * @oh: struct omap_hwmod *
  1765. * @init_oh: struct omap_hwmod * (initiator)
  1766. *
  1767. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1768. * Intended to be called by DSP/Bridge code via platform_data for the
  1769. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1770. * code needs to add/del initiator dependencies dynamically
  1771. * before/after accessing a device. Returns the return value from
  1772. * _del_initiator_dep().
  1773. *
  1774. * XXX Keep a usecount in the clockdomain code
  1775. */
  1776. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1777. struct omap_hwmod *init_oh)
  1778. {
  1779. return _del_initiator_dep(oh, init_oh);
  1780. }
  1781. /**
  1782. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1783. * @oh: struct omap_hwmod *
  1784. *
  1785. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1786. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1787. * registers to cause the PRCM to receive wakeup events from the
  1788. * module. Does not set any wakeup routing registers beyond this
  1789. * point - if the module is to wake up any other module or subsystem,
  1790. * that must be set separately. Called by omap_device code. Returns
  1791. * -EINVAL on error or 0 upon success.
  1792. */
  1793. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1794. {
  1795. unsigned long flags;
  1796. u32 v;
  1797. if (!oh->class->sysc ||
  1798. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1799. return -EINVAL;
  1800. spin_lock_irqsave(&oh->_lock, flags);
  1801. v = oh->_sysc_cache;
  1802. _enable_wakeup(oh, &v);
  1803. _write_sysconfig(v, oh);
  1804. spin_unlock_irqrestore(&oh->_lock, flags);
  1805. return 0;
  1806. }
  1807. /**
  1808. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1809. * @oh: struct omap_hwmod *
  1810. *
  1811. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1812. * from sending wakeups to the PRCM. Eventually this should clear
  1813. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1814. * from the module. Does not set any wakeup routing registers beyond
  1815. * this point - if the module is to wake up any other module or
  1816. * subsystem, that must be set separately. Called by omap_device
  1817. * code. Returns -EINVAL on error or 0 upon success.
  1818. */
  1819. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1820. {
  1821. unsigned long flags;
  1822. u32 v;
  1823. if (!oh->class->sysc ||
  1824. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1825. return -EINVAL;
  1826. spin_lock_irqsave(&oh->_lock, flags);
  1827. v = oh->_sysc_cache;
  1828. _disable_wakeup(oh, &v);
  1829. _write_sysconfig(v, oh);
  1830. spin_unlock_irqrestore(&oh->_lock, flags);
  1831. return 0;
  1832. }
  1833. /**
  1834. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1835. * contained in the hwmod module.
  1836. * @oh: struct omap_hwmod *
  1837. * @name: name of the reset line to lookup and assert
  1838. *
  1839. * Some IP like dsp, ipu or iva contain processor that require
  1840. * an HW reset line to be assert / deassert in order to enable fully
  1841. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1842. * yet supported on this OMAP; otherwise, passes along the return value
  1843. * from _assert_hardreset().
  1844. */
  1845. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1846. {
  1847. int ret;
  1848. unsigned long flags;
  1849. if (!oh)
  1850. return -EINVAL;
  1851. spin_lock_irqsave(&oh->_lock, flags);
  1852. ret = _assert_hardreset(oh, name);
  1853. spin_unlock_irqrestore(&oh->_lock, flags);
  1854. return ret;
  1855. }
  1856. /**
  1857. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1858. * contained in the hwmod module.
  1859. * @oh: struct omap_hwmod *
  1860. * @name: name of the reset line to look up and deassert
  1861. *
  1862. * Some IP like dsp, ipu or iva contain processor that require
  1863. * an HW reset line to be assert / deassert in order to enable fully
  1864. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1865. * yet supported on this OMAP; otherwise, passes along the return value
  1866. * from _deassert_hardreset().
  1867. */
  1868. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1869. {
  1870. int ret;
  1871. unsigned long flags;
  1872. if (!oh)
  1873. return -EINVAL;
  1874. spin_lock_irqsave(&oh->_lock, flags);
  1875. ret = _deassert_hardreset(oh, name);
  1876. spin_unlock_irqrestore(&oh->_lock, flags);
  1877. return ret;
  1878. }
  1879. /**
  1880. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1881. * contained in the hwmod module
  1882. * @oh: struct omap_hwmod *
  1883. * @name: name of the reset line to look up and read
  1884. *
  1885. * Return the current state of the hwmod @oh's reset line named @name:
  1886. * returns -EINVAL upon parameter error or if this operation
  1887. * is unsupported on the current OMAP; otherwise, passes along the return
  1888. * value from _read_hardreset().
  1889. */
  1890. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1891. {
  1892. int ret;
  1893. unsigned long flags;
  1894. if (!oh)
  1895. return -EINVAL;
  1896. spin_lock_irqsave(&oh->_lock, flags);
  1897. ret = _read_hardreset(oh, name);
  1898. spin_unlock_irqrestore(&oh->_lock, flags);
  1899. return ret;
  1900. }
  1901. /**
  1902. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1903. * @classname: struct omap_hwmod_class name to search for
  1904. * @fn: callback function pointer to call for each hwmod in class @classname
  1905. * @user: arbitrary context data to pass to the callback function
  1906. *
  1907. * For each omap_hwmod of class @classname, call @fn.
  1908. * If the callback function returns something other than
  1909. * zero, the iterator is terminated, and the callback function's return
  1910. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1911. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1912. */
  1913. int omap_hwmod_for_each_by_class(const char *classname,
  1914. int (*fn)(struct omap_hwmod *oh,
  1915. void *user),
  1916. void *user)
  1917. {
  1918. struct omap_hwmod *temp_oh;
  1919. int ret = 0;
  1920. if (!classname || !fn)
  1921. return -EINVAL;
  1922. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1923. __func__, classname);
  1924. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1925. if (!strcmp(temp_oh->class->name, classname)) {
  1926. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1927. __func__, temp_oh->name);
  1928. ret = (*fn)(temp_oh, user);
  1929. if (ret)
  1930. break;
  1931. }
  1932. }
  1933. if (ret)
  1934. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1935. __func__, ret);
  1936. return ret;
  1937. }
  1938. /**
  1939. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1940. * @oh: struct omap_hwmod *
  1941. * @state: state that _setup() should leave the hwmod in
  1942. *
  1943. * Sets the hwmod state that @oh will enter at the end of _setup()
  1944. * (called by omap_hwmod_setup_*()). Only valid to call between
  1945. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  1946. * 0 upon success or -EINVAL if there is a problem with the arguments
  1947. * or if the hwmod is in the wrong state.
  1948. */
  1949. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1950. {
  1951. int ret;
  1952. unsigned long flags;
  1953. if (!oh)
  1954. return -EINVAL;
  1955. if (state != _HWMOD_STATE_DISABLED &&
  1956. state != _HWMOD_STATE_ENABLED &&
  1957. state != _HWMOD_STATE_IDLE)
  1958. return -EINVAL;
  1959. spin_lock_irqsave(&oh->_lock, flags);
  1960. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1961. ret = -EINVAL;
  1962. goto ohsps_unlock;
  1963. }
  1964. oh->_postsetup_state = state;
  1965. ret = 0;
  1966. ohsps_unlock:
  1967. spin_unlock_irqrestore(&oh->_lock, flags);
  1968. return ret;
  1969. }
  1970. /**
  1971. * omap_hwmod_get_context_loss_count - get lost context count
  1972. * @oh: struct omap_hwmod *
  1973. *
  1974. * Query the powerdomain of of @oh to get the context loss
  1975. * count for this device.
  1976. *
  1977. * Returns the context loss count of the powerdomain assocated with @oh
  1978. * upon success, or zero if no powerdomain exists for @oh.
  1979. */
  1980. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1981. {
  1982. struct powerdomain *pwrdm;
  1983. int ret = 0;
  1984. pwrdm = omap_hwmod_get_pwrdm(oh);
  1985. if (pwrdm)
  1986. ret = pwrdm_get_context_loss_count(pwrdm);
  1987. return ret;
  1988. }
  1989. /**
  1990. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  1991. * @oh: struct omap_hwmod *
  1992. *
  1993. * Prevent the hwmod @oh from being reset during the setup process.
  1994. * Intended for use by board-*.c files on boards with devices that
  1995. * cannot tolerate being reset. Must be called before the hwmod has
  1996. * been set up. Returns 0 upon success or negative error code upon
  1997. * failure.
  1998. */
  1999. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2000. {
  2001. if (!oh)
  2002. return -EINVAL;
  2003. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2004. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2005. oh->name);
  2006. return -EINVAL;
  2007. }
  2008. oh->flags |= HWMOD_INIT_NO_RESET;
  2009. return 0;
  2010. }