be_main.c 55 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  32. { 0 }
  33. };
  34. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  35. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  36. {
  37. struct be_dma_mem *mem = &q->dma_mem;
  38. if (mem->va)
  39. pci_free_consistent(adapter->pdev, mem->size,
  40. mem->va, mem->dma);
  41. }
  42. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  43. u16 len, u16 entry_size)
  44. {
  45. struct be_dma_mem *mem = &q->dma_mem;
  46. memset(q, 0, sizeof(*q));
  47. q->len = len;
  48. q->entry_size = entry_size;
  49. mem->size = len * entry_size;
  50. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  51. if (!mem->va)
  52. return -1;
  53. memset(mem->va, 0, mem->size);
  54. return 0;
  55. }
  56. static void be_intr_set(struct be_adapter *adapter, bool enable)
  57. {
  58. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  59. u32 reg = ioread32(addr);
  60. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  61. if (!enabled && enable)
  62. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. else if (enabled && !enable)
  64. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else
  66. return;
  67. iowrite32(reg, addr);
  68. }
  69. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  70. {
  71. u32 val = 0;
  72. val |= qid & DB_RQ_RING_ID_MASK;
  73. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  74. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  75. }
  76. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  77. {
  78. u32 val = 0;
  79. val |= qid & DB_TXULP_RING_ID_MASK;
  80. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  81. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  82. }
  83. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  84. bool arm, bool clear_int, u16 num_popped)
  85. {
  86. u32 val = 0;
  87. val |= qid & DB_EQ_RING_ID_MASK;
  88. if (arm)
  89. val |= 1 << DB_EQ_REARM_SHIFT;
  90. if (clear_int)
  91. val |= 1 << DB_EQ_CLR_SHIFT;
  92. val |= 1 << DB_EQ_EVNT_SHIFT;
  93. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  94. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  95. }
  96. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  97. {
  98. u32 val = 0;
  99. val |= qid & DB_CQ_RING_ID_MASK;
  100. if (arm)
  101. val |= 1 << DB_CQ_REARM_SHIFT;
  102. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  103. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  104. }
  105. static int be_mac_addr_set(struct net_device *netdev, void *p)
  106. {
  107. struct be_adapter *adapter = netdev_priv(netdev);
  108. struct sockaddr *addr = p;
  109. int status = 0;
  110. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  111. if (status)
  112. return status;
  113. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  114. adapter->if_handle, &adapter->pmac_id);
  115. if (!status)
  116. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  117. return status;
  118. }
  119. void netdev_stats_update(struct be_adapter *adapter)
  120. {
  121. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  122. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  123. struct be_port_rxf_stats *port_stats =
  124. &rxf_stats->port[adapter->port_num];
  125. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  126. struct be_erx_stats *erx_stats = &hw_stats->erx;
  127. dev_stats->rx_packets = port_stats->rx_total_frames;
  128. dev_stats->tx_packets = port_stats->tx_unicastframes +
  129. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  130. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  131. (u64) port_stats->rx_bytes_lsd;
  132. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  133. (u64) port_stats->tx_bytes_lsd;
  134. /* bad pkts received */
  135. dev_stats->rx_errors = port_stats->rx_crc_errors +
  136. port_stats->rx_alignment_symbol_errors +
  137. port_stats->rx_in_range_errors +
  138. port_stats->rx_out_range_errors +
  139. port_stats->rx_frame_too_long +
  140. port_stats->rx_dropped_too_small +
  141. port_stats->rx_dropped_too_short +
  142. port_stats->rx_dropped_header_too_small +
  143. port_stats->rx_dropped_tcp_length +
  144. port_stats->rx_dropped_runt +
  145. port_stats->rx_tcp_checksum_errs +
  146. port_stats->rx_ip_checksum_errs +
  147. port_stats->rx_udp_checksum_errs;
  148. /* no space in linux buffers: best possible approximation */
  149. dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
  150. /* detailed rx errors */
  151. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  152. port_stats->rx_out_range_errors +
  153. port_stats->rx_frame_too_long;
  154. /* receive ring buffer overflow */
  155. dev_stats->rx_over_errors = 0;
  156. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  157. /* frame alignment errors */
  158. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  159. /* receiver fifo overrun */
  160. /* drops_no_pbuf is no per i/f, it's per BE card */
  161. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  162. port_stats->rx_input_fifo_overflow +
  163. rxf_stats->rx_drops_no_pbuf;
  164. /* receiver missed packetd */
  165. dev_stats->rx_missed_errors = 0;
  166. /* packet transmit problems */
  167. dev_stats->tx_errors = 0;
  168. /* no space available in linux */
  169. dev_stats->tx_dropped = 0;
  170. dev_stats->multicast = port_stats->rx_multicast_frames;
  171. dev_stats->collisions = 0;
  172. /* detailed tx_errors */
  173. dev_stats->tx_aborted_errors = 0;
  174. dev_stats->tx_carrier_errors = 0;
  175. dev_stats->tx_fifo_errors = 0;
  176. dev_stats->tx_heartbeat_errors = 0;
  177. dev_stats->tx_window_errors = 0;
  178. }
  179. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  180. {
  181. struct net_device *netdev = adapter->netdev;
  182. /* If link came up or went down */
  183. if (adapter->link_up != link_up) {
  184. if (link_up) {
  185. netif_start_queue(netdev);
  186. netif_carrier_on(netdev);
  187. printk(KERN_INFO "%s: Link up\n", netdev->name);
  188. } else {
  189. netif_stop_queue(netdev);
  190. netif_carrier_off(netdev);
  191. printk(KERN_INFO "%s: Link down\n", netdev->name);
  192. }
  193. adapter->link_up = link_up;
  194. }
  195. }
  196. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  197. static void be_rx_eqd_update(struct be_adapter *adapter)
  198. {
  199. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  200. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  201. ulong now = jiffies;
  202. u32 eqd;
  203. if (!rx_eq->enable_aic)
  204. return;
  205. /* Wrapped around */
  206. if (time_before(now, stats->rx_fps_jiffies)) {
  207. stats->rx_fps_jiffies = now;
  208. return;
  209. }
  210. /* Update once a second */
  211. if ((now - stats->rx_fps_jiffies) < HZ)
  212. return;
  213. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  214. ((now - stats->rx_fps_jiffies) / HZ);
  215. stats->rx_fps_jiffies = now;
  216. stats->be_prev_rx_frags = stats->be_rx_frags;
  217. eqd = stats->be_rx_fps / 110000;
  218. eqd = eqd << 3;
  219. if (eqd > rx_eq->max_eqd)
  220. eqd = rx_eq->max_eqd;
  221. if (eqd < rx_eq->min_eqd)
  222. eqd = rx_eq->min_eqd;
  223. if (eqd < 10)
  224. eqd = 0;
  225. if (eqd != rx_eq->cur_eqd)
  226. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  227. rx_eq->cur_eqd = eqd;
  228. }
  229. static struct net_device_stats *be_get_stats(struct net_device *dev)
  230. {
  231. return &dev->stats;
  232. }
  233. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  234. {
  235. u64 rate = bytes;
  236. do_div(rate, ticks / HZ);
  237. rate <<= 3; /* bytes/sec -> bits/sec */
  238. do_div(rate, 1000000ul); /* MB/Sec */
  239. return rate;
  240. }
  241. static void be_tx_rate_update(struct be_adapter *adapter)
  242. {
  243. struct be_drvr_stats *stats = drvr_stats(adapter);
  244. ulong now = jiffies;
  245. /* Wrapped around? */
  246. if (time_before(now, stats->be_tx_jiffies)) {
  247. stats->be_tx_jiffies = now;
  248. return;
  249. }
  250. /* Update tx rate once in two seconds */
  251. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  252. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  253. - stats->be_tx_bytes_prev,
  254. now - stats->be_tx_jiffies);
  255. stats->be_tx_jiffies = now;
  256. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  257. }
  258. }
  259. static void be_tx_stats_update(struct be_adapter *adapter,
  260. u32 wrb_cnt, u32 copied, bool stopped)
  261. {
  262. struct be_drvr_stats *stats = drvr_stats(adapter);
  263. stats->be_tx_reqs++;
  264. stats->be_tx_wrbs += wrb_cnt;
  265. stats->be_tx_bytes += copied;
  266. if (stopped)
  267. stats->be_tx_stops++;
  268. }
  269. /* Determine number of WRB entries needed to xmit data in an skb */
  270. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  271. {
  272. int cnt = (skb->len > skb->data_len);
  273. cnt += skb_shinfo(skb)->nr_frags;
  274. /* to account for hdr wrb */
  275. cnt++;
  276. if (cnt & 1) {
  277. /* add a dummy to make it an even num */
  278. cnt++;
  279. *dummy = true;
  280. } else
  281. *dummy = false;
  282. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  283. return cnt;
  284. }
  285. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  286. {
  287. wrb->frag_pa_hi = upper_32_bits(addr);
  288. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  289. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  290. }
  291. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  292. bool vlan, u32 wrb_cnt, u32 len)
  293. {
  294. memset(hdr, 0, sizeof(*hdr));
  295. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  296. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  297. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  298. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  299. hdr, skb_shinfo(skb)->gso_size);
  300. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  301. if (is_tcp_pkt(skb))
  302. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  303. else if (is_udp_pkt(skb))
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  305. }
  306. if (vlan && vlan_tx_tag_present(skb)) {
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  309. hdr, vlan_tx_tag_get(skb));
  310. }
  311. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  312. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  315. }
  316. static int make_tx_wrbs(struct be_adapter *adapter,
  317. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  318. {
  319. u64 busaddr;
  320. u32 i, copied = 0;
  321. struct pci_dev *pdev = adapter->pdev;
  322. struct sk_buff *first_skb = skb;
  323. struct be_queue_info *txq = &adapter->tx_obj.q;
  324. struct be_eth_wrb *wrb;
  325. struct be_eth_hdr_wrb *hdr;
  326. hdr = queue_head_node(txq);
  327. atomic_add(wrb_cnt, &txq->used);
  328. queue_head_inc(txq);
  329. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  330. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  331. return 0;
  332. }
  333. if (skb->len > skb->data_len) {
  334. int len = skb->len - skb->data_len;
  335. wrb = queue_head_node(txq);
  336. busaddr = skb_shinfo(skb)->dma_head;
  337. wrb_fill(wrb, busaddr, len);
  338. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  339. queue_head_inc(txq);
  340. copied += len;
  341. }
  342. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  343. struct skb_frag_struct *frag =
  344. &skb_shinfo(skb)->frags[i];
  345. busaddr = skb_shinfo(skb)->dma_maps[i];
  346. wrb = queue_head_node(txq);
  347. wrb_fill(wrb, busaddr, frag->size);
  348. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  349. queue_head_inc(txq);
  350. copied += frag->size;
  351. }
  352. if (dummy_wrb) {
  353. wrb = queue_head_node(txq);
  354. wrb_fill(wrb, 0, 0);
  355. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  356. queue_head_inc(txq);
  357. }
  358. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  359. wrb_cnt, copied);
  360. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  361. return copied;
  362. }
  363. static netdev_tx_t be_xmit(struct sk_buff *skb,
  364. struct net_device *netdev)
  365. {
  366. struct be_adapter *adapter = netdev_priv(netdev);
  367. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  368. struct be_queue_info *txq = &tx_obj->q;
  369. u32 wrb_cnt = 0, copied = 0;
  370. u32 start = txq->head;
  371. bool dummy_wrb, stopped = false;
  372. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  373. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  374. if (copied) {
  375. /* record the sent skb in the sent_skb table */
  376. BUG_ON(tx_obj->sent_skb_list[start]);
  377. tx_obj->sent_skb_list[start] = skb;
  378. /* Ensure txq has space for the next skb; Else stop the queue
  379. * *BEFORE* ringing the tx doorbell, so that we serialze the
  380. * tx compls of the current transmit which'll wake up the queue
  381. */
  382. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  383. txq->len) {
  384. netif_stop_queue(netdev);
  385. stopped = true;
  386. }
  387. be_txq_notify(adapter, txq->id, wrb_cnt);
  388. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  389. } else {
  390. txq->head = start;
  391. dev_kfree_skb_any(skb);
  392. }
  393. return NETDEV_TX_OK;
  394. }
  395. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  396. {
  397. struct be_adapter *adapter = netdev_priv(netdev);
  398. if (new_mtu < BE_MIN_MTU ||
  399. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  400. dev_info(&adapter->pdev->dev,
  401. "MTU must be between %d and %d bytes\n",
  402. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  403. return -EINVAL;
  404. }
  405. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  406. netdev->mtu, new_mtu);
  407. netdev->mtu = new_mtu;
  408. return 0;
  409. }
  410. /*
  411. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  412. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  413. * set the BE in promiscuous VLAN mode.
  414. */
  415. static int be_vid_config(struct be_adapter *adapter)
  416. {
  417. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  418. u16 ntags = 0, i;
  419. int status;
  420. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  421. /* Construct VLAN Table to give to HW */
  422. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  423. if (adapter->vlan_tag[i]) {
  424. vtag[ntags] = cpu_to_le16(i);
  425. ntags++;
  426. }
  427. }
  428. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  429. vtag, ntags, 1, 0);
  430. } else {
  431. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  432. NULL, 0, 1, 1);
  433. }
  434. return status;
  435. }
  436. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  437. {
  438. struct be_adapter *adapter = netdev_priv(netdev);
  439. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  440. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  441. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  442. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  443. adapter->vlan_grp = grp;
  444. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  445. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  446. }
  447. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  448. {
  449. struct be_adapter *adapter = netdev_priv(netdev);
  450. adapter->num_vlans++;
  451. adapter->vlan_tag[vid] = 1;
  452. be_vid_config(adapter);
  453. }
  454. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  455. {
  456. struct be_adapter *adapter = netdev_priv(netdev);
  457. adapter->num_vlans--;
  458. adapter->vlan_tag[vid] = 0;
  459. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  460. be_vid_config(adapter);
  461. }
  462. static void be_set_multicast_list(struct net_device *netdev)
  463. {
  464. struct be_adapter *adapter = netdev_priv(netdev);
  465. if (netdev->flags & IFF_PROMISC) {
  466. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  467. adapter->promiscuous = true;
  468. goto done;
  469. }
  470. /* BE was previously in promiscous mode; disable it */
  471. if (adapter->promiscuous) {
  472. adapter->promiscuous = false;
  473. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  474. }
  475. if (netdev->flags & IFF_ALLMULTI) {
  476. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
  477. goto done;
  478. }
  479. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  480. netdev->mc_count);
  481. done:
  482. return;
  483. }
  484. static void be_rx_rate_update(struct be_adapter *adapter)
  485. {
  486. struct be_drvr_stats *stats = drvr_stats(adapter);
  487. ulong now = jiffies;
  488. /* Wrapped around */
  489. if (time_before(now, stats->be_rx_jiffies)) {
  490. stats->be_rx_jiffies = now;
  491. return;
  492. }
  493. /* Update the rate once in two seconds */
  494. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  495. return;
  496. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  497. - stats->be_rx_bytes_prev,
  498. now - stats->be_rx_jiffies);
  499. stats->be_rx_jiffies = now;
  500. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  501. }
  502. static void be_rx_stats_update(struct be_adapter *adapter,
  503. u32 pktsize, u16 numfrags)
  504. {
  505. struct be_drvr_stats *stats = drvr_stats(adapter);
  506. stats->be_rx_compl++;
  507. stats->be_rx_frags += numfrags;
  508. stats->be_rx_bytes += pktsize;
  509. }
  510. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  511. {
  512. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  513. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  514. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  515. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  516. if (ip_version) {
  517. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  518. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  519. }
  520. ipv6_chk = (ip_version && (tcpf || udpf));
  521. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  522. }
  523. static struct be_rx_page_info *
  524. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  525. {
  526. struct be_rx_page_info *rx_page_info;
  527. struct be_queue_info *rxq = &adapter->rx_obj.q;
  528. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  529. BUG_ON(!rx_page_info->page);
  530. if (rx_page_info->last_page_user)
  531. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  532. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  533. atomic_dec(&rxq->used);
  534. return rx_page_info;
  535. }
  536. /* Throwaway the data in the Rx completion */
  537. static void be_rx_compl_discard(struct be_adapter *adapter,
  538. struct be_eth_rx_compl *rxcp)
  539. {
  540. struct be_queue_info *rxq = &adapter->rx_obj.q;
  541. struct be_rx_page_info *page_info;
  542. u16 rxq_idx, i, num_rcvd;
  543. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  544. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  545. for (i = 0; i < num_rcvd; i++) {
  546. page_info = get_rx_page_info(adapter, rxq_idx);
  547. put_page(page_info->page);
  548. memset(page_info, 0, sizeof(*page_info));
  549. index_inc(&rxq_idx, rxq->len);
  550. }
  551. }
  552. /*
  553. * skb_fill_rx_data forms a complete skb for an ether frame
  554. * indicated by rxcp.
  555. */
  556. static void skb_fill_rx_data(struct be_adapter *adapter,
  557. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  558. {
  559. struct be_queue_info *rxq = &adapter->rx_obj.q;
  560. struct be_rx_page_info *page_info;
  561. u16 rxq_idx, i, num_rcvd, j;
  562. u32 pktsize, hdr_len, curr_frag_len, size;
  563. u8 *start;
  564. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  565. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  566. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  567. page_info = get_rx_page_info(adapter, rxq_idx);
  568. start = page_address(page_info->page) + page_info->page_offset;
  569. prefetch(start);
  570. /* Copy data in the first descriptor of this completion */
  571. curr_frag_len = min(pktsize, rx_frag_size);
  572. /* Copy the header portion into skb_data */
  573. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  574. memcpy(skb->data, start, hdr_len);
  575. skb->len = curr_frag_len;
  576. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  577. /* Complete packet has now been moved to data */
  578. put_page(page_info->page);
  579. skb->data_len = 0;
  580. skb->tail += curr_frag_len;
  581. } else {
  582. skb_shinfo(skb)->nr_frags = 1;
  583. skb_shinfo(skb)->frags[0].page = page_info->page;
  584. skb_shinfo(skb)->frags[0].page_offset =
  585. page_info->page_offset + hdr_len;
  586. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  587. skb->data_len = curr_frag_len - hdr_len;
  588. skb->tail += hdr_len;
  589. }
  590. memset(page_info, 0, sizeof(*page_info));
  591. if (pktsize <= rx_frag_size) {
  592. BUG_ON(num_rcvd != 1);
  593. goto done;
  594. }
  595. /* More frags present for this completion */
  596. size = pktsize;
  597. for (i = 1, j = 0; i < num_rcvd; i++) {
  598. size -= curr_frag_len;
  599. index_inc(&rxq_idx, rxq->len);
  600. page_info = get_rx_page_info(adapter, rxq_idx);
  601. curr_frag_len = min(size, rx_frag_size);
  602. /* Coalesce all frags from the same physical page in one slot */
  603. if (page_info->page_offset == 0) {
  604. /* Fresh page */
  605. j++;
  606. skb_shinfo(skb)->frags[j].page = page_info->page;
  607. skb_shinfo(skb)->frags[j].page_offset =
  608. page_info->page_offset;
  609. skb_shinfo(skb)->frags[j].size = 0;
  610. skb_shinfo(skb)->nr_frags++;
  611. } else {
  612. put_page(page_info->page);
  613. }
  614. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  615. skb->len += curr_frag_len;
  616. skb->data_len += curr_frag_len;
  617. memset(page_info, 0, sizeof(*page_info));
  618. }
  619. BUG_ON(j > MAX_SKB_FRAGS);
  620. done:
  621. be_rx_stats_update(adapter, pktsize, num_rcvd);
  622. return;
  623. }
  624. /* Process the RX completion indicated by rxcp when GRO is disabled */
  625. static void be_rx_compl_process(struct be_adapter *adapter,
  626. struct be_eth_rx_compl *rxcp)
  627. {
  628. struct sk_buff *skb;
  629. u32 vlanf, vid;
  630. u8 vtm;
  631. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  632. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  633. /* vlanf could be wrongly set in some cards.
  634. * ignore if vtm is not set */
  635. if ((adapter->cap == 0x400) && !vtm)
  636. vlanf = 0;
  637. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  638. if (!skb) {
  639. if (net_ratelimit())
  640. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  641. be_rx_compl_discard(adapter, rxcp);
  642. return;
  643. }
  644. skb_reserve(skb, NET_IP_ALIGN);
  645. skb_fill_rx_data(adapter, skb, rxcp);
  646. if (do_pkt_csum(rxcp, adapter->rx_csum))
  647. skb->ip_summed = CHECKSUM_NONE;
  648. else
  649. skb->ip_summed = CHECKSUM_UNNECESSARY;
  650. skb->truesize = skb->len + sizeof(struct sk_buff);
  651. skb->protocol = eth_type_trans(skb, adapter->netdev);
  652. skb->dev = adapter->netdev;
  653. if (vlanf) {
  654. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  655. kfree_skb(skb);
  656. return;
  657. }
  658. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  659. vid = be16_to_cpu(vid);
  660. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  661. } else {
  662. netif_receive_skb(skb);
  663. }
  664. return;
  665. }
  666. /* Process the RX completion indicated by rxcp when GRO is enabled */
  667. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  668. struct be_eth_rx_compl *rxcp)
  669. {
  670. struct be_rx_page_info *page_info;
  671. struct sk_buff *skb = NULL;
  672. struct be_queue_info *rxq = &adapter->rx_obj.q;
  673. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  674. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  675. u16 i, rxq_idx = 0, vid, j;
  676. u8 vtm;
  677. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  678. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  679. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  680. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  681. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  682. /* vlanf could be wrongly set in some cards.
  683. * ignore if vtm is not set */
  684. if ((adapter->cap == 0x400) && !vtm)
  685. vlanf = 0;
  686. skb = napi_get_frags(&eq_obj->napi);
  687. if (!skb) {
  688. be_rx_compl_discard(adapter, rxcp);
  689. return;
  690. }
  691. remaining = pkt_size;
  692. for (i = 0, j = -1; i < num_rcvd; i++) {
  693. page_info = get_rx_page_info(adapter, rxq_idx);
  694. curr_frag_len = min(remaining, rx_frag_size);
  695. /* Coalesce all frags from the same physical page in one slot */
  696. if (i == 0 || page_info->page_offset == 0) {
  697. /* First frag or Fresh page */
  698. j++;
  699. skb_shinfo(skb)->frags[j].page = page_info->page;
  700. skb_shinfo(skb)->frags[j].page_offset =
  701. page_info->page_offset;
  702. skb_shinfo(skb)->frags[j].size = 0;
  703. } else {
  704. put_page(page_info->page);
  705. }
  706. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  707. remaining -= curr_frag_len;
  708. index_inc(&rxq_idx, rxq->len);
  709. memset(page_info, 0, sizeof(*page_info));
  710. }
  711. BUG_ON(j > MAX_SKB_FRAGS);
  712. skb_shinfo(skb)->nr_frags = j + 1;
  713. skb->len = pkt_size;
  714. skb->data_len = pkt_size;
  715. skb->truesize += pkt_size;
  716. skb->ip_summed = CHECKSUM_UNNECESSARY;
  717. if (likely(!vlanf)) {
  718. napi_gro_frags(&eq_obj->napi);
  719. } else {
  720. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  721. vid = be16_to_cpu(vid);
  722. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  723. return;
  724. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  725. }
  726. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  727. return;
  728. }
  729. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  730. {
  731. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  732. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  733. return NULL;
  734. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  735. queue_tail_inc(&adapter->rx_obj.cq);
  736. return rxcp;
  737. }
  738. /* To reset the valid bit, we need to reset the whole word as
  739. * when walking the queue the valid entries are little-endian
  740. * and invalid entries are host endian
  741. */
  742. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  743. {
  744. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  745. }
  746. static inline struct page *be_alloc_pages(u32 size)
  747. {
  748. gfp_t alloc_flags = GFP_ATOMIC;
  749. u32 order = get_order(size);
  750. if (order > 0)
  751. alloc_flags |= __GFP_COMP;
  752. return alloc_pages(alloc_flags, order);
  753. }
  754. /*
  755. * Allocate a page, split it to fragments of size rx_frag_size and post as
  756. * receive buffers to BE
  757. */
  758. static void be_post_rx_frags(struct be_adapter *adapter)
  759. {
  760. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  761. struct be_rx_page_info *page_info = NULL;
  762. struct be_queue_info *rxq = &adapter->rx_obj.q;
  763. struct page *pagep = NULL;
  764. struct be_eth_rx_d *rxd;
  765. u64 page_dmaaddr = 0, frag_dmaaddr;
  766. u32 posted, page_offset = 0;
  767. page_info = &page_info_tbl[rxq->head];
  768. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  769. if (!pagep) {
  770. pagep = be_alloc_pages(adapter->big_page_size);
  771. if (unlikely(!pagep)) {
  772. drvr_stats(adapter)->be_ethrx_post_fail++;
  773. break;
  774. }
  775. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  776. adapter->big_page_size,
  777. PCI_DMA_FROMDEVICE);
  778. page_info->page_offset = 0;
  779. } else {
  780. get_page(pagep);
  781. page_info->page_offset = page_offset + rx_frag_size;
  782. }
  783. page_offset = page_info->page_offset;
  784. page_info->page = pagep;
  785. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  786. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  787. rxd = queue_head_node(rxq);
  788. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  789. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  790. queue_head_inc(rxq);
  791. /* Any space left in the current big page for another frag? */
  792. if ((page_offset + rx_frag_size + rx_frag_size) >
  793. adapter->big_page_size) {
  794. pagep = NULL;
  795. page_info->last_page_user = true;
  796. }
  797. page_info = &page_info_tbl[rxq->head];
  798. }
  799. if (pagep)
  800. page_info->last_page_user = true;
  801. if (posted) {
  802. atomic_add(posted, &rxq->used);
  803. be_rxq_notify(adapter, rxq->id, posted);
  804. } else if (atomic_read(&rxq->used) == 0) {
  805. /* Let be_worker replenish when memory is available */
  806. adapter->rx_post_starved = true;
  807. }
  808. return;
  809. }
  810. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  811. {
  812. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  813. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  814. return NULL;
  815. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  816. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  817. queue_tail_inc(tx_cq);
  818. return txcp;
  819. }
  820. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  821. {
  822. struct be_queue_info *txq = &adapter->tx_obj.q;
  823. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  824. struct sk_buff *sent_skb;
  825. u16 cur_index, num_wrbs = 0;
  826. cur_index = txq->tail;
  827. sent_skb = sent_skbs[cur_index];
  828. BUG_ON(!sent_skb);
  829. sent_skbs[cur_index] = NULL;
  830. do {
  831. cur_index = txq->tail;
  832. num_wrbs++;
  833. queue_tail_inc(txq);
  834. } while (cur_index != last_index);
  835. atomic_sub(num_wrbs, &txq->used);
  836. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  837. kfree_skb(sent_skb);
  838. }
  839. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  840. {
  841. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  842. if (!eqe->evt)
  843. return NULL;
  844. eqe->evt = le32_to_cpu(eqe->evt);
  845. queue_tail_inc(&eq_obj->q);
  846. return eqe;
  847. }
  848. static int event_handle(struct be_adapter *adapter,
  849. struct be_eq_obj *eq_obj)
  850. {
  851. struct be_eq_entry *eqe;
  852. u16 num = 0;
  853. while ((eqe = event_get(eq_obj)) != NULL) {
  854. eqe->evt = 0;
  855. num++;
  856. }
  857. /* Deal with any spurious interrupts that come
  858. * without events
  859. */
  860. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  861. if (num)
  862. napi_schedule(&eq_obj->napi);
  863. return num;
  864. }
  865. /* Just read and notify events without processing them.
  866. * Used at the time of destroying event queues */
  867. static void be_eq_clean(struct be_adapter *adapter,
  868. struct be_eq_obj *eq_obj)
  869. {
  870. struct be_eq_entry *eqe;
  871. u16 num = 0;
  872. while ((eqe = event_get(eq_obj)) != NULL) {
  873. eqe->evt = 0;
  874. num++;
  875. }
  876. if (num)
  877. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  878. }
  879. static void be_rx_q_clean(struct be_adapter *adapter)
  880. {
  881. struct be_rx_page_info *page_info;
  882. struct be_queue_info *rxq = &adapter->rx_obj.q;
  883. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  884. struct be_eth_rx_compl *rxcp;
  885. u16 tail;
  886. /* First cleanup pending rx completions */
  887. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  888. be_rx_compl_discard(adapter, rxcp);
  889. be_rx_compl_reset(rxcp);
  890. be_cq_notify(adapter, rx_cq->id, true, 1);
  891. }
  892. /* Then free posted rx buffer that were not used */
  893. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  894. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  895. page_info = get_rx_page_info(adapter, tail);
  896. put_page(page_info->page);
  897. memset(page_info, 0, sizeof(*page_info));
  898. }
  899. BUG_ON(atomic_read(&rxq->used));
  900. }
  901. static void be_tx_compl_clean(struct be_adapter *adapter)
  902. {
  903. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  904. struct be_queue_info *txq = &adapter->tx_obj.q;
  905. struct be_eth_tx_compl *txcp;
  906. u16 end_idx, cmpl = 0, timeo = 0;
  907. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  908. do {
  909. while ((txcp = be_tx_compl_get(tx_cq))) {
  910. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  911. wrb_index, txcp);
  912. be_tx_compl_process(adapter, end_idx);
  913. cmpl++;
  914. }
  915. if (cmpl) {
  916. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  917. cmpl = 0;
  918. }
  919. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  920. break;
  921. mdelay(1);
  922. } while (true);
  923. if (atomic_read(&txq->used))
  924. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  925. atomic_read(&txq->used));
  926. }
  927. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  928. {
  929. struct be_queue_info *q;
  930. q = &adapter->mcc_obj.q;
  931. if (q->created)
  932. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  933. be_queue_free(adapter, q);
  934. q = &adapter->mcc_obj.cq;
  935. if (q->created)
  936. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  937. be_queue_free(adapter, q);
  938. }
  939. /* Must be called only after TX qs are created as MCC shares TX EQ */
  940. static int be_mcc_queues_create(struct be_adapter *adapter)
  941. {
  942. struct be_queue_info *q, *cq;
  943. /* Alloc MCC compl queue */
  944. cq = &adapter->mcc_obj.cq;
  945. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  946. sizeof(struct be_mcc_compl)))
  947. goto err;
  948. /* Ask BE to create MCC compl queue; share TX's eq */
  949. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  950. goto mcc_cq_free;
  951. /* Alloc MCC queue */
  952. q = &adapter->mcc_obj.q;
  953. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  954. goto mcc_cq_destroy;
  955. /* Ask BE to create MCC queue */
  956. if (be_cmd_mccq_create(adapter, q, cq))
  957. goto mcc_q_free;
  958. return 0;
  959. mcc_q_free:
  960. be_queue_free(adapter, q);
  961. mcc_cq_destroy:
  962. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  963. mcc_cq_free:
  964. be_queue_free(adapter, cq);
  965. err:
  966. return -1;
  967. }
  968. static void be_tx_queues_destroy(struct be_adapter *adapter)
  969. {
  970. struct be_queue_info *q;
  971. q = &adapter->tx_obj.q;
  972. if (q->created)
  973. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  974. be_queue_free(adapter, q);
  975. q = &adapter->tx_obj.cq;
  976. if (q->created)
  977. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  978. be_queue_free(adapter, q);
  979. /* Clear any residual events */
  980. be_eq_clean(adapter, &adapter->tx_eq);
  981. q = &adapter->tx_eq.q;
  982. if (q->created)
  983. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  984. be_queue_free(adapter, q);
  985. }
  986. static int be_tx_queues_create(struct be_adapter *adapter)
  987. {
  988. struct be_queue_info *eq, *q, *cq;
  989. adapter->tx_eq.max_eqd = 0;
  990. adapter->tx_eq.min_eqd = 0;
  991. adapter->tx_eq.cur_eqd = 96;
  992. adapter->tx_eq.enable_aic = false;
  993. /* Alloc Tx Event queue */
  994. eq = &adapter->tx_eq.q;
  995. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  996. return -1;
  997. /* Ask BE to create Tx Event queue */
  998. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  999. goto tx_eq_free;
  1000. /* Alloc TX eth compl queue */
  1001. cq = &adapter->tx_obj.cq;
  1002. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1003. sizeof(struct be_eth_tx_compl)))
  1004. goto tx_eq_destroy;
  1005. /* Ask BE to create Tx eth compl queue */
  1006. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1007. goto tx_cq_free;
  1008. /* Alloc TX eth queue */
  1009. q = &adapter->tx_obj.q;
  1010. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1011. goto tx_cq_destroy;
  1012. /* Ask BE to create Tx eth queue */
  1013. if (be_cmd_txq_create(adapter, q, cq))
  1014. goto tx_q_free;
  1015. return 0;
  1016. tx_q_free:
  1017. be_queue_free(adapter, q);
  1018. tx_cq_destroy:
  1019. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1020. tx_cq_free:
  1021. be_queue_free(adapter, cq);
  1022. tx_eq_destroy:
  1023. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1024. tx_eq_free:
  1025. be_queue_free(adapter, eq);
  1026. return -1;
  1027. }
  1028. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1029. {
  1030. struct be_queue_info *q;
  1031. q = &adapter->rx_obj.q;
  1032. if (q->created) {
  1033. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1034. be_rx_q_clean(adapter);
  1035. }
  1036. be_queue_free(adapter, q);
  1037. q = &adapter->rx_obj.cq;
  1038. if (q->created)
  1039. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1040. be_queue_free(adapter, q);
  1041. /* Clear any residual events */
  1042. be_eq_clean(adapter, &adapter->rx_eq);
  1043. q = &adapter->rx_eq.q;
  1044. if (q->created)
  1045. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1046. be_queue_free(adapter, q);
  1047. }
  1048. static int be_rx_queues_create(struct be_adapter *adapter)
  1049. {
  1050. struct be_queue_info *eq, *q, *cq;
  1051. int rc;
  1052. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1053. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1054. adapter->rx_eq.min_eqd = 0;
  1055. adapter->rx_eq.cur_eqd = 0;
  1056. adapter->rx_eq.enable_aic = true;
  1057. /* Alloc Rx Event queue */
  1058. eq = &adapter->rx_eq.q;
  1059. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1060. sizeof(struct be_eq_entry));
  1061. if (rc)
  1062. return rc;
  1063. /* Ask BE to create Rx Event queue */
  1064. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1065. if (rc)
  1066. goto rx_eq_free;
  1067. /* Alloc RX eth compl queue */
  1068. cq = &adapter->rx_obj.cq;
  1069. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1070. sizeof(struct be_eth_rx_compl));
  1071. if (rc)
  1072. goto rx_eq_destroy;
  1073. /* Ask BE to create Rx eth compl queue */
  1074. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1075. if (rc)
  1076. goto rx_cq_free;
  1077. /* Alloc RX eth queue */
  1078. q = &adapter->rx_obj.q;
  1079. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1080. if (rc)
  1081. goto rx_cq_destroy;
  1082. /* Ask BE to create Rx eth queue */
  1083. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1084. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1085. if (rc)
  1086. goto rx_q_free;
  1087. return 0;
  1088. rx_q_free:
  1089. be_queue_free(adapter, q);
  1090. rx_cq_destroy:
  1091. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1092. rx_cq_free:
  1093. be_queue_free(adapter, cq);
  1094. rx_eq_destroy:
  1095. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1096. rx_eq_free:
  1097. be_queue_free(adapter, eq);
  1098. return rc;
  1099. }
  1100. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1101. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1102. {
  1103. return eq_id - 8 * be_pci_func(adapter);
  1104. }
  1105. static irqreturn_t be_intx(int irq, void *dev)
  1106. {
  1107. struct be_adapter *adapter = dev;
  1108. int isr;
  1109. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1110. be_pci_func(adapter) * CEV_ISR_SIZE);
  1111. if (!isr)
  1112. return IRQ_NONE;
  1113. event_handle(adapter, &adapter->tx_eq);
  1114. event_handle(adapter, &adapter->rx_eq);
  1115. return IRQ_HANDLED;
  1116. }
  1117. static irqreturn_t be_msix_rx(int irq, void *dev)
  1118. {
  1119. struct be_adapter *adapter = dev;
  1120. event_handle(adapter, &adapter->rx_eq);
  1121. return IRQ_HANDLED;
  1122. }
  1123. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1124. {
  1125. struct be_adapter *adapter = dev;
  1126. event_handle(adapter, &adapter->tx_eq);
  1127. return IRQ_HANDLED;
  1128. }
  1129. static inline bool do_gro(struct be_adapter *adapter,
  1130. struct be_eth_rx_compl *rxcp)
  1131. {
  1132. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1133. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1134. if (err)
  1135. drvr_stats(adapter)->be_rxcp_err++;
  1136. return (tcp_frame && !err) ? true : false;
  1137. }
  1138. int be_poll_rx(struct napi_struct *napi, int budget)
  1139. {
  1140. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1141. struct be_adapter *adapter =
  1142. container_of(rx_eq, struct be_adapter, rx_eq);
  1143. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1144. struct be_eth_rx_compl *rxcp;
  1145. u32 work_done;
  1146. for (work_done = 0; work_done < budget; work_done++) {
  1147. rxcp = be_rx_compl_get(adapter);
  1148. if (!rxcp)
  1149. break;
  1150. if (do_gro(adapter, rxcp))
  1151. be_rx_compl_process_gro(adapter, rxcp);
  1152. else
  1153. be_rx_compl_process(adapter, rxcp);
  1154. be_rx_compl_reset(rxcp);
  1155. }
  1156. /* Refill the queue */
  1157. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1158. be_post_rx_frags(adapter);
  1159. /* All consumed */
  1160. if (work_done < budget) {
  1161. napi_complete(napi);
  1162. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1163. } else {
  1164. /* More to be consumed; continue with interrupts disabled */
  1165. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1166. }
  1167. return work_done;
  1168. }
  1169. void be_process_tx(struct be_adapter *adapter)
  1170. {
  1171. struct be_queue_info *txq = &adapter->tx_obj.q;
  1172. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1173. struct be_eth_tx_compl *txcp;
  1174. u32 num_cmpl = 0;
  1175. u16 end_idx;
  1176. while ((txcp = be_tx_compl_get(tx_cq))) {
  1177. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1178. wrb_index, txcp);
  1179. be_tx_compl_process(adapter, end_idx);
  1180. num_cmpl++;
  1181. }
  1182. if (num_cmpl) {
  1183. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1184. /* As Tx wrbs have been freed up, wake up netdev queue if
  1185. * it was stopped due to lack of tx wrbs.
  1186. */
  1187. if (netif_queue_stopped(adapter->netdev) &&
  1188. atomic_read(&txq->used) < txq->len / 2) {
  1189. netif_wake_queue(adapter->netdev);
  1190. }
  1191. drvr_stats(adapter)->be_tx_events++;
  1192. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1193. }
  1194. }
  1195. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1196. * For TX/MCC we don't honour budget; consume everything
  1197. */
  1198. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1199. {
  1200. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1201. struct be_adapter *adapter =
  1202. container_of(tx_eq, struct be_adapter, tx_eq);
  1203. napi_complete(napi);
  1204. be_process_tx(adapter);
  1205. be_process_mcc(adapter);
  1206. return 1;
  1207. }
  1208. static void be_worker(struct work_struct *work)
  1209. {
  1210. struct be_adapter *adapter =
  1211. container_of(work, struct be_adapter, work.work);
  1212. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1213. /* Set EQ delay */
  1214. be_rx_eqd_update(adapter);
  1215. be_tx_rate_update(adapter);
  1216. be_rx_rate_update(adapter);
  1217. if (adapter->rx_post_starved) {
  1218. adapter->rx_post_starved = false;
  1219. be_post_rx_frags(adapter);
  1220. }
  1221. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1222. }
  1223. static void be_msix_enable(struct be_adapter *adapter)
  1224. {
  1225. int i, status;
  1226. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1227. adapter->msix_entries[i].entry = i;
  1228. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1229. BE_NUM_MSIX_VECTORS);
  1230. if (status == 0)
  1231. adapter->msix_enabled = true;
  1232. return;
  1233. }
  1234. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1235. {
  1236. return adapter->msix_entries[
  1237. be_evt_bit_get(adapter, eq_id)].vector;
  1238. }
  1239. static int be_request_irq(struct be_adapter *adapter,
  1240. struct be_eq_obj *eq_obj,
  1241. void *handler, char *desc)
  1242. {
  1243. struct net_device *netdev = adapter->netdev;
  1244. int vec;
  1245. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1246. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1247. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1248. }
  1249. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1250. {
  1251. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1252. free_irq(vec, adapter);
  1253. }
  1254. static int be_msix_register(struct be_adapter *adapter)
  1255. {
  1256. int status;
  1257. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1258. if (status)
  1259. goto err;
  1260. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1261. if (status)
  1262. goto free_tx_irq;
  1263. return 0;
  1264. free_tx_irq:
  1265. be_free_irq(adapter, &adapter->tx_eq);
  1266. err:
  1267. dev_warn(&adapter->pdev->dev,
  1268. "MSIX Request IRQ failed - err %d\n", status);
  1269. pci_disable_msix(adapter->pdev);
  1270. adapter->msix_enabled = false;
  1271. return status;
  1272. }
  1273. static int be_irq_register(struct be_adapter *adapter)
  1274. {
  1275. struct net_device *netdev = adapter->netdev;
  1276. int status;
  1277. if (adapter->msix_enabled) {
  1278. status = be_msix_register(adapter);
  1279. if (status == 0)
  1280. goto done;
  1281. }
  1282. /* INTx */
  1283. netdev->irq = adapter->pdev->irq;
  1284. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1285. adapter);
  1286. if (status) {
  1287. dev_err(&adapter->pdev->dev,
  1288. "INTx request IRQ failed - err %d\n", status);
  1289. return status;
  1290. }
  1291. done:
  1292. adapter->isr_registered = true;
  1293. return 0;
  1294. }
  1295. static void be_irq_unregister(struct be_adapter *adapter)
  1296. {
  1297. struct net_device *netdev = adapter->netdev;
  1298. if (!adapter->isr_registered)
  1299. return;
  1300. /* INTx */
  1301. if (!adapter->msix_enabled) {
  1302. free_irq(netdev->irq, adapter);
  1303. goto done;
  1304. }
  1305. /* MSIx */
  1306. be_free_irq(adapter, &adapter->tx_eq);
  1307. be_free_irq(adapter, &adapter->rx_eq);
  1308. done:
  1309. adapter->isr_registered = false;
  1310. return;
  1311. }
  1312. static int be_open(struct net_device *netdev)
  1313. {
  1314. struct be_adapter *adapter = netdev_priv(netdev);
  1315. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1316. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1317. bool link_up;
  1318. int status;
  1319. /* First time posting */
  1320. be_post_rx_frags(adapter);
  1321. napi_enable(&rx_eq->napi);
  1322. napi_enable(&tx_eq->napi);
  1323. be_irq_register(adapter);
  1324. be_intr_set(adapter, true);
  1325. /* The evt queues are created in unarmed state; arm them */
  1326. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1327. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1328. /* Rx compl queue may be in unarmed state; rearm it */
  1329. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1330. status = be_cmd_link_status_query(adapter, &link_up);
  1331. if (status)
  1332. return status;
  1333. be_link_status_update(adapter, link_up);
  1334. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1335. return 0;
  1336. }
  1337. static int be_setup(struct be_adapter *adapter)
  1338. {
  1339. struct net_device *netdev = adapter->netdev;
  1340. u32 if_flags;
  1341. int status;
  1342. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1343. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1344. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1345. status = be_cmd_if_create(adapter, if_flags, netdev->dev_addr,
  1346. false/* pmac_invalid */, &adapter->if_handle,
  1347. &adapter->pmac_id);
  1348. if (status != 0)
  1349. goto do_none;
  1350. status = be_tx_queues_create(adapter);
  1351. if (status != 0)
  1352. goto if_destroy;
  1353. status = be_rx_queues_create(adapter);
  1354. if (status != 0)
  1355. goto tx_qs_destroy;
  1356. status = be_mcc_queues_create(adapter);
  1357. if (status != 0)
  1358. goto rx_qs_destroy;
  1359. status = be_vid_config(adapter);
  1360. if (status != 0)
  1361. goto mccqs_destroy;
  1362. status = be_cmd_set_flow_control(adapter, true, true);
  1363. if (status != 0)
  1364. goto mccqs_destroy;
  1365. return 0;
  1366. mccqs_destroy:
  1367. be_mcc_queues_destroy(adapter);
  1368. rx_qs_destroy:
  1369. be_rx_queues_destroy(adapter);
  1370. tx_qs_destroy:
  1371. be_tx_queues_destroy(adapter);
  1372. if_destroy:
  1373. be_cmd_if_destroy(adapter, adapter->if_handle);
  1374. do_none:
  1375. return status;
  1376. }
  1377. static int be_clear(struct be_adapter *adapter)
  1378. {
  1379. be_mcc_queues_destroy(adapter);
  1380. be_rx_queues_destroy(adapter);
  1381. be_tx_queues_destroy(adapter);
  1382. be_cmd_if_destroy(adapter, adapter->if_handle);
  1383. return 0;
  1384. }
  1385. static int be_close(struct net_device *netdev)
  1386. {
  1387. struct be_adapter *adapter = netdev_priv(netdev);
  1388. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1389. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1390. int vec;
  1391. cancel_delayed_work_sync(&adapter->work);
  1392. netif_stop_queue(netdev);
  1393. netif_carrier_off(netdev);
  1394. adapter->link_up = false;
  1395. be_intr_set(adapter, false);
  1396. if (adapter->msix_enabled) {
  1397. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1398. synchronize_irq(vec);
  1399. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1400. synchronize_irq(vec);
  1401. } else {
  1402. synchronize_irq(netdev->irq);
  1403. }
  1404. be_irq_unregister(adapter);
  1405. napi_disable(&rx_eq->napi);
  1406. napi_disable(&tx_eq->napi);
  1407. /* Wait for all pending tx completions to arrive so that
  1408. * all tx skbs are freed.
  1409. */
  1410. be_tx_compl_clean(adapter);
  1411. return 0;
  1412. }
  1413. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1414. char flash_cookie[2][16] = {"*** SE FLAS",
  1415. "H DIRECTORY *** "};
  1416. static int be_flash_image(struct be_adapter *adapter,
  1417. const struct firmware *fw,
  1418. struct be_dma_mem *flash_cmd, u32 flash_type)
  1419. {
  1420. int status;
  1421. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1422. int num_bytes;
  1423. const u8 *p = fw->data;
  1424. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1425. switch (flash_type) {
  1426. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1427. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1428. image_size = FLASH_IMAGE_MAX_SIZE;
  1429. break;
  1430. case FLASHROM_TYPE_ISCSI_BACKUP:
  1431. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1432. image_size = FLASH_IMAGE_MAX_SIZE;
  1433. break;
  1434. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1435. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1436. image_size = FLASH_IMAGE_MAX_SIZE;
  1437. break;
  1438. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1439. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1440. image_size = FLASH_IMAGE_MAX_SIZE;
  1441. break;
  1442. case FLASHROM_TYPE_BIOS:
  1443. image_offset = FLASH_iSCSI_BIOS_START;
  1444. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1445. break;
  1446. case FLASHROM_TYPE_FCOE_BIOS:
  1447. image_offset = FLASH_FCoE_BIOS_START;
  1448. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1449. break;
  1450. case FLASHROM_TYPE_PXE_BIOS:
  1451. image_offset = FLASH_PXE_BIOS_START;
  1452. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1453. break;
  1454. default:
  1455. return 0;
  1456. }
  1457. p += sizeof(struct flash_file_hdr) + image_offset;
  1458. if (p + image_size > fw->data + fw->size)
  1459. return -1;
  1460. total_bytes = image_size;
  1461. while (total_bytes) {
  1462. if (total_bytes > 32*1024)
  1463. num_bytes = 32*1024;
  1464. else
  1465. num_bytes = total_bytes;
  1466. total_bytes -= num_bytes;
  1467. if (!total_bytes)
  1468. flash_op = FLASHROM_OPER_FLASH;
  1469. else
  1470. flash_op = FLASHROM_OPER_SAVE;
  1471. memcpy(req->params.data_buf, p, num_bytes);
  1472. p += num_bytes;
  1473. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1474. flash_type, flash_op, num_bytes);
  1475. if (status) {
  1476. dev_err(&adapter->pdev->dev,
  1477. "cmd to write to flash rom failed. type/op %d/%d\n",
  1478. flash_type, flash_op);
  1479. return -1;
  1480. }
  1481. yield();
  1482. }
  1483. return 0;
  1484. }
  1485. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1486. {
  1487. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1488. const struct firmware *fw;
  1489. struct flash_file_hdr *fhdr;
  1490. struct flash_section_info *fsec = NULL;
  1491. struct be_dma_mem flash_cmd;
  1492. int status;
  1493. const u8 *p;
  1494. bool entry_found = false;
  1495. int flash_type;
  1496. char fw_ver[FW_VER_LEN];
  1497. char fw_cfg;
  1498. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1499. if (status)
  1500. return status;
  1501. fw_cfg = *(fw_ver + 2);
  1502. if (fw_cfg == '0')
  1503. fw_cfg = '1';
  1504. strcpy(fw_file, func);
  1505. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1506. if (status)
  1507. goto fw_exit;
  1508. p = fw->data;
  1509. fhdr = (struct flash_file_hdr *) p;
  1510. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1511. dev_err(&adapter->pdev->dev,
  1512. "Firmware(%s) load error (signature did not match)\n",
  1513. fw_file);
  1514. status = -1;
  1515. goto fw_exit;
  1516. }
  1517. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1518. p += sizeof(struct flash_file_hdr);
  1519. while (p < (fw->data + fw->size)) {
  1520. fsec = (struct flash_section_info *)p;
  1521. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1522. entry_found = true;
  1523. break;
  1524. }
  1525. p += 32;
  1526. }
  1527. if (!entry_found) {
  1528. status = -1;
  1529. dev_err(&adapter->pdev->dev,
  1530. "Flash cookie not found in firmware image\n");
  1531. goto fw_exit;
  1532. }
  1533. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1534. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1535. &flash_cmd.dma);
  1536. if (!flash_cmd.va) {
  1537. status = -ENOMEM;
  1538. dev_err(&adapter->pdev->dev,
  1539. "Memory allocation failure while flashing\n");
  1540. goto fw_exit;
  1541. }
  1542. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1543. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1544. status = be_flash_image(adapter, fw, &flash_cmd,
  1545. flash_type);
  1546. if (status)
  1547. break;
  1548. }
  1549. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1550. flash_cmd.dma);
  1551. if (status) {
  1552. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1553. goto fw_exit;
  1554. }
  1555. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1556. fw_exit:
  1557. release_firmware(fw);
  1558. return status;
  1559. }
  1560. static struct net_device_ops be_netdev_ops = {
  1561. .ndo_open = be_open,
  1562. .ndo_stop = be_close,
  1563. .ndo_start_xmit = be_xmit,
  1564. .ndo_get_stats = be_get_stats,
  1565. .ndo_set_rx_mode = be_set_multicast_list,
  1566. .ndo_set_mac_address = be_mac_addr_set,
  1567. .ndo_change_mtu = be_change_mtu,
  1568. .ndo_validate_addr = eth_validate_addr,
  1569. .ndo_vlan_rx_register = be_vlan_register,
  1570. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1571. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1572. };
  1573. static void be_netdev_init(struct net_device *netdev)
  1574. {
  1575. struct be_adapter *adapter = netdev_priv(netdev);
  1576. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1577. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1578. NETIF_F_GRO;
  1579. netdev->flags |= IFF_MULTICAST;
  1580. adapter->rx_csum = true;
  1581. netif_set_gso_max_size(netdev, 65535);
  1582. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1583. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1584. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1585. BE_NAPI_WEIGHT);
  1586. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1587. BE_NAPI_WEIGHT);
  1588. netif_carrier_off(netdev);
  1589. netif_stop_queue(netdev);
  1590. }
  1591. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1592. {
  1593. if (adapter->csr)
  1594. iounmap(adapter->csr);
  1595. if (adapter->db)
  1596. iounmap(adapter->db);
  1597. if (adapter->pcicfg)
  1598. iounmap(adapter->pcicfg);
  1599. }
  1600. static int be_map_pci_bars(struct be_adapter *adapter)
  1601. {
  1602. u8 __iomem *addr;
  1603. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1604. pci_resource_len(adapter->pdev, 2));
  1605. if (addr == NULL)
  1606. return -ENOMEM;
  1607. adapter->csr = addr;
  1608. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1609. 128 * 1024);
  1610. if (addr == NULL)
  1611. goto pci_map_err;
  1612. adapter->db = addr;
  1613. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1614. pci_resource_len(adapter->pdev, 1));
  1615. if (addr == NULL)
  1616. goto pci_map_err;
  1617. adapter->pcicfg = addr;
  1618. return 0;
  1619. pci_map_err:
  1620. be_unmap_pci_bars(adapter);
  1621. return -ENOMEM;
  1622. }
  1623. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1624. {
  1625. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1626. be_unmap_pci_bars(adapter);
  1627. if (mem->va)
  1628. pci_free_consistent(adapter->pdev, mem->size,
  1629. mem->va, mem->dma);
  1630. }
  1631. static int be_ctrl_init(struct be_adapter *adapter)
  1632. {
  1633. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1634. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1635. int status;
  1636. status = be_map_pci_bars(adapter);
  1637. if (status)
  1638. return status;
  1639. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1640. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1641. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1642. if (!mbox_mem_alloc->va) {
  1643. be_unmap_pci_bars(adapter);
  1644. return -1;
  1645. }
  1646. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1647. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1648. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1649. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1650. spin_lock_init(&adapter->mbox_lock);
  1651. spin_lock_init(&adapter->mcc_lock);
  1652. spin_lock_init(&adapter->mcc_cq_lock);
  1653. return 0;
  1654. }
  1655. static void be_stats_cleanup(struct be_adapter *adapter)
  1656. {
  1657. struct be_stats_obj *stats = &adapter->stats;
  1658. struct be_dma_mem *cmd = &stats->cmd;
  1659. if (cmd->va)
  1660. pci_free_consistent(adapter->pdev, cmd->size,
  1661. cmd->va, cmd->dma);
  1662. }
  1663. static int be_stats_init(struct be_adapter *adapter)
  1664. {
  1665. struct be_stats_obj *stats = &adapter->stats;
  1666. struct be_dma_mem *cmd = &stats->cmd;
  1667. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1668. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1669. if (cmd->va == NULL)
  1670. return -1;
  1671. return 0;
  1672. }
  1673. static void __devexit be_remove(struct pci_dev *pdev)
  1674. {
  1675. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1676. if (!adapter)
  1677. return;
  1678. unregister_netdev(adapter->netdev);
  1679. be_clear(adapter);
  1680. be_stats_cleanup(adapter);
  1681. be_ctrl_cleanup(adapter);
  1682. if (adapter->msix_enabled) {
  1683. pci_disable_msix(adapter->pdev);
  1684. adapter->msix_enabled = false;
  1685. }
  1686. pci_set_drvdata(pdev, NULL);
  1687. pci_release_regions(pdev);
  1688. pci_disable_device(pdev);
  1689. free_netdev(adapter->netdev);
  1690. }
  1691. static int be_hw_up(struct be_adapter *adapter)
  1692. {
  1693. int status;
  1694. status = be_cmd_POST(adapter);
  1695. if (status)
  1696. return status;
  1697. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1698. if (status)
  1699. return status;
  1700. status = be_cmd_query_fw_cfg(adapter,
  1701. &adapter->port_num, &adapter->cap);
  1702. return status;
  1703. }
  1704. static int __devinit be_probe(struct pci_dev *pdev,
  1705. const struct pci_device_id *pdev_id)
  1706. {
  1707. int status = 0;
  1708. struct be_adapter *adapter;
  1709. struct net_device *netdev;
  1710. u8 mac[ETH_ALEN];
  1711. status = pci_enable_device(pdev);
  1712. if (status)
  1713. goto do_none;
  1714. status = pci_request_regions(pdev, DRV_NAME);
  1715. if (status)
  1716. goto disable_dev;
  1717. pci_set_master(pdev);
  1718. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1719. if (netdev == NULL) {
  1720. status = -ENOMEM;
  1721. goto rel_reg;
  1722. }
  1723. adapter = netdev_priv(netdev);
  1724. adapter->pdev = pdev;
  1725. pci_set_drvdata(pdev, adapter);
  1726. adapter->netdev = netdev;
  1727. be_msix_enable(adapter);
  1728. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1729. if (!status) {
  1730. netdev->features |= NETIF_F_HIGHDMA;
  1731. } else {
  1732. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1733. if (status) {
  1734. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1735. goto free_netdev;
  1736. }
  1737. }
  1738. status = be_ctrl_init(adapter);
  1739. if (status)
  1740. goto free_netdev;
  1741. status = be_cmd_reset_function(adapter);
  1742. if (status)
  1743. goto ctrl_clean;
  1744. status = be_stats_init(adapter);
  1745. if (status)
  1746. goto ctrl_clean;
  1747. status = be_hw_up(adapter);
  1748. if (status)
  1749. goto stats_clean;
  1750. status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
  1751. true /* permanent */, 0);
  1752. if (status)
  1753. goto stats_clean;
  1754. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1755. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1756. be_netdev_init(netdev);
  1757. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1758. status = be_setup(adapter);
  1759. if (status)
  1760. goto stats_clean;
  1761. status = register_netdev(netdev);
  1762. if (status != 0)
  1763. goto unsetup;
  1764. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1765. return 0;
  1766. unsetup:
  1767. be_clear(adapter);
  1768. stats_clean:
  1769. be_stats_cleanup(adapter);
  1770. ctrl_clean:
  1771. be_ctrl_cleanup(adapter);
  1772. free_netdev:
  1773. free_netdev(adapter->netdev);
  1774. rel_reg:
  1775. pci_release_regions(pdev);
  1776. disable_dev:
  1777. pci_disable_device(pdev);
  1778. do_none:
  1779. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1780. return status;
  1781. }
  1782. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1783. {
  1784. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1785. struct net_device *netdev = adapter->netdev;
  1786. netif_device_detach(netdev);
  1787. if (netif_running(netdev)) {
  1788. rtnl_lock();
  1789. be_close(netdev);
  1790. rtnl_unlock();
  1791. }
  1792. be_clear(adapter);
  1793. pci_save_state(pdev);
  1794. pci_disable_device(pdev);
  1795. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1796. return 0;
  1797. }
  1798. static int be_resume(struct pci_dev *pdev)
  1799. {
  1800. int status = 0;
  1801. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1802. struct net_device *netdev = adapter->netdev;
  1803. netif_device_detach(netdev);
  1804. status = pci_enable_device(pdev);
  1805. if (status)
  1806. return status;
  1807. pci_set_power_state(pdev, 0);
  1808. pci_restore_state(pdev);
  1809. be_setup(adapter);
  1810. if (netif_running(netdev)) {
  1811. rtnl_lock();
  1812. be_open(netdev);
  1813. rtnl_unlock();
  1814. }
  1815. netif_device_attach(netdev);
  1816. return 0;
  1817. }
  1818. static struct pci_driver be_driver = {
  1819. .name = DRV_NAME,
  1820. .id_table = be_dev_ids,
  1821. .probe = be_probe,
  1822. .remove = be_remove,
  1823. .suspend = be_suspend,
  1824. .resume = be_resume
  1825. };
  1826. static int __init be_init_module(void)
  1827. {
  1828. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1829. && rx_frag_size != 2048) {
  1830. printk(KERN_WARNING DRV_NAME
  1831. " : Module param rx_frag_size must be 2048/4096/8192."
  1832. " Using 2048\n");
  1833. rx_frag_size = 2048;
  1834. }
  1835. return pci_register_driver(&be_driver);
  1836. }
  1837. module_init(be_init_module);
  1838. static void __exit be_exit_module(void)
  1839. {
  1840. pci_unregister_driver(&be_driver);
  1841. }
  1842. module_exit(be_exit_module);