mpt2sas_base.c 105 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2009 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->shost_recovery)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. /**
  109. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  110. * @ioc: pointer to scsi command object
  111. * Context: sleep.
  112. *
  113. * Return nothing.
  114. */
  115. void
  116. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  117. {
  118. unsigned long flags;
  119. if (ioc->fault_reset_work_q)
  120. return;
  121. /* initialize fault polling */
  122. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  123. snprintf(ioc->fault_reset_work_q_name,
  124. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  125. ioc->fault_reset_work_q =
  126. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  127. if (!ioc->fault_reset_work_q) {
  128. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  129. ioc->name, __func__, __LINE__);
  130. return;
  131. }
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->fault_reset_work_q)
  134. queue_delayed_work(ioc->fault_reset_work_q,
  135. &ioc->fault_reset_work,
  136. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  137. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  138. }
  139. /**
  140. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  141. * @ioc: pointer to scsi command object
  142. * Context: sleep.
  143. *
  144. * Return nothing.
  145. */
  146. void
  147. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  148. {
  149. unsigned long flags;
  150. struct workqueue_struct *wq;
  151. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  152. wq = ioc->fault_reset_work_q;
  153. ioc->fault_reset_work_q = NULL;
  154. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  155. if (wq) {
  156. if (!cancel_delayed_work(&ioc->fault_reset_work))
  157. flush_workqueue(wq);
  158. destroy_workqueue(wq);
  159. }
  160. }
  161. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  162. /**
  163. * _base_sas_ioc_info - verbose translation of the ioc status
  164. * @ioc: pointer to scsi command object
  165. * @mpi_reply: reply mf payload returned from firmware
  166. * @request_hdr: request mf
  167. *
  168. * Return nothing.
  169. */
  170. static void
  171. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  172. MPI2RequestHeader_t *request_hdr)
  173. {
  174. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  175. MPI2_IOCSTATUS_MASK;
  176. char *desc = NULL;
  177. u16 frame_sz;
  178. char *func_str = NULL;
  179. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  180. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  181. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  182. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  183. return;
  184. switch (ioc_status) {
  185. /****************************************************************************
  186. * Common IOCStatus values for all replies
  187. ****************************************************************************/
  188. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  189. desc = "invalid function";
  190. break;
  191. case MPI2_IOCSTATUS_BUSY:
  192. desc = "busy";
  193. break;
  194. case MPI2_IOCSTATUS_INVALID_SGL:
  195. desc = "invalid sgl";
  196. break;
  197. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  198. desc = "internal error";
  199. break;
  200. case MPI2_IOCSTATUS_INVALID_VPID:
  201. desc = "invalid vpid";
  202. break;
  203. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  204. desc = "insufficient resources";
  205. break;
  206. case MPI2_IOCSTATUS_INVALID_FIELD:
  207. desc = "invalid field";
  208. break;
  209. case MPI2_IOCSTATUS_INVALID_STATE:
  210. desc = "invalid state";
  211. break;
  212. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  213. desc = "op state not supported";
  214. break;
  215. /****************************************************************************
  216. * Config IOCStatus values
  217. ****************************************************************************/
  218. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  219. desc = "config invalid action";
  220. break;
  221. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  222. desc = "config invalid type";
  223. break;
  224. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  225. desc = "config invalid page";
  226. break;
  227. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  228. desc = "config invalid data";
  229. break;
  230. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  231. desc = "config no defaults";
  232. break;
  233. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  234. desc = "config cant commit";
  235. break;
  236. /****************************************************************************
  237. * SCSI IO Reply
  238. ****************************************************************************/
  239. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  240. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  241. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  242. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  243. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  244. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  245. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  246. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  247. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  248. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  249. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  250. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  251. break;
  252. /****************************************************************************
  253. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  254. ****************************************************************************/
  255. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  256. desc = "eedp guard error";
  257. break;
  258. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  259. desc = "eedp ref tag error";
  260. break;
  261. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  262. desc = "eedp app tag error";
  263. break;
  264. /****************************************************************************
  265. * SCSI Target values
  266. ****************************************************************************/
  267. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  268. desc = "target invalid io index";
  269. break;
  270. case MPI2_IOCSTATUS_TARGET_ABORTED:
  271. desc = "target aborted";
  272. break;
  273. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  274. desc = "target no conn retryable";
  275. break;
  276. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  277. desc = "target no connection";
  278. break;
  279. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  280. desc = "target xfer count mismatch";
  281. break;
  282. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  283. desc = "target data offset error";
  284. break;
  285. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  286. desc = "target too much write data";
  287. break;
  288. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  289. desc = "target iu too short";
  290. break;
  291. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  292. desc = "target ack nak timeout";
  293. break;
  294. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  295. desc = "target nak received";
  296. break;
  297. /****************************************************************************
  298. * Serial Attached SCSI values
  299. ****************************************************************************/
  300. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  301. desc = "smp request failed";
  302. break;
  303. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  304. desc = "smp data overrun";
  305. break;
  306. /****************************************************************************
  307. * Diagnostic Buffer Post / Diagnostic Release values
  308. ****************************************************************************/
  309. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  310. desc = "diagnostic released";
  311. break;
  312. default:
  313. break;
  314. }
  315. if (!desc)
  316. return;
  317. switch (request_hdr->Function) {
  318. case MPI2_FUNCTION_CONFIG:
  319. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  320. func_str = "config_page";
  321. break;
  322. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  323. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  324. func_str = "task_mgmt";
  325. break;
  326. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  327. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  328. func_str = "sas_iounit_ctl";
  329. break;
  330. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  331. frame_sz = sizeof(Mpi2SepRequest_t);
  332. func_str = "enclosure";
  333. break;
  334. case MPI2_FUNCTION_IOC_INIT:
  335. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  336. func_str = "ioc_init";
  337. break;
  338. case MPI2_FUNCTION_PORT_ENABLE:
  339. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  340. func_str = "port_enable";
  341. break;
  342. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  343. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  344. func_str = "smp_passthru";
  345. break;
  346. default:
  347. frame_sz = 32;
  348. func_str = "unknown";
  349. break;
  350. }
  351. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  352. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  353. _debug_dump_mf(request_hdr, frame_sz/4);
  354. }
  355. /**
  356. * _base_display_event_data - verbose translation of firmware asyn events
  357. * @ioc: pointer to scsi command object
  358. * @mpi_reply: reply mf payload returned from firmware
  359. *
  360. * Return nothing.
  361. */
  362. static void
  363. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  364. Mpi2EventNotificationReply_t *mpi_reply)
  365. {
  366. char *desc = NULL;
  367. u16 event;
  368. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  369. return;
  370. event = le16_to_cpu(mpi_reply->Event);
  371. switch (event) {
  372. case MPI2_EVENT_LOG_DATA:
  373. desc = "Log Data";
  374. break;
  375. case MPI2_EVENT_STATE_CHANGE:
  376. desc = "Status Change";
  377. break;
  378. case MPI2_EVENT_HARD_RESET_RECEIVED:
  379. desc = "Hard Reset Received";
  380. break;
  381. case MPI2_EVENT_EVENT_CHANGE:
  382. desc = "Event Change";
  383. break;
  384. case MPI2_EVENT_TASK_SET_FULL:
  385. desc = "Task Set Full";
  386. break;
  387. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  388. desc = "Device Status Change";
  389. break;
  390. case MPI2_EVENT_IR_OPERATION_STATUS:
  391. desc = "IR Operation Status";
  392. break;
  393. case MPI2_EVENT_SAS_DISCOVERY:
  394. desc = "Discovery";
  395. break;
  396. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  397. desc = "SAS Broadcast Primitive";
  398. break;
  399. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  400. desc = "SAS Init Device Status Change";
  401. break;
  402. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  403. desc = "SAS Init Table Overflow";
  404. break;
  405. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  406. desc = "SAS Topology Change List";
  407. break;
  408. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  409. desc = "SAS Enclosure Device Status Change";
  410. break;
  411. case MPI2_EVENT_IR_VOLUME:
  412. desc = "IR Volume";
  413. break;
  414. case MPI2_EVENT_IR_PHYSICAL_DISK:
  415. desc = "IR Physical Disk";
  416. break;
  417. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  418. desc = "IR Configuration Change List";
  419. break;
  420. case MPI2_EVENT_LOG_ENTRY_ADDED:
  421. desc = "Log Entry Added";
  422. break;
  423. }
  424. if (!desc)
  425. return;
  426. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  427. }
  428. #endif
  429. /**
  430. * _base_sas_log_info - verbose translation of firmware log info
  431. * @ioc: pointer to scsi command object
  432. * @log_info: log info
  433. *
  434. * Return nothing.
  435. */
  436. static void
  437. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  438. {
  439. union loginfo_type {
  440. u32 loginfo;
  441. struct {
  442. u32 subcode:16;
  443. u32 code:8;
  444. u32 originator:4;
  445. u32 bus_type:4;
  446. } dw;
  447. };
  448. union loginfo_type sas_loginfo;
  449. char *originator_str = NULL;
  450. sas_loginfo.loginfo = log_info;
  451. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  452. return;
  453. /* each nexus loss loginfo */
  454. if (log_info == 0x31170000)
  455. return;
  456. /* eat the loginfos associated with task aborts */
  457. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  458. 0x31140000 || log_info == 0x31130000))
  459. return;
  460. switch (sas_loginfo.dw.originator) {
  461. case 0:
  462. originator_str = "IOP";
  463. break;
  464. case 1:
  465. originator_str = "PL";
  466. break;
  467. case 2:
  468. originator_str = "IR";
  469. break;
  470. }
  471. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  472. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  473. originator_str, sas_loginfo.dw.code,
  474. sas_loginfo.dw.subcode);
  475. }
  476. /**
  477. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  478. * @ioc: pointer to scsi command object
  479. * @fault_code: fault code
  480. *
  481. * Return nothing.
  482. */
  483. void
  484. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  485. {
  486. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  487. ioc->name, fault_code);
  488. }
  489. /**
  490. * _base_display_reply_info -
  491. * @ioc: pointer to scsi command object
  492. * @smid: system request message index
  493. * @msix_index: MSIX table index supplied by the OS
  494. * @reply: reply message frame(lower 32bit addr)
  495. *
  496. * Return nothing.
  497. */
  498. static void
  499. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  500. u32 reply)
  501. {
  502. MPI2DefaultReply_t *mpi_reply;
  503. u16 ioc_status;
  504. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  505. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  506. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  507. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  508. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  509. _base_sas_ioc_info(ioc , mpi_reply,
  510. mpt2sas_base_get_msg_frame(ioc, smid));
  511. }
  512. #endif
  513. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  514. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  515. }
  516. /**
  517. * mpt2sas_base_done - base internal command completion routine
  518. * @ioc: pointer to scsi command object
  519. * @smid: system request message index
  520. * @msix_index: MSIX table index supplied by the OS
  521. * @reply: reply message frame(lower 32bit addr)
  522. *
  523. * Return 1 meaning mf should be freed from _base_interrupt
  524. * 0 means the mf is freed from this function.
  525. */
  526. u8
  527. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  528. u32 reply)
  529. {
  530. MPI2DefaultReply_t *mpi_reply;
  531. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  532. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  533. return 1;
  534. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  535. return 1;
  536. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  537. if (mpi_reply) {
  538. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  539. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  540. }
  541. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  542. complete(&ioc->base_cmds.done);
  543. return 1;
  544. }
  545. /**
  546. * _base_async_event - main callback handler for firmware asyn events
  547. * @ioc: pointer to scsi command object
  548. * @msix_index: MSIX table index supplied by the OS
  549. * @reply: reply message frame(lower 32bit addr)
  550. *
  551. * Return 1 meaning mf should be freed from _base_interrupt
  552. * 0 means the mf is freed from this function.
  553. */
  554. static u8
  555. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  556. {
  557. Mpi2EventNotificationReply_t *mpi_reply;
  558. Mpi2EventAckRequest_t *ack_request;
  559. u16 smid;
  560. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  561. if (!mpi_reply)
  562. return 1;
  563. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  564. return 1;
  565. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  566. _base_display_event_data(ioc, mpi_reply);
  567. #endif
  568. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  569. goto out;
  570. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  571. if (!smid) {
  572. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  573. ioc->name, __func__);
  574. goto out;
  575. }
  576. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  577. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  578. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  579. ack_request->Event = mpi_reply->Event;
  580. ack_request->EventContext = mpi_reply->EventContext;
  581. ack_request->VF_ID = 0; /* TODO */
  582. ack_request->VP_ID = 0;
  583. mpt2sas_base_put_smid_default(ioc, smid);
  584. out:
  585. /* scsih callback handler */
  586. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  587. /* ctl callback handler */
  588. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  589. return 1;
  590. }
  591. /**
  592. * _base_get_cb_idx - obtain the callback index
  593. * @ioc: per adapter object
  594. * @smid: system request message index
  595. *
  596. * Return callback index.
  597. */
  598. static u8
  599. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  600. {
  601. int i;
  602. u8 cb_idx = 0xFF;
  603. if (smid >= ioc->hi_priority_smid) {
  604. if (smid < ioc->internal_smid) {
  605. i = smid - ioc->hi_priority_smid;
  606. cb_idx = ioc->hpr_lookup[i].cb_idx;
  607. } else {
  608. i = smid - ioc->internal_smid;
  609. cb_idx = ioc->internal_lookup[i].cb_idx;
  610. }
  611. } else {
  612. i = smid - 1;
  613. cb_idx = ioc->scsi_lookup[i].cb_idx;
  614. }
  615. return cb_idx;
  616. }
  617. /**
  618. * _base_mask_interrupts - disable interrupts
  619. * @ioc: pointer to scsi command object
  620. *
  621. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  622. *
  623. * Return nothing.
  624. */
  625. static void
  626. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  627. {
  628. u32 him_register;
  629. ioc->mask_interrupts = 1;
  630. him_register = readl(&ioc->chip->HostInterruptMask);
  631. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  632. writel(him_register, &ioc->chip->HostInterruptMask);
  633. readl(&ioc->chip->HostInterruptMask);
  634. }
  635. /**
  636. * _base_unmask_interrupts - enable interrupts
  637. * @ioc: pointer to scsi command object
  638. *
  639. * Enabling only Reply Interrupts
  640. *
  641. * Return nothing.
  642. */
  643. static void
  644. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  645. {
  646. u32 him_register;
  647. writel(0, &ioc->chip->HostInterruptStatus);
  648. him_register = readl(&ioc->chip->HostInterruptMask);
  649. him_register &= ~MPI2_HIM_RIM;
  650. writel(him_register, &ioc->chip->HostInterruptMask);
  651. ioc->mask_interrupts = 0;
  652. }
  653. union reply_descriptor {
  654. u64 word;
  655. struct {
  656. u32 low;
  657. u32 high;
  658. } u;
  659. };
  660. /**
  661. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  662. * @irq: irq number (not used)
  663. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  664. * @r: pt_regs pointer (not used)
  665. *
  666. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  667. */
  668. static irqreturn_t
  669. _base_interrupt(int irq, void *bus_id)
  670. {
  671. union reply_descriptor rd;
  672. u32 completed_cmds;
  673. u8 request_desript_type;
  674. u16 smid;
  675. u8 cb_idx;
  676. u32 reply;
  677. u8 msix_index;
  678. struct MPT2SAS_ADAPTER *ioc = bus_id;
  679. Mpi2ReplyDescriptorsUnion_t *rpf;
  680. u8 rc;
  681. if (ioc->mask_interrupts)
  682. return IRQ_NONE;
  683. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  684. request_desript_type = rpf->Default.ReplyFlags
  685. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  686. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  687. return IRQ_NONE;
  688. completed_cmds = 0;
  689. do {
  690. rd.word = rpf->Words;
  691. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  692. goto out;
  693. reply = 0;
  694. cb_idx = 0xFF;
  695. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  696. msix_index = rpf->Default.MSIxIndex;
  697. if (request_desript_type ==
  698. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  699. reply = le32_to_cpu
  700. (rpf->AddressReply.ReplyFrameAddress);
  701. } else if (request_desript_type ==
  702. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  703. goto next;
  704. else if (request_desript_type ==
  705. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  706. goto next;
  707. if (smid)
  708. cb_idx = _base_get_cb_idx(ioc, smid);
  709. if (smid && cb_idx != 0xFF) {
  710. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  711. reply);
  712. if (reply)
  713. _base_display_reply_info(ioc, smid, msix_index,
  714. reply);
  715. if (rc)
  716. mpt2sas_base_free_smid(ioc, smid);
  717. }
  718. if (!smid)
  719. _base_async_event(ioc, msix_index, reply);
  720. /* reply free queue handling */
  721. if (reply) {
  722. ioc->reply_free_host_index =
  723. (ioc->reply_free_host_index ==
  724. (ioc->reply_free_queue_depth - 1)) ?
  725. 0 : ioc->reply_free_host_index + 1;
  726. ioc->reply_free[ioc->reply_free_host_index] =
  727. cpu_to_le32(reply);
  728. wmb();
  729. writel(ioc->reply_free_host_index,
  730. &ioc->chip->ReplyFreeHostIndex);
  731. }
  732. next:
  733. rpf->Words = ULLONG_MAX;
  734. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  735. (ioc->reply_post_queue_depth - 1)) ? 0 :
  736. ioc->reply_post_host_index + 1;
  737. request_desript_type =
  738. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  739. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  740. completed_cmds++;
  741. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  742. goto out;
  743. if (!ioc->reply_post_host_index)
  744. rpf = ioc->reply_post_free;
  745. else
  746. rpf++;
  747. } while (1);
  748. out:
  749. if (!completed_cmds)
  750. return IRQ_NONE;
  751. wmb();
  752. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  753. return IRQ_HANDLED;
  754. }
  755. /**
  756. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  757. * @cb_idx: callback index
  758. *
  759. * Return nothing.
  760. */
  761. void
  762. mpt2sas_base_release_callback_handler(u8 cb_idx)
  763. {
  764. mpt_callbacks[cb_idx] = NULL;
  765. }
  766. /**
  767. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  768. * @cb_func: callback function
  769. *
  770. * Returns cb_func.
  771. */
  772. u8
  773. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  774. {
  775. u8 cb_idx;
  776. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  777. if (mpt_callbacks[cb_idx] == NULL)
  778. break;
  779. mpt_callbacks[cb_idx] = cb_func;
  780. return cb_idx;
  781. }
  782. /**
  783. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  784. *
  785. * Return nothing.
  786. */
  787. void
  788. mpt2sas_base_initialize_callback_handler(void)
  789. {
  790. u8 cb_idx;
  791. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  792. mpt2sas_base_release_callback_handler(cb_idx);
  793. }
  794. /**
  795. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  796. * @ioc: per adapter object
  797. * @paddr: virtual address for SGE
  798. *
  799. * Create a zero length scatter gather entry to insure the IOCs hardware has
  800. * something to use if the target device goes brain dead and tries
  801. * to send data even when none is asked for.
  802. *
  803. * Return nothing.
  804. */
  805. void
  806. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  807. {
  808. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  809. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  810. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  811. MPI2_SGE_FLAGS_SHIFT);
  812. ioc->base_add_sg_single(paddr, flags_length, -1);
  813. }
  814. /**
  815. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  816. * @paddr: virtual address for SGE
  817. * @flags_length: SGE flags and data transfer length
  818. * @dma_addr: Physical address
  819. *
  820. * Return nothing.
  821. */
  822. static void
  823. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  824. {
  825. Mpi2SGESimple32_t *sgel = paddr;
  826. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  827. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  828. sgel->FlagsLength = cpu_to_le32(flags_length);
  829. sgel->Address = cpu_to_le32(dma_addr);
  830. }
  831. /**
  832. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  833. * @paddr: virtual address for SGE
  834. * @flags_length: SGE flags and data transfer length
  835. * @dma_addr: Physical address
  836. *
  837. * Return nothing.
  838. */
  839. static void
  840. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  841. {
  842. Mpi2SGESimple64_t *sgel = paddr;
  843. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  844. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  845. sgel->FlagsLength = cpu_to_le32(flags_length);
  846. sgel->Address = cpu_to_le64(dma_addr);
  847. }
  848. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  849. /**
  850. * _base_config_dma_addressing - set dma addressing
  851. * @ioc: per adapter object
  852. * @pdev: PCI device struct
  853. *
  854. * Returns 0 for success, non-zero for failure.
  855. */
  856. static int
  857. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  858. {
  859. struct sysinfo s;
  860. char *desc = NULL;
  861. if (sizeof(dma_addr_t) > 4) {
  862. const uint64_t required_mask =
  863. dma_get_required_mask(&pdev->dev);
  864. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  865. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  866. DMA_BIT_MASK(64))) {
  867. ioc->base_add_sg_single = &_base_add_sg_single_64;
  868. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  869. desc = "64";
  870. goto out;
  871. }
  872. }
  873. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  874. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  875. ioc->base_add_sg_single = &_base_add_sg_single_32;
  876. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  877. desc = "32";
  878. } else
  879. return -ENODEV;
  880. out:
  881. si_meminfo(&s);
  882. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  883. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  884. return 0;
  885. }
  886. /**
  887. * _base_save_msix_table - backup msix vector table
  888. * @ioc: per adapter object
  889. *
  890. * This address an errata where diag reset clears out the table
  891. */
  892. static void
  893. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  894. {
  895. int i;
  896. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  897. return;
  898. for (i = 0; i < ioc->msix_vector_count; i++)
  899. ioc->msix_table_backup[i] = ioc->msix_table[i];
  900. }
  901. /**
  902. * _base_restore_msix_table - this restores the msix vector table
  903. * @ioc: per adapter object
  904. *
  905. */
  906. static void
  907. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  908. {
  909. int i;
  910. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  911. return;
  912. for (i = 0; i < ioc->msix_vector_count; i++)
  913. ioc->msix_table[i] = ioc->msix_table_backup[i];
  914. }
  915. /**
  916. * _base_check_enable_msix - checks MSIX capabable.
  917. * @ioc: per adapter object
  918. *
  919. * Check to see if card is capable of MSIX, and set number
  920. * of avaliable msix vectors
  921. */
  922. static int
  923. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  924. {
  925. int base;
  926. u16 message_control;
  927. u32 msix_table_offset;
  928. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  929. if (!base) {
  930. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  931. "supported\n", ioc->name));
  932. return -EINVAL;
  933. }
  934. /* get msix vector count */
  935. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  936. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  937. /* get msix table */
  938. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  939. msix_table_offset &= 0xFFFFFFF8;
  940. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  941. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  942. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  943. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  944. return 0;
  945. }
  946. /**
  947. * _base_disable_msix - disables msix
  948. * @ioc: per adapter object
  949. *
  950. */
  951. static void
  952. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  953. {
  954. if (ioc->msix_enable) {
  955. pci_disable_msix(ioc->pdev);
  956. kfree(ioc->msix_table_backup);
  957. ioc->msix_table_backup = NULL;
  958. ioc->msix_enable = 0;
  959. }
  960. }
  961. /**
  962. * _base_enable_msix - enables msix, failback to io_apic
  963. * @ioc: per adapter object
  964. *
  965. */
  966. static int
  967. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  968. {
  969. struct msix_entry entries;
  970. int r;
  971. u8 try_msix = 0;
  972. if (msix_disable == -1 || msix_disable == 0)
  973. try_msix = 1;
  974. if (!try_msix)
  975. goto try_ioapic;
  976. if (_base_check_enable_msix(ioc) != 0)
  977. goto try_ioapic;
  978. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  979. sizeof(u32), GFP_KERNEL);
  980. if (!ioc->msix_table_backup) {
  981. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  982. "msix_table_backup failed!!!\n", ioc->name));
  983. goto try_ioapic;
  984. }
  985. memset(&entries, 0, sizeof(struct msix_entry));
  986. r = pci_enable_msix(ioc->pdev, &entries, 1);
  987. if (r) {
  988. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  989. "failed (r=%d) !!!\n", ioc->name, r));
  990. goto try_ioapic;
  991. }
  992. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  993. ioc->name, ioc);
  994. if (r) {
  995. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  996. "interrupt %d !!!\n", ioc->name, entries.vector));
  997. pci_disable_msix(ioc->pdev);
  998. goto try_ioapic;
  999. }
  1000. ioc->pci_irq = entries.vector;
  1001. ioc->msix_enable = 1;
  1002. return 0;
  1003. /* failback to io_apic interrupt routing */
  1004. try_ioapic:
  1005. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1006. ioc->name, ioc);
  1007. if (r) {
  1008. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1009. ioc->name, ioc->pdev->irq);
  1010. r = -EBUSY;
  1011. goto out_fail;
  1012. }
  1013. ioc->pci_irq = ioc->pdev->irq;
  1014. return 0;
  1015. out_fail:
  1016. return r;
  1017. }
  1018. /**
  1019. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1020. * @ioc: per adapter object
  1021. *
  1022. * Returns 0 for success, non-zero for failure.
  1023. */
  1024. int
  1025. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1026. {
  1027. struct pci_dev *pdev = ioc->pdev;
  1028. u32 memap_sz;
  1029. u32 pio_sz;
  1030. int i, r = 0;
  1031. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  1032. ioc->name, __func__));
  1033. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1034. if (pci_enable_device_mem(pdev)) {
  1035. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1036. "failed\n", ioc->name);
  1037. return -ENODEV;
  1038. }
  1039. if (pci_request_selected_regions(pdev, ioc->bars,
  1040. MPT2SAS_DRIVER_NAME)) {
  1041. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1042. "failed\n", ioc->name);
  1043. r = -ENODEV;
  1044. goto out_fail;
  1045. }
  1046. pci_set_master(pdev);
  1047. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1048. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1049. ioc->name, pci_name(pdev));
  1050. r = -ENODEV;
  1051. goto out_fail;
  1052. }
  1053. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1054. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  1055. if (pio_sz)
  1056. continue;
  1057. ioc->pio_chip = pci_resource_start(pdev, i);
  1058. pio_sz = pci_resource_len(pdev, i);
  1059. } else {
  1060. if (memap_sz)
  1061. continue;
  1062. ioc->chip_phys = pci_resource_start(pdev, i);
  1063. memap_sz = pci_resource_len(pdev, i);
  1064. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1065. if (ioc->chip == NULL) {
  1066. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  1067. "memory!\n", ioc->name);
  1068. r = -EINVAL;
  1069. goto out_fail;
  1070. }
  1071. }
  1072. }
  1073. _base_mask_interrupts(ioc);
  1074. r = _base_enable_msix(ioc);
  1075. if (r)
  1076. goto out_fail;
  1077. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1078. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1079. "IO-APIC enabled"), ioc->pci_irq);
  1080. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  1081. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  1082. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  1083. ioc->name, ioc->pio_chip, pio_sz);
  1084. return 0;
  1085. out_fail:
  1086. if (ioc->chip_phys)
  1087. iounmap(ioc->chip);
  1088. ioc->chip_phys = 0;
  1089. ioc->pci_irq = -1;
  1090. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1091. pci_disable_device(pdev);
  1092. return r;
  1093. }
  1094. /**
  1095. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1096. * @ioc: per adapter object
  1097. * @smid: system request message index(smid zero is invalid)
  1098. *
  1099. * Returns virt pointer to message frame.
  1100. */
  1101. void *
  1102. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1103. {
  1104. return (void *)(ioc->request + (smid * ioc->request_sz));
  1105. }
  1106. /**
  1107. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1108. * @ioc: per adapter object
  1109. * @smid: system request message index
  1110. *
  1111. * Returns virt pointer to sense buffer.
  1112. */
  1113. void *
  1114. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1115. {
  1116. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1117. }
  1118. /**
  1119. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1120. * @ioc: per adapter object
  1121. * @smid: system request message index
  1122. *
  1123. * Returns phys pointer to sense buffer.
  1124. */
  1125. dma_addr_t
  1126. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1127. {
  1128. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1129. }
  1130. /**
  1131. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1132. * @ioc: per adapter object
  1133. * @phys_addr: lower 32 physical addr of the reply
  1134. *
  1135. * Converts 32bit lower physical addr into a virt address.
  1136. */
  1137. void *
  1138. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1139. {
  1140. if (!phys_addr)
  1141. return NULL;
  1142. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1143. }
  1144. /**
  1145. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1146. * @ioc: per adapter object
  1147. * @cb_idx: callback index
  1148. *
  1149. * Returns smid (zero is invalid)
  1150. */
  1151. u16
  1152. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1153. {
  1154. unsigned long flags;
  1155. struct request_tracker *request;
  1156. u16 smid;
  1157. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1158. if (list_empty(&ioc->internal_free_list)) {
  1159. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1160. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1161. ioc->name, __func__);
  1162. return 0;
  1163. }
  1164. request = list_entry(ioc->internal_free_list.next,
  1165. struct request_tracker, tracker_list);
  1166. request->cb_idx = cb_idx;
  1167. smid = request->smid;
  1168. list_del(&request->tracker_list);
  1169. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1170. return smid;
  1171. }
  1172. /**
  1173. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1174. * @ioc: per adapter object
  1175. * @cb_idx: callback index
  1176. * @scmd: pointer to scsi command object
  1177. *
  1178. * Returns smid (zero is invalid)
  1179. */
  1180. u16
  1181. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1182. struct scsi_cmnd *scmd)
  1183. {
  1184. unsigned long flags;
  1185. struct request_tracker *request;
  1186. u16 smid;
  1187. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1188. if (list_empty(&ioc->free_list)) {
  1189. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1190. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1191. ioc->name, __func__);
  1192. return 0;
  1193. }
  1194. request = list_entry(ioc->free_list.next,
  1195. struct request_tracker, tracker_list);
  1196. request->scmd = scmd;
  1197. request->cb_idx = cb_idx;
  1198. smid = request->smid;
  1199. list_del(&request->tracker_list);
  1200. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1201. return smid;
  1202. }
  1203. /**
  1204. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1205. * @ioc: per adapter object
  1206. * @cb_idx: callback index
  1207. *
  1208. * Returns smid (zero is invalid)
  1209. */
  1210. u16
  1211. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1212. {
  1213. unsigned long flags;
  1214. struct request_tracker *request;
  1215. u16 smid;
  1216. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1217. if (list_empty(&ioc->hpr_free_list)) {
  1218. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1219. return 0;
  1220. }
  1221. request = list_entry(ioc->hpr_free_list.next,
  1222. struct request_tracker, tracker_list);
  1223. request->cb_idx = cb_idx;
  1224. smid = request->smid;
  1225. list_del(&request->tracker_list);
  1226. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1227. return smid;
  1228. }
  1229. /**
  1230. * mpt2sas_base_free_smid - put smid back on free_list
  1231. * @ioc: per adapter object
  1232. * @smid: system request message index
  1233. *
  1234. * Return nothing.
  1235. */
  1236. void
  1237. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1238. {
  1239. unsigned long flags;
  1240. int i;
  1241. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1242. if (smid >= ioc->hi_priority_smid) {
  1243. if (smid < ioc->internal_smid) {
  1244. /* hi-priority */
  1245. i = smid - ioc->hi_priority_smid;
  1246. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1247. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1248. &ioc->hpr_free_list);
  1249. } else {
  1250. /* internal queue */
  1251. i = smid - ioc->internal_smid;
  1252. ioc->internal_lookup[i].cb_idx = 0xFF;
  1253. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1254. &ioc->internal_free_list);
  1255. }
  1256. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1257. return;
  1258. }
  1259. /* scsiio queue */
  1260. i = smid - 1;
  1261. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1262. ioc->scsi_lookup[i].scmd = NULL;
  1263. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1264. &ioc->free_list);
  1265. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1266. /*
  1267. * See _wait_for_commands_to_complete() call with regards to this code.
  1268. */
  1269. if (ioc->shost_recovery && ioc->pending_io_count) {
  1270. if (ioc->pending_io_count == 1)
  1271. wake_up(&ioc->reset_wq);
  1272. ioc->pending_io_count--;
  1273. }
  1274. }
  1275. /**
  1276. * _base_writeq - 64 bit write to MMIO
  1277. * @ioc: per adapter object
  1278. * @b: data payload
  1279. * @addr: address in MMIO space
  1280. * @writeq_lock: spin lock
  1281. *
  1282. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1283. * care of 32 bit environment where its not quarenteed to send the entire word
  1284. * in one transfer.
  1285. */
  1286. #ifndef writeq
  1287. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1288. spinlock_t *writeq_lock)
  1289. {
  1290. unsigned long flags;
  1291. __u64 data_out = cpu_to_le64(b);
  1292. spin_lock_irqsave(writeq_lock, flags);
  1293. writel((u32)(data_out), addr);
  1294. writel((u32)(data_out >> 32), (addr + 4));
  1295. spin_unlock_irqrestore(writeq_lock, flags);
  1296. }
  1297. #else
  1298. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1299. spinlock_t *writeq_lock)
  1300. {
  1301. writeq(cpu_to_le64(b), addr);
  1302. }
  1303. #endif
  1304. /**
  1305. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1306. * @ioc: per adapter object
  1307. * @smid: system request message index
  1308. * @handle: device handle
  1309. *
  1310. * Return nothing.
  1311. */
  1312. void
  1313. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1314. {
  1315. Mpi2RequestDescriptorUnion_t descriptor;
  1316. u64 *request = (u64 *)&descriptor;
  1317. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1318. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1319. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1320. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1321. descriptor.SCSIIO.LMID = 0;
  1322. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1323. &ioc->scsi_lookup_lock);
  1324. }
  1325. /**
  1326. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1327. * @ioc: per adapter object
  1328. * @smid: system request message index
  1329. *
  1330. * Return nothing.
  1331. */
  1332. void
  1333. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1334. {
  1335. Mpi2RequestDescriptorUnion_t descriptor;
  1336. u64 *request = (u64 *)&descriptor;
  1337. descriptor.HighPriority.RequestFlags =
  1338. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1339. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1340. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1341. descriptor.HighPriority.LMID = 0;
  1342. descriptor.HighPriority.Reserved1 = 0;
  1343. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1344. &ioc->scsi_lookup_lock);
  1345. }
  1346. /**
  1347. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1348. * @ioc: per adapter object
  1349. * @smid: system request message index
  1350. *
  1351. * Return nothing.
  1352. */
  1353. void
  1354. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1355. {
  1356. Mpi2RequestDescriptorUnion_t descriptor;
  1357. u64 *request = (u64 *)&descriptor;
  1358. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1359. descriptor.Default.MSIxIndex = 0; /* TODO */
  1360. descriptor.Default.SMID = cpu_to_le16(smid);
  1361. descriptor.Default.LMID = 0;
  1362. descriptor.Default.DescriptorTypeDependent = 0;
  1363. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1364. &ioc->scsi_lookup_lock);
  1365. }
  1366. /**
  1367. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1368. * @ioc: per adapter object
  1369. * @smid: system request message index
  1370. * @io_index: value used to track the IO
  1371. *
  1372. * Return nothing.
  1373. */
  1374. void
  1375. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1376. u16 io_index)
  1377. {
  1378. Mpi2RequestDescriptorUnion_t descriptor;
  1379. u64 *request = (u64 *)&descriptor;
  1380. descriptor.SCSITarget.RequestFlags =
  1381. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1382. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1383. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1384. descriptor.SCSITarget.LMID = 0;
  1385. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1386. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1387. &ioc->scsi_lookup_lock);
  1388. }
  1389. /**
  1390. * _base_display_dell_branding - Disply branding string
  1391. * @ioc: per adapter object
  1392. *
  1393. * Return nothing.
  1394. */
  1395. static void
  1396. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1397. {
  1398. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1399. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1400. return;
  1401. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1402. switch (ioc->pdev->subsystem_device) {
  1403. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1404. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1405. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1406. break;
  1407. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1408. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1409. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1410. break;
  1411. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1412. strncpy(dell_branding,
  1413. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1414. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1415. break;
  1416. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1417. strncpy(dell_branding,
  1418. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1419. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1420. break;
  1421. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1422. strncpy(dell_branding,
  1423. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1424. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1425. break;
  1426. case MPT2SAS_DELL_PERC_H200_SSDID:
  1427. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1428. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1429. break;
  1430. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1431. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1432. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1433. break;
  1434. default:
  1435. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1436. break;
  1437. }
  1438. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1439. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1440. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1441. ioc->pdev->subsystem_device);
  1442. }
  1443. /**
  1444. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1445. * @ioc: per adapter object
  1446. *
  1447. * Return nothing.
  1448. */
  1449. static void
  1450. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1451. {
  1452. int i = 0;
  1453. char desc[16];
  1454. u8 revision;
  1455. u32 iounit_pg1_flags;
  1456. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1457. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1458. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1459. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1460. ioc->name, desc,
  1461. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1462. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1463. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1464. ioc->facts.FWVersion.Word & 0x000000FF,
  1465. revision,
  1466. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1467. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1468. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1469. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1470. _base_display_dell_branding(ioc);
  1471. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1472. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1473. printk("Initiator");
  1474. i++;
  1475. }
  1476. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1477. printk("%sTarget", i ? "," : "");
  1478. i++;
  1479. }
  1480. i = 0;
  1481. printk("), ");
  1482. printk("Capabilities=(");
  1483. if (ioc->facts.IOCCapabilities &
  1484. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1485. printk("Raid");
  1486. i++;
  1487. }
  1488. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1489. printk("%sTLR", i ? "," : "");
  1490. i++;
  1491. }
  1492. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1493. printk("%sMulticast", i ? "," : "");
  1494. i++;
  1495. }
  1496. if (ioc->facts.IOCCapabilities &
  1497. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1498. printk("%sBIDI Target", i ? "," : "");
  1499. i++;
  1500. }
  1501. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1502. printk("%sEEDP", i ? "," : "");
  1503. i++;
  1504. }
  1505. if (ioc->facts.IOCCapabilities &
  1506. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1507. printk("%sSnapshot Buffer", i ? "," : "");
  1508. i++;
  1509. }
  1510. if (ioc->facts.IOCCapabilities &
  1511. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1512. printk("%sDiag Trace Buffer", i ? "," : "");
  1513. i++;
  1514. }
  1515. if (ioc->facts.IOCCapabilities &
  1516. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1517. printk("%sTask Set Full", i ? "," : "");
  1518. i++;
  1519. }
  1520. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1521. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1522. printk("%sNCQ", i ? "," : "");
  1523. i++;
  1524. }
  1525. printk(")\n");
  1526. }
  1527. /**
  1528. * _base_static_config_pages - static start of day config pages
  1529. * @ioc: per adapter object
  1530. *
  1531. * Return nothing.
  1532. */
  1533. static void
  1534. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1535. {
  1536. Mpi2ConfigReply_t mpi_reply;
  1537. u32 iounit_pg1_flags;
  1538. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1539. if (ioc->ir_firmware)
  1540. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1541. &ioc->manu_pg10);
  1542. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1543. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1544. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1545. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1546. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1547. _base_display_ioc_capabilities(ioc);
  1548. /*
  1549. * Enable task_set_full handling in iounit_pg1 when the
  1550. * facts capabilities indicate that its supported.
  1551. */
  1552. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1553. if ((ioc->facts.IOCCapabilities &
  1554. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1555. iounit_pg1_flags &=
  1556. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1557. else
  1558. iounit_pg1_flags |=
  1559. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1560. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1561. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1562. }
  1563. /**
  1564. * _base_release_memory_pools - release memory
  1565. * @ioc: per adapter object
  1566. *
  1567. * Free memory allocated from _base_allocate_memory_pools.
  1568. *
  1569. * Return nothing.
  1570. */
  1571. static void
  1572. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1573. {
  1574. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1575. __func__));
  1576. if (ioc->request) {
  1577. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1578. ioc->request, ioc->request_dma);
  1579. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1580. ": free\n", ioc->name, ioc->request));
  1581. ioc->request = NULL;
  1582. }
  1583. if (ioc->sense) {
  1584. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1585. if (ioc->sense_dma_pool)
  1586. pci_pool_destroy(ioc->sense_dma_pool);
  1587. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1588. ": free\n", ioc->name, ioc->sense));
  1589. ioc->sense = NULL;
  1590. }
  1591. if (ioc->reply) {
  1592. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1593. if (ioc->reply_dma_pool)
  1594. pci_pool_destroy(ioc->reply_dma_pool);
  1595. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1596. ": free\n", ioc->name, ioc->reply));
  1597. ioc->reply = NULL;
  1598. }
  1599. if (ioc->reply_free) {
  1600. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1601. ioc->reply_free_dma);
  1602. if (ioc->reply_free_dma_pool)
  1603. pci_pool_destroy(ioc->reply_free_dma_pool);
  1604. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1605. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1606. ioc->reply_free = NULL;
  1607. }
  1608. if (ioc->reply_post_free) {
  1609. pci_pool_free(ioc->reply_post_free_dma_pool,
  1610. ioc->reply_post_free, ioc->reply_post_free_dma);
  1611. if (ioc->reply_post_free_dma_pool)
  1612. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1613. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1614. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1615. ioc->reply_post_free));
  1616. ioc->reply_post_free = NULL;
  1617. }
  1618. if (ioc->config_page) {
  1619. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1620. "config_page(0x%p): free\n", ioc->name,
  1621. ioc->config_page));
  1622. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1623. ioc->config_page, ioc->config_page_dma);
  1624. }
  1625. kfree(ioc->scsi_lookup);
  1626. kfree(ioc->hpr_lookup);
  1627. kfree(ioc->internal_lookup);
  1628. }
  1629. /**
  1630. * _base_allocate_memory_pools - allocate start of day memory pools
  1631. * @ioc: per adapter object
  1632. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1633. *
  1634. * Returns 0 success, anything else error
  1635. */
  1636. static int
  1637. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1638. {
  1639. Mpi2IOCFactsReply_t *facts;
  1640. u32 queue_size, queue_diff;
  1641. u16 max_sge_elements;
  1642. u16 num_of_reply_frames;
  1643. u16 chains_needed_per_io;
  1644. u32 sz, total_sz;
  1645. u32 retry_sz;
  1646. u16 max_request_credit;
  1647. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1648. __func__));
  1649. retry_sz = 0;
  1650. facts = &ioc->facts;
  1651. /* command line tunables for max sgl entries */
  1652. if (max_sgl_entries != -1) {
  1653. ioc->shost->sg_tablesize = (max_sgl_entries <
  1654. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1655. MPT2SAS_SG_DEPTH;
  1656. } else {
  1657. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1658. }
  1659. /* command line tunables for max controller queue depth */
  1660. if (max_queue_depth != -1) {
  1661. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1662. ? max_queue_depth : facts->RequestCredit;
  1663. } else {
  1664. max_request_credit = (facts->RequestCredit >
  1665. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1666. facts->RequestCredit;
  1667. }
  1668. ioc->hba_queue_depth = max_request_credit;
  1669. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1670. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1671. /* request frame size */
  1672. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1673. /* reply frame size */
  1674. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1675. retry_allocation:
  1676. total_sz = 0;
  1677. /* calculate number of sg elements left over in the 1st frame */
  1678. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1679. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1680. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1681. /* now do the same for a chain buffer */
  1682. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1683. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1684. ioc->chain_offset_value_for_main_message =
  1685. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1686. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1687. /*
  1688. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1689. */
  1690. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1691. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1692. + 1;
  1693. if (chains_needed_per_io > facts->MaxChainDepth) {
  1694. chains_needed_per_io = facts->MaxChainDepth;
  1695. ioc->shost->sg_tablesize = min_t(u16,
  1696. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1697. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1698. }
  1699. ioc->chains_needed_per_io = chains_needed_per_io;
  1700. /* reply free queue sizing - taking into account for events */
  1701. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1702. /* number of replies frames can't be a multiple of 16 */
  1703. /* decrease number of reply frames by 1 */
  1704. if (!(num_of_reply_frames % 16))
  1705. num_of_reply_frames--;
  1706. /* calculate number of reply free queue entries
  1707. * (must be multiple of 16)
  1708. */
  1709. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1710. queue_size = num_of_reply_frames;
  1711. queue_size += 16 - (queue_size % 16);
  1712. ioc->reply_free_queue_depth = queue_size;
  1713. /* reply descriptor post queue sizing */
  1714. /* this size should be the number of request frames + number of reply
  1715. * frames
  1716. */
  1717. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1718. /* round up to 16 byte boundary */
  1719. if (queue_size % 16)
  1720. queue_size += 16 - (queue_size % 16);
  1721. /* check against IOC maximum reply post queue depth */
  1722. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1723. queue_diff = queue_size -
  1724. facts->MaxReplyDescriptorPostQueueDepth;
  1725. /* round queue_diff up to multiple of 16 */
  1726. if (queue_diff % 16)
  1727. queue_diff += 16 - (queue_diff % 16);
  1728. /* adjust hba_queue_depth, reply_free_queue_depth,
  1729. * and queue_size
  1730. */
  1731. ioc->hba_queue_depth -= queue_diff;
  1732. ioc->reply_free_queue_depth -= queue_diff;
  1733. queue_size -= queue_diff;
  1734. }
  1735. ioc->reply_post_queue_depth = queue_size;
  1736. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1737. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1738. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1739. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1740. ioc->chains_needed_per_io));
  1741. ioc->scsiio_depth = ioc->hba_queue_depth -
  1742. ioc->hi_priority_depth - ioc->internal_depth;
  1743. /* set the scsi host can_queue depth
  1744. * with some internal commands that could be outstanding
  1745. */
  1746. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  1747. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  1748. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  1749. /* contiguous pool for request and chains, 16 byte align, one extra "
  1750. * "frame for smid=0
  1751. */
  1752. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  1753. sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1754. /* hi-priority queue */
  1755. sz += (ioc->hi_priority_depth * ioc->request_sz);
  1756. /* internal queue */
  1757. sz += (ioc->internal_depth * ioc->request_sz);
  1758. ioc->request_dma_sz = sz;
  1759. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1760. if (!ioc->request) {
  1761. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1762. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1763. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  1764. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1765. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1766. goto out;
  1767. retry_sz += 64;
  1768. ioc->hba_queue_depth = max_request_credit - retry_sz;
  1769. goto retry_allocation;
  1770. }
  1771. if (retry_sz)
  1772. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1773. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1774. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  1775. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1776. /* hi-priority queue */
  1777. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  1778. ioc->request_sz);
  1779. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  1780. ioc->request_sz);
  1781. /* internal queue */
  1782. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  1783. ioc->request_sz);
  1784. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  1785. ioc->request_sz);
  1786. ioc->chain = ioc->internal + (ioc->internal_depth *
  1787. ioc->request_sz);
  1788. ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
  1789. ioc->request_sz);
  1790. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1791. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1792. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  1793. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  1794. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1795. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1796. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1797. ioc->request_sz))/1024));
  1798. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1799. ioc->name, (unsigned long long) ioc->request_dma));
  1800. total_sz += sz;
  1801. ioc->scsi_lookup = kcalloc(ioc->scsiio_depth,
  1802. sizeof(struct request_tracker), GFP_KERNEL);
  1803. if (!ioc->scsi_lookup) {
  1804. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1805. ioc->name);
  1806. goto out;
  1807. }
  1808. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  1809. "depth(%d)\n", ioc->name, ioc->request,
  1810. ioc->scsiio_depth));
  1811. /* initialize hi-priority queue smid's */
  1812. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  1813. sizeof(struct request_tracker), GFP_KERNEL);
  1814. if (!ioc->hpr_lookup) {
  1815. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  1816. ioc->name);
  1817. goto out;
  1818. }
  1819. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  1820. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  1821. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  1822. ioc->hi_priority_depth, ioc->hi_priority_smid));
  1823. /* initialize internal queue smid's */
  1824. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  1825. sizeof(struct request_tracker), GFP_KERNEL);
  1826. if (!ioc->internal_lookup) {
  1827. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  1828. ioc->name);
  1829. goto out;
  1830. }
  1831. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  1832. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  1833. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  1834. ioc->internal_depth, ioc->internal_smid));
  1835. /* sense buffers, 4 byte align */
  1836. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  1837. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1838. 0);
  1839. if (!ioc->sense_dma_pool) {
  1840. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1841. ioc->name);
  1842. goto out;
  1843. }
  1844. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1845. &ioc->sense_dma);
  1846. if (!ioc->sense) {
  1847. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1848. ioc->name);
  1849. goto out;
  1850. }
  1851. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1852. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1853. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  1854. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1855. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1856. ioc->name, (unsigned long long)ioc->sense_dma));
  1857. total_sz += sz;
  1858. /* reply pool, 4 byte align */
  1859. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1860. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1861. 0);
  1862. if (!ioc->reply_dma_pool) {
  1863. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1864. ioc->name);
  1865. goto out;
  1866. }
  1867. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1868. &ioc->reply_dma);
  1869. if (!ioc->reply) {
  1870. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1871. ioc->name);
  1872. goto out;
  1873. }
  1874. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1875. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1876. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1877. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1878. ioc->name, (unsigned long long)ioc->reply_dma));
  1879. total_sz += sz;
  1880. /* reply free queue, 16 byte align */
  1881. sz = ioc->reply_free_queue_depth * 4;
  1882. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1883. ioc->pdev, sz, 16, 0);
  1884. if (!ioc->reply_free_dma_pool) {
  1885. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1886. "failed\n", ioc->name);
  1887. goto out;
  1888. }
  1889. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1890. &ioc->reply_free_dma);
  1891. if (!ioc->reply_free) {
  1892. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1893. "failed\n", ioc->name);
  1894. goto out;
  1895. }
  1896. memset(ioc->reply_free, 0, sz);
  1897. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1898. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1899. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1900. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1901. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1902. total_sz += sz;
  1903. /* reply post queue, 16 byte align */
  1904. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1905. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1906. ioc->pdev, sz, 16, 0);
  1907. if (!ioc->reply_post_free_dma_pool) {
  1908. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1909. "failed\n", ioc->name);
  1910. goto out;
  1911. }
  1912. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1913. GFP_KERNEL, &ioc->reply_post_free_dma);
  1914. if (!ioc->reply_post_free) {
  1915. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1916. "failed\n", ioc->name);
  1917. goto out;
  1918. }
  1919. memset(ioc->reply_post_free, 0, sz);
  1920. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1921. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1922. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1923. sz/1024));
  1924. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1925. "(0x%llx)\n", ioc->name, (unsigned long long)
  1926. ioc->reply_post_free_dma));
  1927. total_sz += sz;
  1928. ioc->config_page_sz = 512;
  1929. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1930. ioc->config_page_sz, &ioc->config_page_dma);
  1931. if (!ioc->config_page) {
  1932. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1933. "failed\n", ioc->name);
  1934. goto out;
  1935. }
  1936. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1937. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1938. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1939. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1940. total_sz += ioc->config_page_sz;
  1941. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1942. ioc->name, total_sz/1024);
  1943. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1944. "Max Controller Queue Depth(%d)\n",
  1945. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1946. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1947. ioc->name, ioc->shost->sg_tablesize);
  1948. return 0;
  1949. out:
  1950. _base_release_memory_pools(ioc);
  1951. return -ENOMEM;
  1952. }
  1953. /**
  1954. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1955. * @ioc: Pointer to MPT_ADAPTER structure
  1956. * @cooked: Request raw or cooked IOC state
  1957. *
  1958. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1959. * Doorbell bits in MPI_IOC_STATE_MASK.
  1960. */
  1961. u32
  1962. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1963. {
  1964. u32 s, sc;
  1965. s = readl(&ioc->chip->Doorbell);
  1966. sc = s & MPI2_IOC_STATE_MASK;
  1967. return cooked ? sc : s;
  1968. }
  1969. /**
  1970. * _base_wait_on_iocstate - waiting on a particular ioc state
  1971. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1972. * @timeout: timeout in second
  1973. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1974. *
  1975. * Returns 0 for success, non-zero for failure.
  1976. */
  1977. static int
  1978. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1979. int sleep_flag)
  1980. {
  1981. u32 count, cntdn;
  1982. u32 current_state;
  1983. count = 0;
  1984. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1985. do {
  1986. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1987. if (current_state == ioc_state)
  1988. return 0;
  1989. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1990. break;
  1991. if (sleep_flag == CAN_SLEEP)
  1992. msleep(1);
  1993. else
  1994. udelay(500);
  1995. count++;
  1996. } while (--cntdn);
  1997. return current_state;
  1998. }
  1999. /**
  2000. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2001. * a write to the doorbell)
  2002. * @ioc: per adapter object
  2003. * @timeout: timeout in second
  2004. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2005. *
  2006. * Returns 0 for success, non-zero for failure.
  2007. *
  2008. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2009. */
  2010. static int
  2011. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2012. int sleep_flag)
  2013. {
  2014. u32 cntdn, count;
  2015. u32 int_status;
  2016. count = 0;
  2017. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2018. do {
  2019. int_status = readl(&ioc->chip->HostInterruptStatus);
  2020. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2021. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2022. "successfull count(%d), timeout(%d)\n", ioc->name,
  2023. __func__, count, timeout));
  2024. return 0;
  2025. }
  2026. if (sleep_flag == CAN_SLEEP)
  2027. msleep(1);
  2028. else
  2029. udelay(500);
  2030. count++;
  2031. } while (--cntdn);
  2032. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2033. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2034. return -EFAULT;
  2035. }
  2036. /**
  2037. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2038. * @ioc: per adapter object
  2039. * @timeout: timeout in second
  2040. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2041. *
  2042. * Returns 0 for success, non-zero for failure.
  2043. *
  2044. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2045. * doorbell.
  2046. */
  2047. static int
  2048. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2049. int sleep_flag)
  2050. {
  2051. u32 cntdn, count;
  2052. u32 int_status;
  2053. u32 doorbell;
  2054. count = 0;
  2055. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2056. do {
  2057. int_status = readl(&ioc->chip->HostInterruptStatus);
  2058. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2059. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2060. "successfull count(%d), timeout(%d)\n", ioc->name,
  2061. __func__, count, timeout));
  2062. return 0;
  2063. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2064. doorbell = readl(&ioc->chip->Doorbell);
  2065. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2066. MPI2_IOC_STATE_FAULT) {
  2067. mpt2sas_base_fault_info(ioc , doorbell);
  2068. return -EFAULT;
  2069. }
  2070. } else if (int_status == 0xFFFFFFFF)
  2071. goto out;
  2072. if (sleep_flag == CAN_SLEEP)
  2073. msleep(1);
  2074. else
  2075. udelay(500);
  2076. count++;
  2077. } while (--cntdn);
  2078. out:
  2079. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2080. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2081. return -EFAULT;
  2082. }
  2083. /**
  2084. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2085. * @ioc: per adapter object
  2086. * @timeout: timeout in second
  2087. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2088. *
  2089. * Returns 0 for success, non-zero for failure.
  2090. *
  2091. */
  2092. static int
  2093. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2094. int sleep_flag)
  2095. {
  2096. u32 cntdn, count;
  2097. u32 doorbell_reg;
  2098. count = 0;
  2099. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2100. do {
  2101. doorbell_reg = readl(&ioc->chip->Doorbell);
  2102. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2103. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2104. "successfull count(%d), timeout(%d)\n", ioc->name,
  2105. __func__, count, timeout));
  2106. return 0;
  2107. }
  2108. if (sleep_flag == CAN_SLEEP)
  2109. msleep(1);
  2110. else
  2111. udelay(500);
  2112. count++;
  2113. } while (--cntdn);
  2114. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2115. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2116. return -EFAULT;
  2117. }
  2118. /**
  2119. * _base_send_ioc_reset - send doorbell reset
  2120. * @ioc: per adapter object
  2121. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2122. * @timeout: timeout in second
  2123. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2124. *
  2125. * Returns 0 for success, non-zero for failure.
  2126. */
  2127. static int
  2128. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2129. int sleep_flag)
  2130. {
  2131. u32 ioc_state;
  2132. int r = 0;
  2133. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2134. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2135. ioc->name, __func__);
  2136. return -EFAULT;
  2137. }
  2138. if (!(ioc->facts.IOCCapabilities &
  2139. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2140. return -EFAULT;
  2141. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2142. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2143. &ioc->chip->Doorbell);
  2144. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2145. r = -EFAULT;
  2146. goto out;
  2147. }
  2148. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2149. timeout, sleep_flag);
  2150. if (ioc_state) {
  2151. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2152. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2153. r = -EFAULT;
  2154. goto out;
  2155. }
  2156. out:
  2157. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2158. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2159. return r;
  2160. }
  2161. /**
  2162. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2163. * @ioc: per adapter object
  2164. * @request_bytes: request length
  2165. * @request: pointer having request payload
  2166. * @reply_bytes: reply length
  2167. * @reply: pointer to reply payload
  2168. * @timeout: timeout in second
  2169. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2170. *
  2171. * Returns 0 for success, non-zero for failure.
  2172. */
  2173. static int
  2174. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2175. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2176. {
  2177. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2178. int i;
  2179. u8 failed;
  2180. u16 dummy;
  2181. u32 *mfp;
  2182. /* make sure doorbell is not in use */
  2183. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2184. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2185. " (line=%d)\n", ioc->name, __LINE__);
  2186. return -EFAULT;
  2187. }
  2188. /* clear pending doorbell interrupts from previous state changes */
  2189. if (readl(&ioc->chip->HostInterruptStatus) &
  2190. MPI2_HIS_IOC2SYS_DB_STATUS)
  2191. writel(0, &ioc->chip->HostInterruptStatus);
  2192. /* send message to ioc */
  2193. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2194. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2195. &ioc->chip->Doorbell);
  2196. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2197. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2198. "int failed (line=%d)\n", ioc->name, __LINE__);
  2199. return -EFAULT;
  2200. }
  2201. writel(0, &ioc->chip->HostInterruptStatus);
  2202. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2203. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2204. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2205. return -EFAULT;
  2206. }
  2207. /* send message 32-bits at a time */
  2208. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2209. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2210. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2211. failed = 1;
  2212. }
  2213. if (failed) {
  2214. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2215. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2216. return -EFAULT;
  2217. }
  2218. /* now wait for the reply */
  2219. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2220. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2221. "int failed (line=%d)\n", ioc->name, __LINE__);
  2222. return -EFAULT;
  2223. }
  2224. /* read the first two 16-bits, it gives the total length of the reply */
  2225. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2226. & MPI2_DOORBELL_DATA_MASK);
  2227. writel(0, &ioc->chip->HostInterruptStatus);
  2228. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2229. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2230. "int failed (line=%d)\n", ioc->name, __LINE__);
  2231. return -EFAULT;
  2232. }
  2233. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2234. & MPI2_DOORBELL_DATA_MASK);
  2235. writel(0, &ioc->chip->HostInterruptStatus);
  2236. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2237. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2238. printk(MPT2SAS_ERR_FMT "doorbell "
  2239. "handshake int failed (line=%d)\n", ioc->name,
  2240. __LINE__);
  2241. return -EFAULT;
  2242. }
  2243. if (i >= reply_bytes/2) /* overflow case */
  2244. dummy = readl(&ioc->chip->Doorbell);
  2245. else
  2246. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2247. & MPI2_DOORBELL_DATA_MASK);
  2248. writel(0, &ioc->chip->HostInterruptStatus);
  2249. }
  2250. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2251. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2252. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2253. " (line=%d)\n", ioc->name, __LINE__));
  2254. }
  2255. writel(0, &ioc->chip->HostInterruptStatus);
  2256. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2257. mfp = (u32 *)reply;
  2258. printk(KERN_DEBUG "\toffset:data\n");
  2259. for (i = 0; i < reply_bytes/4; i++)
  2260. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2261. le32_to_cpu(mfp[i]));
  2262. }
  2263. return 0;
  2264. }
  2265. /**
  2266. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2267. * @ioc: per adapter object
  2268. * @mpi_reply: the reply payload from FW
  2269. * @mpi_request: the request payload sent to FW
  2270. *
  2271. * The SAS IO Unit Control Request message allows the host to perform low-level
  2272. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2273. * to obtain the IOC assigned device handles for a device if it has other
  2274. * identifying information about the device, in addition allows the host to
  2275. * remove IOC resources associated with the device.
  2276. *
  2277. * Returns 0 for success, non-zero for failure.
  2278. */
  2279. int
  2280. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2281. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2282. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2283. {
  2284. u16 smid;
  2285. u32 ioc_state;
  2286. unsigned long timeleft;
  2287. u8 issue_reset;
  2288. int rc;
  2289. void *request;
  2290. u16 wait_state_count;
  2291. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2292. __func__));
  2293. mutex_lock(&ioc->base_cmds.mutex);
  2294. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2295. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2296. ioc->name, __func__);
  2297. rc = -EAGAIN;
  2298. goto out;
  2299. }
  2300. wait_state_count = 0;
  2301. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2302. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2303. if (wait_state_count++ == 10) {
  2304. printk(MPT2SAS_ERR_FMT
  2305. "%s: failed due to ioc not operational\n",
  2306. ioc->name, __func__);
  2307. rc = -EFAULT;
  2308. goto out;
  2309. }
  2310. ssleep(1);
  2311. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2312. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2313. "operational state(count=%d)\n", ioc->name,
  2314. __func__, wait_state_count);
  2315. }
  2316. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2317. if (!smid) {
  2318. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2319. ioc->name, __func__);
  2320. rc = -EAGAIN;
  2321. goto out;
  2322. }
  2323. rc = 0;
  2324. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2325. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2326. ioc->base_cmds.smid = smid;
  2327. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2328. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2329. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2330. ioc->ioc_link_reset_in_progress = 1;
  2331. mpt2sas_base_put_smid_default(ioc, smid);
  2332. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2333. msecs_to_jiffies(10000));
  2334. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2335. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2336. ioc->ioc_link_reset_in_progress)
  2337. ioc->ioc_link_reset_in_progress = 0;
  2338. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2339. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2340. ioc->name, __func__);
  2341. _debug_dump_mf(mpi_request,
  2342. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2343. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2344. issue_reset = 1;
  2345. goto issue_host_reset;
  2346. }
  2347. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2348. memcpy(mpi_reply, ioc->base_cmds.reply,
  2349. sizeof(Mpi2SasIoUnitControlReply_t));
  2350. else
  2351. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2352. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2353. goto out;
  2354. issue_host_reset:
  2355. if (issue_reset)
  2356. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2357. FORCE_BIG_HAMMER);
  2358. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2359. rc = -EFAULT;
  2360. out:
  2361. mutex_unlock(&ioc->base_cmds.mutex);
  2362. return rc;
  2363. }
  2364. /**
  2365. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2366. * @ioc: per adapter object
  2367. * @mpi_reply: the reply payload from FW
  2368. * @mpi_request: the request payload sent to FW
  2369. *
  2370. * The SCSI Enclosure Processor request message causes the IOC to
  2371. * communicate with SES devices to control LED status signals.
  2372. *
  2373. * Returns 0 for success, non-zero for failure.
  2374. */
  2375. int
  2376. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2377. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2378. {
  2379. u16 smid;
  2380. u32 ioc_state;
  2381. unsigned long timeleft;
  2382. u8 issue_reset;
  2383. int rc;
  2384. void *request;
  2385. u16 wait_state_count;
  2386. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2387. __func__));
  2388. mutex_lock(&ioc->base_cmds.mutex);
  2389. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2390. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2391. ioc->name, __func__);
  2392. rc = -EAGAIN;
  2393. goto out;
  2394. }
  2395. wait_state_count = 0;
  2396. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2397. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2398. if (wait_state_count++ == 10) {
  2399. printk(MPT2SAS_ERR_FMT
  2400. "%s: failed due to ioc not operational\n",
  2401. ioc->name, __func__);
  2402. rc = -EFAULT;
  2403. goto out;
  2404. }
  2405. ssleep(1);
  2406. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2407. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2408. "operational state(count=%d)\n", ioc->name,
  2409. __func__, wait_state_count);
  2410. }
  2411. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2412. if (!smid) {
  2413. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2414. ioc->name, __func__);
  2415. rc = -EAGAIN;
  2416. goto out;
  2417. }
  2418. rc = 0;
  2419. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2420. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2421. ioc->base_cmds.smid = smid;
  2422. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2423. mpt2sas_base_put_smid_default(ioc, smid);
  2424. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2425. msecs_to_jiffies(10000));
  2426. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2427. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2428. ioc->name, __func__);
  2429. _debug_dump_mf(mpi_request,
  2430. sizeof(Mpi2SepRequest_t)/4);
  2431. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2432. issue_reset = 1;
  2433. goto issue_host_reset;
  2434. }
  2435. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2436. memcpy(mpi_reply, ioc->base_cmds.reply,
  2437. sizeof(Mpi2SepReply_t));
  2438. else
  2439. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2440. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2441. goto out;
  2442. issue_host_reset:
  2443. if (issue_reset)
  2444. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2445. FORCE_BIG_HAMMER);
  2446. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2447. rc = -EFAULT;
  2448. out:
  2449. mutex_unlock(&ioc->base_cmds.mutex);
  2450. return rc;
  2451. }
  2452. /**
  2453. * _base_get_port_facts - obtain port facts reply and save in ioc
  2454. * @ioc: per adapter object
  2455. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2456. *
  2457. * Returns 0 for success, non-zero for failure.
  2458. */
  2459. static int
  2460. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2461. {
  2462. Mpi2PortFactsRequest_t mpi_request;
  2463. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2464. int mpi_reply_sz, mpi_request_sz, r;
  2465. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2466. __func__));
  2467. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2468. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2469. memset(&mpi_request, 0, mpi_request_sz);
  2470. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2471. mpi_request.PortNumber = port;
  2472. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2473. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2474. if (r != 0) {
  2475. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2476. ioc->name, __func__, r);
  2477. return r;
  2478. }
  2479. pfacts = &ioc->pfacts[port];
  2480. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2481. pfacts->PortNumber = mpi_reply.PortNumber;
  2482. pfacts->VP_ID = mpi_reply.VP_ID;
  2483. pfacts->VF_ID = mpi_reply.VF_ID;
  2484. pfacts->MaxPostedCmdBuffers =
  2485. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2486. return 0;
  2487. }
  2488. /**
  2489. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2490. * @ioc: per adapter object
  2491. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2492. *
  2493. * Returns 0 for success, non-zero for failure.
  2494. */
  2495. static int
  2496. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2497. {
  2498. Mpi2IOCFactsRequest_t mpi_request;
  2499. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2500. int mpi_reply_sz, mpi_request_sz, r;
  2501. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2502. __func__));
  2503. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2504. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2505. memset(&mpi_request, 0, mpi_request_sz);
  2506. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2507. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2508. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2509. if (r != 0) {
  2510. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2511. ioc->name, __func__, r);
  2512. return r;
  2513. }
  2514. facts = &ioc->facts;
  2515. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2516. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2517. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2518. facts->VP_ID = mpi_reply.VP_ID;
  2519. facts->VF_ID = mpi_reply.VF_ID;
  2520. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2521. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2522. facts->WhoInit = mpi_reply.WhoInit;
  2523. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2524. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2525. facts->MaxReplyDescriptorPostQueueDepth =
  2526. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2527. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2528. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2529. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2530. ioc->ir_firmware = 1;
  2531. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2532. facts->IOCRequestFrameSize =
  2533. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2534. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2535. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2536. ioc->shost->max_id = -1;
  2537. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2538. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2539. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2540. facts->HighPriorityCredit =
  2541. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2542. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2543. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2544. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2545. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2546. facts->MaxChainDepth));
  2547. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2548. "reply frame size(%d)\n", ioc->name,
  2549. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2550. return 0;
  2551. }
  2552. /**
  2553. * _base_send_ioc_init - send ioc_init to firmware
  2554. * @ioc: per adapter object
  2555. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2556. *
  2557. * Returns 0 for success, non-zero for failure.
  2558. */
  2559. static int
  2560. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2561. {
  2562. Mpi2IOCInitRequest_t mpi_request;
  2563. Mpi2IOCInitReply_t mpi_reply;
  2564. int r;
  2565. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2566. __func__));
  2567. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2568. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2569. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2570. mpi_request.VF_ID = 0; /* TODO */
  2571. mpi_request.VP_ID = 0;
  2572. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2573. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2574. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2575. * removed and made reserved. For those with older firmware will need
  2576. * this fix. It was decided that the Reply and Request frame sizes are
  2577. * the same.
  2578. */
  2579. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2580. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2581. /* mpi_request.SystemReplyFrameSize =
  2582. * cpu_to_le16(ioc->reply_sz);
  2583. */
  2584. }
  2585. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2586. mpi_request.ReplyDescriptorPostQueueDepth =
  2587. cpu_to_le16(ioc->reply_post_queue_depth);
  2588. mpi_request.ReplyFreeQueueDepth =
  2589. cpu_to_le16(ioc->reply_free_queue_depth);
  2590. #if BITS_PER_LONG > 32
  2591. mpi_request.SenseBufferAddressHigh =
  2592. cpu_to_le32(ioc->sense_dma >> 32);
  2593. mpi_request.SystemReplyAddressHigh =
  2594. cpu_to_le32(ioc->reply_dma >> 32);
  2595. mpi_request.SystemRequestFrameBaseAddress =
  2596. cpu_to_le64(ioc->request_dma);
  2597. mpi_request.ReplyFreeQueueAddress =
  2598. cpu_to_le64(ioc->reply_free_dma);
  2599. mpi_request.ReplyDescriptorPostQueueAddress =
  2600. cpu_to_le64(ioc->reply_post_free_dma);
  2601. #else
  2602. mpi_request.SystemRequestFrameBaseAddress =
  2603. cpu_to_le32(ioc->request_dma);
  2604. mpi_request.ReplyFreeQueueAddress =
  2605. cpu_to_le32(ioc->reply_free_dma);
  2606. mpi_request.ReplyDescriptorPostQueueAddress =
  2607. cpu_to_le32(ioc->reply_post_free_dma);
  2608. #endif
  2609. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2610. u32 *mfp;
  2611. int i;
  2612. mfp = (u32 *)&mpi_request;
  2613. printk(KERN_DEBUG "\toffset:data\n");
  2614. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2615. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2616. le32_to_cpu(mfp[i]));
  2617. }
  2618. r = _base_handshake_req_reply_wait(ioc,
  2619. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2620. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2621. sleep_flag);
  2622. if (r != 0) {
  2623. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2624. ioc->name, __func__, r);
  2625. return r;
  2626. }
  2627. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2628. mpi_reply.IOCLogInfo) {
  2629. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2630. r = -EIO;
  2631. }
  2632. return 0;
  2633. }
  2634. /**
  2635. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2636. * @ioc: per adapter object
  2637. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2638. *
  2639. * Returns 0 for success, non-zero for failure.
  2640. */
  2641. static int
  2642. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2643. {
  2644. Mpi2PortEnableRequest_t *mpi_request;
  2645. u32 ioc_state;
  2646. unsigned long timeleft;
  2647. int r = 0;
  2648. u16 smid;
  2649. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2650. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2651. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2652. ioc->name, __func__);
  2653. return -EAGAIN;
  2654. }
  2655. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2656. if (!smid) {
  2657. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2658. ioc->name, __func__);
  2659. return -EAGAIN;
  2660. }
  2661. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2662. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2663. ioc->base_cmds.smid = smid;
  2664. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2665. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2666. mpi_request->VF_ID = 0; /* TODO */
  2667. mpi_request->VP_ID = 0;
  2668. mpt2sas_base_put_smid_default(ioc, smid);
  2669. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2670. 300*HZ);
  2671. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2672. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2673. ioc->name, __func__);
  2674. _debug_dump_mf(mpi_request,
  2675. sizeof(Mpi2PortEnableRequest_t)/4);
  2676. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2677. r = -EFAULT;
  2678. else
  2679. r = -ETIME;
  2680. goto out;
  2681. } else
  2682. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2683. ioc->name, __func__));
  2684. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2685. 60, sleep_flag);
  2686. if (ioc_state) {
  2687. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2688. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2689. r = -EFAULT;
  2690. }
  2691. out:
  2692. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2693. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2694. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2695. return r;
  2696. }
  2697. /**
  2698. * _base_unmask_events - turn on notification for this event
  2699. * @ioc: per adapter object
  2700. * @event: firmware event
  2701. *
  2702. * The mask is stored in ioc->event_masks.
  2703. */
  2704. static void
  2705. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2706. {
  2707. u32 desired_event;
  2708. if (event >= 128)
  2709. return;
  2710. desired_event = (1 << (event % 32));
  2711. if (event < 32)
  2712. ioc->event_masks[0] &= ~desired_event;
  2713. else if (event < 64)
  2714. ioc->event_masks[1] &= ~desired_event;
  2715. else if (event < 96)
  2716. ioc->event_masks[2] &= ~desired_event;
  2717. else if (event < 128)
  2718. ioc->event_masks[3] &= ~desired_event;
  2719. }
  2720. /**
  2721. * _base_event_notification - send event notification
  2722. * @ioc: per adapter object
  2723. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2724. *
  2725. * Returns 0 for success, non-zero for failure.
  2726. */
  2727. static int
  2728. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2729. {
  2730. Mpi2EventNotificationRequest_t *mpi_request;
  2731. unsigned long timeleft;
  2732. u16 smid;
  2733. int r = 0;
  2734. int i;
  2735. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2736. __func__));
  2737. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2738. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2739. ioc->name, __func__);
  2740. return -EAGAIN;
  2741. }
  2742. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2743. if (!smid) {
  2744. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2745. ioc->name, __func__);
  2746. return -EAGAIN;
  2747. }
  2748. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2749. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2750. ioc->base_cmds.smid = smid;
  2751. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2752. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2753. mpi_request->VF_ID = 0; /* TODO */
  2754. mpi_request->VP_ID = 0;
  2755. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2756. mpi_request->EventMasks[i] =
  2757. le32_to_cpu(ioc->event_masks[i]);
  2758. mpt2sas_base_put_smid_default(ioc, smid);
  2759. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2760. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2761. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2762. ioc->name, __func__);
  2763. _debug_dump_mf(mpi_request,
  2764. sizeof(Mpi2EventNotificationRequest_t)/4);
  2765. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2766. r = -EFAULT;
  2767. else
  2768. r = -ETIME;
  2769. } else
  2770. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2771. ioc->name, __func__));
  2772. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2773. return r;
  2774. }
  2775. /**
  2776. * mpt2sas_base_validate_event_type - validating event types
  2777. * @ioc: per adapter object
  2778. * @event: firmware event
  2779. *
  2780. * This will turn on firmware event notification when application
  2781. * ask for that event. We don't mask events that are already enabled.
  2782. */
  2783. void
  2784. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2785. {
  2786. int i, j;
  2787. u32 event_mask, desired_event;
  2788. u8 send_update_to_fw;
  2789. for (i = 0, send_update_to_fw = 0; i <
  2790. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2791. event_mask = ~event_type[i];
  2792. desired_event = 1;
  2793. for (j = 0; j < 32; j++) {
  2794. if (!(event_mask & desired_event) &&
  2795. (ioc->event_masks[i] & desired_event)) {
  2796. ioc->event_masks[i] &= ~desired_event;
  2797. send_update_to_fw = 1;
  2798. }
  2799. desired_event = (desired_event << 1);
  2800. }
  2801. }
  2802. if (!send_update_to_fw)
  2803. return;
  2804. mutex_lock(&ioc->base_cmds.mutex);
  2805. _base_event_notification(ioc, CAN_SLEEP);
  2806. mutex_unlock(&ioc->base_cmds.mutex);
  2807. }
  2808. /**
  2809. * _base_diag_reset - the "big hammer" start of day reset
  2810. * @ioc: per adapter object
  2811. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2812. *
  2813. * Returns 0 for success, non-zero for failure.
  2814. */
  2815. static int
  2816. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2817. {
  2818. u32 host_diagnostic;
  2819. u32 ioc_state;
  2820. u32 count;
  2821. u32 hcb_size;
  2822. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2823. _base_save_msix_table(ioc);
  2824. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2825. ioc->name));
  2826. writel(0, &ioc->chip->HostInterruptStatus);
  2827. count = 0;
  2828. do {
  2829. /* Write magic sequence to WriteSequence register
  2830. * Loop until in diagnostic mode
  2831. */
  2832. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2833. "sequence\n", ioc->name));
  2834. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2835. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2836. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2837. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2838. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2839. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2840. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2841. /* wait 100 msec */
  2842. if (sleep_flag == CAN_SLEEP)
  2843. msleep(100);
  2844. else
  2845. mdelay(100);
  2846. if (count++ > 20)
  2847. goto out;
  2848. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2849. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2850. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2851. ioc->name, count, host_diagnostic));
  2852. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2853. hcb_size = readl(&ioc->chip->HCBSize);
  2854. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2855. ioc->name));
  2856. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2857. &ioc->chip->HostDiagnostic);
  2858. /* don't access any registers for 50 milliseconds */
  2859. msleep(50);
  2860. /* 300 second max wait */
  2861. for (count = 0; count < 3000000 ; count++) {
  2862. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2863. if (host_diagnostic == 0xFFFFFFFF)
  2864. goto out;
  2865. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2866. break;
  2867. /* wait 100 msec */
  2868. if (sleep_flag == CAN_SLEEP)
  2869. msleep(1);
  2870. else
  2871. mdelay(1);
  2872. }
  2873. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2874. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2875. "assuming the HCB Address points to good F/W\n",
  2876. ioc->name));
  2877. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2878. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2879. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2880. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2881. "re-enable the HCDW\n", ioc->name));
  2882. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2883. &ioc->chip->HCBSize);
  2884. }
  2885. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2886. ioc->name));
  2887. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2888. &ioc->chip->HostDiagnostic);
  2889. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2890. "diagnostic register\n", ioc->name));
  2891. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2892. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2893. "READY state\n", ioc->name));
  2894. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2895. sleep_flag);
  2896. if (ioc_state) {
  2897. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2898. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2899. goto out;
  2900. }
  2901. _base_restore_msix_table(ioc);
  2902. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2903. return 0;
  2904. out:
  2905. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2906. return -EFAULT;
  2907. }
  2908. /**
  2909. * _base_make_ioc_ready - put controller in READY state
  2910. * @ioc: per adapter object
  2911. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2912. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2913. *
  2914. * Returns 0 for success, non-zero for failure.
  2915. */
  2916. static int
  2917. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2918. enum reset_type type)
  2919. {
  2920. u32 ioc_state;
  2921. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2922. __func__));
  2923. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2924. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2925. ioc->name, __func__, ioc_state));
  2926. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2927. return 0;
  2928. if (ioc_state & MPI2_DOORBELL_USED) {
  2929. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2930. "active!\n", ioc->name));
  2931. goto issue_diag_reset;
  2932. }
  2933. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2934. mpt2sas_base_fault_info(ioc, ioc_state &
  2935. MPI2_DOORBELL_DATA_MASK);
  2936. goto issue_diag_reset;
  2937. }
  2938. if (type == FORCE_BIG_HAMMER)
  2939. goto issue_diag_reset;
  2940. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2941. if (!(_base_send_ioc_reset(ioc,
  2942. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2943. return 0;
  2944. issue_diag_reset:
  2945. return _base_diag_reset(ioc, CAN_SLEEP);
  2946. }
  2947. /**
  2948. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2949. * @ioc: per adapter object
  2950. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2951. *
  2952. * Returns 0 for success, non-zero for failure.
  2953. */
  2954. static int
  2955. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2956. {
  2957. int r, i;
  2958. unsigned long flags;
  2959. u32 reply_address;
  2960. u16 smid;
  2961. struct _tr_list *delayed_tr, *delayed_tr_next;
  2962. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2963. __func__));
  2964. /* clean the delayed target reset list */
  2965. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  2966. &ioc->delayed_tr_list, list) {
  2967. list_del(&delayed_tr->list);
  2968. kfree(delayed_tr);
  2969. }
  2970. /* initialize the scsi lookup free list */
  2971. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2972. INIT_LIST_HEAD(&ioc->free_list);
  2973. smid = 1;
  2974. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  2975. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2976. ioc->scsi_lookup[i].smid = smid;
  2977. ioc->scsi_lookup[i].scmd = NULL;
  2978. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2979. &ioc->free_list);
  2980. }
  2981. /* hi-priority queue */
  2982. INIT_LIST_HEAD(&ioc->hpr_free_list);
  2983. smid = ioc->hi_priority_smid;
  2984. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  2985. ioc->hpr_lookup[i].cb_idx = 0xFF;
  2986. ioc->hpr_lookup[i].smid = smid;
  2987. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  2988. &ioc->hpr_free_list);
  2989. }
  2990. /* internal queue */
  2991. INIT_LIST_HEAD(&ioc->internal_free_list);
  2992. smid = ioc->internal_smid;
  2993. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  2994. ioc->internal_lookup[i].cb_idx = 0xFF;
  2995. ioc->internal_lookup[i].smid = smid;
  2996. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  2997. &ioc->internal_free_list);
  2998. }
  2999. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3000. /* initialize Reply Free Queue */
  3001. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3002. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3003. ioc->reply_sz)
  3004. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3005. /* initialize Reply Post Free Queue */
  3006. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3007. ioc->reply_post_free[i].Words = ULLONG_MAX;
  3008. r = _base_send_ioc_init(ioc, sleep_flag);
  3009. if (r)
  3010. return r;
  3011. /* initialize the index's */
  3012. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3013. ioc->reply_post_host_index = 0;
  3014. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3015. writel(0, &ioc->chip->ReplyPostHostIndex);
  3016. _base_unmask_interrupts(ioc);
  3017. r = _base_event_notification(ioc, sleep_flag);
  3018. if (r)
  3019. return r;
  3020. if (sleep_flag == CAN_SLEEP)
  3021. _base_static_config_pages(ioc);
  3022. r = _base_send_port_enable(ioc, sleep_flag);
  3023. if (r)
  3024. return r;
  3025. return r;
  3026. }
  3027. /**
  3028. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3029. * @ioc: per adapter object
  3030. *
  3031. * Return nothing.
  3032. */
  3033. void
  3034. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3035. {
  3036. struct pci_dev *pdev = ioc->pdev;
  3037. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3038. __func__));
  3039. _base_mask_interrupts(ioc);
  3040. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3041. if (ioc->pci_irq) {
  3042. synchronize_irq(pdev->irq);
  3043. free_irq(ioc->pci_irq, ioc);
  3044. }
  3045. _base_disable_msix(ioc);
  3046. if (ioc->chip_phys)
  3047. iounmap(ioc->chip);
  3048. ioc->pci_irq = -1;
  3049. ioc->chip_phys = 0;
  3050. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3051. pci_disable_device(pdev);
  3052. return;
  3053. }
  3054. /**
  3055. * mpt2sas_base_attach - attach controller instance
  3056. * @ioc: per adapter object
  3057. *
  3058. * Returns 0 for success, non-zero for failure.
  3059. */
  3060. int
  3061. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3062. {
  3063. int r, i;
  3064. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3065. __func__));
  3066. r = mpt2sas_base_map_resources(ioc);
  3067. if (r)
  3068. return r;
  3069. pci_set_drvdata(ioc->pdev, ioc->shost);
  3070. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3071. if (r)
  3072. goto out_free_resources;
  3073. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3074. if (r)
  3075. goto out_free_resources;
  3076. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3077. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3078. if (!ioc->pfacts)
  3079. goto out_free_resources;
  3080. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3081. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3082. if (r)
  3083. goto out_free_resources;
  3084. }
  3085. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3086. if (r)
  3087. goto out_free_resources;
  3088. init_waitqueue_head(&ioc->reset_wq);
  3089. /* base internal command bits */
  3090. mutex_init(&ioc->base_cmds.mutex);
  3091. init_completion(&ioc->base_cmds.done);
  3092. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3093. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3094. /* transport internal command bits */
  3095. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3096. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3097. mutex_init(&ioc->transport_cmds.mutex);
  3098. init_completion(&ioc->transport_cmds.done);
  3099. /* task management internal command bits */
  3100. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3101. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3102. mutex_init(&ioc->tm_cmds.mutex);
  3103. /* config page internal command bits */
  3104. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3105. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3106. mutex_init(&ioc->config_cmds.mutex);
  3107. /* ctl module internal command bits */
  3108. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3109. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3110. mutex_init(&ioc->ctl_cmds.mutex);
  3111. init_completion(&ioc->ctl_cmds.done);
  3112. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3113. ioc->event_masks[i] = -1;
  3114. /* here we enable the events we care about */
  3115. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3116. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3117. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3118. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3119. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3120. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3121. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3122. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3123. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3124. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  3125. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3126. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3127. if (r)
  3128. goto out_free_resources;
  3129. mpt2sas_base_start_watchdog(ioc);
  3130. return 0;
  3131. out_free_resources:
  3132. ioc->remove_host = 1;
  3133. mpt2sas_base_free_resources(ioc);
  3134. _base_release_memory_pools(ioc);
  3135. pci_set_drvdata(ioc->pdev, NULL);
  3136. kfree(ioc->tm_cmds.reply);
  3137. kfree(ioc->transport_cmds.reply);
  3138. kfree(ioc->config_cmds.reply);
  3139. kfree(ioc->base_cmds.reply);
  3140. kfree(ioc->ctl_cmds.reply);
  3141. kfree(ioc->pfacts);
  3142. ioc->ctl_cmds.reply = NULL;
  3143. ioc->base_cmds.reply = NULL;
  3144. ioc->tm_cmds.reply = NULL;
  3145. ioc->transport_cmds.reply = NULL;
  3146. ioc->config_cmds.reply = NULL;
  3147. ioc->pfacts = NULL;
  3148. return r;
  3149. }
  3150. /**
  3151. * mpt2sas_base_detach - remove controller instance
  3152. * @ioc: per adapter object
  3153. *
  3154. * Return nothing.
  3155. */
  3156. void
  3157. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3158. {
  3159. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3160. __func__));
  3161. mpt2sas_base_stop_watchdog(ioc);
  3162. mpt2sas_base_free_resources(ioc);
  3163. _base_release_memory_pools(ioc);
  3164. pci_set_drvdata(ioc->pdev, NULL);
  3165. kfree(ioc->pfacts);
  3166. kfree(ioc->ctl_cmds.reply);
  3167. kfree(ioc->base_cmds.reply);
  3168. kfree(ioc->tm_cmds.reply);
  3169. kfree(ioc->transport_cmds.reply);
  3170. kfree(ioc->config_cmds.reply);
  3171. }
  3172. /**
  3173. * _base_reset_handler - reset callback handler (for base)
  3174. * @ioc: per adapter object
  3175. * @reset_phase: phase
  3176. *
  3177. * The handler for doing any required cleanup or initialization.
  3178. *
  3179. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3180. * MPT2_IOC_DONE_RESET
  3181. *
  3182. * Return nothing.
  3183. */
  3184. static void
  3185. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3186. {
  3187. switch (reset_phase) {
  3188. case MPT2_IOC_PRE_RESET:
  3189. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3190. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3191. break;
  3192. case MPT2_IOC_AFTER_RESET:
  3193. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3194. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3195. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3196. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3197. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3198. complete(&ioc->transport_cmds.done);
  3199. }
  3200. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3201. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3202. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3203. complete(&ioc->base_cmds.done);
  3204. }
  3205. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3206. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3207. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3208. ioc->config_cmds.smid = USHORT_MAX;
  3209. complete(&ioc->config_cmds.done);
  3210. }
  3211. break;
  3212. case MPT2_IOC_DONE_RESET:
  3213. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3214. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3215. break;
  3216. }
  3217. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3218. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3219. }
  3220. /**
  3221. * _wait_for_commands_to_complete - reset controller
  3222. * @ioc: Pointer to MPT_ADAPTER structure
  3223. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3224. *
  3225. * This function waiting(3s) for all pending commands to complete
  3226. * prior to putting controller in reset.
  3227. */
  3228. static void
  3229. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3230. {
  3231. u32 ioc_state;
  3232. unsigned long flags;
  3233. u16 i;
  3234. ioc->pending_io_count = 0;
  3235. if (sleep_flag != CAN_SLEEP)
  3236. return;
  3237. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3238. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3239. return;
  3240. /* pending command count */
  3241. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3242. for (i = 0; i < ioc->scsiio_depth; i++)
  3243. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3244. ioc->pending_io_count++;
  3245. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3246. if (!ioc->pending_io_count)
  3247. return;
  3248. /* wait for pending commands to complete */
  3249. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3250. }
  3251. /**
  3252. * mpt2sas_base_hard_reset_handler - reset controller
  3253. * @ioc: Pointer to MPT_ADAPTER structure
  3254. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3255. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3256. *
  3257. * Returns 0 for success, non-zero for failure.
  3258. */
  3259. int
  3260. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3261. enum reset_type type)
  3262. {
  3263. int r;
  3264. unsigned long flags;
  3265. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3266. __func__));
  3267. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3268. if (ioc->shost_recovery) {
  3269. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3270. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3271. ioc->name, __func__);
  3272. return -EBUSY;
  3273. }
  3274. ioc->shost_recovery = 1;
  3275. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3276. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3277. _wait_for_commands_to_complete(ioc, sleep_flag);
  3278. _base_mask_interrupts(ioc);
  3279. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3280. if (r)
  3281. goto out;
  3282. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3283. r = _base_make_ioc_operational(ioc, sleep_flag);
  3284. if (!r)
  3285. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3286. out:
  3287. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3288. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3289. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3290. ioc->shost_recovery = 0;
  3291. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3292. if (!r)
  3293. _base_reset_handler(ioc, MPT2_IOC_RUNNING);
  3294. return r;
  3295. }