edac_mc.c 46 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005, 2006 Linux Networx (http://lnxi.com)
  4. * This file may be distributed under the terms of the
  5. * GNU General Public License.
  6. *
  7. * Written by Thayne Harbaugh
  8. * Based on work by Dan Hollis <goemon at anime dot net> and others.
  9. * http://www.anime.net/~goemon/linux-ecc/
  10. *
  11. * Modified by Dave Peterson and Doug Thompson
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/proc_fs.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/smp.h>
  19. #include <linux/init.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/highmem.h>
  22. #include <linux/timer.h>
  23. #include <linux/slab.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/list.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/ctype.h>
  29. #include <linux/kthread.h>
  30. #include <asm/uaccess.h>
  31. #include <asm/page.h>
  32. #include <asm/edac.h>
  33. #include "edac_mc.h"
  34. #define EDAC_MC_VERSION "Ver: 2.0.1 " __DATE__
  35. #ifdef CONFIG_EDAC_DEBUG
  36. /* Values of 0 to 4 will generate output */
  37. int edac_debug_level = 1;
  38. EXPORT_SYMBOL_GPL(edac_debug_level);
  39. #endif
  40. /* EDAC Controls, setable by module parameter, and sysfs */
  41. static int log_ue = 1;
  42. static int log_ce = 1;
  43. static int panic_on_ue;
  44. static int poll_msec = 1000;
  45. /* lock to memory controller's control array */
  46. static DECLARE_MUTEX(mem_ctls_mutex);
  47. static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
  48. static struct task_struct *edac_thread;
  49. #ifdef CONFIG_PCI
  50. static int check_pci_parity = 0; /* default YES check PCI parity */
  51. static int panic_on_pci_parity; /* default no panic on PCI Parity */
  52. static atomic_t pci_parity_count = ATOMIC_INIT(0);
  53. static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
  54. static struct completion edac_pci_kobj_complete;
  55. #endif /* CONFIG_PCI */
  56. /* START sysfs data and methods */
  57. static const char *mem_types[] = {
  58. [MEM_EMPTY] = "Empty",
  59. [MEM_RESERVED] = "Reserved",
  60. [MEM_UNKNOWN] = "Unknown",
  61. [MEM_FPM] = "FPM",
  62. [MEM_EDO] = "EDO",
  63. [MEM_BEDO] = "BEDO",
  64. [MEM_SDR] = "Unbuffered-SDR",
  65. [MEM_RDR] = "Registered-SDR",
  66. [MEM_DDR] = "Unbuffered-DDR",
  67. [MEM_RDDR] = "Registered-DDR",
  68. [MEM_RMBS] = "RMBS"
  69. };
  70. static const char *dev_types[] = {
  71. [DEV_UNKNOWN] = "Unknown",
  72. [DEV_X1] = "x1",
  73. [DEV_X2] = "x2",
  74. [DEV_X4] = "x4",
  75. [DEV_X8] = "x8",
  76. [DEV_X16] = "x16",
  77. [DEV_X32] = "x32",
  78. [DEV_X64] = "x64"
  79. };
  80. static const char *edac_caps[] = {
  81. [EDAC_UNKNOWN] = "Unknown",
  82. [EDAC_NONE] = "None",
  83. [EDAC_RESERVED] = "Reserved",
  84. [EDAC_PARITY] = "PARITY",
  85. [EDAC_EC] = "EC",
  86. [EDAC_SECDED] = "SECDED",
  87. [EDAC_S2ECD2ED] = "S2ECD2ED",
  88. [EDAC_S4ECD4ED] = "S4ECD4ED",
  89. [EDAC_S8ECD8ED] = "S8ECD8ED",
  90. [EDAC_S16ECD16ED] = "S16ECD16ED"
  91. };
  92. /* sysfs object: /sys/devices/system/edac */
  93. static struct sysdev_class edac_class = {
  94. set_kset_name("edac"),
  95. };
  96. /* sysfs object:
  97. * /sys/devices/system/edac/mc
  98. */
  99. static struct kobject edac_memctrl_kobj;
  100. /* We use these to wait for the reference counts on edac_memctrl_kobj and
  101. * edac_pci_kobj to reach 0.
  102. */
  103. static struct completion edac_memctrl_kobj_complete;
  104. /*
  105. * /sys/devices/system/edac/mc;
  106. * data structures and methods
  107. */
  108. static ssize_t memctrl_int_show(void *ptr, char *buffer)
  109. {
  110. int *value = (int*) ptr;
  111. return sprintf(buffer, "%u\n", *value);
  112. }
  113. static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
  114. {
  115. int *value = (int*) ptr;
  116. if (isdigit(*buffer))
  117. *value = simple_strtoul(buffer, NULL, 0);
  118. return count;
  119. }
  120. struct memctrl_dev_attribute {
  121. struct attribute attr;
  122. void *value;
  123. ssize_t (*show)(void *,char *);
  124. ssize_t (*store)(void *, const char *, size_t);
  125. };
  126. /* Set of show/store abstract level functions for memory control object */
  127. static ssize_t memctrl_dev_show(struct kobject *kobj,
  128. struct attribute *attr, char *buffer)
  129. {
  130. struct memctrl_dev_attribute *memctrl_dev;
  131. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  132. if (memctrl_dev->show)
  133. return memctrl_dev->show(memctrl_dev->value, buffer);
  134. return -EIO;
  135. }
  136. static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
  137. const char *buffer, size_t count)
  138. {
  139. struct memctrl_dev_attribute *memctrl_dev;
  140. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  141. if (memctrl_dev->store)
  142. return memctrl_dev->store(memctrl_dev->value, buffer, count);
  143. return -EIO;
  144. }
  145. static struct sysfs_ops memctrlfs_ops = {
  146. .show = memctrl_dev_show,
  147. .store = memctrl_dev_store
  148. };
  149. #define MEMCTRL_ATTR(_name,_mode,_show,_store) \
  150. struct memctrl_dev_attribute attr_##_name = { \
  151. .attr = {.name = __stringify(_name), .mode = _mode }, \
  152. .value = &_name, \
  153. .show = _show, \
  154. .store = _store, \
  155. };
  156. #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
  157. struct memctrl_dev_attribute attr_##_name = { \
  158. .attr = {.name = __stringify(_name), .mode = _mode }, \
  159. .value = _data, \
  160. .show = _show, \
  161. .store = _store, \
  162. };
  163. /* csrow<id> control files */
  164. MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  165. MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  166. MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  167. MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  168. /* Base Attributes of the memory ECC object */
  169. static struct memctrl_dev_attribute *memctrl_attr[] = {
  170. &attr_panic_on_ue,
  171. &attr_log_ue,
  172. &attr_log_ce,
  173. &attr_poll_msec,
  174. NULL,
  175. };
  176. /* Main MC kobject release() function */
  177. static void edac_memctrl_master_release(struct kobject *kobj)
  178. {
  179. debugf1("%s()\n", __func__);
  180. complete(&edac_memctrl_kobj_complete);
  181. }
  182. static struct kobj_type ktype_memctrl = {
  183. .release = edac_memctrl_master_release,
  184. .sysfs_ops = &memctrlfs_ops,
  185. .default_attrs = (struct attribute **) memctrl_attr,
  186. };
  187. /* Initialize the main sysfs entries for edac:
  188. * /sys/devices/system/edac
  189. *
  190. * and children
  191. *
  192. * Return: 0 SUCCESS
  193. * !0 FAILURE
  194. */
  195. static int edac_sysfs_memctrl_setup(void)
  196. {
  197. int err = 0;
  198. debugf1("%s()\n", __func__);
  199. /* create the /sys/devices/system/edac directory */
  200. err = sysdev_class_register(&edac_class);
  201. if (err) {
  202. debugf1("%s() error=%d\n", __func__, err);
  203. return err;
  204. }
  205. /* Init the MC's kobject */
  206. memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
  207. edac_memctrl_kobj.parent = &edac_class.kset.kobj;
  208. edac_memctrl_kobj.ktype = &ktype_memctrl;
  209. /* generate sysfs "..../edac/mc" */
  210. err = kobject_set_name(&edac_memctrl_kobj,"mc");
  211. if (err)
  212. goto fail;
  213. /* FIXME: maybe new sysdev_create_subdir() */
  214. err = kobject_register(&edac_memctrl_kobj);
  215. if (err) {
  216. debugf1("Failed to register '.../edac/mc'\n");
  217. goto fail;
  218. }
  219. debugf1("Registered '.../edac/mc' kobject\n");
  220. return 0;
  221. fail:
  222. sysdev_class_unregister(&edac_class);
  223. return err;
  224. }
  225. /*
  226. * MC teardown:
  227. * the '..../edac/mc' kobject followed by '..../edac' itself
  228. */
  229. static void edac_sysfs_memctrl_teardown(void)
  230. {
  231. debugf0("MC: " __FILE__ ": %s()\n", __func__);
  232. /* Unregister the MC's kobject and wait for reference count to reach
  233. * 0.
  234. */
  235. init_completion(&edac_memctrl_kobj_complete);
  236. kobject_unregister(&edac_memctrl_kobj);
  237. wait_for_completion(&edac_memctrl_kobj_complete);
  238. /* Unregister the 'edac' object */
  239. sysdev_class_unregister(&edac_class);
  240. }
  241. #ifdef CONFIG_PCI
  242. static ssize_t edac_pci_int_show(void *ptr, char *buffer)
  243. {
  244. int *value = ptr;
  245. return sprintf(buffer,"%d\n",*value);
  246. }
  247. static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
  248. {
  249. int *value = ptr;
  250. if (isdigit(*buffer))
  251. *value = simple_strtoul(buffer,NULL,0);
  252. return count;
  253. }
  254. struct edac_pci_dev_attribute {
  255. struct attribute attr;
  256. void *value;
  257. ssize_t (*show)(void *,char *);
  258. ssize_t (*store)(void *, const char *,size_t);
  259. };
  260. /* Set of show/store abstract level functions for PCI Parity object */
  261. static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
  262. char *buffer)
  263. {
  264. struct edac_pci_dev_attribute *edac_pci_dev;
  265. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  266. if (edac_pci_dev->show)
  267. return edac_pci_dev->show(edac_pci_dev->value, buffer);
  268. return -EIO;
  269. }
  270. static ssize_t edac_pci_dev_store(struct kobject *kobj,
  271. struct attribute *attr, const char *buffer, size_t count)
  272. {
  273. struct edac_pci_dev_attribute *edac_pci_dev;
  274. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  275. if (edac_pci_dev->show)
  276. return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
  277. return -EIO;
  278. }
  279. static struct sysfs_ops edac_pci_sysfs_ops = {
  280. .show = edac_pci_dev_show,
  281. .store = edac_pci_dev_store
  282. };
  283. #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
  284. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  285. .attr = {.name = __stringify(_name), .mode = _mode }, \
  286. .value = &_name, \
  287. .show = _show, \
  288. .store = _store, \
  289. };
  290. #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
  291. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  292. .attr = {.name = __stringify(_name), .mode = _mode }, \
  293. .value = _data, \
  294. .show = _show, \
  295. .store = _store, \
  296. };
  297. /* PCI Parity control files */
  298. EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
  299. edac_pci_int_store);
  300. EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
  301. edac_pci_int_store);
  302. EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
  303. /* Base Attributes of the memory ECC object */
  304. static struct edac_pci_dev_attribute *edac_pci_attr[] = {
  305. &edac_pci_attr_check_pci_parity,
  306. &edac_pci_attr_panic_on_pci_parity,
  307. &edac_pci_attr_pci_parity_count,
  308. NULL,
  309. };
  310. /* No memory to release */
  311. static void edac_pci_release(struct kobject *kobj)
  312. {
  313. debugf1("%s()\n", __func__);
  314. complete(&edac_pci_kobj_complete);
  315. }
  316. static struct kobj_type ktype_edac_pci = {
  317. .release = edac_pci_release,
  318. .sysfs_ops = &edac_pci_sysfs_ops,
  319. .default_attrs = (struct attribute **) edac_pci_attr,
  320. };
  321. /**
  322. * edac_sysfs_pci_setup()
  323. *
  324. */
  325. static int edac_sysfs_pci_setup(void)
  326. {
  327. int err;
  328. debugf1("%s()\n", __func__);
  329. memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
  330. edac_pci_kobj.parent = &edac_class.kset.kobj;
  331. edac_pci_kobj.ktype = &ktype_edac_pci;
  332. err = kobject_set_name(&edac_pci_kobj, "pci");
  333. if (!err) {
  334. /* Instanstiate the csrow object */
  335. /* FIXME: maybe new sysdev_create_subdir() */
  336. err = kobject_register(&edac_pci_kobj);
  337. if (err)
  338. debugf1("Failed to register '.../edac/pci'\n");
  339. else
  340. debugf1("Registered '.../edac/pci' kobject\n");
  341. }
  342. return err;
  343. }
  344. static void edac_sysfs_pci_teardown(void)
  345. {
  346. debugf0("%s()\n", __func__);
  347. init_completion(&edac_pci_kobj_complete);
  348. kobject_unregister(&edac_pci_kobj);
  349. wait_for_completion(&edac_pci_kobj_complete);
  350. }
  351. static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
  352. {
  353. int where;
  354. u16 status;
  355. where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
  356. pci_read_config_word(dev, where, &status);
  357. /* If we get back 0xFFFF then we must suspect that the card has been
  358. * pulled but the Linux PCI layer has not yet finished cleaning up.
  359. * We don't want to report on such devices
  360. */
  361. if (status == 0xFFFF) {
  362. u32 sanity;
  363. pci_read_config_dword(dev, 0, &sanity);
  364. if (sanity == 0xFFFFFFFF)
  365. return 0;
  366. }
  367. status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
  368. PCI_STATUS_PARITY;
  369. if (status)
  370. /* reset only the bits we are interested in */
  371. pci_write_config_word(dev, where, status);
  372. return status;
  373. }
  374. typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
  375. /* Clear any PCI parity errors logged by this device. */
  376. static void edac_pci_dev_parity_clear(struct pci_dev *dev)
  377. {
  378. u8 header_type;
  379. get_pci_parity_status(dev, 0);
  380. /* read the device TYPE, looking for bridges */
  381. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  382. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
  383. get_pci_parity_status(dev, 1);
  384. }
  385. /*
  386. * PCI Parity polling
  387. *
  388. */
  389. static void edac_pci_dev_parity_test(struct pci_dev *dev)
  390. {
  391. u16 status;
  392. u8 header_type;
  393. /* read the STATUS register on this device
  394. */
  395. status = get_pci_parity_status(dev, 0);
  396. debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
  397. /* check the status reg for errors */
  398. if (status) {
  399. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  400. edac_printk(KERN_CRIT, EDAC_PCI,
  401. "Signaled System Error on %s\n",
  402. pci_name(dev));
  403. if (status & (PCI_STATUS_PARITY)) {
  404. edac_printk(KERN_CRIT, EDAC_PCI,
  405. "Master Data Parity Error on %s\n",
  406. pci_name(dev));
  407. atomic_inc(&pci_parity_count);
  408. }
  409. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  410. edac_printk(KERN_CRIT, EDAC_PCI,
  411. "Detected Parity Error on %s\n",
  412. pci_name(dev));
  413. atomic_inc(&pci_parity_count);
  414. }
  415. }
  416. /* read the device TYPE, looking for bridges */
  417. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  418. debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
  419. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
  420. /* On bridges, need to examine secondary status register */
  421. status = get_pci_parity_status(dev, 1);
  422. debugf2("PCI SEC_STATUS= 0x%04x %s\n",
  423. status, dev->dev.bus_id );
  424. /* check the secondary status reg for errors */
  425. if (status) {
  426. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  427. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  428. "Signaled System Error on %s\n",
  429. pci_name(dev));
  430. if (status & (PCI_STATUS_PARITY)) {
  431. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  432. "Master Data Parity Error on "
  433. "%s\n", pci_name(dev));
  434. atomic_inc(&pci_parity_count);
  435. }
  436. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  437. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  438. "Detected Parity Error on %s\n",
  439. pci_name(dev));
  440. atomic_inc(&pci_parity_count);
  441. }
  442. }
  443. }
  444. }
  445. /*
  446. * pci_dev parity list iterator
  447. * Scan the PCI device list for one iteration, looking for SERRORs
  448. * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
  449. */
  450. static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
  451. {
  452. struct pci_dev *dev = NULL;
  453. /* request for kernel access to the next PCI device, if any,
  454. * and while we are looking at it have its reference count
  455. * bumped until we are done with it
  456. */
  457. while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  458. fn(dev);
  459. }
  460. }
  461. static void do_pci_parity_check(void)
  462. {
  463. unsigned long flags;
  464. int before_count;
  465. debugf3("%s()\n", __func__);
  466. if (!check_pci_parity)
  467. return;
  468. before_count = atomic_read(&pci_parity_count);
  469. /* scan all PCI devices looking for a Parity Error on devices and
  470. * bridges
  471. */
  472. local_irq_save(flags);
  473. edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
  474. local_irq_restore(flags);
  475. /* Only if operator has selected panic on PCI Error */
  476. if (panic_on_pci_parity) {
  477. /* If the count is different 'after' from 'before' */
  478. if (before_count != atomic_read(&pci_parity_count))
  479. panic("EDAC: PCI Parity Error");
  480. }
  481. }
  482. static inline void clear_pci_parity_errors(void)
  483. {
  484. /* Clear any PCI bus parity errors that devices initially have logged
  485. * in their registers.
  486. */
  487. edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
  488. }
  489. #else /* CONFIG_PCI */
  490. /* pre-process these away */
  491. #define do_pci_parity_check()
  492. #define clear_pci_parity_errors()
  493. #define edac_sysfs_pci_teardown()
  494. #define edac_sysfs_pci_setup() (0)
  495. #endif /* CONFIG_PCI */
  496. /* EDAC sysfs CSROW data structures and methods
  497. */
  498. /* Set of more default csrow<id> attribute show/store functions */
  499. static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data, int private)
  500. {
  501. return sprintf(data,"%u\n", csrow->ue_count);
  502. }
  503. static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, int private)
  504. {
  505. return sprintf(data,"%u\n", csrow->ce_count);
  506. }
  507. static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private)
  508. {
  509. return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
  510. }
  511. static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private)
  512. {
  513. return sprintf(data,"%s\n", mem_types[csrow->mtype]);
  514. }
  515. static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private)
  516. {
  517. return sprintf(data,"%s\n", dev_types[csrow->dtype]);
  518. }
  519. static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private)
  520. {
  521. return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
  522. }
  523. /* show/store functions for DIMM Label attributes */
  524. static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
  525. char *data, int channel)
  526. {
  527. return snprintf(data, EDAC_MC_LABEL_LEN,"%s",
  528. csrow->channels[channel].label);
  529. }
  530. static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
  531. const char *data,
  532. size_t count,
  533. int channel)
  534. {
  535. ssize_t max_size = 0;
  536. max_size = min((ssize_t)count,(ssize_t)EDAC_MC_LABEL_LEN-1);
  537. strncpy(csrow->channels[channel].label, data, max_size);
  538. csrow->channels[channel].label[max_size] = '\0';
  539. return max_size;
  540. }
  541. /* show function for dynamic chX_ce_count attribute */
  542. static ssize_t channel_ce_count_show(struct csrow_info *csrow,
  543. char *data,
  544. int channel)
  545. {
  546. return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
  547. }
  548. /* csrow specific attribute structure */
  549. struct csrowdev_attribute {
  550. struct attribute attr;
  551. ssize_t (*show)(struct csrow_info *,char *,int);
  552. ssize_t (*store)(struct csrow_info *, const char *,size_t,int);
  553. int private;
  554. };
  555. #define to_csrow(k) container_of(k, struct csrow_info, kobj)
  556. #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
  557. /* Set of show/store higher level functions for default csrow attributes */
  558. static ssize_t csrowdev_show(struct kobject *kobj,
  559. struct attribute *attr,
  560. char *buffer)
  561. {
  562. struct csrow_info *csrow = to_csrow(kobj);
  563. struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
  564. if (csrowdev_attr->show)
  565. return csrowdev_attr->show(csrow,
  566. buffer,
  567. csrowdev_attr->private);
  568. return -EIO;
  569. }
  570. static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
  571. const char *buffer, size_t count)
  572. {
  573. struct csrow_info *csrow = to_csrow(kobj);
  574. struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
  575. if (csrowdev_attr->store)
  576. return csrowdev_attr->store(csrow,
  577. buffer,
  578. count,
  579. csrowdev_attr->private);
  580. return -EIO;
  581. }
  582. static struct sysfs_ops csrowfs_ops = {
  583. .show = csrowdev_show,
  584. .store = csrowdev_store
  585. };
  586. #define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \
  587. struct csrowdev_attribute attr_##_name = { \
  588. .attr = {.name = __stringify(_name), .mode = _mode }, \
  589. .show = _show, \
  590. .store = _store, \
  591. .private = _private, \
  592. };
  593. /* default cwrow<id>/attribute files */
  594. CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL,0);
  595. CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL,0);
  596. CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL,0);
  597. CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL,0);
  598. CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL,0);
  599. CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL,0);
  600. /* default attributes of the CSROW<id> object */
  601. static struct csrowdev_attribute *default_csrow_attr[] = {
  602. &attr_dev_type,
  603. &attr_mem_type,
  604. &attr_edac_mode,
  605. &attr_size_mb,
  606. &attr_ue_count,
  607. &attr_ce_count,
  608. NULL,
  609. };
  610. /* possible dynamic channel DIMM Label attribute files */
  611. CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
  612. channel_dimm_label_show,
  613. channel_dimm_label_store,
  614. 0 );
  615. CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
  616. channel_dimm_label_show,
  617. channel_dimm_label_store,
  618. 1 );
  619. CSROWDEV_ATTR(ch2_dimm_label,S_IRUGO|S_IWUSR,
  620. channel_dimm_label_show,
  621. channel_dimm_label_store,
  622. 2 );
  623. CSROWDEV_ATTR(ch3_dimm_label,S_IRUGO|S_IWUSR,
  624. channel_dimm_label_show,
  625. channel_dimm_label_store,
  626. 3 );
  627. CSROWDEV_ATTR(ch4_dimm_label,S_IRUGO|S_IWUSR,
  628. channel_dimm_label_show,
  629. channel_dimm_label_store,
  630. 4 );
  631. CSROWDEV_ATTR(ch5_dimm_label,S_IRUGO|S_IWUSR,
  632. channel_dimm_label_show,
  633. channel_dimm_label_store,
  634. 5 );
  635. /* Total possible dynamic DIMM Label attribute file table */
  636. static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
  637. &attr_ch0_dimm_label,
  638. &attr_ch1_dimm_label,
  639. &attr_ch2_dimm_label,
  640. &attr_ch3_dimm_label,
  641. &attr_ch4_dimm_label,
  642. &attr_ch5_dimm_label
  643. };
  644. /* possible dynamic channel ce_count attribute files */
  645. CSROWDEV_ATTR(ch0_ce_count,S_IRUGO|S_IWUSR,
  646. channel_ce_count_show,
  647. NULL,
  648. 0 );
  649. CSROWDEV_ATTR(ch1_ce_count,S_IRUGO|S_IWUSR,
  650. channel_ce_count_show,
  651. NULL,
  652. 1 );
  653. CSROWDEV_ATTR(ch2_ce_count,S_IRUGO|S_IWUSR,
  654. channel_ce_count_show,
  655. NULL,
  656. 2 );
  657. CSROWDEV_ATTR(ch3_ce_count,S_IRUGO|S_IWUSR,
  658. channel_ce_count_show,
  659. NULL,
  660. 3 );
  661. CSROWDEV_ATTR(ch4_ce_count,S_IRUGO|S_IWUSR,
  662. channel_ce_count_show,
  663. NULL,
  664. 4 );
  665. CSROWDEV_ATTR(ch5_ce_count,S_IRUGO|S_IWUSR,
  666. channel_ce_count_show,
  667. NULL,
  668. 5 );
  669. /* Total possible dynamic ce_count attribute file table */
  670. static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
  671. &attr_ch0_ce_count,
  672. &attr_ch1_ce_count,
  673. &attr_ch2_ce_count,
  674. &attr_ch3_ce_count,
  675. &attr_ch4_ce_count,
  676. &attr_ch5_ce_count
  677. };
  678. #define EDAC_NR_CHANNELS 6
  679. /* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */
  680. static int edac_create_channel_files(struct kobject *kobj, int chan)
  681. {
  682. int err=-ENODEV;
  683. if (chan >= EDAC_NR_CHANNELS)
  684. return err;
  685. /* create the DIMM label attribute file */
  686. err = sysfs_create_file(kobj,
  687. (struct attribute *) dynamic_csrow_dimm_attr[chan]);
  688. if (!err) {
  689. /* create the CE Count attribute file */
  690. err = sysfs_create_file(kobj,
  691. (struct attribute *) dynamic_csrow_ce_count_attr[chan]);
  692. } else {
  693. debugf1("%s() dimm labels and ce_count files created", __func__);
  694. }
  695. return err;
  696. }
  697. /* No memory to release for this kobj */
  698. static void edac_csrow_instance_release(struct kobject *kobj)
  699. {
  700. struct csrow_info *cs;
  701. cs = container_of(kobj, struct csrow_info, kobj);
  702. complete(&cs->kobj_complete);
  703. }
  704. /* the kobj_type instance for a CSROW */
  705. static struct kobj_type ktype_csrow = {
  706. .release = edac_csrow_instance_release,
  707. .sysfs_ops = &csrowfs_ops,
  708. .default_attrs = (struct attribute **) default_csrow_attr,
  709. };
  710. /* Create a CSROW object under specifed edac_mc_device */
  711. static int edac_create_csrow_object(
  712. struct kobject *edac_mci_kobj,
  713. struct csrow_info *csrow,
  714. int index)
  715. {
  716. int err = 0;
  717. int chan;
  718. memset(&csrow->kobj, 0, sizeof(csrow->kobj));
  719. /* generate ..../edac/mc/mc<id>/csrow<index> */
  720. csrow->kobj.parent = edac_mci_kobj;
  721. csrow->kobj.ktype = &ktype_csrow;
  722. /* name this instance of csrow<id> */
  723. err = kobject_set_name(&csrow->kobj,"csrow%d",index);
  724. if (err)
  725. goto error_exit;
  726. /* Instanstiate the csrow object */
  727. err = kobject_register(&csrow->kobj);
  728. if (!err) {
  729. /* Create the dyanmic attribute files on this csrow,
  730. * namely, the DIMM labels and the channel ce_count
  731. */
  732. for (chan = 0; chan < csrow->nr_channels; chan++) {
  733. err = edac_create_channel_files(&csrow->kobj,chan);
  734. if (err)
  735. break;
  736. }
  737. }
  738. error_exit:
  739. return err;
  740. }
  741. /* default sysfs methods and data structures for the main MCI kobject */
  742. static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
  743. const char *data, size_t count)
  744. {
  745. int row, chan;
  746. mci->ue_noinfo_count = 0;
  747. mci->ce_noinfo_count = 0;
  748. mci->ue_count = 0;
  749. mci->ce_count = 0;
  750. for (row = 0; row < mci->nr_csrows; row++) {
  751. struct csrow_info *ri = &mci->csrows[row];
  752. ri->ue_count = 0;
  753. ri->ce_count = 0;
  754. for (chan = 0; chan < ri->nr_channels; chan++)
  755. ri->channels[chan].ce_count = 0;
  756. }
  757. mci->start_time = jiffies;
  758. return count;
  759. }
  760. /* default attribute files for the MCI object */
  761. static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
  762. {
  763. return sprintf(data,"%d\n", mci->ue_count);
  764. }
  765. static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
  766. {
  767. return sprintf(data,"%d\n", mci->ce_count);
  768. }
  769. static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
  770. {
  771. return sprintf(data,"%d\n", mci->ce_noinfo_count);
  772. }
  773. static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
  774. {
  775. return sprintf(data,"%d\n", mci->ue_noinfo_count);
  776. }
  777. static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
  778. {
  779. return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
  780. }
  781. static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
  782. {
  783. return sprintf(data,"%s\n", mci->ctl_name);
  784. }
  785. static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
  786. {
  787. int total_pages, csrow_idx;
  788. for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
  789. csrow_idx++) {
  790. struct csrow_info *csrow = &mci->csrows[csrow_idx];
  791. if (!csrow->nr_pages)
  792. continue;
  793. total_pages += csrow->nr_pages;
  794. }
  795. return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
  796. }
  797. struct mcidev_attribute {
  798. struct attribute attr;
  799. ssize_t (*show)(struct mem_ctl_info *,char *);
  800. ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
  801. };
  802. #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
  803. #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
  804. /* MCI show/store functions for top most object */
  805. static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
  806. char *buffer)
  807. {
  808. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  809. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  810. if (mcidev_attr->show)
  811. return mcidev_attr->show(mem_ctl_info, buffer);
  812. return -EIO;
  813. }
  814. static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
  815. const char *buffer, size_t count)
  816. {
  817. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  818. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  819. if (mcidev_attr->store)
  820. return mcidev_attr->store(mem_ctl_info, buffer, count);
  821. return -EIO;
  822. }
  823. static struct sysfs_ops mci_ops = {
  824. .show = mcidev_show,
  825. .store = mcidev_store
  826. };
  827. #define MCIDEV_ATTR(_name,_mode,_show,_store) \
  828. struct mcidev_attribute mci_attr_##_name = { \
  829. .attr = {.name = __stringify(_name), .mode = _mode }, \
  830. .show = _show, \
  831. .store = _store, \
  832. };
  833. /* default Control file */
  834. MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
  835. /* default Attribute files */
  836. MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
  837. MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
  838. MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
  839. MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
  840. MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
  841. MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
  842. MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
  843. static struct mcidev_attribute *mci_attr[] = {
  844. &mci_attr_reset_counters,
  845. &mci_attr_mc_name,
  846. &mci_attr_size_mb,
  847. &mci_attr_seconds_since_reset,
  848. &mci_attr_ue_noinfo_count,
  849. &mci_attr_ce_noinfo_count,
  850. &mci_attr_ue_count,
  851. &mci_attr_ce_count,
  852. NULL
  853. };
  854. /*
  855. * Release of a MC controlling instance
  856. */
  857. static void edac_mci_instance_release(struct kobject *kobj)
  858. {
  859. struct mem_ctl_info *mci;
  860. mci = to_mci(kobj);
  861. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  862. complete(&mci->kobj_complete);
  863. }
  864. static struct kobj_type ktype_mci = {
  865. .release = edac_mci_instance_release,
  866. .sysfs_ops = &mci_ops,
  867. .default_attrs = (struct attribute **) mci_attr,
  868. };
  869. #define EDAC_DEVICE_SYMLINK "device"
  870. /*
  871. * Create a new Memory Controller kobject instance,
  872. * mc<id> under the 'mc' directory
  873. *
  874. * Return:
  875. * 0 Success
  876. * !0 Failure
  877. */
  878. static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  879. {
  880. int i;
  881. int err;
  882. struct csrow_info *csrow;
  883. struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
  884. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  885. memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
  886. /* set the name of the mc<id> object */
  887. err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
  888. if (err)
  889. return err;
  890. /* link to our parent the '..../edac/mc' object */
  891. edac_mci_kobj->parent = &edac_memctrl_kobj;
  892. edac_mci_kobj->ktype = &ktype_mci;
  893. /* register the mc<id> kobject */
  894. err = kobject_register(edac_mci_kobj);
  895. if (err)
  896. return err;
  897. /* create a symlink for the device */
  898. err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
  899. EDAC_DEVICE_SYMLINK);
  900. if (err)
  901. goto fail0;
  902. /* Make directories for each CSROW object
  903. * under the mc<id> kobject
  904. */
  905. for (i = 0; i < mci->nr_csrows; i++) {
  906. csrow = &mci->csrows[i];
  907. /* Only expose populated CSROWs */
  908. if (csrow->nr_pages > 0) {
  909. err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
  910. if (err)
  911. goto fail1;
  912. }
  913. }
  914. return 0;
  915. /* CSROW error: backout what has already been registered, */
  916. fail1:
  917. for ( i--; i >= 0; i--) {
  918. if (csrow->nr_pages > 0) {
  919. init_completion(&csrow->kobj_complete);
  920. kobject_unregister(&mci->csrows[i].kobj);
  921. wait_for_completion(&csrow->kobj_complete);
  922. }
  923. }
  924. fail0:
  925. init_completion(&mci->kobj_complete);
  926. kobject_unregister(edac_mci_kobj);
  927. wait_for_completion(&mci->kobj_complete);
  928. return err;
  929. }
  930. /*
  931. * remove a Memory Controller instance
  932. */
  933. static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  934. {
  935. int i;
  936. debugf0("%s()\n", __func__);
  937. /* remove all csrow kobjects */
  938. for (i = 0; i < mci->nr_csrows; i++) {
  939. if (mci->csrows[i].nr_pages > 0) {
  940. init_completion(&mci->csrows[i].kobj_complete);
  941. kobject_unregister(&mci->csrows[i].kobj);
  942. wait_for_completion(&mci->csrows[i].kobj_complete);
  943. }
  944. }
  945. sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
  946. init_completion(&mci->kobj_complete);
  947. kobject_unregister(&mci->edac_mci_kobj);
  948. wait_for_completion(&mci->kobj_complete);
  949. }
  950. /* END OF sysfs data and methods */
  951. #ifdef CONFIG_EDAC_DEBUG
  952. void edac_mc_dump_channel(struct channel_info *chan)
  953. {
  954. debugf4("\tchannel = %p\n", chan);
  955. debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
  956. debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
  957. debugf4("\tchannel->label = '%s'\n", chan->label);
  958. debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
  959. }
  960. EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
  961. void edac_mc_dump_csrow(struct csrow_info *csrow)
  962. {
  963. debugf4("\tcsrow = %p\n", csrow);
  964. debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
  965. debugf4("\tcsrow->first_page = 0x%lx\n",
  966. csrow->first_page);
  967. debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
  968. debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
  969. debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
  970. debugf4("\tcsrow->nr_channels = %d\n",
  971. csrow->nr_channels);
  972. debugf4("\tcsrow->channels = %p\n", csrow->channels);
  973. debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
  974. }
  975. EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
  976. void edac_mc_dump_mci(struct mem_ctl_info *mci)
  977. {
  978. debugf3("\tmci = %p\n", mci);
  979. debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
  980. debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
  981. debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
  982. debugf4("\tmci->edac_check = %p\n", mci->edac_check);
  983. debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
  984. mci->nr_csrows, mci->csrows);
  985. debugf3("\tdev = %p\n", mci->dev);
  986. debugf3("\tmod_name:ctl_name = %s:%s\n",
  987. mci->mod_name, mci->ctl_name);
  988. debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
  989. }
  990. EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
  991. #endif /* CONFIG_EDAC_DEBUG */
  992. /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
  993. * Adjust 'ptr' so that its alignment is at least as stringent as what the
  994. * compiler would provide for X and return the aligned result.
  995. *
  996. * If 'size' is a constant, the compiler will optimize this whole function
  997. * down to either a no-op or the addition of a constant to the value of 'ptr'.
  998. */
  999. static inline char * align_ptr(void *ptr, unsigned size)
  1000. {
  1001. unsigned align, r;
  1002. /* Here we assume that the alignment of a "long long" is the most
  1003. * stringent alignment that the compiler will ever provide by default.
  1004. * As far as I know, this is a reasonable assumption.
  1005. */
  1006. if (size > sizeof(long))
  1007. align = sizeof(long long);
  1008. else if (size > sizeof(int))
  1009. align = sizeof(long);
  1010. else if (size > sizeof(short))
  1011. align = sizeof(int);
  1012. else if (size > sizeof(char))
  1013. align = sizeof(short);
  1014. else
  1015. return (char *) ptr;
  1016. r = size % align;
  1017. if (r == 0)
  1018. return (char *) ptr;
  1019. return (char *) (((unsigned long) ptr) + align - r);
  1020. }
  1021. /**
  1022. * edac_mc_alloc: Allocate a struct mem_ctl_info structure
  1023. * @size_pvt: size of private storage needed
  1024. * @nr_csrows: Number of CWROWS needed for this MC
  1025. * @nr_chans: Number of channels for the MC
  1026. *
  1027. * Everything is kmalloc'ed as one big chunk - more efficient.
  1028. * Only can be used if all structures have the same lifetime - otherwise
  1029. * you have to allocate and initialize your own structures.
  1030. *
  1031. * Use edac_mc_free() to free mc structures allocated by this function.
  1032. *
  1033. * Returns:
  1034. * NULL allocation failed
  1035. * struct mem_ctl_info pointer
  1036. */
  1037. struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
  1038. unsigned nr_chans)
  1039. {
  1040. struct mem_ctl_info *mci;
  1041. struct csrow_info *csi, *csrow;
  1042. struct channel_info *chi, *chp, *chan;
  1043. void *pvt;
  1044. unsigned size;
  1045. int row, chn;
  1046. /* Figure out the offsets of the various items from the start of an mc
  1047. * structure. We want the alignment of each item to be at least as
  1048. * stringent as what the compiler would provide if we could simply
  1049. * hardcode everything into a single struct.
  1050. */
  1051. mci = (struct mem_ctl_info *) 0;
  1052. csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
  1053. chi = (struct channel_info *)
  1054. align_ptr(&csi[nr_csrows], sizeof(*chi));
  1055. pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
  1056. size = ((unsigned long) pvt) + sz_pvt;
  1057. if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
  1058. return NULL;
  1059. /* Adjust pointers so they point within the memory we just allocated
  1060. * rather than an imaginary chunk of memory located at address 0.
  1061. */
  1062. csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
  1063. chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
  1064. pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
  1065. memset(mci, 0, size); /* clear all fields */
  1066. mci->csrows = csi;
  1067. mci->pvt_info = pvt;
  1068. mci->nr_csrows = nr_csrows;
  1069. for (row = 0; row < nr_csrows; row++) {
  1070. csrow = &csi[row];
  1071. csrow->csrow_idx = row;
  1072. csrow->mci = mci;
  1073. csrow->nr_channels = nr_chans;
  1074. chp = &chi[row * nr_chans];
  1075. csrow->channels = chp;
  1076. for (chn = 0; chn < nr_chans; chn++) {
  1077. chan = &chp[chn];
  1078. chan->chan_idx = chn;
  1079. chan->csrow = csrow;
  1080. }
  1081. }
  1082. return mci;
  1083. }
  1084. EXPORT_SYMBOL_GPL(edac_mc_alloc);
  1085. /**
  1086. * edac_mc_free: Free a previously allocated 'mci' structure
  1087. * @mci: pointer to a struct mem_ctl_info structure
  1088. */
  1089. void edac_mc_free(struct mem_ctl_info *mci)
  1090. {
  1091. kfree(mci);
  1092. }
  1093. EXPORT_SYMBOL_GPL(edac_mc_free);
  1094. static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
  1095. {
  1096. struct mem_ctl_info *mci;
  1097. struct list_head *item;
  1098. debugf3("%s()\n", __func__);
  1099. list_for_each(item, &mc_devices) {
  1100. mci = list_entry(item, struct mem_ctl_info, link);
  1101. if (mci->dev == dev)
  1102. return mci;
  1103. }
  1104. return NULL;
  1105. }
  1106. /* Return 0 on success, 1 on failure.
  1107. * Before calling this function, caller must
  1108. * assign a unique value to mci->mc_idx.
  1109. */
  1110. static int add_mc_to_global_list (struct mem_ctl_info *mci)
  1111. {
  1112. struct list_head *item, *insert_before;
  1113. struct mem_ctl_info *p;
  1114. insert_before = &mc_devices;
  1115. if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
  1116. goto fail0;
  1117. list_for_each(item, &mc_devices) {
  1118. p = list_entry(item, struct mem_ctl_info, link);
  1119. if (p->mc_idx >= mci->mc_idx) {
  1120. if (unlikely(p->mc_idx == mci->mc_idx))
  1121. goto fail1;
  1122. insert_before = item;
  1123. break;
  1124. }
  1125. }
  1126. list_add_tail_rcu(&mci->link, insert_before);
  1127. return 0;
  1128. fail0:
  1129. edac_printk(KERN_WARNING, EDAC_MC,
  1130. "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
  1131. dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
  1132. return 1;
  1133. fail1:
  1134. edac_printk(KERN_WARNING, EDAC_MC,
  1135. "bug in low-level driver: attempt to assign\n"
  1136. " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
  1137. return 1;
  1138. }
  1139. static void complete_mc_list_del(struct rcu_head *head)
  1140. {
  1141. struct mem_ctl_info *mci;
  1142. mci = container_of(head, struct mem_ctl_info, rcu);
  1143. INIT_LIST_HEAD(&mci->link);
  1144. complete(&mci->complete);
  1145. }
  1146. static void del_mc_from_global_list(struct mem_ctl_info *mci)
  1147. {
  1148. list_del_rcu(&mci->link);
  1149. init_completion(&mci->complete);
  1150. call_rcu(&mci->rcu, complete_mc_list_del);
  1151. wait_for_completion(&mci->complete);
  1152. }
  1153. /**
  1154. * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
  1155. * create sysfs entries associated with mci structure
  1156. * @mci: pointer to the mci structure to be added to the list
  1157. * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
  1158. *
  1159. * Return:
  1160. * 0 Success
  1161. * !0 Failure
  1162. */
  1163. /* FIXME - should a warning be printed if no error detection? correction? */
  1164. int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
  1165. {
  1166. debugf0("%s()\n", __func__);
  1167. mci->mc_idx = mc_idx;
  1168. #ifdef CONFIG_EDAC_DEBUG
  1169. if (edac_debug_level >= 3)
  1170. edac_mc_dump_mci(mci);
  1171. if (edac_debug_level >= 4) {
  1172. int i;
  1173. for (i = 0; i < mci->nr_csrows; i++) {
  1174. int j;
  1175. edac_mc_dump_csrow(&mci->csrows[i]);
  1176. for (j = 0; j < mci->csrows[i].nr_channels; j++)
  1177. edac_mc_dump_channel(
  1178. &mci->csrows[i].channels[j]);
  1179. }
  1180. }
  1181. #endif
  1182. down(&mem_ctls_mutex);
  1183. if (add_mc_to_global_list(mci))
  1184. goto fail0;
  1185. /* set load time so that error rate can be tracked */
  1186. mci->start_time = jiffies;
  1187. if (edac_create_sysfs_mci_device(mci)) {
  1188. edac_mc_printk(mci, KERN_WARNING,
  1189. "failed to create sysfs device\n");
  1190. goto fail1;
  1191. }
  1192. /* Report action taken */
  1193. edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
  1194. mci->mod_name, mci->ctl_name, dev_name(mci->dev));
  1195. up(&mem_ctls_mutex);
  1196. return 0;
  1197. fail1:
  1198. del_mc_from_global_list(mci);
  1199. fail0:
  1200. up(&mem_ctls_mutex);
  1201. return 1;
  1202. }
  1203. EXPORT_SYMBOL_GPL(edac_mc_add_mc);
  1204. /**
  1205. * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
  1206. * remove mci structure from global list
  1207. * @pdev: Pointer to 'struct device' representing mci structure to remove.
  1208. *
  1209. * Return pointer to removed mci structure, or NULL if device not found.
  1210. */
  1211. struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
  1212. {
  1213. struct mem_ctl_info *mci;
  1214. debugf0("MC: %s()\n", __func__);
  1215. down(&mem_ctls_mutex);
  1216. if ((mci = find_mci_by_dev(dev)) == NULL) {
  1217. up(&mem_ctls_mutex);
  1218. return NULL;
  1219. }
  1220. edac_remove_sysfs_mci_device(mci);
  1221. del_mc_from_global_list(mci);
  1222. up(&mem_ctls_mutex);
  1223. edac_printk(KERN_INFO, EDAC_MC,
  1224. "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
  1225. mci->mod_name, mci->ctl_name, dev_name(mci->dev));
  1226. return mci;
  1227. }
  1228. EXPORT_SYMBOL_GPL(edac_mc_del_mc);
  1229. void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
  1230. {
  1231. struct page *pg;
  1232. void *virt_addr;
  1233. unsigned long flags = 0;
  1234. debugf3("%s()\n", __func__);
  1235. /* ECC error page was not in our memory. Ignore it. */
  1236. if(!pfn_valid(page))
  1237. return;
  1238. /* Find the actual page structure then map it and fix */
  1239. pg = pfn_to_page(page);
  1240. if (PageHighMem(pg))
  1241. local_irq_save(flags);
  1242. virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
  1243. /* Perform architecture specific atomic scrub operation */
  1244. atomic_scrub(virt_addr + offset, size);
  1245. /* Unmap and complete */
  1246. kunmap_atomic(virt_addr, KM_BOUNCE_READ);
  1247. if (PageHighMem(pg))
  1248. local_irq_restore(flags);
  1249. }
  1250. EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
  1251. /* FIXME - should return -1 */
  1252. int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
  1253. {
  1254. struct csrow_info *csrows = mci->csrows;
  1255. int row, i;
  1256. debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
  1257. row = -1;
  1258. for (i = 0; i < mci->nr_csrows; i++) {
  1259. struct csrow_info *csrow = &csrows[i];
  1260. if (csrow->nr_pages == 0)
  1261. continue;
  1262. debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
  1263. "mask(0x%lx)\n", mci->mc_idx, __func__,
  1264. csrow->first_page, page, csrow->last_page,
  1265. csrow->page_mask);
  1266. if ((page >= csrow->first_page) &&
  1267. (page <= csrow->last_page) &&
  1268. ((page & csrow->page_mask) ==
  1269. (csrow->first_page & csrow->page_mask))) {
  1270. row = i;
  1271. break;
  1272. }
  1273. }
  1274. if (row == -1)
  1275. edac_mc_printk(mci, KERN_ERR,
  1276. "could not look up page error address %lx\n",
  1277. (unsigned long) page);
  1278. return row;
  1279. }
  1280. EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
  1281. /* FIXME - setable log (warning/emerg) levels */
  1282. /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
  1283. void edac_mc_handle_ce(struct mem_ctl_info *mci,
  1284. unsigned long page_frame_number, unsigned long offset_in_page,
  1285. unsigned long syndrome, int row, int channel, const char *msg)
  1286. {
  1287. unsigned long remapped_page;
  1288. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1289. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1290. if (row >= mci->nr_csrows || row < 0) {
  1291. /* something is wrong */
  1292. edac_mc_printk(mci, KERN_ERR,
  1293. "INTERNAL ERROR: row out of range "
  1294. "(%d >= %d)\n", row, mci->nr_csrows);
  1295. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1296. return;
  1297. }
  1298. if (channel >= mci->csrows[row].nr_channels || channel < 0) {
  1299. /* something is wrong */
  1300. edac_mc_printk(mci, KERN_ERR,
  1301. "INTERNAL ERROR: channel out of range "
  1302. "(%d >= %d)\n", channel,
  1303. mci->csrows[row].nr_channels);
  1304. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1305. return;
  1306. }
  1307. if (log_ce)
  1308. /* FIXME - put in DIMM location */
  1309. edac_mc_printk(mci, KERN_WARNING,
  1310. "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
  1311. "0x%lx, row %d, channel %d, label \"%s\": %s\n",
  1312. page_frame_number, offset_in_page,
  1313. mci->csrows[row].grain, syndrome, row, channel,
  1314. mci->csrows[row].channels[channel].label, msg);
  1315. mci->ce_count++;
  1316. mci->csrows[row].ce_count++;
  1317. mci->csrows[row].channels[channel].ce_count++;
  1318. if (mci->scrub_mode & SCRUB_SW_SRC) {
  1319. /*
  1320. * Some MC's can remap memory so that it is still available
  1321. * at a different address when PCI devices map into memory.
  1322. * MC's that can't do this lose the memory where PCI devices
  1323. * are mapped. This mapping is MC dependant and so we call
  1324. * back into the MC driver for it to map the MC page to
  1325. * a physical (CPU) page which can then be mapped to a virtual
  1326. * page - which can then be scrubbed.
  1327. */
  1328. remapped_page = mci->ctl_page_to_phys ?
  1329. mci->ctl_page_to_phys(mci, page_frame_number) :
  1330. page_frame_number;
  1331. edac_mc_scrub_block(remapped_page, offset_in_page,
  1332. mci->csrows[row].grain);
  1333. }
  1334. }
  1335. EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
  1336. void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
  1337. {
  1338. if (log_ce)
  1339. edac_mc_printk(mci, KERN_WARNING,
  1340. "CE - no information available: %s\n", msg);
  1341. mci->ce_noinfo_count++;
  1342. mci->ce_count++;
  1343. }
  1344. EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
  1345. void edac_mc_handle_ue(struct mem_ctl_info *mci,
  1346. unsigned long page_frame_number, unsigned long offset_in_page,
  1347. int row, const char *msg)
  1348. {
  1349. int len = EDAC_MC_LABEL_LEN * 4;
  1350. char labels[len + 1];
  1351. char *pos = labels;
  1352. int chan;
  1353. int chars;
  1354. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1355. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1356. if (row >= mci->nr_csrows || row < 0) {
  1357. /* something is wrong */
  1358. edac_mc_printk(mci, KERN_ERR,
  1359. "INTERNAL ERROR: row out of range "
  1360. "(%d >= %d)\n", row, mci->nr_csrows);
  1361. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1362. return;
  1363. }
  1364. chars = snprintf(pos, len + 1, "%s",
  1365. mci->csrows[row].channels[0].label);
  1366. len -= chars;
  1367. pos += chars;
  1368. for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
  1369. chan++) {
  1370. chars = snprintf(pos, len + 1, ":%s",
  1371. mci->csrows[row].channels[chan].label);
  1372. len -= chars;
  1373. pos += chars;
  1374. }
  1375. if (log_ue)
  1376. edac_mc_printk(mci, KERN_EMERG,
  1377. "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
  1378. "labels \"%s\": %s\n", page_frame_number,
  1379. offset_in_page, mci->csrows[row].grain, row, labels,
  1380. msg);
  1381. if (panic_on_ue)
  1382. panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
  1383. "row %d, labels \"%s\": %s\n", mci->mc_idx,
  1384. page_frame_number, offset_in_page,
  1385. mci->csrows[row].grain, row, labels, msg);
  1386. mci->ue_count++;
  1387. mci->csrows[row].ue_count++;
  1388. }
  1389. EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
  1390. void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
  1391. {
  1392. if (panic_on_ue)
  1393. panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
  1394. if (log_ue)
  1395. edac_mc_printk(mci, KERN_WARNING,
  1396. "UE - no information available: %s\n", msg);
  1397. mci->ue_noinfo_count++;
  1398. mci->ue_count++;
  1399. }
  1400. EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
  1401. /*
  1402. * Iterate over all MC instances and check for ECC, et al, errors
  1403. */
  1404. static inline void check_mc_devices(void)
  1405. {
  1406. struct list_head *item;
  1407. struct mem_ctl_info *mci;
  1408. debugf3("%s()\n", __func__);
  1409. down(&mem_ctls_mutex);
  1410. list_for_each(item, &mc_devices) {
  1411. mci = list_entry(item, struct mem_ctl_info, link);
  1412. if (mci->edac_check != NULL)
  1413. mci->edac_check(mci);
  1414. }
  1415. up(&mem_ctls_mutex);
  1416. }
  1417. /*
  1418. * Check MC status every poll_msec.
  1419. * Check PCI status every poll_msec as well.
  1420. *
  1421. * This where the work gets done for edac.
  1422. *
  1423. * SMP safe, doesn't use NMI, and auto-rate-limits.
  1424. */
  1425. static void do_edac_check(void)
  1426. {
  1427. debugf3("%s()\n", __func__);
  1428. check_mc_devices();
  1429. do_pci_parity_check();
  1430. }
  1431. static int edac_kernel_thread(void *arg)
  1432. {
  1433. while (!kthread_should_stop()) {
  1434. do_edac_check();
  1435. /* goto sleep for the interval */
  1436. schedule_timeout_interruptible((HZ * poll_msec) / 1000);
  1437. try_to_freeze();
  1438. }
  1439. return 0;
  1440. }
  1441. /*
  1442. * edac_mc_init
  1443. * module initialization entry point
  1444. */
  1445. static int __init edac_mc_init(void)
  1446. {
  1447. edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
  1448. /*
  1449. * Harvest and clear any boot/initialization PCI parity errors
  1450. *
  1451. * FIXME: This only clears errors logged by devices present at time of
  1452. * module initialization. We should also do an initial clear
  1453. * of each newly hotplugged device.
  1454. */
  1455. clear_pci_parity_errors();
  1456. /* Create the MC sysfs entries */
  1457. if (edac_sysfs_memctrl_setup()) {
  1458. edac_printk(KERN_ERR, EDAC_MC,
  1459. "Error initializing sysfs code\n");
  1460. return -ENODEV;
  1461. }
  1462. /* Create the PCI parity sysfs entries */
  1463. if (edac_sysfs_pci_setup()) {
  1464. edac_sysfs_memctrl_teardown();
  1465. edac_printk(KERN_ERR, EDAC_MC,
  1466. "EDAC PCI: Error initializing sysfs code\n");
  1467. return -ENODEV;
  1468. }
  1469. /* create our kernel thread */
  1470. edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
  1471. if (IS_ERR(edac_thread)) {
  1472. /* remove the sysfs entries */
  1473. edac_sysfs_memctrl_teardown();
  1474. edac_sysfs_pci_teardown();
  1475. return PTR_ERR(edac_thread);
  1476. }
  1477. return 0;
  1478. }
  1479. /*
  1480. * edac_mc_exit()
  1481. * module exit/termination functioni
  1482. */
  1483. static void __exit edac_mc_exit(void)
  1484. {
  1485. debugf0("%s()\n", __func__);
  1486. kthread_stop(edac_thread);
  1487. /* tear down the sysfs device */
  1488. edac_sysfs_memctrl_teardown();
  1489. edac_sysfs_pci_teardown();
  1490. }
  1491. module_init(edac_mc_init);
  1492. module_exit(edac_mc_exit);
  1493. MODULE_LICENSE("GPL");
  1494. MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
  1495. "Based on work by Dan Hollis et al");
  1496. MODULE_DESCRIPTION("Core library routines for MC reporting");
  1497. module_param(panic_on_ue, int, 0644);
  1498. MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  1499. #ifdef CONFIG_PCI
  1500. module_param(check_pci_parity, int, 0644);
  1501. MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
  1502. module_param(panic_on_pci_parity, int, 0644);
  1503. MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
  1504. #endif
  1505. module_param(log_ue, int, 0644);
  1506. MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
  1507. module_param(log_ce, int, 0644);
  1508. MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
  1509. module_param(poll_msec, int, 0644);
  1510. MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
  1511. #ifdef CONFIG_EDAC_DEBUG
  1512. module_param(edac_debug_level, int, 0644);
  1513. MODULE_PARM_DESC(edac_debug_level, "Debug level");
  1514. #endif