pci-sysfs.c 27 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. const struct cpumask *mask;
  64. int len;
  65. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  67. buf[len++] = '\n';
  68. buf[len] = '\0';
  69. return len;
  70. }
  71. static ssize_t local_cpulist_show(struct device *dev,
  72. struct device_attribute *attr, char *buf)
  73. {
  74. const struct cpumask *mask;
  75. int len;
  76. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  77. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. /* show resources */
  83. static ssize_t
  84. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  85. {
  86. struct pci_dev * pci_dev = to_pci_dev(dev);
  87. char * str = buf;
  88. int i;
  89. int max;
  90. resource_size_t start, end;
  91. if (pci_dev->subordinate)
  92. max = DEVICE_COUNT_RESOURCE;
  93. else
  94. max = PCI_BRIDGE_RESOURCES;
  95. for (i = 0; i < max; i++) {
  96. struct resource *res = &pci_dev->resource[i];
  97. pci_resource_to_user(pci_dev, i, res, &start, &end);
  98. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  99. (unsigned long long)start,
  100. (unsigned long long)end,
  101. (unsigned long long)res->flags);
  102. }
  103. return (str - buf);
  104. }
  105. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  106. {
  107. struct pci_dev *pci_dev = to_pci_dev(dev);
  108. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  109. pci_dev->vendor, pci_dev->device,
  110. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  111. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  112. (u8)(pci_dev->class));
  113. }
  114. static ssize_t is_enabled_store(struct device *dev,
  115. struct device_attribute *attr, const char *buf,
  116. size_t count)
  117. {
  118. struct pci_dev *pdev = to_pci_dev(dev);
  119. unsigned long val;
  120. ssize_t result = strict_strtoul(buf, 0, &val);
  121. if (result < 0)
  122. return result;
  123. /* this can crash the machine when done on the "wrong" device */
  124. if (!capable(CAP_SYS_ADMIN))
  125. return -EPERM;
  126. if (!val) {
  127. if (atomic_read(&pdev->enable_cnt) != 0)
  128. pci_disable_device(pdev);
  129. else
  130. result = -EIO;
  131. } else
  132. result = pci_enable_device(pdev);
  133. return result < 0 ? result : count;
  134. }
  135. static ssize_t is_enabled_show(struct device *dev,
  136. struct device_attribute *attr, char *buf)
  137. {
  138. struct pci_dev *pdev;
  139. pdev = to_pci_dev (dev);
  140. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  141. }
  142. #ifdef CONFIG_NUMA
  143. static ssize_t
  144. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  145. {
  146. return sprintf (buf, "%d\n", dev->numa_node);
  147. }
  148. #endif
  149. static ssize_t
  150. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  151. {
  152. struct pci_dev *pdev = to_pci_dev(dev);
  153. if (!pdev->subordinate)
  154. return 0;
  155. return sprintf (buf, "%u\n",
  156. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  157. }
  158. static ssize_t
  159. msi_bus_store(struct device *dev, struct device_attribute *attr,
  160. const char *buf, size_t count)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(dev);
  163. unsigned long val;
  164. if (strict_strtoul(buf, 0, &val) < 0)
  165. return -EINVAL;
  166. /* bad things may happen if the no_msi flag is changed
  167. * while some drivers are loaded */
  168. if (!capable(CAP_SYS_ADMIN))
  169. return -EPERM;
  170. /* Maybe pci devices without subordinate busses shouldn't even have this
  171. * attribute in the first place? */
  172. if (!pdev->subordinate)
  173. return count;
  174. /* Is the flag going to change, or keep the value it already had? */
  175. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  176. !!val) {
  177. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  178. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  179. " bad things could happen\n", val ? "" : " not");
  180. }
  181. return count;
  182. }
  183. #ifdef CONFIG_HOTPLUG
  184. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  185. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  186. size_t count)
  187. {
  188. unsigned long val;
  189. struct pci_bus *b = NULL;
  190. if (strict_strtoul(buf, 0, &val) < 0)
  191. return -EINVAL;
  192. if (val) {
  193. mutex_lock(&pci_remove_rescan_mutex);
  194. while ((b = pci_find_next_bus(b)) != NULL)
  195. pci_rescan_bus(b);
  196. mutex_unlock(&pci_remove_rescan_mutex);
  197. }
  198. return count;
  199. }
  200. struct bus_attribute pci_bus_attrs[] = {
  201. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  202. __ATTR_NULL
  203. };
  204. static void remove_callback(struct device *dev)
  205. {
  206. struct pci_dev *pdev = to_pci_dev(dev);
  207. mutex_lock(&pci_remove_rescan_mutex);
  208. pci_remove_bus_device(pdev);
  209. mutex_unlock(&pci_remove_rescan_mutex);
  210. }
  211. static ssize_t
  212. remove_store(struct device *dev, struct device_attribute *dummy,
  213. const char *buf, size_t count)
  214. {
  215. int ret = 0;
  216. unsigned long val;
  217. struct pci_dev *pdev = to_pci_dev(dev);
  218. if (strict_strtoul(buf, 0, &val) < 0)
  219. return -EINVAL;
  220. if (pci_is_root_bus(pdev->bus))
  221. return -EBUSY;
  222. /* An attribute cannot be unregistered by one of its own methods,
  223. * so we have to use this roundabout approach.
  224. */
  225. if (val)
  226. ret = device_schedule_callback(dev, remove_callback);
  227. if (ret)
  228. count = ret;
  229. return count;
  230. }
  231. #endif
  232. struct device_attribute pci_dev_attrs[] = {
  233. __ATTR_RO(resource),
  234. __ATTR_RO(vendor),
  235. __ATTR_RO(device),
  236. __ATTR_RO(subsystem_vendor),
  237. __ATTR_RO(subsystem_device),
  238. __ATTR_RO(class),
  239. __ATTR_RO(irq),
  240. __ATTR_RO(local_cpus),
  241. __ATTR_RO(local_cpulist),
  242. __ATTR_RO(modalias),
  243. #ifdef CONFIG_NUMA
  244. __ATTR_RO(numa_node),
  245. #endif
  246. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  247. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  248. broken_parity_status_show,broken_parity_status_store),
  249. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  250. #ifdef CONFIG_HOTPLUG
  251. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  252. #endif
  253. __ATTR_NULL,
  254. };
  255. static ssize_t
  256. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  257. {
  258. struct pci_dev *pdev = to_pci_dev(dev);
  259. return sprintf(buf, "%u\n",
  260. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  261. IORESOURCE_ROM_SHADOW));
  262. }
  263. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  264. static ssize_t
  265. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  266. char *buf, loff_t off, size_t count)
  267. {
  268. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  269. unsigned int size = 64;
  270. loff_t init_off = off;
  271. u8 *data = (u8*) buf;
  272. /* Several chips lock up trying to read undefined config space */
  273. if (capable(CAP_SYS_ADMIN)) {
  274. size = dev->cfg_size;
  275. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  276. size = 128;
  277. }
  278. if (off > size)
  279. return 0;
  280. if (off + count > size) {
  281. size -= off;
  282. count = size;
  283. } else {
  284. size = count;
  285. }
  286. if ((off & 1) && size) {
  287. u8 val;
  288. pci_user_read_config_byte(dev, off, &val);
  289. data[off - init_off] = val;
  290. off++;
  291. size--;
  292. }
  293. if ((off & 3) && size > 2) {
  294. u16 val;
  295. pci_user_read_config_word(dev, off, &val);
  296. data[off - init_off] = val & 0xff;
  297. data[off - init_off + 1] = (val >> 8) & 0xff;
  298. off += 2;
  299. size -= 2;
  300. }
  301. while (size > 3) {
  302. u32 val;
  303. pci_user_read_config_dword(dev, off, &val);
  304. data[off - init_off] = val & 0xff;
  305. data[off - init_off + 1] = (val >> 8) & 0xff;
  306. data[off - init_off + 2] = (val >> 16) & 0xff;
  307. data[off - init_off + 3] = (val >> 24) & 0xff;
  308. off += 4;
  309. size -= 4;
  310. }
  311. if (size >= 2) {
  312. u16 val;
  313. pci_user_read_config_word(dev, off, &val);
  314. data[off - init_off] = val & 0xff;
  315. data[off - init_off + 1] = (val >> 8) & 0xff;
  316. off += 2;
  317. size -= 2;
  318. }
  319. if (size > 0) {
  320. u8 val;
  321. pci_user_read_config_byte(dev, off, &val);
  322. data[off - init_off] = val;
  323. off++;
  324. --size;
  325. }
  326. return count;
  327. }
  328. static ssize_t
  329. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  330. char *buf, loff_t off, size_t count)
  331. {
  332. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  333. unsigned int size = count;
  334. loff_t init_off = off;
  335. u8 *data = (u8*) buf;
  336. if (off > dev->cfg_size)
  337. return 0;
  338. if (off + count > dev->cfg_size) {
  339. size = dev->cfg_size - off;
  340. count = size;
  341. }
  342. if ((off & 1) && size) {
  343. pci_user_write_config_byte(dev, off, data[off - init_off]);
  344. off++;
  345. size--;
  346. }
  347. if ((off & 3) && size > 2) {
  348. u16 val = data[off - init_off];
  349. val |= (u16) data[off - init_off + 1] << 8;
  350. pci_user_write_config_word(dev, off, val);
  351. off += 2;
  352. size -= 2;
  353. }
  354. while (size > 3) {
  355. u32 val = data[off - init_off];
  356. val |= (u32) data[off - init_off + 1] << 8;
  357. val |= (u32) data[off - init_off + 2] << 16;
  358. val |= (u32) data[off - init_off + 3] << 24;
  359. pci_user_write_config_dword(dev, off, val);
  360. off += 4;
  361. size -= 4;
  362. }
  363. if (size >= 2) {
  364. u16 val = data[off - init_off];
  365. val |= (u16) data[off - init_off + 1] << 8;
  366. pci_user_write_config_word(dev, off, val);
  367. off += 2;
  368. size -= 2;
  369. }
  370. if (size) {
  371. pci_user_write_config_byte(dev, off, data[off - init_off]);
  372. off++;
  373. --size;
  374. }
  375. return count;
  376. }
  377. static ssize_t
  378. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  379. char *buf, loff_t off, size_t count)
  380. {
  381. struct pci_dev *dev =
  382. to_pci_dev(container_of(kobj, struct device, kobj));
  383. if (off > bin_attr->size)
  384. count = 0;
  385. else if (count > bin_attr->size - off)
  386. count = bin_attr->size - off;
  387. return pci_read_vpd(dev, off, count, buf);
  388. }
  389. static ssize_t
  390. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  391. char *buf, loff_t off, size_t count)
  392. {
  393. struct pci_dev *dev =
  394. to_pci_dev(container_of(kobj, struct device, kobj));
  395. if (off > bin_attr->size)
  396. count = 0;
  397. else if (count > bin_attr->size - off)
  398. count = bin_attr->size - off;
  399. return pci_write_vpd(dev, off, count, buf);
  400. }
  401. #ifdef HAVE_PCI_LEGACY
  402. /**
  403. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  404. * @kobj: kobject corresponding to file to read from
  405. * @buf: buffer to store results
  406. * @off: offset into legacy I/O port space
  407. * @count: number of bytes to read
  408. *
  409. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  410. * callback routine (pci_legacy_read).
  411. */
  412. static ssize_t
  413. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  414. char *buf, loff_t off, size_t count)
  415. {
  416. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  417. struct device,
  418. kobj));
  419. /* Only support 1, 2 or 4 byte accesses */
  420. if (count != 1 && count != 2 && count != 4)
  421. return -EINVAL;
  422. return pci_legacy_read(bus, off, (u32 *)buf, count);
  423. }
  424. /**
  425. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  426. * @kobj: kobject corresponding to file to read from
  427. * @buf: buffer containing value to be written
  428. * @off: offset into legacy I/O port space
  429. * @count: number of bytes to write
  430. *
  431. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  432. * callback routine (pci_legacy_write).
  433. */
  434. static ssize_t
  435. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  436. char *buf, loff_t off, size_t count)
  437. {
  438. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  439. struct device,
  440. kobj));
  441. /* Only support 1, 2 or 4 byte accesses */
  442. if (count != 1 && count != 2 && count != 4)
  443. return -EINVAL;
  444. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  445. }
  446. /**
  447. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  448. * @kobj: kobject corresponding to device to be mapped
  449. * @attr: struct bin_attribute for this file
  450. * @vma: struct vm_area_struct passed to mmap
  451. *
  452. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  453. * legacy memory space (first meg of bus space) into application virtual
  454. * memory space.
  455. */
  456. static int
  457. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  458. struct vm_area_struct *vma)
  459. {
  460. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  461. struct device,
  462. kobj));
  463. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  464. }
  465. /**
  466. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  467. * @kobj: kobject corresponding to device to be mapped
  468. * @attr: struct bin_attribute for this file
  469. * @vma: struct vm_area_struct passed to mmap
  470. *
  471. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  472. * legacy IO space (first meg of bus space) into application virtual
  473. * memory space. Returns -ENOSYS if the operation isn't supported
  474. */
  475. static int
  476. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  477. struct vm_area_struct *vma)
  478. {
  479. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  480. struct device,
  481. kobj));
  482. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  483. }
  484. /**
  485. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  486. * @b: bus to create files under
  487. * @mmap_type: I/O port or memory
  488. *
  489. * Stub implementation. Can be overridden by arch if necessary.
  490. */
  491. void __weak
  492. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  493. {
  494. return;
  495. }
  496. /**
  497. * pci_create_legacy_files - create legacy I/O port and memory files
  498. * @b: bus to create files under
  499. *
  500. * Some platforms allow access to legacy I/O port and ISA memory space on
  501. * a per-bus basis. This routine creates the files and ties them into
  502. * their associated read, write and mmap files from pci-sysfs.c
  503. *
  504. * On error unwind, but don't propogate the error to the caller
  505. * as it is ok to set up the PCI bus without these files.
  506. */
  507. void pci_create_legacy_files(struct pci_bus *b)
  508. {
  509. int error;
  510. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  511. GFP_ATOMIC);
  512. if (!b->legacy_io)
  513. goto kzalloc_err;
  514. b->legacy_io->attr.name = "legacy_io";
  515. b->legacy_io->size = 0xffff;
  516. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  517. b->legacy_io->read = pci_read_legacy_io;
  518. b->legacy_io->write = pci_write_legacy_io;
  519. b->legacy_io->mmap = pci_mmap_legacy_io;
  520. pci_adjust_legacy_attr(b, pci_mmap_io);
  521. error = device_create_bin_file(&b->dev, b->legacy_io);
  522. if (error)
  523. goto legacy_io_err;
  524. /* Allocated above after the legacy_io struct */
  525. b->legacy_mem = b->legacy_io + 1;
  526. b->legacy_mem->attr.name = "legacy_mem";
  527. b->legacy_mem->size = 1024*1024;
  528. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  529. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  530. pci_adjust_legacy_attr(b, pci_mmap_mem);
  531. error = device_create_bin_file(&b->dev, b->legacy_mem);
  532. if (error)
  533. goto legacy_mem_err;
  534. return;
  535. legacy_mem_err:
  536. device_remove_bin_file(&b->dev, b->legacy_io);
  537. legacy_io_err:
  538. kfree(b->legacy_io);
  539. b->legacy_io = NULL;
  540. kzalloc_err:
  541. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  542. "and ISA memory resources to sysfs\n");
  543. return;
  544. }
  545. void pci_remove_legacy_files(struct pci_bus *b)
  546. {
  547. if (b->legacy_io) {
  548. device_remove_bin_file(&b->dev, b->legacy_io);
  549. device_remove_bin_file(&b->dev, b->legacy_mem);
  550. kfree(b->legacy_io); /* both are allocated here */
  551. }
  552. }
  553. #endif /* HAVE_PCI_LEGACY */
  554. #ifdef HAVE_PCI_MMAP
  555. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  556. {
  557. unsigned long nr, start, size;
  558. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  559. start = vma->vm_pgoff;
  560. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  561. if (start < size && size - start >= nr)
  562. return 1;
  563. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  564. current->comm, start, start+nr, pci_name(pdev), resno, size);
  565. return 0;
  566. }
  567. /**
  568. * pci_mmap_resource - map a PCI resource into user memory space
  569. * @kobj: kobject for mapping
  570. * @attr: struct bin_attribute for the file being mapped
  571. * @vma: struct vm_area_struct passed into the mmap
  572. * @write_combine: 1 for write_combine mapping
  573. *
  574. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  575. */
  576. static int
  577. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  578. struct vm_area_struct *vma, int write_combine)
  579. {
  580. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  581. struct device, kobj));
  582. struct resource *res = (struct resource *)attr->private;
  583. enum pci_mmap_state mmap_type;
  584. resource_size_t start, end;
  585. int i;
  586. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  587. if (res == &pdev->resource[i])
  588. break;
  589. if (i >= PCI_ROM_RESOURCE)
  590. return -ENODEV;
  591. if (!pci_mmap_fits(pdev, i, vma))
  592. return -EINVAL;
  593. /* pci_mmap_page_range() expects the same kind of entry as coming
  594. * from /proc/bus/pci/ which is a "user visible" value. If this is
  595. * different from the resource itself, arch will do necessary fixup.
  596. */
  597. pci_resource_to_user(pdev, i, res, &start, &end);
  598. vma->vm_pgoff += start >> PAGE_SHIFT;
  599. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  600. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  601. return -EINVAL;
  602. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  603. }
  604. static int
  605. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  606. struct vm_area_struct *vma)
  607. {
  608. return pci_mmap_resource(kobj, attr, vma, 0);
  609. }
  610. static int
  611. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  612. struct vm_area_struct *vma)
  613. {
  614. return pci_mmap_resource(kobj, attr, vma, 1);
  615. }
  616. /**
  617. * pci_remove_resource_files - cleanup resource files
  618. * @dev: dev to cleanup
  619. *
  620. * If we created resource files for @dev, remove them from sysfs and
  621. * free their resources.
  622. */
  623. static void
  624. pci_remove_resource_files(struct pci_dev *pdev)
  625. {
  626. int i;
  627. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  628. struct bin_attribute *res_attr;
  629. res_attr = pdev->res_attr[i];
  630. if (res_attr) {
  631. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  632. kfree(res_attr);
  633. }
  634. res_attr = pdev->res_attr_wc[i];
  635. if (res_attr) {
  636. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  637. kfree(res_attr);
  638. }
  639. }
  640. }
  641. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  642. {
  643. /* allocate attribute structure, piggyback attribute name */
  644. int name_len = write_combine ? 13 : 10;
  645. struct bin_attribute *res_attr;
  646. int retval;
  647. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  648. if (res_attr) {
  649. char *res_attr_name = (char *)(res_attr + 1);
  650. if (write_combine) {
  651. pdev->res_attr_wc[num] = res_attr;
  652. sprintf(res_attr_name, "resource%d_wc", num);
  653. res_attr->mmap = pci_mmap_resource_wc;
  654. } else {
  655. pdev->res_attr[num] = res_attr;
  656. sprintf(res_attr_name, "resource%d", num);
  657. res_attr->mmap = pci_mmap_resource_uc;
  658. }
  659. res_attr->attr.name = res_attr_name;
  660. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  661. res_attr->size = pci_resource_len(pdev, num);
  662. res_attr->private = &pdev->resource[num];
  663. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  664. } else
  665. retval = -ENOMEM;
  666. return retval;
  667. }
  668. /**
  669. * pci_create_resource_files - create resource files in sysfs for @dev
  670. * @dev: dev in question
  671. *
  672. * Walk the resources in @dev creating files for each resource available.
  673. */
  674. static int pci_create_resource_files(struct pci_dev *pdev)
  675. {
  676. int i;
  677. int retval;
  678. /* Expose the PCI resources from this device as files */
  679. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  680. /* skip empty resources */
  681. if (!pci_resource_len(pdev, i))
  682. continue;
  683. retval = pci_create_attr(pdev, i, 0);
  684. /* for prefetchable resources, create a WC mappable file */
  685. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  686. retval = pci_create_attr(pdev, i, 1);
  687. if (retval) {
  688. pci_remove_resource_files(pdev);
  689. return retval;
  690. }
  691. }
  692. return 0;
  693. }
  694. #else /* !HAVE_PCI_MMAP */
  695. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  696. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  697. #endif /* HAVE_PCI_MMAP */
  698. /**
  699. * pci_write_rom - used to enable access to the PCI ROM display
  700. * @kobj: kernel object handle
  701. * @buf: user input
  702. * @off: file offset
  703. * @count: number of byte in input
  704. *
  705. * writing anything except 0 enables it
  706. */
  707. static ssize_t
  708. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  709. char *buf, loff_t off, size_t count)
  710. {
  711. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  712. if ((off == 0) && (*buf == '0') && (count == 2))
  713. pdev->rom_attr_enabled = 0;
  714. else
  715. pdev->rom_attr_enabled = 1;
  716. return count;
  717. }
  718. /**
  719. * pci_read_rom - read a PCI ROM
  720. * @kobj: kernel object handle
  721. * @buf: where to put the data we read from the ROM
  722. * @off: file offset
  723. * @count: number of bytes to read
  724. *
  725. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  726. * device corresponding to @kobj.
  727. */
  728. static ssize_t
  729. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  730. char *buf, loff_t off, size_t count)
  731. {
  732. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  733. void __iomem *rom;
  734. size_t size;
  735. if (!pdev->rom_attr_enabled)
  736. return -EINVAL;
  737. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  738. if (!rom || !size)
  739. return -EIO;
  740. if (off >= size)
  741. count = 0;
  742. else {
  743. if (off + count > size)
  744. count = size - off;
  745. memcpy_fromio(buf, rom + off, count);
  746. }
  747. pci_unmap_rom(pdev, rom);
  748. return count;
  749. }
  750. static struct bin_attribute pci_config_attr = {
  751. .attr = {
  752. .name = "config",
  753. .mode = S_IRUGO | S_IWUSR,
  754. },
  755. .size = PCI_CFG_SPACE_SIZE,
  756. .read = pci_read_config,
  757. .write = pci_write_config,
  758. };
  759. static struct bin_attribute pcie_config_attr = {
  760. .attr = {
  761. .name = "config",
  762. .mode = S_IRUGO | S_IWUSR,
  763. },
  764. .size = PCI_CFG_SPACE_EXP_SIZE,
  765. .read = pci_read_config,
  766. .write = pci_write_config,
  767. };
  768. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  769. {
  770. return 0;
  771. }
  772. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  773. {
  774. int retval;
  775. struct bin_attribute *attr;
  776. /* If the device has VPD, try to expose it in sysfs. */
  777. if (dev->vpd) {
  778. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  779. if (!attr)
  780. return -ENOMEM;
  781. attr->size = dev->vpd->len;
  782. attr->attr.name = "vpd";
  783. attr->attr.mode = S_IRUSR | S_IWUSR;
  784. attr->read = read_vpd_attr;
  785. attr->write = write_vpd_attr;
  786. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  787. if (retval) {
  788. kfree(dev->vpd->attr);
  789. return retval;
  790. }
  791. dev->vpd->attr = attr;
  792. }
  793. /* Active State Power Management */
  794. pcie_aspm_create_sysfs_dev_files(dev);
  795. return 0;
  796. }
  797. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  798. {
  799. int retval;
  800. int rom_size = 0;
  801. struct bin_attribute *attr;
  802. if (!sysfs_initialized)
  803. return -EACCES;
  804. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  805. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  806. else
  807. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  808. if (retval)
  809. goto err;
  810. retval = pci_create_resource_files(pdev);
  811. if (retval)
  812. goto err_config_file;
  813. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  814. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  815. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  816. rom_size = 0x20000;
  817. /* If the device has a ROM, try to expose it in sysfs. */
  818. if (rom_size) {
  819. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  820. if (!attr) {
  821. retval = -ENOMEM;
  822. goto err_resource_files;
  823. }
  824. attr->size = rom_size;
  825. attr->attr.name = "rom";
  826. attr->attr.mode = S_IRUSR;
  827. attr->read = pci_read_rom;
  828. attr->write = pci_write_rom;
  829. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  830. if (retval) {
  831. kfree(attr);
  832. goto err_resource_files;
  833. }
  834. pdev->rom_attr = attr;
  835. }
  836. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  837. retval = device_create_file(&pdev->dev, &vga_attr);
  838. if (retval)
  839. goto err_rom_file;
  840. }
  841. /* add platform-specific attributes */
  842. retval = pcibios_add_platform_entries(pdev);
  843. if (retval)
  844. goto err_vga_file;
  845. /* add sysfs entries for various capabilities */
  846. retval = pci_create_capabilities_sysfs(pdev);
  847. if (retval)
  848. goto err_vga_file;
  849. return 0;
  850. err_vga_file:
  851. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  852. device_remove_file(&pdev->dev, &vga_attr);
  853. err_rom_file:
  854. if (rom_size) {
  855. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  856. kfree(pdev->rom_attr);
  857. pdev->rom_attr = NULL;
  858. }
  859. err_resource_files:
  860. pci_remove_resource_files(pdev);
  861. err_config_file:
  862. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  863. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  864. else
  865. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  866. err:
  867. return retval;
  868. }
  869. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  870. {
  871. if (dev->vpd && dev->vpd->attr) {
  872. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  873. kfree(dev->vpd->attr);
  874. }
  875. pcie_aspm_remove_sysfs_dev_files(dev);
  876. }
  877. /**
  878. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  879. * @pdev: device whose entries we should free
  880. *
  881. * Cleanup when @pdev is removed from sysfs.
  882. */
  883. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  884. {
  885. int rom_size = 0;
  886. if (!sysfs_initialized)
  887. return;
  888. pci_remove_capabilities_sysfs(pdev);
  889. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  890. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  891. else
  892. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  893. pci_remove_resource_files(pdev);
  894. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  895. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  896. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  897. rom_size = 0x20000;
  898. if (rom_size && pdev->rom_attr) {
  899. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  900. kfree(pdev->rom_attr);
  901. }
  902. }
  903. static int __init pci_sysfs_init(void)
  904. {
  905. struct pci_dev *pdev = NULL;
  906. int retval;
  907. sysfs_initialized = 1;
  908. for_each_pci_dev(pdev) {
  909. retval = pci_create_sysfs_dev_files(pdev);
  910. if (retval) {
  911. pci_dev_put(pdev);
  912. return retval;
  913. }
  914. }
  915. return 0;
  916. }
  917. late_initcall(pci_sysfs_init);