ice1724.c 79 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/module.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "maya44.h"
  49. #include "phase.h"
  50. #include "wtm.h"
  51. #include "se.h"
  52. #include "quartet.h"
  53. #include "psc724.h"
  54. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  55. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  56. MODULE_LICENSE("GPL");
  57. MODULE_SUPPORTED_DEVICE("{"
  58. REVO_DEVICE_DESC
  59. AMP_AUDIO2000_DEVICE_DESC
  60. AUREON_DEVICE_DESC
  61. VT1720_MOBO_DEVICE_DESC
  62. PONTIS_DEVICE_DESC
  63. PRODIGY192_DEVICE_DESC
  64. PRODIGY_HIFI_DEVICE_DESC
  65. JULI_DEVICE_DESC
  66. MAYA44_DEVICE_DESC
  67. PHASE_DEVICE_DESC
  68. WTM_DEVICE_DESC
  69. SE_DEVICE_DESC
  70. QTET_DEVICE_DESC
  71. "{VIA,VT1720},"
  72. "{VIA,VT1724},"
  73. "{ICEnsemble,Generic ICE1724},"
  74. "{ICEnsemble,Generic Envy24HT}"
  75. "{ICEnsemble,Generic Envy24PT}}");
  76. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  77. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  78. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  79. static char *model[SNDRV_CARDS];
  80. module_param_array(index, int, NULL, 0444);
  81. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  82. module_param_array(id, charp, NULL, 0444);
  83. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  84. module_param_array(enable, bool, NULL, 0444);
  85. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  86. module_param_array(model, charp, NULL, 0444);
  87. MODULE_PARM_DESC(model, "Use the given board model.");
  88. /* Both VT1720 and VT1724 have the same PCI IDs */
  89. static DEFINE_PCI_DEVICE_TABLE(snd_vt1724_ids) = {
  90. { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
  91. { 0, }
  92. };
  93. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  94. static int PRO_RATE_LOCKED;
  95. static int PRO_RATE_RESET = 1;
  96. static unsigned int PRO_RATE_DEFAULT = 44100;
  97. static char *ext_clock_names[1] = { "IEC958 In" };
  98. /*
  99. * Basic I/O
  100. */
  101. /*
  102. * default rates, default clock routines
  103. */
  104. /* check whether the clock mode is spdif-in */
  105. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  106. {
  107. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  108. }
  109. /*
  110. * locking rate makes sense only for internal clock mode
  111. */
  112. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  113. {
  114. return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
  115. }
  116. /*
  117. * ac97 section
  118. */
  119. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  120. {
  121. unsigned char old_cmd;
  122. int tm;
  123. for (tm = 0; tm < 0x10000; tm++) {
  124. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  125. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  126. continue;
  127. if (!(old_cmd & VT1724_AC97_READY))
  128. continue;
  129. return old_cmd;
  130. }
  131. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  132. return old_cmd;
  133. }
  134. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  135. {
  136. int tm;
  137. for (tm = 0; tm < 0x10000; tm++)
  138. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  139. return 0;
  140. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  141. return -EIO;
  142. }
  143. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  144. unsigned short reg,
  145. unsigned short val)
  146. {
  147. struct snd_ice1712 *ice = ac97->private_data;
  148. unsigned char old_cmd;
  149. old_cmd = snd_vt1724_ac97_ready(ice);
  150. old_cmd &= ~VT1724_AC97_ID_MASK;
  151. old_cmd |= ac97->num;
  152. outb(reg, ICEMT1724(ice, AC97_INDEX));
  153. outw(val, ICEMT1724(ice, AC97_DATA));
  154. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  155. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  156. }
  157. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  158. {
  159. struct snd_ice1712 *ice = ac97->private_data;
  160. unsigned char old_cmd;
  161. old_cmd = snd_vt1724_ac97_ready(ice);
  162. old_cmd &= ~VT1724_AC97_ID_MASK;
  163. old_cmd |= ac97->num;
  164. outb(reg, ICEMT1724(ice, AC97_INDEX));
  165. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  166. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  167. return ~0;
  168. return inw(ICEMT1724(ice, AC97_DATA));
  169. }
  170. /*
  171. * GPIO operations
  172. */
  173. /* set gpio direction 0 = read, 1 = write */
  174. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  175. {
  176. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  177. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  178. }
  179. /* get gpio direction 0 = read, 1 = write */
  180. static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
  181. {
  182. return inl(ICEREG1724(ice, GPIO_DIRECTION));
  183. }
  184. /* set the gpio mask (0 = writable) */
  185. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  186. {
  187. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  188. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  189. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  190. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  191. }
  192. static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
  193. {
  194. unsigned int mask;
  195. if (!ice->vt1720)
  196. mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
  197. else
  198. mask = 0;
  199. mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
  200. return mask;
  201. }
  202. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  203. {
  204. outw(data, ICEREG1724(ice, GPIO_DATA));
  205. if (!ice->vt1720)
  206. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  207. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  208. }
  209. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  210. {
  211. unsigned int data;
  212. if (!ice->vt1720)
  213. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  214. else
  215. data = 0;
  216. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  217. return data;
  218. }
  219. /*
  220. * MIDI
  221. */
  222. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  223. {
  224. unsigned int count;
  225. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  226. inb(ICEREG1724(ice, MPU_DATA));
  227. }
  228. static inline struct snd_rawmidi_substream *
  229. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  230. {
  231. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  232. struct snd_rawmidi_substream, list);
  233. }
  234. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
  235. static void vt1724_midi_write(struct snd_ice1712 *ice)
  236. {
  237. struct snd_rawmidi_substream *s;
  238. int count, i;
  239. u8 buffer[32];
  240. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  241. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  242. if (count > 0) {
  243. count = snd_rawmidi_transmit(s, buffer, count);
  244. for (i = 0; i < count; ++i)
  245. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  246. }
  247. /* mask irq when all bytes have been transmitted.
  248. * enabled again in output_trigger when the new data comes in.
  249. */
  250. enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
  251. !snd_rawmidi_transmit_empty(s));
  252. }
  253. static void vt1724_midi_read(struct snd_ice1712 *ice)
  254. {
  255. struct snd_rawmidi_substream *s;
  256. int count, i;
  257. u8 buffer[32];
  258. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  259. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  260. if (count > 0) {
  261. count = min(count, 32);
  262. for (i = 0; i < count; ++i)
  263. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  264. snd_rawmidi_receive(s, buffer, count);
  265. }
  266. }
  267. /* call with ice->reg_lock */
  268. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
  269. {
  270. u8 mask = inb(ICEREG1724(ice, IRQMASK));
  271. if (enable)
  272. mask &= ~flag;
  273. else
  274. mask |= flag;
  275. outb(mask, ICEREG1724(ice, IRQMASK));
  276. }
  277. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  278. u8 flag, int enable)
  279. {
  280. struct snd_ice1712 *ice = substream->rmidi->private_data;
  281. spin_lock_irq(&ice->reg_lock);
  282. enable_midi_irq(ice, flag, enable);
  283. spin_unlock_irq(&ice->reg_lock);
  284. }
  285. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  286. {
  287. return 0;
  288. }
  289. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  290. {
  291. return 0;
  292. }
  293. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  294. {
  295. struct snd_ice1712 *ice = s->rmidi->private_data;
  296. unsigned long flags;
  297. spin_lock_irqsave(&ice->reg_lock, flags);
  298. if (up) {
  299. ice->midi_output = 1;
  300. vt1724_midi_write(ice);
  301. } else {
  302. ice->midi_output = 0;
  303. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  304. }
  305. spin_unlock_irqrestore(&ice->reg_lock, flags);
  306. }
  307. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  308. {
  309. struct snd_ice1712 *ice = s->rmidi->private_data;
  310. unsigned long timeout;
  311. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  312. /* 32 bytes should be transmitted in less than about 12 ms */
  313. timeout = jiffies + msecs_to_jiffies(15);
  314. do {
  315. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  316. break;
  317. schedule_timeout_uninterruptible(1);
  318. } while (time_after(timeout, jiffies));
  319. }
  320. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  321. .open = vt1724_midi_output_open,
  322. .close = vt1724_midi_output_close,
  323. .trigger = vt1724_midi_output_trigger,
  324. .drain = vt1724_midi_output_drain,
  325. };
  326. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  327. {
  328. vt1724_midi_clear_rx(s->rmidi->private_data);
  329. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  330. return 0;
  331. }
  332. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  333. {
  334. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  335. return 0;
  336. }
  337. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  338. {
  339. struct snd_ice1712 *ice = s->rmidi->private_data;
  340. unsigned long flags;
  341. spin_lock_irqsave(&ice->reg_lock, flags);
  342. if (up) {
  343. ice->midi_input = 1;
  344. vt1724_midi_read(ice);
  345. } else {
  346. ice->midi_input = 0;
  347. }
  348. spin_unlock_irqrestore(&ice->reg_lock, flags);
  349. }
  350. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  351. .open = vt1724_midi_input_open,
  352. .close = vt1724_midi_input_close,
  353. .trigger = vt1724_midi_input_trigger,
  354. };
  355. /*
  356. * Interrupt handler
  357. */
  358. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  359. {
  360. struct snd_ice1712 *ice = dev_id;
  361. unsigned char status;
  362. unsigned char status_mask =
  363. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  364. int handled = 0;
  365. int timeout = 0;
  366. while (1) {
  367. status = inb(ICEREG1724(ice, IRQSTAT));
  368. status &= status_mask;
  369. if (status == 0)
  370. break;
  371. spin_lock(&ice->reg_lock);
  372. if (++timeout > 10) {
  373. status = inb(ICEREG1724(ice, IRQSTAT));
  374. printk(KERN_ERR "ice1724: Too long irq loop, "
  375. "status = 0x%x\n", status);
  376. if (status & VT1724_IRQ_MPU_TX) {
  377. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  378. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  379. }
  380. spin_unlock(&ice->reg_lock);
  381. break;
  382. }
  383. handled = 1;
  384. if (status & VT1724_IRQ_MPU_TX) {
  385. if (ice->midi_output)
  386. vt1724_midi_write(ice);
  387. else
  388. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  389. /* Due to mysterical reasons, MPU_TX is always
  390. * generated (and can't be cleared) when a PCM
  391. * playback is going. So let's ignore at the
  392. * next loop.
  393. */
  394. status_mask &= ~VT1724_IRQ_MPU_TX;
  395. }
  396. if (status & VT1724_IRQ_MPU_RX) {
  397. if (ice->midi_input)
  398. vt1724_midi_read(ice);
  399. else
  400. vt1724_midi_clear_rx(ice);
  401. }
  402. /* ack MPU irq */
  403. outb(status, ICEREG1724(ice, IRQSTAT));
  404. spin_unlock(&ice->reg_lock);
  405. if (status & VT1724_IRQ_MTPCM) {
  406. /*
  407. * Multi-track PCM
  408. * PCM assignment are:
  409. * Playback DMA0 (M/C) = playback_pro_substream
  410. * Playback DMA1 = playback_con_substream_ds[0]
  411. * Playback DMA2 = playback_con_substream_ds[1]
  412. * Playback DMA3 = playback_con_substream_ds[2]
  413. * Playback DMA4 (SPDIF) = playback_con_substream
  414. * Record DMA0 = capture_pro_substream
  415. * Record DMA1 = capture_con_substream
  416. */
  417. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  418. if (mtstat & VT1724_MULTI_PDMA0) {
  419. if (ice->playback_pro_substream)
  420. snd_pcm_period_elapsed(ice->playback_pro_substream);
  421. }
  422. if (mtstat & VT1724_MULTI_RDMA0) {
  423. if (ice->capture_pro_substream)
  424. snd_pcm_period_elapsed(ice->capture_pro_substream);
  425. }
  426. if (mtstat & VT1724_MULTI_PDMA1) {
  427. if (ice->playback_con_substream_ds[0])
  428. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  429. }
  430. if (mtstat & VT1724_MULTI_PDMA2) {
  431. if (ice->playback_con_substream_ds[1])
  432. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  433. }
  434. if (mtstat & VT1724_MULTI_PDMA3) {
  435. if (ice->playback_con_substream_ds[2])
  436. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  437. }
  438. if (mtstat & VT1724_MULTI_PDMA4) {
  439. if (ice->playback_con_substream)
  440. snd_pcm_period_elapsed(ice->playback_con_substream);
  441. }
  442. if (mtstat & VT1724_MULTI_RDMA1) {
  443. if (ice->capture_con_substream)
  444. snd_pcm_period_elapsed(ice->capture_con_substream);
  445. }
  446. /* ack anyway to avoid freeze */
  447. outb(mtstat, ICEMT1724(ice, IRQ));
  448. /* ought to really handle this properly */
  449. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  450. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  451. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  452. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  453. /* If I don't do this, I get machine lockup due to continual interrupts */
  454. }
  455. }
  456. }
  457. return IRQ_RETVAL(handled);
  458. }
  459. /*
  460. * PCM code - professional part (multitrack)
  461. */
  462. static unsigned int rates[] = {
  463. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  464. 32000, 44100, 48000, 64000, 88200, 96000,
  465. 176400, 192000,
  466. };
  467. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  468. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  469. .list = rates,
  470. .mask = 0,
  471. };
  472. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  473. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  474. .list = rates,
  475. .mask = 0,
  476. };
  477. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  478. .count = ARRAY_SIZE(rates),
  479. .list = rates,
  480. .mask = 0,
  481. };
  482. struct vt1724_pcm_reg {
  483. unsigned int addr; /* ADDR register offset */
  484. unsigned int size; /* SIZE register offset */
  485. unsigned int count; /* COUNT register offset */
  486. unsigned int start; /* start & pause bit */
  487. };
  488. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  489. {
  490. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  491. unsigned char what;
  492. unsigned char old;
  493. struct snd_pcm_substream *s;
  494. what = 0;
  495. snd_pcm_group_for_each_entry(s, substream) {
  496. if (snd_pcm_substream_chip(s) == ice) {
  497. const struct vt1724_pcm_reg *reg;
  498. reg = s->runtime->private_data;
  499. what |= reg->start;
  500. snd_pcm_trigger_done(s, substream);
  501. }
  502. }
  503. switch (cmd) {
  504. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  505. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  506. spin_lock(&ice->reg_lock);
  507. old = inb(ICEMT1724(ice, DMA_PAUSE));
  508. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  509. old |= what;
  510. else
  511. old &= ~what;
  512. outb(old, ICEMT1724(ice, DMA_PAUSE));
  513. spin_unlock(&ice->reg_lock);
  514. break;
  515. case SNDRV_PCM_TRIGGER_START:
  516. case SNDRV_PCM_TRIGGER_STOP:
  517. case SNDRV_PCM_TRIGGER_SUSPEND:
  518. spin_lock(&ice->reg_lock);
  519. old = inb(ICEMT1724(ice, DMA_CONTROL));
  520. if (cmd == SNDRV_PCM_TRIGGER_START)
  521. old |= what;
  522. else
  523. old &= ~what;
  524. outb(old, ICEMT1724(ice, DMA_CONTROL));
  525. spin_unlock(&ice->reg_lock);
  526. break;
  527. case SNDRV_PCM_TRIGGER_RESUME:
  528. /* apps will have to restart stream */
  529. break;
  530. default:
  531. return -EINVAL;
  532. }
  533. return 0;
  534. }
  535. /*
  536. */
  537. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  538. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  539. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  540. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  541. static const unsigned int stdclock_rate_list[16] = {
  542. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  543. 22050, 11025, 88200, 176400, 0, 192000, 64000
  544. };
  545. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  546. {
  547. unsigned int rate;
  548. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  549. return rate;
  550. }
  551. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  552. {
  553. int i;
  554. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  555. if (stdclock_rate_list[i] == rate) {
  556. outb(i, ICEMT1724(ice, RATE));
  557. return;
  558. }
  559. }
  560. }
  561. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  562. unsigned int rate)
  563. {
  564. unsigned char val, old;
  565. /* check MT02 */
  566. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  567. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  568. if (rate > 96000)
  569. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  570. else
  571. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  572. if (val != old) {
  573. outb(val, ICEMT1724(ice, I2S_FORMAT));
  574. /* master clock changed */
  575. return 1;
  576. }
  577. }
  578. /* no change in master clock */
  579. return 0;
  580. }
  581. static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  582. int force)
  583. {
  584. unsigned long flags;
  585. unsigned char mclk_change;
  586. unsigned int i, old_rate;
  587. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  588. return -EINVAL;
  589. spin_lock_irqsave(&ice->reg_lock, flags);
  590. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  591. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  592. /* running? we cannot change the rate now... */
  593. spin_unlock_irqrestore(&ice->reg_lock, flags);
  594. return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
  595. }
  596. if (!force && is_pro_rate_locked(ice)) {
  597. /* comparing required and current rate - makes sense for
  598. * internal clock only */
  599. spin_unlock_irqrestore(&ice->reg_lock, flags);
  600. return (rate == ice->cur_rate) ? 0 : -EBUSY;
  601. }
  602. if (force || !ice->is_spdif_master(ice)) {
  603. /* force means the rate was switched by ucontrol, otherwise
  604. * setting clock rate for internal clock mode */
  605. old_rate = ice->get_rate(ice);
  606. if (force || (old_rate != rate))
  607. ice->set_rate(ice, rate);
  608. else if (rate == ice->cur_rate) {
  609. spin_unlock_irqrestore(&ice->reg_lock, flags);
  610. return 0;
  611. }
  612. }
  613. ice->cur_rate = rate;
  614. /* setting master clock */
  615. mclk_change = ice->set_mclk(ice, rate);
  616. spin_unlock_irqrestore(&ice->reg_lock, flags);
  617. if (mclk_change && ice->gpio.i2s_mclk_changed)
  618. ice->gpio.i2s_mclk_changed(ice);
  619. if (ice->gpio.set_pro_rate)
  620. ice->gpio.set_pro_rate(ice, rate);
  621. /* set up codecs */
  622. for (i = 0; i < ice->akm_codecs; i++) {
  623. if (ice->akm[i].ops.set_rate_val)
  624. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  625. }
  626. if (ice->spdif.ops.setup_rate)
  627. ice->spdif.ops.setup_rate(ice, rate);
  628. return 0;
  629. }
  630. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  631. struct snd_pcm_hw_params *hw_params)
  632. {
  633. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  634. int i, chs, err;
  635. chs = params_channels(hw_params);
  636. mutex_lock(&ice->open_mutex);
  637. /* mark surround channels */
  638. if (substream == ice->playback_pro_substream) {
  639. /* PDMA0 can be multi-channel up to 8 */
  640. chs = chs / 2 - 1;
  641. for (i = 0; i < chs; i++) {
  642. if (ice->pcm_reserved[i] &&
  643. ice->pcm_reserved[i] != substream) {
  644. mutex_unlock(&ice->open_mutex);
  645. return -EBUSY;
  646. }
  647. ice->pcm_reserved[i] = substream;
  648. }
  649. for (; i < 3; i++) {
  650. if (ice->pcm_reserved[i] == substream)
  651. ice->pcm_reserved[i] = NULL;
  652. }
  653. } else {
  654. for (i = 0; i < 3; i++) {
  655. /* check individual playback stream */
  656. if (ice->playback_con_substream_ds[i] == substream) {
  657. if (ice->pcm_reserved[i] &&
  658. ice->pcm_reserved[i] != substream) {
  659. mutex_unlock(&ice->open_mutex);
  660. return -EBUSY;
  661. }
  662. ice->pcm_reserved[i] = substream;
  663. break;
  664. }
  665. }
  666. }
  667. mutex_unlock(&ice->open_mutex);
  668. err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  669. if (err < 0)
  670. return err;
  671. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  672. }
  673. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  674. {
  675. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  676. int i;
  677. mutex_lock(&ice->open_mutex);
  678. /* unmark surround channels */
  679. for (i = 0; i < 3; i++)
  680. if (ice->pcm_reserved[i] == substream)
  681. ice->pcm_reserved[i] = NULL;
  682. mutex_unlock(&ice->open_mutex);
  683. return snd_pcm_lib_free_pages(substream);
  684. }
  685. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  686. {
  687. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  688. unsigned char val;
  689. unsigned int size;
  690. spin_lock_irq(&ice->reg_lock);
  691. val = (8 - substream->runtime->channels) >> 1;
  692. outb(val, ICEMT1724(ice, BURST));
  693. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  694. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  695. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  696. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  697. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  698. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  699. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  700. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  701. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  702. spin_unlock_irq(&ice->reg_lock);
  703. /*
  704. printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
  705. "buffer = 0x%x, period = 0x%x\n",
  706. substream->runtime->channels,
  707. (unsigned int)substream->runtime->dma_addr,
  708. snd_pcm_lib_buffer_bytes(substream),
  709. snd_pcm_lib_period_bytes(substream));
  710. */
  711. return 0;
  712. }
  713. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  714. {
  715. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  716. size_t ptr;
  717. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  718. return 0;
  719. #if 0 /* read PLAYBACK_ADDR */
  720. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  721. if (ptr < substream->runtime->dma_addr) {
  722. snd_printd("ice1724: invalid negative ptr\n");
  723. return 0;
  724. }
  725. ptr -= substream->runtime->dma_addr;
  726. ptr = bytes_to_frames(substream->runtime, ptr);
  727. if (ptr >= substream->runtime->buffer_size) {
  728. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  729. (int)ptr, (int)substream->runtime->period_size);
  730. return 0;
  731. }
  732. #else /* read PLAYBACK_SIZE */
  733. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  734. ptr = (ptr + 1) << 2;
  735. ptr = bytes_to_frames(substream->runtime, ptr);
  736. if (!ptr)
  737. ;
  738. else if (ptr <= substream->runtime->buffer_size)
  739. ptr = substream->runtime->buffer_size - ptr;
  740. else {
  741. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  742. (int)ptr, (int)substream->runtime->buffer_size);
  743. ptr = 0;
  744. }
  745. #endif
  746. return ptr;
  747. }
  748. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  749. {
  750. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  751. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  752. spin_lock_irq(&ice->reg_lock);
  753. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  754. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  755. ice->profi_port + reg->size);
  756. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  757. ice->profi_port + reg->count);
  758. spin_unlock_irq(&ice->reg_lock);
  759. return 0;
  760. }
  761. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  762. {
  763. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  764. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  765. size_t ptr;
  766. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  767. return 0;
  768. #if 0 /* use ADDR register */
  769. ptr = inl(ice->profi_port + reg->addr);
  770. ptr -= substream->runtime->dma_addr;
  771. return bytes_to_frames(substream->runtime, ptr);
  772. #else /* use SIZE register */
  773. ptr = inw(ice->profi_port + reg->size);
  774. ptr = (ptr + 1) << 2;
  775. ptr = bytes_to_frames(substream->runtime, ptr);
  776. if (!ptr)
  777. ;
  778. else if (ptr <= substream->runtime->buffer_size)
  779. ptr = substream->runtime->buffer_size - ptr;
  780. else {
  781. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  782. (int)ptr, (int)substream->runtime->buffer_size);
  783. ptr = 0;
  784. }
  785. return ptr;
  786. #endif
  787. }
  788. static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
  789. .addr = VT1724_MT_PLAYBACK_ADDR,
  790. .size = VT1724_MT_PLAYBACK_SIZE,
  791. .count = VT1724_MT_PLAYBACK_COUNT,
  792. .start = VT1724_PDMA0_START,
  793. };
  794. static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
  795. .addr = VT1724_MT_PDMA4_ADDR,
  796. .size = VT1724_MT_PDMA4_SIZE,
  797. .count = VT1724_MT_PDMA4_COUNT,
  798. .start = VT1724_PDMA4_START,
  799. };
  800. static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
  801. .addr = VT1724_MT_CAPTURE_ADDR,
  802. .size = VT1724_MT_CAPTURE_SIZE,
  803. .count = VT1724_MT_CAPTURE_COUNT,
  804. .start = VT1724_RDMA0_START,
  805. };
  806. static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
  807. .addr = VT1724_MT_RDMA1_ADDR,
  808. .size = VT1724_MT_RDMA1_SIZE,
  809. .count = VT1724_MT_RDMA1_COUNT,
  810. .start = VT1724_RDMA1_START,
  811. };
  812. #define vt1724_playback_pro_reg vt1724_pdma0_reg
  813. #define vt1724_playback_spdif_reg vt1724_pdma4_reg
  814. #define vt1724_capture_pro_reg vt1724_rdma0_reg
  815. #define vt1724_capture_spdif_reg vt1724_rdma1_reg
  816. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  817. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  818. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  819. SNDRV_PCM_INFO_MMAP_VALID |
  820. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  821. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  822. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  823. .rate_min = 8000,
  824. .rate_max = 192000,
  825. .channels_min = 2,
  826. .channels_max = 8,
  827. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  828. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  829. .period_bytes_max = (1UL << 21),
  830. .periods_min = 2,
  831. .periods_max = 1024,
  832. };
  833. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  834. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  835. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  836. SNDRV_PCM_INFO_MMAP_VALID |
  837. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  838. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  839. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  840. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  841. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  842. SNDRV_PCM_RATE_192000),
  843. .rate_min = 32000,
  844. .rate_max = 192000,
  845. .channels_min = 2,
  846. .channels_max = 2,
  847. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  848. .period_bytes_min = 2 * 4 * 2,
  849. .period_bytes_max = (1UL << 18),
  850. .periods_min = 2,
  851. .periods_max = 1024,
  852. };
  853. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  854. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  855. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  856. SNDRV_PCM_INFO_MMAP_VALID |
  857. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  858. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  859. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  860. .rate_min = 8000,
  861. .rate_max = 192000,
  862. .channels_min = 2,
  863. .channels_max = 2,
  864. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  865. .period_bytes_min = 2 * 4 * 2,
  866. .period_bytes_max = (1UL << 18),
  867. .periods_min = 2,
  868. .periods_max = 1024,
  869. };
  870. /*
  871. * set rate constraints
  872. */
  873. static void set_std_hw_rates(struct snd_ice1712 *ice)
  874. {
  875. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  876. /* I2S */
  877. /* VT1720 doesn't support more than 96kHz */
  878. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  879. ice->hw_rates = &hw_constraints_rates_192;
  880. else
  881. ice->hw_rates = &hw_constraints_rates_96;
  882. } else {
  883. /* ACLINK */
  884. ice->hw_rates = &hw_constraints_rates_48;
  885. }
  886. }
  887. static int set_rate_constraints(struct snd_ice1712 *ice,
  888. struct snd_pcm_substream *substream)
  889. {
  890. struct snd_pcm_runtime *runtime = substream->runtime;
  891. runtime->hw.rate_min = ice->hw_rates->list[0];
  892. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  893. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  894. return snd_pcm_hw_constraint_list(runtime, 0,
  895. SNDRV_PCM_HW_PARAM_RATE,
  896. ice->hw_rates);
  897. }
  898. /* if the card has the internal rate locked (is_pro_locked), limit runtime
  899. hw rates to the current internal rate only.
  900. */
  901. static void constrain_rate_if_locked(struct snd_pcm_substream *substream)
  902. {
  903. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  904. struct snd_pcm_runtime *runtime = substream->runtime;
  905. unsigned int rate;
  906. if (is_pro_rate_locked(ice)) {
  907. rate = ice->get_rate(ice);
  908. if (rate >= runtime->hw.rate_min
  909. && rate <= runtime->hw.rate_max) {
  910. runtime->hw.rate_min = rate;
  911. runtime->hw.rate_max = rate;
  912. }
  913. }
  914. }
  915. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  916. * actually used
  917. */
  918. #define VT1724_BUFFER_ALIGN 0x20
  919. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  920. {
  921. struct snd_pcm_runtime *runtime = substream->runtime;
  922. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  923. int chs, num_indeps;
  924. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  925. ice->playback_pro_substream = substream;
  926. runtime->hw = snd_vt1724_playback_pro;
  927. snd_pcm_set_sync(substream);
  928. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  929. set_rate_constraints(ice, substream);
  930. mutex_lock(&ice->open_mutex);
  931. /* calculate the currently available channels */
  932. num_indeps = ice->num_total_dacs / 2 - 1;
  933. for (chs = 0; chs < num_indeps; chs++) {
  934. if (ice->pcm_reserved[chs])
  935. break;
  936. }
  937. chs = (chs + 1) * 2;
  938. runtime->hw.channels_max = chs;
  939. if (chs > 2) /* channels must be even */
  940. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  941. mutex_unlock(&ice->open_mutex);
  942. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  943. VT1724_BUFFER_ALIGN);
  944. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  945. VT1724_BUFFER_ALIGN);
  946. constrain_rate_if_locked(substream);
  947. if (ice->pro_open)
  948. ice->pro_open(ice, substream);
  949. return 0;
  950. }
  951. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  952. {
  953. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  954. struct snd_pcm_runtime *runtime = substream->runtime;
  955. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  956. ice->capture_pro_substream = substream;
  957. runtime->hw = snd_vt1724_2ch_stereo;
  958. snd_pcm_set_sync(substream);
  959. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  960. set_rate_constraints(ice, substream);
  961. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  962. VT1724_BUFFER_ALIGN);
  963. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  964. VT1724_BUFFER_ALIGN);
  965. constrain_rate_if_locked(substream);
  966. if (ice->pro_open)
  967. ice->pro_open(ice, substream);
  968. return 0;
  969. }
  970. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  971. {
  972. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  973. if (PRO_RATE_RESET)
  974. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  975. ice->playback_pro_substream = NULL;
  976. return 0;
  977. }
  978. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  979. {
  980. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  981. if (PRO_RATE_RESET)
  982. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  983. ice->capture_pro_substream = NULL;
  984. return 0;
  985. }
  986. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  987. .open = snd_vt1724_playback_pro_open,
  988. .close = snd_vt1724_playback_pro_close,
  989. .ioctl = snd_pcm_lib_ioctl,
  990. .hw_params = snd_vt1724_pcm_hw_params,
  991. .hw_free = snd_vt1724_pcm_hw_free,
  992. .prepare = snd_vt1724_playback_pro_prepare,
  993. .trigger = snd_vt1724_pcm_trigger,
  994. .pointer = snd_vt1724_playback_pro_pointer,
  995. };
  996. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  997. .open = snd_vt1724_capture_pro_open,
  998. .close = snd_vt1724_capture_pro_close,
  999. .ioctl = snd_pcm_lib_ioctl,
  1000. .hw_params = snd_vt1724_pcm_hw_params,
  1001. .hw_free = snd_vt1724_pcm_hw_free,
  1002. .prepare = snd_vt1724_pcm_prepare,
  1003. .trigger = snd_vt1724_pcm_trigger,
  1004. .pointer = snd_vt1724_pcm_pointer,
  1005. };
  1006. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  1007. {
  1008. struct snd_pcm *pcm;
  1009. int capt, err;
  1010. if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
  1011. VT1724_CFG_ADC_NONE)
  1012. capt = 0;
  1013. else
  1014. capt = 1;
  1015. err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
  1016. if (err < 0)
  1017. return err;
  1018. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  1019. if (capt)
  1020. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1021. &snd_vt1724_capture_pro_ops);
  1022. pcm->private_data = ice;
  1023. pcm->info_flags = 0;
  1024. strcpy(pcm->name, "ICE1724");
  1025. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1026. snd_dma_pci_data(ice->pci),
  1027. 256*1024, 256*1024);
  1028. ice->pcm_pro = pcm;
  1029. return 0;
  1030. }
  1031. /*
  1032. * SPDIF PCM
  1033. */
  1034. /* update spdif control bits; call with reg_lock */
  1035. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  1036. {
  1037. unsigned char cbit, disabled;
  1038. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  1039. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  1040. if (cbit != disabled)
  1041. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  1042. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  1043. if (cbit != disabled)
  1044. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  1045. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  1046. }
  1047. /* update SPDIF control bits according to the given rate */
  1048. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  1049. {
  1050. unsigned int val, nval;
  1051. unsigned long flags;
  1052. spin_lock_irqsave(&ice->reg_lock, flags);
  1053. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1054. nval &= ~(7 << 12);
  1055. switch (rate) {
  1056. case 44100: break;
  1057. case 48000: nval |= 2 << 12; break;
  1058. case 32000: nval |= 3 << 12; break;
  1059. case 88200: nval |= 4 << 12; break;
  1060. case 96000: nval |= 5 << 12; break;
  1061. case 192000: nval |= 6 << 12; break;
  1062. case 176400: nval |= 7 << 12; break;
  1063. }
  1064. if (val != nval)
  1065. update_spdif_bits(ice, nval);
  1066. spin_unlock_irqrestore(&ice->reg_lock, flags);
  1067. }
  1068. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  1069. {
  1070. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1071. if (!ice->force_pdma4)
  1072. update_spdif_rate(ice, substream->runtime->rate);
  1073. return snd_vt1724_pcm_prepare(substream);
  1074. }
  1075. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  1076. {
  1077. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1078. struct snd_pcm_runtime *runtime = substream->runtime;
  1079. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  1080. ice->playback_con_substream = substream;
  1081. if (ice->force_pdma4) {
  1082. runtime->hw = snd_vt1724_2ch_stereo;
  1083. set_rate_constraints(ice, substream);
  1084. } else
  1085. runtime->hw = snd_vt1724_spdif;
  1086. snd_pcm_set_sync(substream);
  1087. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1088. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1089. VT1724_BUFFER_ALIGN);
  1090. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1091. VT1724_BUFFER_ALIGN);
  1092. constrain_rate_if_locked(substream);
  1093. if (ice->spdif.ops.open)
  1094. ice->spdif.ops.open(ice, substream);
  1095. return 0;
  1096. }
  1097. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1098. {
  1099. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1100. if (PRO_RATE_RESET)
  1101. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1102. ice->playback_con_substream = NULL;
  1103. if (ice->spdif.ops.close)
  1104. ice->spdif.ops.close(ice, substream);
  1105. return 0;
  1106. }
  1107. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1108. {
  1109. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1110. struct snd_pcm_runtime *runtime = substream->runtime;
  1111. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1112. ice->capture_con_substream = substream;
  1113. if (ice->force_rdma1) {
  1114. runtime->hw = snd_vt1724_2ch_stereo;
  1115. set_rate_constraints(ice, substream);
  1116. } else
  1117. runtime->hw = snd_vt1724_spdif;
  1118. snd_pcm_set_sync(substream);
  1119. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1120. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1121. VT1724_BUFFER_ALIGN);
  1122. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1123. VT1724_BUFFER_ALIGN);
  1124. constrain_rate_if_locked(substream);
  1125. if (ice->spdif.ops.open)
  1126. ice->spdif.ops.open(ice, substream);
  1127. return 0;
  1128. }
  1129. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1130. {
  1131. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1132. if (PRO_RATE_RESET)
  1133. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1134. ice->capture_con_substream = NULL;
  1135. if (ice->spdif.ops.close)
  1136. ice->spdif.ops.close(ice, substream);
  1137. return 0;
  1138. }
  1139. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1140. .open = snd_vt1724_playback_spdif_open,
  1141. .close = snd_vt1724_playback_spdif_close,
  1142. .ioctl = snd_pcm_lib_ioctl,
  1143. .hw_params = snd_vt1724_pcm_hw_params,
  1144. .hw_free = snd_vt1724_pcm_hw_free,
  1145. .prepare = snd_vt1724_playback_spdif_prepare,
  1146. .trigger = snd_vt1724_pcm_trigger,
  1147. .pointer = snd_vt1724_pcm_pointer,
  1148. };
  1149. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1150. .open = snd_vt1724_capture_spdif_open,
  1151. .close = snd_vt1724_capture_spdif_close,
  1152. .ioctl = snd_pcm_lib_ioctl,
  1153. .hw_params = snd_vt1724_pcm_hw_params,
  1154. .hw_free = snd_vt1724_pcm_hw_free,
  1155. .prepare = snd_vt1724_pcm_prepare,
  1156. .trigger = snd_vt1724_pcm_trigger,
  1157. .pointer = snd_vt1724_pcm_pointer,
  1158. };
  1159. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1160. {
  1161. char *name;
  1162. struct snd_pcm *pcm;
  1163. int play, capt;
  1164. int err;
  1165. if (ice->force_pdma4 ||
  1166. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1167. play = 1;
  1168. ice->has_spdif = 1;
  1169. } else
  1170. play = 0;
  1171. if (ice->force_rdma1 ||
  1172. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1173. capt = 1;
  1174. ice->has_spdif = 1;
  1175. } else
  1176. capt = 0;
  1177. if (!play && !capt)
  1178. return 0; /* no spdif device */
  1179. if (ice->force_pdma4 || ice->force_rdma1)
  1180. name = "ICE1724 Secondary";
  1181. else
  1182. name = "ICE1724 IEC958";
  1183. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1184. if (err < 0)
  1185. return err;
  1186. if (play)
  1187. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1188. &snd_vt1724_playback_spdif_ops);
  1189. if (capt)
  1190. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1191. &snd_vt1724_capture_spdif_ops);
  1192. pcm->private_data = ice;
  1193. pcm->info_flags = 0;
  1194. strcpy(pcm->name, name);
  1195. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1196. snd_dma_pci_data(ice->pci),
  1197. 256*1024, 256*1024);
  1198. ice->pcm = pcm;
  1199. return 0;
  1200. }
  1201. /*
  1202. * independent surround PCMs
  1203. */
  1204. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1205. {
  1206. .addr = VT1724_MT_PDMA1_ADDR,
  1207. .size = VT1724_MT_PDMA1_SIZE,
  1208. .count = VT1724_MT_PDMA1_COUNT,
  1209. .start = VT1724_PDMA1_START,
  1210. },
  1211. {
  1212. .addr = VT1724_MT_PDMA2_ADDR,
  1213. .size = VT1724_MT_PDMA2_SIZE,
  1214. .count = VT1724_MT_PDMA2_COUNT,
  1215. .start = VT1724_PDMA2_START,
  1216. },
  1217. {
  1218. .addr = VT1724_MT_PDMA3_ADDR,
  1219. .size = VT1724_MT_PDMA3_SIZE,
  1220. .count = VT1724_MT_PDMA3_COUNT,
  1221. .start = VT1724_PDMA3_START,
  1222. },
  1223. };
  1224. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1225. {
  1226. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1227. unsigned char val;
  1228. spin_lock_irq(&ice->reg_lock);
  1229. val = 3 - substream->number;
  1230. if (inb(ICEMT1724(ice, BURST)) < val)
  1231. outb(val, ICEMT1724(ice, BURST));
  1232. spin_unlock_irq(&ice->reg_lock);
  1233. return snd_vt1724_pcm_prepare(substream);
  1234. }
  1235. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1236. {
  1237. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1238. struct snd_pcm_runtime *runtime = substream->runtime;
  1239. mutex_lock(&ice->open_mutex);
  1240. /* already used by PDMA0? */
  1241. if (ice->pcm_reserved[substream->number]) {
  1242. mutex_unlock(&ice->open_mutex);
  1243. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1244. }
  1245. mutex_unlock(&ice->open_mutex);
  1246. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1247. ice->playback_con_substream_ds[substream->number] = substream;
  1248. runtime->hw = snd_vt1724_2ch_stereo;
  1249. snd_pcm_set_sync(substream);
  1250. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1251. set_rate_constraints(ice, substream);
  1252. return 0;
  1253. }
  1254. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1255. {
  1256. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1257. if (PRO_RATE_RESET)
  1258. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1259. ice->playback_con_substream_ds[substream->number] = NULL;
  1260. ice->pcm_reserved[substream->number] = NULL;
  1261. return 0;
  1262. }
  1263. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1264. .open = snd_vt1724_playback_indep_open,
  1265. .close = snd_vt1724_playback_indep_close,
  1266. .ioctl = snd_pcm_lib_ioctl,
  1267. .hw_params = snd_vt1724_pcm_hw_params,
  1268. .hw_free = snd_vt1724_pcm_hw_free,
  1269. .prepare = snd_vt1724_playback_indep_prepare,
  1270. .trigger = snd_vt1724_pcm_trigger,
  1271. .pointer = snd_vt1724_pcm_pointer,
  1272. };
  1273. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1274. {
  1275. struct snd_pcm *pcm;
  1276. int play;
  1277. int err;
  1278. play = ice->num_total_dacs / 2 - 1;
  1279. if (play <= 0)
  1280. return 0;
  1281. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1282. if (err < 0)
  1283. return err;
  1284. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1285. &snd_vt1724_playback_indep_ops);
  1286. pcm->private_data = ice;
  1287. pcm->info_flags = 0;
  1288. strcpy(pcm->name, "ICE1724 Surround PCM");
  1289. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1290. snd_dma_pci_data(ice->pci),
  1291. 256*1024, 256*1024);
  1292. ice->pcm_ds = pcm;
  1293. return 0;
  1294. }
  1295. /*
  1296. * Mixer section
  1297. */
  1298. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1299. {
  1300. int err;
  1301. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1302. struct snd_ac97_bus *pbus;
  1303. struct snd_ac97_template ac97;
  1304. static struct snd_ac97_bus_ops ops = {
  1305. .write = snd_vt1724_ac97_write,
  1306. .read = snd_vt1724_ac97_read,
  1307. };
  1308. /* cold reset */
  1309. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1310. mdelay(5); /* FIXME */
  1311. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1312. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1313. if (err < 0)
  1314. return err;
  1315. memset(&ac97, 0, sizeof(ac97));
  1316. ac97.private_data = ice;
  1317. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1318. if (err < 0)
  1319. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1320. else
  1321. return 0;
  1322. }
  1323. /* I2S mixer only */
  1324. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1325. return 0;
  1326. }
  1327. /*
  1328. *
  1329. */
  1330. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1331. {
  1332. return (unsigned int)ice->eeprom.data[idx] | \
  1333. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1334. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1335. }
  1336. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1337. struct snd_info_buffer *buffer)
  1338. {
  1339. struct snd_ice1712 *ice = entry->private_data;
  1340. unsigned int idx;
  1341. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1342. snd_iprintf(buffer, "EEPROM:\n");
  1343. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1344. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1345. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1346. snd_iprintf(buffer, " System Config : 0x%x\n",
  1347. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1348. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1349. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1350. snd_iprintf(buffer, " I2S : 0x%x\n",
  1351. ice->eeprom.data[ICE_EEP2_I2S]);
  1352. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1353. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1354. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1355. ice->eeprom.gpiodir);
  1356. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1357. ice->eeprom.gpiomask);
  1358. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1359. ice->eeprom.gpiostate);
  1360. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1361. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1362. idx, ice->eeprom.data[idx]);
  1363. snd_iprintf(buffer, "\nRegisters:\n");
  1364. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1365. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1366. for (idx = 0x0; idx < 0x20 ; idx++)
  1367. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1368. idx, inb(ice->port+idx));
  1369. for (idx = 0x0; idx < 0x30 ; idx++)
  1370. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1371. idx, inb(ice->profi_port+idx));
  1372. }
  1373. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1374. {
  1375. struct snd_info_entry *entry;
  1376. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1377. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1378. }
  1379. /*
  1380. *
  1381. */
  1382. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1383. struct snd_ctl_elem_info *uinfo)
  1384. {
  1385. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1386. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1387. return 0;
  1388. }
  1389. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1390. struct snd_ctl_elem_value *ucontrol)
  1391. {
  1392. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1393. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1394. return 0;
  1395. }
  1396. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1397. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1398. .name = "ICE1724 EEPROM",
  1399. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1400. .info = snd_vt1724_eeprom_info,
  1401. .get = snd_vt1724_eeprom_get
  1402. };
  1403. /*
  1404. */
  1405. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1406. struct snd_ctl_elem_info *uinfo)
  1407. {
  1408. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1409. uinfo->count = 1;
  1410. return 0;
  1411. }
  1412. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1413. {
  1414. unsigned int val, rbits;
  1415. val = diga->status[0] & 0x03; /* professional, non-audio */
  1416. if (val & 0x01) {
  1417. /* professional */
  1418. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1419. IEC958_AES0_PRO_EMPHASIS_5015)
  1420. val |= 1U << 3;
  1421. rbits = (diga->status[4] >> 3) & 0x0f;
  1422. if (rbits) {
  1423. switch (rbits) {
  1424. case 2: val |= 5 << 12; break; /* 96k */
  1425. case 3: val |= 6 << 12; break; /* 192k */
  1426. case 10: val |= 4 << 12; break; /* 88.2k */
  1427. case 11: val |= 7 << 12; break; /* 176.4k */
  1428. }
  1429. } else {
  1430. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1431. case IEC958_AES0_PRO_FS_44100:
  1432. break;
  1433. case IEC958_AES0_PRO_FS_32000:
  1434. val |= 3U << 12;
  1435. break;
  1436. default:
  1437. val |= 2U << 12;
  1438. break;
  1439. }
  1440. }
  1441. } else {
  1442. /* consumer */
  1443. val |= diga->status[1] & 0x04; /* copyright */
  1444. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1445. IEC958_AES0_CON_EMPHASIS_5015)
  1446. val |= 1U << 3;
  1447. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1448. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1449. }
  1450. return val;
  1451. }
  1452. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1453. {
  1454. memset(diga->status, 0, sizeof(diga->status));
  1455. diga->status[0] = val & 0x03; /* professional, non-audio */
  1456. if (val & 0x01) {
  1457. /* professional */
  1458. if (val & (1U << 3))
  1459. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1460. switch ((val >> 12) & 0x7) {
  1461. case 0:
  1462. break;
  1463. case 2:
  1464. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1465. break;
  1466. default:
  1467. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1468. break;
  1469. }
  1470. } else {
  1471. /* consumer */
  1472. diga->status[0] |= val & (1U << 2); /* copyright */
  1473. if (val & (1U << 3))
  1474. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1475. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1476. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1477. }
  1478. }
  1479. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1480. struct snd_ctl_elem_value *ucontrol)
  1481. {
  1482. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1483. unsigned int val;
  1484. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1485. decode_spdif_bits(&ucontrol->value.iec958, val);
  1486. return 0;
  1487. }
  1488. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1489. struct snd_ctl_elem_value *ucontrol)
  1490. {
  1491. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1492. unsigned int val, old;
  1493. val = encode_spdif_bits(&ucontrol->value.iec958);
  1494. spin_lock_irq(&ice->reg_lock);
  1495. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1496. if (val != old)
  1497. update_spdif_bits(ice, val);
  1498. spin_unlock_irq(&ice->reg_lock);
  1499. return val != old;
  1500. }
  1501. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1502. {
  1503. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1504. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1505. .info = snd_vt1724_spdif_info,
  1506. .get = snd_vt1724_spdif_default_get,
  1507. .put = snd_vt1724_spdif_default_put
  1508. };
  1509. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1510. struct snd_ctl_elem_value *ucontrol)
  1511. {
  1512. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1513. IEC958_AES0_PROFESSIONAL |
  1514. IEC958_AES0_CON_NOT_COPYRIGHT |
  1515. IEC958_AES0_CON_EMPHASIS;
  1516. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1517. IEC958_AES1_CON_CATEGORY;
  1518. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1519. return 0;
  1520. }
  1521. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1522. struct snd_ctl_elem_value *ucontrol)
  1523. {
  1524. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1525. IEC958_AES0_PROFESSIONAL |
  1526. IEC958_AES0_PRO_FS |
  1527. IEC958_AES0_PRO_EMPHASIS;
  1528. return 0;
  1529. }
  1530. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1531. {
  1532. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1533. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1534. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1535. .info = snd_vt1724_spdif_info,
  1536. .get = snd_vt1724_spdif_maskc_get,
  1537. };
  1538. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1539. {
  1540. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1541. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1542. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1543. .info = snd_vt1724_spdif_info,
  1544. .get = snd_vt1724_spdif_maskp_get,
  1545. };
  1546. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1547. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1548. struct snd_ctl_elem_value *ucontrol)
  1549. {
  1550. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1551. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1552. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1553. return 0;
  1554. }
  1555. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1556. struct snd_ctl_elem_value *ucontrol)
  1557. {
  1558. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1559. unsigned char old, val;
  1560. spin_lock_irq(&ice->reg_lock);
  1561. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1562. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1563. if (ucontrol->value.integer.value[0])
  1564. val |= VT1724_CFG_SPDIF_OUT_EN;
  1565. if (old != val)
  1566. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1567. spin_unlock_irq(&ice->reg_lock);
  1568. return old != val;
  1569. }
  1570. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1571. {
  1572. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1573. /* FIXME: the following conflict with IEC958 Playback Route */
  1574. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1575. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1576. .info = snd_vt1724_spdif_sw_info,
  1577. .get = snd_vt1724_spdif_sw_get,
  1578. .put = snd_vt1724_spdif_sw_put
  1579. };
  1580. #if 0 /* NOT USED YET */
  1581. /*
  1582. * GPIO access from extern
  1583. */
  1584. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1585. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1586. struct snd_ctl_elem_value *ucontrol)
  1587. {
  1588. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1589. int shift = kcontrol->private_value & 0xff;
  1590. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1591. snd_ice1712_save_gpio_status(ice);
  1592. ucontrol->value.integer.value[0] =
  1593. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1594. snd_ice1712_restore_gpio_status(ice);
  1595. return 0;
  1596. }
  1597. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1598. struct snd_ctl_elem_value *ucontrol)
  1599. {
  1600. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1601. int shift = kcontrol->private_value & 0xff;
  1602. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1603. unsigned int val, nval;
  1604. if (kcontrol->private_value & (1 << 31))
  1605. return -EPERM;
  1606. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1607. snd_ice1712_save_gpio_status(ice);
  1608. val = snd_ice1712_gpio_read(ice);
  1609. nval |= val & ~(1 << shift);
  1610. if (val != nval)
  1611. snd_ice1712_gpio_write(ice, nval);
  1612. snd_ice1712_restore_gpio_status(ice);
  1613. return val != nval;
  1614. }
  1615. #endif /* NOT USED YET */
  1616. /*
  1617. * rate
  1618. */
  1619. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1620. struct snd_ctl_elem_info *uinfo)
  1621. {
  1622. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1623. int hw_rates_count = ice->hw_rates->count;
  1624. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1625. uinfo->count = 1;
  1626. /* internal clocks */
  1627. uinfo->value.enumerated.items = hw_rates_count;
  1628. /* external clocks */
  1629. if (ice->force_rdma1 ||
  1630. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
  1631. uinfo->value.enumerated.items += ice->ext_clock_count;
  1632. /* upper limit - keep at top */
  1633. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1634. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1635. if (uinfo->value.enumerated.item >= hw_rates_count)
  1636. /* ext_clock items */
  1637. strcpy(uinfo->value.enumerated.name,
  1638. ice->ext_clock_names[
  1639. uinfo->value.enumerated.item - hw_rates_count]);
  1640. else
  1641. /* int clock items */
  1642. sprintf(uinfo->value.enumerated.name, "%d",
  1643. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1644. return 0;
  1645. }
  1646. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1650. unsigned int i, rate;
  1651. spin_lock_irq(&ice->reg_lock);
  1652. if (ice->is_spdif_master(ice)) {
  1653. ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
  1654. ice->get_spdif_master_type(ice);
  1655. } else {
  1656. rate = ice->get_rate(ice);
  1657. ucontrol->value.enumerated.item[0] = 0;
  1658. for (i = 0; i < ice->hw_rates->count; i++) {
  1659. if (ice->hw_rates->list[i] == rate) {
  1660. ucontrol->value.enumerated.item[0] = i;
  1661. break;
  1662. }
  1663. }
  1664. }
  1665. spin_unlock_irq(&ice->reg_lock);
  1666. return 0;
  1667. }
  1668. static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
  1669. {
  1670. /* standard external clock - only single type - SPDIF IN */
  1671. return 0;
  1672. }
  1673. /* setting clock to external - SPDIF */
  1674. static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
  1675. {
  1676. unsigned char oval;
  1677. unsigned char i2s_oval;
  1678. oval = inb(ICEMT1724(ice, RATE));
  1679. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1680. /* setting 256fs */
  1681. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1682. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1683. return 0;
  1684. }
  1685. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1686. struct snd_ctl_elem_value *ucontrol)
  1687. {
  1688. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1689. unsigned int old_rate, new_rate;
  1690. unsigned int item = ucontrol->value.enumerated.item[0];
  1691. unsigned int first_ext_clock = ice->hw_rates->count;
  1692. if (item > first_ext_clock + ice->ext_clock_count - 1)
  1693. return -EINVAL;
  1694. /* if rate = 0 => external clock */
  1695. spin_lock_irq(&ice->reg_lock);
  1696. if (ice->is_spdif_master(ice))
  1697. old_rate = 0;
  1698. else
  1699. old_rate = ice->get_rate(ice);
  1700. if (item >= first_ext_clock) {
  1701. /* switching to external clock */
  1702. ice->set_spdif_clock(ice, item - first_ext_clock);
  1703. new_rate = 0;
  1704. } else {
  1705. /* internal on-card clock */
  1706. new_rate = ice->hw_rates->list[item];
  1707. ice->pro_rate_default = new_rate;
  1708. spin_unlock_irq(&ice->reg_lock);
  1709. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1710. spin_lock_irq(&ice->reg_lock);
  1711. }
  1712. spin_unlock_irq(&ice->reg_lock);
  1713. /* the first switch to the ext. clock mode? */
  1714. if (old_rate != new_rate && !new_rate) {
  1715. /* notify akm chips as well */
  1716. unsigned int i;
  1717. if (ice->gpio.set_pro_rate)
  1718. ice->gpio.set_pro_rate(ice, 0);
  1719. for (i = 0; i < ice->akm_codecs; i++) {
  1720. if (ice->akm[i].ops.set_rate_val)
  1721. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1722. }
  1723. }
  1724. return old_rate != new_rate;
  1725. }
  1726. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1727. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1728. .name = "Multi Track Internal Clock",
  1729. .info = snd_vt1724_pro_internal_clock_info,
  1730. .get = snd_vt1724_pro_internal_clock_get,
  1731. .put = snd_vt1724_pro_internal_clock_put
  1732. };
  1733. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1734. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1735. struct snd_ctl_elem_value *ucontrol)
  1736. {
  1737. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1738. return 0;
  1739. }
  1740. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1741. struct snd_ctl_elem_value *ucontrol)
  1742. {
  1743. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1744. int change = 0, nval;
  1745. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1746. spin_lock_irq(&ice->reg_lock);
  1747. change = PRO_RATE_LOCKED != nval;
  1748. PRO_RATE_LOCKED = nval;
  1749. spin_unlock_irq(&ice->reg_lock);
  1750. return change;
  1751. }
  1752. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1753. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1754. .name = "Multi Track Rate Locking",
  1755. .info = snd_vt1724_pro_rate_locking_info,
  1756. .get = snd_vt1724_pro_rate_locking_get,
  1757. .put = snd_vt1724_pro_rate_locking_put
  1758. };
  1759. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1760. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1761. struct snd_ctl_elem_value *ucontrol)
  1762. {
  1763. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1764. return 0;
  1765. }
  1766. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1767. struct snd_ctl_elem_value *ucontrol)
  1768. {
  1769. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1770. int change = 0, nval;
  1771. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1772. spin_lock_irq(&ice->reg_lock);
  1773. change = PRO_RATE_RESET != nval;
  1774. PRO_RATE_RESET = nval;
  1775. spin_unlock_irq(&ice->reg_lock);
  1776. return change;
  1777. }
  1778. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1779. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1780. .name = "Multi Track Rate Reset",
  1781. .info = snd_vt1724_pro_rate_reset_info,
  1782. .get = snd_vt1724_pro_rate_reset_get,
  1783. .put = snd_vt1724_pro_rate_reset_put
  1784. };
  1785. /*
  1786. * routing
  1787. */
  1788. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1789. struct snd_ctl_elem_info *uinfo)
  1790. {
  1791. static char *texts[] = {
  1792. "PCM Out", /* 0 */
  1793. "H/W In 0", "H/W In 1", /* 1-2 */
  1794. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1795. };
  1796. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1797. uinfo->count = 1;
  1798. uinfo->value.enumerated.items = 5;
  1799. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1800. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1801. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1802. return 0;
  1803. }
  1804. static inline int analog_route_shift(int idx)
  1805. {
  1806. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1807. }
  1808. static inline int digital_route_shift(int idx)
  1809. {
  1810. return idx * 3;
  1811. }
  1812. int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
  1813. {
  1814. unsigned long val;
  1815. unsigned char eitem;
  1816. static const unsigned char xlate[8] = {
  1817. 0, 255, 1, 2, 255, 255, 3, 4,
  1818. };
  1819. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1820. val >>= shift;
  1821. val &= 7; /* we now have 3 bits per output */
  1822. eitem = xlate[val];
  1823. if (eitem == 255) {
  1824. snd_BUG();
  1825. return 0;
  1826. }
  1827. return eitem;
  1828. }
  1829. int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
  1830. int shift)
  1831. {
  1832. unsigned int old_val, nval;
  1833. int change;
  1834. static const unsigned char xroute[8] = {
  1835. 0, /* PCM */
  1836. 2, /* PSDIN0 Left */
  1837. 3, /* PSDIN0 Right */
  1838. 6, /* SPDIN Left */
  1839. 7, /* SPDIN Right */
  1840. };
  1841. nval = xroute[val % 5];
  1842. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1843. val &= ~(0x07 << shift);
  1844. val |= nval << shift;
  1845. change = val != old_val;
  1846. if (change)
  1847. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1848. return change;
  1849. }
  1850. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1851. struct snd_ctl_elem_value *ucontrol)
  1852. {
  1853. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1854. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1855. ucontrol->value.enumerated.item[0] =
  1856. snd_ice1724_get_route_val(ice, analog_route_shift(idx));
  1857. return 0;
  1858. }
  1859. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1860. struct snd_ctl_elem_value *ucontrol)
  1861. {
  1862. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1863. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1864. return snd_ice1724_put_route_val(ice,
  1865. ucontrol->value.enumerated.item[0],
  1866. analog_route_shift(idx));
  1867. }
  1868. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1869. struct snd_ctl_elem_value *ucontrol)
  1870. {
  1871. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1872. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1873. ucontrol->value.enumerated.item[0] =
  1874. snd_ice1724_get_route_val(ice, digital_route_shift(idx));
  1875. return 0;
  1876. }
  1877. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1878. struct snd_ctl_elem_value *ucontrol)
  1879. {
  1880. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1881. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1882. return snd_ice1724_put_route_val(ice,
  1883. ucontrol->value.enumerated.item[0],
  1884. digital_route_shift(idx));
  1885. }
  1886. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
  1887. {
  1888. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1889. .name = "H/W Playback Route",
  1890. .info = snd_vt1724_pro_route_info,
  1891. .get = snd_vt1724_pro_route_analog_get,
  1892. .put = snd_vt1724_pro_route_analog_put,
  1893. };
  1894. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1895. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1896. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1897. .info = snd_vt1724_pro_route_info,
  1898. .get = snd_vt1724_pro_route_spdif_get,
  1899. .put = snd_vt1724_pro_route_spdif_put,
  1900. .count = 2,
  1901. };
  1902. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1903. struct snd_ctl_elem_info *uinfo)
  1904. {
  1905. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1906. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1907. uinfo->value.integer.min = 0;
  1908. uinfo->value.integer.max = 255;
  1909. return 0;
  1910. }
  1911. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1912. struct snd_ctl_elem_value *ucontrol)
  1913. {
  1914. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1915. int idx;
  1916. spin_lock_irq(&ice->reg_lock);
  1917. for (idx = 0; idx < 22; idx++) {
  1918. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1919. ucontrol->value.integer.value[idx] =
  1920. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1921. }
  1922. spin_unlock_irq(&ice->reg_lock);
  1923. return 0;
  1924. }
  1925. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1926. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1927. .name = "Multi Track Peak",
  1928. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1929. .info = snd_vt1724_pro_peak_info,
  1930. .get = snd_vt1724_pro_peak_get
  1931. };
  1932. /*
  1933. *
  1934. */
  1935. static struct snd_ice1712_card_info no_matched __devinitdata;
  1936. /*
  1937. ooAoo cards with no controls
  1938. */
  1939. static unsigned char ooaoo_sq210_eeprom[] __devinitdata = {
  1940. [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC,
  1941. 1xDACs */
  1942. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1943. [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */
  1944. [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */
  1945. [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */
  1946. [ICE_EEP2_GPIO_DIR1] = 0x00,
  1947. [ICE_EEP2_GPIO_DIR2] = 0x00,
  1948. [ICE_EEP2_GPIO_MASK] = 0xff,
  1949. [ICE_EEP2_GPIO_MASK1] = 0xff,
  1950. [ICE_EEP2_GPIO_MASK2] = 0xff,
  1951. [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */
  1952. [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW
  1953. and GPIO15 always zero */
  1954. [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */
  1955. };
  1956. struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] __devinitdata = {
  1957. {
  1958. .name = "ooAoo SQ210a",
  1959. .model = "sq210a",
  1960. .eeprom_size = sizeof(ooaoo_sq210_eeprom),
  1961. .eeprom_data = ooaoo_sq210_eeprom,
  1962. },
  1963. { } /* terminator */
  1964. };
  1965. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1966. snd_vt1724_revo_cards,
  1967. snd_vt1724_amp_cards,
  1968. snd_vt1724_aureon_cards,
  1969. snd_vt1720_mobo_cards,
  1970. snd_vt1720_pontis_cards,
  1971. snd_vt1724_prodigy_hifi_cards,
  1972. snd_vt1724_prodigy192_cards,
  1973. snd_vt1724_juli_cards,
  1974. snd_vt1724_maya44_cards,
  1975. snd_vt1724_phase_cards,
  1976. snd_vt1724_wtm_cards,
  1977. snd_vt1724_se_cards,
  1978. snd_vt1724_qtet_cards,
  1979. snd_vt1724_ooaoo_cards,
  1980. snd_vt1724_psc724_cards,
  1981. NULL,
  1982. };
  1983. /*
  1984. */
  1985. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1986. {
  1987. int t = 0x10000;
  1988. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1989. ;
  1990. if (t == -1)
  1991. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1992. }
  1993. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1994. unsigned char dev, unsigned char addr)
  1995. {
  1996. unsigned char val;
  1997. mutex_lock(&ice->i2c_mutex);
  1998. wait_i2c_busy(ice);
  1999. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  2000. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  2001. wait_i2c_busy(ice);
  2002. val = inb(ICEREG1724(ice, I2C_DATA));
  2003. mutex_unlock(&ice->i2c_mutex);
  2004. /*
  2005. printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  2006. */
  2007. return val;
  2008. }
  2009. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  2010. unsigned char dev, unsigned char addr, unsigned char data)
  2011. {
  2012. mutex_lock(&ice->i2c_mutex);
  2013. wait_i2c_busy(ice);
  2014. /*
  2015. printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  2016. */
  2017. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  2018. outb(data, ICEREG1724(ice, I2C_DATA));
  2019. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  2020. wait_i2c_busy(ice);
  2021. mutex_unlock(&ice->i2c_mutex);
  2022. }
  2023. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  2024. const char *modelname)
  2025. {
  2026. const int dev = 0xa0; /* EEPROM device address */
  2027. unsigned int i, size;
  2028. struct snd_ice1712_card_info * const *tbl, *c;
  2029. if (!modelname || !*modelname) {
  2030. ice->eeprom.subvendor = 0;
  2031. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  2032. ice->eeprom.subvendor =
  2033. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  2034. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  2035. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  2036. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  2037. if (ice->eeprom.subvendor == 0 ||
  2038. ice->eeprom.subvendor == (unsigned int)-1) {
  2039. /* invalid subvendor from EEPROM, try the PCI
  2040. * subststem ID instead
  2041. */
  2042. u16 vendor, device;
  2043. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  2044. &vendor);
  2045. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2046. ice->eeprom.subvendor =
  2047. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2048. if (ice->eeprom.subvendor == 0 ||
  2049. ice->eeprom.subvendor == (unsigned int)-1) {
  2050. printk(KERN_ERR "ice1724: No valid ID is found\n");
  2051. return -ENXIO;
  2052. }
  2053. }
  2054. }
  2055. for (tbl = card_tables; *tbl; tbl++) {
  2056. for (c = *tbl; c->name; c++) {
  2057. if (modelname && c->model &&
  2058. !strcmp(modelname, c->model)) {
  2059. printk(KERN_INFO "ice1724: Using board model %s\n",
  2060. c->name);
  2061. ice->eeprom.subvendor = c->subvendor;
  2062. } else if (c->subvendor != ice->eeprom.subvendor)
  2063. continue;
  2064. ice->card_info = c;
  2065. if (!c->eeprom_size || !c->eeprom_data)
  2066. goto found;
  2067. /* if the EEPROM is given by the driver, use it */
  2068. snd_printdd("using the defined eeprom..\n");
  2069. ice->eeprom.version = 2;
  2070. ice->eeprom.size = c->eeprom_size + 6;
  2071. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2072. goto read_skipped;
  2073. }
  2074. }
  2075. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  2076. ice->eeprom.subvendor);
  2077. found:
  2078. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  2079. if (ice->eeprom.size < 6)
  2080. ice->eeprom.size = 32;
  2081. else if (ice->eeprom.size > 32) {
  2082. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  2083. ice->eeprom.size);
  2084. return -EIO;
  2085. }
  2086. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  2087. if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
  2088. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  2089. ice->eeprom.version);
  2090. size = ice->eeprom.size - 6;
  2091. for (i = 0; i < size; i++)
  2092. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  2093. read_skipped:
  2094. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  2095. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  2096. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  2097. return 0;
  2098. }
  2099. static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  2100. {
  2101. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  2102. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  2103. msleep(10);
  2104. outb(0, ICEREG1724(ice, CONTROL));
  2105. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  2106. msleep(10);
  2107. }
  2108. static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
  2109. {
  2110. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  2111. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  2112. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  2113. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  2114. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2115. ice->gpio.direction = ice->eeprom.gpiodir;
  2116. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  2117. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  2118. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  2119. outb(0, ICEREG1724(ice, POWERDOWN));
  2120. /* MPU_RX and TX irq masks are cleared later dynamically */
  2121. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2122. /* don't handle FIFO overrun/underruns (just yet),
  2123. * since they cause machine lockups
  2124. */
  2125. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2126. return 0;
  2127. }
  2128. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  2129. {
  2130. int err;
  2131. struct snd_kcontrol *kctl;
  2132. if (snd_BUG_ON(!ice->pcm))
  2133. return -EIO;
  2134. if (!ice->own_routing) {
  2135. err = snd_ctl_add(ice->card,
  2136. snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  2137. if (err < 0)
  2138. return err;
  2139. }
  2140. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  2141. if (err < 0)
  2142. return err;
  2143. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  2144. if (err < 0)
  2145. return err;
  2146. kctl->id.device = ice->pcm->device;
  2147. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  2148. if (err < 0)
  2149. return err;
  2150. kctl->id.device = ice->pcm->device;
  2151. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  2152. if (err < 0)
  2153. return err;
  2154. kctl->id.device = ice->pcm->device;
  2155. #if 0 /* use default only */
  2156. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  2157. if (err < 0)
  2158. return err;
  2159. kctl->id.device = ice->pcm->device;
  2160. ice->spdif.stream_ctl = kctl;
  2161. #endif
  2162. return 0;
  2163. }
  2164. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2165. {
  2166. int err;
  2167. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2168. if (err < 0)
  2169. return err;
  2170. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2171. if (err < 0)
  2172. return err;
  2173. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2174. if (err < 0)
  2175. return err;
  2176. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2177. if (err < 0)
  2178. return err;
  2179. if (!ice->own_routing && ice->num_total_dacs > 0) {
  2180. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2181. tmp.count = ice->num_total_dacs;
  2182. if (ice->vt1720 && tmp.count > 2)
  2183. tmp.count = 2;
  2184. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2185. if (err < 0)
  2186. return err;
  2187. }
  2188. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2189. if (err < 0)
  2190. return err;
  2191. return 0;
  2192. }
  2193. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2194. {
  2195. if (!ice->port)
  2196. goto __hw_end;
  2197. /* mask all interrupts */
  2198. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2199. outb(0xff, ICEREG1724(ice, IRQMASK));
  2200. /* --- */
  2201. __hw_end:
  2202. if (ice->irq >= 0)
  2203. free_irq(ice->irq, ice);
  2204. pci_release_regions(ice->pci);
  2205. snd_ice1712_akm4xxx_free(ice);
  2206. pci_disable_device(ice->pci);
  2207. kfree(ice->spec);
  2208. kfree(ice);
  2209. return 0;
  2210. }
  2211. static int snd_vt1724_dev_free(struct snd_device *device)
  2212. {
  2213. struct snd_ice1712 *ice = device->device_data;
  2214. return snd_vt1724_free(ice);
  2215. }
  2216. static int __devinit snd_vt1724_create(struct snd_card *card,
  2217. struct pci_dev *pci,
  2218. const char *modelname,
  2219. struct snd_ice1712 **r_ice1712)
  2220. {
  2221. struct snd_ice1712 *ice;
  2222. int err;
  2223. static struct snd_device_ops ops = {
  2224. .dev_free = snd_vt1724_dev_free,
  2225. };
  2226. *r_ice1712 = NULL;
  2227. /* enable PCI device */
  2228. err = pci_enable_device(pci);
  2229. if (err < 0)
  2230. return err;
  2231. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2232. if (ice == NULL) {
  2233. pci_disable_device(pci);
  2234. return -ENOMEM;
  2235. }
  2236. ice->vt1724 = 1;
  2237. spin_lock_init(&ice->reg_lock);
  2238. mutex_init(&ice->gpio_mutex);
  2239. mutex_init(&ice->open_mutex);
  2240. mutex_init(&ice->i2c_mutex);
  2241. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2242. ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
  2243. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2244. ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
  2245. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2246. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2247. ice->card = card;
  2248. ice->pci = pci;
  2249. ice->irq = -1;
  2250. pci_set_master(pci);
  2251. snd_vt1724_proc_init(ice);
  2252. synchronize_irq(pci->irq);
  2253. card->private_data = ice;
  2254. err = pci_request_regions(pci, "ICE1724");
  2255. if (err < 0) {
  2256. kfree(ice);
  2257. pci_disable_device(pci);
  2258. return err;
  2259. }
  2260. ice->port = pci_resource_start(pci, 0);
  2261. ice->profi_port = pci_resource_start(pci, 1);
  2262. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2263. IRQF_SHARED, KBUILD_MODNAME, ice)) {
  2264. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2265. snd_vt1724_free(ice);
  2266. return -EIO;
  2267. }
  2268. ice->irq = pci->irq;
  2269. snd_vt1724_chip_reset(ice);
  2270. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2271. snd_vt1724_free(ice);
  2272. return -EIO;
  2273. }
  2274. if (snd_vt1724_chip_init(ice) < 0) {
  2275. snd_vt1724_free(ice);
  2276. return -EIO;
  2277. }
  2278. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2279. if (err < 0) {
  2280. snd_vt1724_free(ice);
  2281. return err;
  2282. }
  2283. snd_card_set_dev(card, &pci->dev);
  2284. *r_ice1712 = ice;
  2285. return 0;
  2286. }
  2287. /*
  2288. *
  2289. * Registration
  2290. *
  2291. */
  2292. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2293. const struct pci_device_id *pci_id)
  2294. {
  2295. static int dev;
  2296. struct snd_card *card;
  2297. struct snd_ice1712 *ice;
  2298. int pcm_dev = 0, err;
  2299. struct snd_ice1712_card_info * const *tbl, *c;
  2300. if (dev >= SNDRV_CARDS)
  2301. return -ENODEV;
  2302. if (!enable[dev]) {
  2303. dev++;
  2304. return -ENOENT;
  2305. }
  2306. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2307. if (err < 0)
  2308. return err;
  2309. strcpy(card->driver, "ICE1724");
  2310. strcpy(card->shortname, "ICEnsemble ICE1724");
  2311. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2312. if (err < 0) {
  2313. snd_card_free(card);
  2314. return err;
  2315. }
  2316. /* field init before calling chip_init */
  2317. ice->ext_clock_count = 0;
  2318. for (tbl = card_tables; *tbl; tbl++) {
  2319. for (c = *tbl; c->name; c++) {
  2320. if ((model[dev] && c->model &&
  2321. !strcmp(model[dev], c->model)) ||
  2322. (c->subvendor == ice->eeprom.subvendor)) {
  2323. strcpy(card->shortname, c->name);
  2324. if (c->driver) /* specific driver? */
  2325. strcpy(card->driver, c->driver);
  2326. if (c->chip_init) {
  2327. err = c->chip_init(ice);
  2328. if (err < 0) {
  2329. snd_card_free(card);
  2330. return err;
  2331. }
  2332. }
  2333. goto __found;
  2334. }
  2335. }
  2336. }
  2337. c = &no_matched;
  2338. __found:
  2339. /*
  2340. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2341. * ICE1712 has only one for both (mixed up).
  2342. *
  2343. * Confusingly the analog PCM is named "professional" here because it
  2344. * was called so in ice1712 driver, and vt1724 driver is derived from
  2345. * ice1712 driver.
  2346. */
  2347. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2348. if (!ice->is_spdif_master)
  2349. ice->is_spdif_master = stdclock_is_spdif_master;
  2350. if (!ice->get_rate)
  2351. ice->get_rate = stdclock_get_rate;
  2352. if (!ice->set_rate)
  2353. ice->set_rate = stdclock_set_rate;
  2354. if (!ice->set_mclk)
  2355. ice->set_mclk = stdclock_set_mclk;
  2356. if (!ice->set_spdif_clock)
  2357. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2358. if (!ice->get_spdif_master_type)
  2359. ice->get_spdif_master_type = stdclock_get_spdif_master_type;
  2360. if (!ice->ext_clock_names)
  2361. ice->ext_clock_names = ext_clock_names;
  2362. if (!ice->ext_clock_count)
  2363. ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
  2364. if (!ice->hw_rates)
  2365. set_std_hw_rates(ice);
  2366. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2367. if (err < 0) {
  2368. snd_card_free(card);
  2369. return err;
  2370. }
  2371. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2372. if (err < 0) {
  2373. snd_card_free(card);
  2374. return err;
  2375. }
  2376. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2377. if (err < 0) {
  2378. snd_card_free(card);
  2379. return err;
  2380. }
  2381. err = snd_vt1724_ac97_mixer(ice);
  2382. if (err < 0) {
  2383. snd_card_free(card);
  2384. return err;
  2385. }
  2386. err = snd_vt1724_build_controls(ice);
  2387. if (err < 0) {
  2388. snd_card_free(card);
  2389. return err;
  2390. }
  2391. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2392. err = snd_vt1724_spdif_build_controls(ice);
  2393. if (err < 0) {
  2394. snd_card_free(card);
  2395. return err;
  2396. }
  2397. }
  2398. if (c->build_controls) {
  2399. err = c->build_controls(ice);
  2400. if (err < 0) {
  2401. snd_card_free(card);
  2402. return err;
  2403. }
  2404. }
  2405. if (!c->no_mpu401) {
  2406. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2407. struct snd_rawmidi *rmidi;
  2408. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2409. if (err < 0) {
  2410. snd_card_free(card);
  2411. return err;
  2412. }
  2413. ice->rmidi[0] = rmidi;
  2414. rmidi->private_data = ice;
  2415. strcpy(rmidi->name, "ICE1724 MIDI");
  2416. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2417. SNDRV_RAWMIDI_INFO_INPUT |
  2418. SNDRV_RAWMIDI_INFO_DUPLEX;
  2419. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2420. &vt1724_midi_output_ops);
  2421. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2422. &vt1724_midi_input_ops);
  2423. /* set watermarks */
  2424. outb(VT1724_MPU_RX_FIFO | 0x1,
  2425. ICEREG1724(ice, MPU_FIFO_WM));
  2426. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2427. /* set UART mode */
  2428. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2429. }
  2430. }
  2431. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2432. card->shortname, ice->port, ice->irq);
  2433. err = snd_card_register(card);
  2434. if (err < 0) {
  2435. snd_card_free(card);
  2436. return err;
  2437. }
  2438. pci_set_drvdata(pci, card);
  2439. dev++;
  2440. return 0;
  2441. }
  2442. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2443. {
  2444. struct snd_card *card = pci_get_drvdata(pci);
  2445. struct snd_ice1712 *ice = card->private_data;
  2446. if (ice->card_info && ice->card_info->chip_exit)
  2447. ice->card_info->chip_exit(ice);
  2448. snd_card_free(card);
  2449. pci_set_drvdata(pci, NULL);
  2450. }
  2451. #ifdef CONFIG_PM_SLEEP
  2452. static int snd_vt1724_suspend(struct device *dev)
  2453. {
  2454. struct pci_dev *pci = to_pci_dev(dev);
  2455. struct snd_card *card = dev_get_drvdata(dev);
  2456. struct snd_ice1712 *ice = card->private_data;
  2457. if (!ice->pm_suspend_enabled)
  2458. return 0;
  2459. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2460. snd_pcm_suspend_all(ice->pcm);
  2461. snd_pcm_suspend_all(ice->pcm_pro);
  2462. snd_pcm_suspend_all(ice->pcm_ds);
  2463. snd_ac97_suspend(ice->ac97);
  2464. spin_lock_irq(&ice->reg_lock);
  2465. ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
  2466. ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
  2467. ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
  2468. ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  2469. spin_unlock_irq(&ice->reg_lock);
  2470. if (ice->pm_suspend)
  2471. ice->pm_suspend(ice);
  2472. pci_disable_device(pci);
  2473. pci_save_state(pci);
  2474. pci_set_power_state(pci, PCI_D3hot);
  2475. return 0;
  2476. }
  2477. static int snd_vt1724_resume(struct device *dev)
  2478. {
  2479. struct pci_dev *pci = to_pci_dev(dev);
  2480. struct snd_card *card = dev_get_drvdata(dev);
  2481. struct snd_ice1712 *ice = card->private_data;
  2482. if (!ice->pm_suspend_enabled)
  2483. return 0;
  2484. pci_set_power_state(pci, PCI_D0);
  2485. pci_restore_state(pci);
  2486. if (pci_enable_device(pci) < 0) {
  2487. snd_card_disconnect(card);
  2488. return -EIO;
  2489. }
  2490. pci_set_master(pci);
  2491. snd_vt1724_chip_reset(ice);
  2492. if (snd_vt1724_chip_init(ice) < 0) {
  2493. snd_card_disconnect(card);
  2494. return -EIO;
  2495. }
  2496. if (ice->pm_resume)
  2497. ice->pm_resume(ice);
  2498. if (ice->pm_saved_is_spdif_master) {
  2499. /* switching to external clock via SPDIF */
  2500. ice->set_spdif_clock(ice, 0);
  2501. } else {
  2502. /* internal on-card clock */
  2503. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  2504. }
  2505. update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
  2506. outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
  2507. outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
  2508. if (ice->ac97)
  2509. snd_ac97_resume(ice->ac97);
  2510. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2511. return 0;
  2512. }
  2513. static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume);
  2514. #define SND_VT1724_PM_OPS &snd_vt1724_pm
  2515. #else
  2516. #define SND_VT1724_PM_OPS NULL
  2517. #endif /* CONFIG_PM_SLEEP */
  2518. static struct pci_driver vt1724_driver = {
  2519. .name = KBUILD_MODNAME,
  2520. .id_table = snd_vt1724_ids,
  2521. .probe = snd_vt1724_probe,
  2522. .remove = __devexit_p(snd_vt1724_remove),
  2523. .driver = {
  2524. .pm = SND_VT1724_PM_OPS,
  2525. },
  2526. };
  2527. module_pci_driver(vt1724_driver);