rt2x00queue.c 33 KB

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  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the
  16. Free Software Foundation, Inc.,
  17. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. /*
  20. Module: rt2x00lib
  21. Abstract: rt2x00 queue specific routines.
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/dma-mapping.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00lib.h"
  29. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
  30. {
  31. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  32. struct sk_buff *skb;
  33. struct skb_frame_desc *skbdesc;
  34. unsigned int frame_size;
  35. unsigned int head_size = 0;
  36. unsigned int tail_size = 0;
  37. /*
  38. * The frame size includes descriptor size, because the
  39. * hardware directly receive the frame into the skbuffer.
  40. */
  41. frame_size = entry->queue->data_size + entry->queue->desc_size;
  42. /*
  43. * The payload should be aligned to a 4-byte boundary,
  44. * this means we need at least 3 bytes for moving the frame
  45. * into the correct offset.
  46. */
  47. head_size = 4;
  48. /*
  49. * For IV/EIV/ICV assembly we must make sure there is
  50. * at least 8 bytes bytes available in headroom for IV/EIV
  51. * and 8 bytes for ICV data as tailroon.
  52. */
  53. if (test_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags)) {
  54. head_size += 8;
  55. tail_size += 8;
  56. }
  57. /*
  58. * Allocate skbuffer.
  59. */
  60. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  61. if (!skb)
  62. return NULL;
  63. /*
  64. * Make sure we not have a frame with the requested bytes
  65. * available in the head and tail.
  66. */
  67. skb_reserve(skb, head_size);
  68. skb_put(skb, frame_size);
  69. /*
  70. * Populate skbdesc.
  71. */
  72. skbdesc = get_skb_frame_desc(skb);
  73. memset(skbdesc, 0, sizeof(*skbdesc));
  74. skbdesc->entry = entry;
  75. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
  76. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  77. skb->data,
  78. skb->len,
  79. DMA_FROM_DEVICE);
  80. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  81. }
  82. return skb;
  83. }
  84. void rt2x00queue_map_txskb(struct queue_entry *entry)
  85. {
  86. struct device *dev = entry->queue->rt2x00dev->dev;
  87. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  88. skbdesc->skb_dma =
  89. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  90. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  91. }
  92. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  93. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  94. {
  95. struct device *dev = entry->queue->rt2x00dev->dev;
  96. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  97. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  98. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  99. DMA_FROM_DEVICE);
  100. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  101. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  102. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  103. DMA_TO_DEVICE);
  104. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  108. void rt2x00queue_free_skb(struct queue_entry *entry)
  109. {
  110. if (!entry->skb)
  111. return;
  112. rt2x00queue_unmap_skb(entry);
  113. dev_kfree_skb_any(entry->skb);
  114. entry->skb = NULL;
  115. }
  116. void rt2x00queue_align_frame(struct sk_buff *skb)
  117. {
  118. unsigned int frame_length = skb->len;
  119. unsigned int align = ALIGN_SIZE(skb, 0);
  120. if (!align)
  121. return;
  122. skb_push(skb, align);
  123. memmove(skb->data, skb->data + align, frame_length);
  124. skb_trim(skb, frame_length);
  125. }
  126. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  127. {
  128. unsigned int payload_length = skb->len - header_length;
  129. unsigned int header_align = ALIGN_SIZE(skb, 0);
  130. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  131. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  132. /*
  133. * Adjust the header alignment if the payload needs to be moved more
  134. * than the header.
  135. */
  136. if (payload_align > header_align)
  137. header_align += 4;
  138. /* There is nothing to do if no alignment is needed */
  139. if (!header_align)
  140. return;
  141. /* Reserve the amount of space needed in front of the frame */
  142. skb_push(skb, header_align);
  143. /*
  144. * Move the header.
  145. */
  146. memmove(skb->data, skb->data + header_align, header_length);
  147. /* Move the payload, if present and if required */
  148. if (payload_length && payload_align)
  149. memmove(skb->data + header_length + l2pad,
  150. skb->data + header_length + l2pad + payload_align,
  151. payload_length);
  152. /* Trim the skb to the correct size */
  153. skb_trim(skb, header_length + l2pad + payload_length);
  154. }
  155. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  156. {
  157. /*
  158. * L2 padding is only present if the skb contains more than just the
  159. * IEEE 802.11 header.
  160. */
  161. unsigned int l2pad = (skb->len > header_length) ?
  162. L2PAD_SIZE(header_length) : 0;
  163. if (!l2pad)
  164. return;
  165. memmove(skb->data + l2pad, skb->data, header_length);
  166. skb_pull(skb, l2pad);
  167. }
  168. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  169. struct txentry_desc *txdesc)
  170. {
  171. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  172. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  173. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  174. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  175. return;
  176. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  177. if (!test_bit(REQUIRE_SW_SEQNO, &entry->queue->rt2x00dev->cap_flags))
  178. return;
  179. /*
  180. * The hardware is not able to insert a sequence number. Assign a
  181. * software generated one here.
  182. *
  183. * This is wrong because beacons are not getting sequence
  184. * numbers assigned properly.
  185. *
  186. * A secondary problem exists for drivers that cannot toggle
  187. * sequence counting per-frame, since those will override the
  188. * sequence counter given by mac80211.
  189. */
  190. spin_lock(&intf->seqlock);
  191. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  192. intf->seqno += 0x10;
  193. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  194. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  195. spin_unlock(&intf->seqlock);
  196. }
  197. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  198. struct txentry_desc *txdesc,
  199. const struct rt2x00_rate *hwrate)
  200. {
  201. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  202. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  203. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  204. unsigned int data_length;
  205. unsigned int duration;
  206. unsigned int residual;
  207. /*
  208. * Determine with what IFS priority this frame should be send.
  209. * Set ifs to IFS_SIFS when the this is not the first fragment,
  210. * or this fragment came after RTS/CTS.
  211. */
  212. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  213. txdesc->u.plcp.ifs = IFS_BACKOFF;
  214. else
  215. txdesc->u.plcp.ifs = IFS_SIFS;
  216. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  217. data_length = entry->skb->len + 4;
  218. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  219. /*
  220. * PLCP setup
  221. * Length calculation depends on OFDM/CCK rate.
  222. */
  223. txdesc->u.plcp.signal = hwrate->plcp;
  224. txdesc->u.plcp.service = 0x04;
  225. if (hwrate->flags & DEV_RATE_OFDM) {
  226. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  227. txdesc->u.plcp.length_low = data_length & 0x3f;
  228. } else {
  229. /*
  230. * Convert length to microseconds.
  231. */
  232. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  233. duration = GET_DURATION(data_length, hwrate->bitrate);
  234. if (residual != 0) {
  235. duration++;
  236. /*
  237. * Check if we need to set the Length Extension
  238. */
  239. if (hwrate->bitrate == 110 && residual <= 30)
  240. txdesc->u.plcp.service |= 0x80;
  241. }
  242. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  243. txdesc->u.plcp.length_low = duration & 0xff;
  244. /*
  245. * When preamble is enabled we should set the
  246. * preamble bit for the signal.
  247. */
  248. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  249. txdesc->u.plcp.signal |= 0x08;
  250. }
  251. }
  252. static void rt2x00queue_create_tx_descriptor_ht(struct queue_entry *entry,
  253. struct txentry_desc *txdesc,
  254. const struct rt2x00_rate *hwrate)
  255. {
  256. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  257. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  258. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  259. if (tx_info->control.sta)
  260. txdesc->u.ht.mpdu_density =
  261. tx_info->control.sta->ht_cap.ampdu_density;
  262. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  263. /*
  264. * Only one STBC stream is supported for now.
  265. */
  266. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  267. txdesc->u.ht.stbc = 1;
  268. /*
  269. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  270. * mcs rate to be used
  271. */
  272. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  273. txdesc->u.ht.mcs = txrate->idx;
  274. /*
  275. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  276. * when using more then one tx stream (>MCS7).
  277. */
  278. if (tx_info->control.sta && txdesc->u.ht.mcs > 7 &&
  279. ((tx_info->control.sta->ht_cap.cap &
  280. IEEE80211_HT_CAP_SM_PS) >>
  281. IEEE80211_HT_CAP_SM_PS_SHIFT) ==
  282. WLAN_HT_CAP_SM_PS_DYNAMIC)
  283. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  284. } else {
  285. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  286. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  287. txdesc->u.ht.mcs |= 0x08;
  288. }
  289. /*
  290. * This frame is eligible for an AMPDU, however, don't aggregate
  291. * frames that are intended to probe a specific tx rate.
  292. */
  293. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  294. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  295. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  296. /*
  297. * Set 40Mhz mode if necessary (for legacy rates this will
  298. * duplicate the frame to both channels).
  299. */
  300. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  301. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  302. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  303. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  304. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  305. /*
  306. * Determine IFS values
  307. * - Use TXOP_BACKOFF for management frames except beacons
  308. * - Use TXOP_SIFS for fragment bursts
  309. * - Use TXOP_HTTXOP for everything else
  310. *
  311. * Note: rt2800 devices won't use CTS protection (if used)
  312. * for frames not transmitted with TXOP_HTTXOP
  313. */
  314. if (ieee80211_is_mgmt(hdr->frame_control) &&
  315. !ieee80211_is_beacon(hdr->frame_control))
  316. txdesc->u.ht.txop = TXOP_BACKOFF;
  317. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  318. txdesc->u.ht.txop = TXOP_SIFS;
  319. else
  320. txdesc->u.ht.txop = TXOP_HTTXOP;
  321. }
  322. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  323. struct txentry_desc *txdesc)
  324. {
  325. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  326. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  327. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  328. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  329. struct ieee80211_rate *rate;
  330. const struct rt2x00_rate *hwrate = NULL;
  331. memset(txdesc, 0, sizeof(*txdesc));
  332. /*
  333. * Header and frame information.
  334. */
  335. txdesc->length = entry->skb->len;
  336. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  337. /*
  338. * Check whether this frame is to be acked.
  339. */
  340. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  341. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  342. /*
  343. * Check if this is a RTS/CTS frame
  344. */
  345. if (ieee80211_is_rts(hdr->frame_control) ||
  346. ieee80211_is_cts(hdr->frame_control)) {
  347. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  348. if (ieee80211_is_rts(hdr->frame_control))
  349. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  350. else
  351. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  352. if (tx_info->control.rts_cts_rate_idx >= 0)
  353. rate =
  354. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  355. }
  356. /*
  357. * Determine retry information.
  358. */
  359. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  360. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  361. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  362. /*
  363. * Check if more fragments are pending
  364. */
  365. if (ieee80211_has_morefrags(hdr->frame_control)) {
  366. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  367. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  368. }
  369. /*
  370. * Check if more frames (!= fragments) are pending
  371. */
  372. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  373. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  374. /*
  375. * Beacons and probe responses require the tsf timestamp
  376. * to be inserted into the frame.
  377. */
  378. if (ieee80211_is_beacon(hdr->frame_control) ||
  379. ieee80211_is_probe_resp(hdr->frame_control))
  380. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  381. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  382. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  383. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  384. /*
  385. * Determine rate modulation.
  386. */
  387. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  388. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  389. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  390. txdesc->rate_mode = RATE_MODE_HT_MIX;
  391. else {
  392. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  393. hwrate = rt2x00_get_rate(rate->hw_value);
  394. if (hwrate->flags & DEV_RATE_OFDM)
  395. txdesc->rate_mode = RATE_MODE_OFDM;
  396. else
  397. txdesc->rate_mode = RATE_MODE_CCK;
  398. }
  399. /*
  400. * Apply TX descriptor handling by components
  401. */
  402. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  403. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  404. if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
  405. rt2x00queue_create_tx_descriptor_ht(entry, txdesc, hwrate);
  406. else
  407. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  408. }
  409. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  410. struct txentry_desc *txdesc)
  411. {
  412. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  413. /*
  414. * This should not happen, we already checked the entry
  415. * was ours. When the hardware disagrees there has been
  416. * a queue corruption!
  417. */
  418. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  419. rt2x00dev->ops->lib->get_entry_state(entry))) {
  420. ERROR(rt2x00dev,
  421. "Corrupt queue %d, accessing entry which is not ours.\n"
  422. "Please file bug report to %s.\n",
  423. entry->queue->qid, DRV_PROJECT);
  424. return -EINVAL;
  425. }
  426. /*
  427. * Add the requested extra tx headroom in front of the skb.
  428. */
  429. skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  430. memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
  431. /*
  432. * Call the driver's write_tx_data function, if it exists.
  433. */
  434. if (rt2x00dev->ops->lib->write_tx_data)
  435. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  436. /*
  437. * Map the skb to DMA.
  438. */
  439. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags))
  440. rt2x00queue_map_txskb(entry);
  441. return 0;
  442. }
  443. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  444. struct txentry_desc *txdesc)
  445. {
  446. struct data_queue *queue = entry->queue;
  447. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  448. /*
  449. * All processing on the frame has been completed, this means
  450. * it is now ready to be dumped to userspace through debugfs.
  451. */
  452. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  453. }
  454. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  455. struct txentry_desc *txdesc)
  456. {
  457. /*
  458. * Check if we need to kick the queue, there are however a few rules
  459. * 1) Don't kick unless this is the last in frame in a burst.
  460. * When the burst flag is set, this frame is always followed
  461. * by another frame which in some way are related to eachother.
  462. * This is true for fragments, RTS or CTS-to-self frames.
  463. * 2) Rule 1 can be broken when the available entries
  464. * in the queue are less then a certain threshold.
  465. */
  466. if (rt2x00queue_threshold(queue) ||
  467. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  468. queue->rt2x00dev->ops->lib->kick_queue(queue);
  469. }
  470. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  471. bool local)
  472. {
  473. struct ieee80211_tx_info *tx_info;
  474. struct queue_entry *entry;
  475. struct txentry_desc txdesc;
  476. struct skb_frame_desc *skbdesc;
  477. u8 rate_idx, rate_flags;
  478. int ret = 0;
  479. spin_lock(&queue->tx_lock);
  480. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  481. if (unlikely(rt2x00queue_full(queue))) {
  482. ERROR(queue->rt2x00dev,
  483. "Dropping frame due to full tx queue %d.\n", queue->qid);
  484. ret = -ENOBUFS;
  485. goto out;
  486. }
  487. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  488. &entry->flags))) {
  489. ERROR(queue->rt2x00dev,
  490. "Arrived at non-free entry in the non-full queue %d.\n"
  491. "Please file bug report to %s.\n",
  492. queue->qid, DRV_PROJECT);
  493. ret = -EINVAL;
  494. goto out;
  495. }
  496. /*
  497. * Copy all TX descriptor information into txdesc,
  498. * after that we are free to use the skb->cb array
  499. * for our information.
  500. */
  501. entry->skb = skb;
  502. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  503. /*
  504. * All information is retrieved from the skb->cb array,
  505. * now we should claim ownership of the driver part of that
  506. * array, preserving the bitrate index and flags.
  507. */
  508. tx_info = IEEE80211_SKB_CB(skb);
  509. rate_idx = tx_info->control.rates[0].idx;
  510. rate_flags = tx_info->control.rates[0].flags;
  511. skbdesc = get_skb_frame_desc(skb);
  512. memset(skbdesc, 0, sizeof(*skbdesc));
  513. skbdesc->entry = entry;
  514. skbdesc->tx_rate_idx = rate_idx;
  515. skbdesc->tx_rate_flags = rate_flags;
  516. if (local)
  517. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  518. /*
  519. * When hardware encryption is supported, and this frame
  520. * is to be encrypted, we should strip the IV/EIV data from
  521. * the frame so we can provide it to the driver separately.
  522. */
  523. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  524. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  525. if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
  526. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  527. else
  528. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  529. }
  530. /*
  531. * When DMA allocation is required we should guarantee to the
  532. * driver that the DMA is aligned to a 4-byte boundary.
  533. * However some drivers require L2 padding to pad the payload
  534. * rather then the header. This could be a requirement for
  535. * PCI and USB devices, while header alignment only is valid
  536. * for PCI devices.
  537. */
  538. if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
  539. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  540. else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
  541. rt2x00queue_align_frame(entry->skb);
  542. /*
  543. * It could be possible that the queue was corrupted and this
  544. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  545. * this frame will simply be dropped.
  546. */
  547. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  548. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  549. entry->skb = NULL;
  550. ret = -EIO;
  551. goto out;
  552. }
  553. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  554. rt2x00queue_index_inc(entry, Q_INDEX);
  555. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  556. rt2x00queue_kick_tx_queue(queue, &txdesc);
  557. out:
  558. spin_unlock(&queue->tx_lock);
  559. return ret;
  560. }
  561. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  562. struct ieee80211_vif *vif)
  563. {
  564. struct rt2x00_intf *intf = vif_to_intf(vif);
  565. if (unlikely(!intf->beacon))
  566. return -ENOBUFS;
  567. mutex_lock(&intf->beacon_skb_mutex);
  568. /*
  569. * Clean up the beacon skb.
  570. */
  571. rt2x00queue_free_skb(intf->beacon);
  572. /*
  573. * Clear beacon (single bssid devices don't need to clear the beacon
  574. * since the beacon queue will get stopped anyway).
  575. */
  576. if (rt2x00dev->ops->lib->clear_beacon)
  577. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  578. mutex_unlock(&intf->beacon_skb_mutex);
  579. return 0;
  580. }
  581. int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
  582. struct ieee80211_vif *vif)
  583. {
  584. struct rt2x00_intf *intf = vif_to_intf(vif);
  585. struct skb_frame_desc *skbdesc;
  586. struct txentry_desc txdesc;
  587. if (unlikely(!intf->beacon))
  588. return -ENOBUFS;
  589. /*
  590. * Clean up the beacon skb.
  591. */
  592. rt2x00queue_free_skb(intf->beacon);
  593. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  594. if (!intf->beacon->skb)
  595. return -ENOMEM;
  596. /*
  597. * Copy all TX descriptor information into txdesc,
  598. * after that we are free to use the skb->cb array
  599. * for our information.
  600. */
  601. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  602. /*
  603. * Fill in skb descriptor
  604. */
  605. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  606. memset(skbdesc, 0, sizeof(*skbdesc));
  607. skbdesc->entry = intf->beacon;
  608. /*
  609. * Send beacon to hardware.
  610. */
  611. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  612. return 0;
  613. }
  614. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  615. struct ieee80211_vif *vif)
  616. {
  617. struct rt2x00_intf *intf = vif_to_intf(vif);
  618. int ret;
  619. mutex_lock(&intf->beacon_skb_mutex);
  620. ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
  621. mutex_unlock(&intf->beacon_skb_mutex);
  622. return ret;
  623. }
  624. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  625. enum queue_index start,
  626. enum queue_index end,
  627. void *data,
  628. bool (*fn)(struct queue_entry *entry,
  629. void *data))
  630. {
  631. unsigned long irqflags;
  632. unsigned int index_start;
  633. unsigned int index_end;
  634. unsigned int i;
  635. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  636. ERROR(queue->rt2x00dev,
  637. "Entry requested from invalid index range (%d - %d)\n",
  638. start, end);
  639. return true;
  640. }
  641. /*
  642. * Only protect the range we are going to loop over,
  643. * if during our loop a extra entry is set to pending
  644. * it should not be kicked during this run, since it
  645. * is part of another TX operation.
  646. */
  647. spin_lock_irqsave(&queue->index_lock, irqflags);
  648. index_start = queue->index[start];
  649. index_end = queue->index[end];
  650. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  651. /*
  652. * Start from the TX done pointer, this guarantees that we will
  653. * send out all frames in the correct order.
  654. */
  655. if (index_start < index_end) {
  656. for (i = index_start; i < index_end; i++) {
  657. if (fn(&queue->entries[i], data))
  658. return true;
  659. }
  660. } else {
  661. for (i = index_start; i < queue->limit; i++) {
  662. if (fn(&queue->entries[i], data))
  663. return true;
  664. }
  665. for (i = 0; i < index_end; i++) {
  666. if (fn(&queue->entries[i], data))
  667. return true;
  668. }
  669. }
  670. return false;
  671. }
  672. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  673. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  674. enum queue_index index)
  675. {
  676. struct queue_entry *entry;
  677. unsigned long irqflags;
  678. if (unlikely(index >= Q_INDEX_MAX)) {
  679. ERROR(queue->rt2x00dev,
  680. "Entry requested from invalid index type (%d)\n", index);
  681. return NULL;
  682. }
  683. spin_lock_irqsave(&queue->index_lock, irqflags);
  684. entry = &queue->entries[queue->index[index]];
  685. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  686. return entry;
  687. }
  688. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  689. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  690. {
  691. struct data_queue *queue = entry->queue;
  692. unsigned long irqflags;
  693. if (unlikely(index >= Q_INDEX_MAX)) {
  694. ERROR(queue->rt2x00dev,
  695. "Index change on invalid index type (%d)\n", index);
  696. return;
  697. }
  698. spin_lock_irqsave(&queue->index_lock, irqflags);
  699. queue->index[index]++;
  700. if (queue->index[index] >= queue->limit)
  701. queue->index[index] = 0;
  702. entry->last_action = jiffies;
  703. if (index == Q_INDEX) {
  704. queue->length++;
  705. } else if (index == Q_INDEX_DONE) {
  706. queue->length--;
  707. queue->count++;
  708. }
  709. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  710. }
  711. void rt2x00queue_pause_queue(struct data_queue *queue)
  712. {
  713. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  714. !test_bit(QUEUE_STARTED, &queue->flags) ||
  715. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  716. return;
  717. switch (queue->qid) {
  718. case QID_AC_VO:
  719. case QID_AC_VI:
  720. case QID_AC_BE:
  721. case QID_AC_BK:
  722. /*
  723. * For TX queues, we have to disable the queue
  724. * inside mac80211.
  725. */
  726. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  727. break;
  728. default:
  729. break;
  730. }
  731. }
  732. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  733. void rt2x00queue_unpause_queue(struct data_queue *queue)
  734. {
  735. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  736. !test_bit(QUEUE_STARTED, &queue->flags) ||
  737. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  738. return;
  739. switch (queue->qid) {
  740. case QID_AC_VO:
  741. case QID_AC_VI:
  742. case QID_AC_BE:
  743. case QID_AC_BK:
  744. /*
  745. * For TX queues, we have to enable the queue
  746. * inside mac80211.
  747. */
  748. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  749. break;
  750. case QID_RX:
  751. /*
  752. * For RX we need to kick the queue now in order to
  753. * receive frames.
  754. */
  755. queue->rt2x00dev->ops->lib->kick_queue(queue);
  756. default:
  757. break;
  758. }
  759. }
  760. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  761. void rt2x00queue_start_queue(struct data_queue *queue)
  762. {
  763. mutex_lock(&queue->status_lock);
  764. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  765. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  766. mutex_unlock(&queue->status_lock);
  767. return;
  768. }
  769. set_bit(QUEUE_PAUSED, &queue->flags);
  770. queue->rt2x00dev->ops->lib->start_queue(queue);
  771. rt2x00queue_unpause_queue(queue);
  772. mutex_unlock(&queue->status_lock);
  773. }
  774. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  775. void rt2x00queue_stop_queue(struct data_queue *queue)
  776. {
  777. mutex_lock(&queue->status_lock);
  778. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  779. mutex_unlock(&queue->status_lock);
  780. return;
  781. }
  782. rt2x00queue_pause_queue(queue);
  783. queue->rt2x00dev->ops->lib->stop_queue(queue);
  784. mutex_unlock(&queue->status_lock);
  785. }
  786. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  787. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  788. {
  789. bool started;
  790. bool tx_queue =
  791. (queue->qid == QID_AC_VO) ||
  792. (queue->qid == QID_AC_VI) ||
  793. (queue->qid == QID_AC_BE) ||
  794. (queue->qid == QID_AC_BK);
  795. mutex_lock(&queue->status_lock);
  796. /*
  797. * If the queue has been started, we must stop it temporarily
  798. * to prevent any new frames to be queued on the device. If
  799. * we are not dropping the pending frames, the queue must
  800. * only be stopped in the software and not the hardware,
  801. * otherwise the queue will never become empty on its own.
  802. */
  803. started = test_bit(QUEUE_STARTED, &queue->flags);
  804. if (started) {
  805. /*
  806. * Pause the queue
  807. */
  808. rt2x00queue_pause_queue(queue);
  809. /*
  810. * If we are not supposed to drop any pending
  811. * frames, this means we must force a start (=kick)
  812. * to the queue to make sure the hardware will
  813. * start transmitting.
  814. */
  815. if (!drop && tx_queue)
  816. queue->rt2x00dev->ops->lib->kick_queue(queue);
  817. }
  818. /*
  819. * Check if driver supports flushing, if that is the case we can
  820. * defer the flushing to the driver. Otherwise we must use the
  821. * alternative which just waits for the queue to become empty.
  822. */
  823. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  824. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  825. /*
  826. * The queue flush has failed...
  827. */
  828. if (unlikely(!rt2x00queue_empty(queue)))
  829. WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
  830. /*
  831. * Restore the queue to the previous status
  832. */
  833. if (started)
  834. rt2x00queue_unpause_queue(queue);
  835. mutex_unlock(&queue->status_lock);
  836. }
  837. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  838. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  839. {
  840. struct data_queue *queue;
  841. /*
  842. * rt2x00queue_start_queue will call ieee80211_wake_queue
  843. * for each queue after is has been properly initialized.
  844. */
  845. tx_queue_for_each(rt2x00dev, queue)
  846. rt2x00queue_start_queue(queue);
  847. rt2x00queue_start_queue(rt2x00dev->rx);
  848. }
  849. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  850. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  851. {
  852. struct data_queue *queue;
  853. /*
  854. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  855. * as well, but we are completely shutting doing everything
  856. * now, so it is much safer to stop all TX queues at once,
  857. * and use rt2x00queue_stop_queue for cleaning up.
  858. */
  859. ieee80211_stop_queues(rt2x00dev->hw);
  860. tx_queue_for_each(rt2x00dev, queue)
  861. rt2x00queue_stop_queue(queue);
  862. rt2x00queue_stop_queue(rt2x00dev->rx);
  863. }
  864. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  865. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  866. {
  867. struct data_queue *queue;
  868. tx_queue_for_each(rt2x00dev, queue)
  869. rt2x00queue_flush_queue(queue, drop);
  870. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  871. }
  872. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  873. static void rt2x00queue_reset(struct data_queue *queue)
  874. {
  875. unsigned long irqflags;
  876. unsigned int i;
  877. spin_lock_irqsave(&queue->index_lock, irqflags);
  878. queue->count = 0;
  879. queue->length = 0;
  880. for (i = 0; i < Q_INDEX_MAX; i++)
  881. queue->index[i] = 0;
  882. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  883. }
  884. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  885. {
  886. struct data_queue *queue;
  887. unsigned int i;
  888. queue_for_each(rt2x00dev, queue) {
  889. rt2x00queue_reset(queue);
  890. for (i = 0; i < queue->limit; i++)
  891. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  892. }
  893. }
  894. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  895. const struct data_queue_desc *qdesc)
  896. {
  897. struct queue_entry *entries;
  898. unsigned int entry_size;
  899. unsigned int i;
  900. rt2x00queue_reset(queue);
  901. queue->limit = qdesc->entry_num;
  902. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  903. queue->data_size = qdesc->data_size;
  904. queue->desc_size = qdesc->desc_size;
  905. /*
  906. * Allocate all queue entries.
  907. */
  908. entry_size = sizeof(*entries) + qdesc->priv_size;
  909. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  910. if (!entries)
  911. return -ENOMEM;
  912. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  913. (((char *)(__base)) + ((__limit) * (__esize)) + \
  914. ((__index) * (__psize)))
  915. for (i = 0; i < queue->limit; i++) {
  916. entries[i].flags = 0;
  917. entries[i].queue = queue;
  918. entries[i].skb = NULL;
  919. entries[i].entry_idx = i;
  920. entries[i].priv_data =
  921. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  922. sizeof(*entries), qdesc->priv_size);
  923. }
  924. #undef QUEUE_ENTRY_PRIV_OFFSET
  925. queue->entries = entries;
  926. return 0;
  927. }
  928. static void rt2x00queue_free_skbs(struct data_queue *queue)
  929. {
  930. unsigned int i;
  931. if (!queue->entries)
  932. return;
  933. for (i = 0; i < queue->limit; i++) {
  934. rt2x00queue_free_skb(&queue->entries[i]);
  935. }
  936. }
  937. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  938. {
  939. unsigned int i;
  940. struct sk_buff *skb;
  941. for (i = 0; i < queue->limit; i++) {
  942. skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
  943. if (!skb)
  944. return -ENOMEM;
  945. queue->entries[i].skb = skb;
  946. }
  947. return 0;
  948. }
  949. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  950. {
  951. struct data_queue *queue;
  952. int status;
  953. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  954. if (status)
  955. goto exit;
  956. tx_queue_for_each(rt2x00dev, queue) {
  957. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  958. if (status)
  959. goto exit;
  960. }
  961. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  962. if (status)
  963. goto exit;
  964. if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
  965. status = rt2x00queue_alloc_entries(rt2x00dev->atim,
  966. rt2x00dev->ops->atim);
  967. if (status)
  968. goto exit;
  969. }
  970. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  971. if (status)
  972. goto exit;
  973. return 0;
  974. exit:
  975. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  976. rt2x00queue_uninitialize(rt2x00dev);
  977. return status;
  978. }
  979. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  980. {
  981. struct data_queue *queue;
  982. rt2x00queue_free_skbs(rt2x00dev->rx);
  983. queue_for_each(rt2x00dev, queue) {
  984. kfree(queue->entries);
  985. queue->entries = NULL;
  986. }
  987. }
  988. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  989. struct data_queue *queue, enum data_queue_qid qid)
  990. {
  991. mutex_init(&queue->status_lock);
  992. spin_lock_init(&queue->tx_lock);
  993. spin_lock_init(&queue->index_lock);
  994. queue->rt2x00dev = rt2x00dev;
  995. queue->qid = qid;
  996. queue->txop = 0;
  997. queue->aifs = 2;
  998. queue->cw_min = 5;
  999. queue->cw_max = 10;
  1000. }
  1001. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1002. {
  1003. struct data_queue *queue;
  1004. enum data_queue_qid qid;
  1005. unsigned int req_atim =
  1006. !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1007. /*
  1008. * We need the following queues:
  1009. * RX: 1
  1010. * TX: ops->tx_queues
  1011. * Beacon: 1
  1012. * Atim: 1 (if required)
  1013. */
  1014. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1015. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1016. if (!queue) {
  1017. ERROR(rt2x00dev, "Queue allocation failed.\n");
  1018. return -ENOMEM;
  1019. }
  1020. /*
  1021. * Initialize pointers
  1022. */
  1023. rt2x00dev->rx = queue;
  1024. rt2x00dev->tx = &queue[1];
  1025. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1026. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1027. /*
  1028. * Initialize queue parameters.
  1029. * RX: qid = QID_RX
  1030. * TX: qid = QID_AC_VO + index
  1031. * TX: cw_min: 2^5 = 32.
  1032. * TX: cw_max: 2^10 = 1024.
  1033. * BCN: qid = QID_BEACON
  1034. * ATIM: qid = QID_ATIM
  1035. */
  1036. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1037. qid = QID_AC_VO;
  1038. tx_queue_for_each(rt2x00dev, queue)
  1039. rt2x00queue_init(rt2x00dev, queue, qid++);
  1040. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1041. if (req_atim)
  1042. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1043. return 0;
  1044. }
  1045. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1046. {
  1047. kfree(rt2x00dev->rx);
  1048. rt2x00dev->rx = NULL;
  1049. rt2x00dev->tx = NULL;
  1050. rt2x00dev->bcn = NULL;
  1051. }