host.c 17 KB

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  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. *
  33. * * Redistributions of source code must retain the above copyright
  34. * notice, this list of conditions and the following disclaimer.
  35. * * Redistributions in binary form must reproduce the above copyright
  36. * notice, this list of conditions and the following disclaimer in
  37. * the documentation and/or other materials provided with the
  38. * distribution.
  39. * * Neither the name of Intel Corporation nor the names of its
  40. * contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #include "isci.h"
  56. #include "scic_io_request.h"
  57. #include "scic_remote_device.h"
  58. #include "scic_port.h"
  59. #include "port.h"
  60. #include "request.h"
  61. #include "host.h"
  62. irqreturn_t isci_msix_isr(int vec, void *data)
  63. {
  64. struct isci_host *ihost = data;
  65. struct scic_sds_controller *scic = ihost->core_controller;
  66. if (scic_sds_controller_isr(scic))
  67. tasklet_schedule(&ihost->completion_tasklet);
  68. return IRQ_HANDLED;
  69. }
  70. irqreturn_t isci_intx_isr(int vec, void *data)
  71. {
  72. struct pci_dev *pdev = data;
  73. struct isci_host *ihost;
  74. irqreturn_t ret = IRQ_NONE;
  75. for_each_isci_host(ihost, pdev) {
  76. struct scic_sds_controller *scic = ihost->core_controller;
  77. if (scic_sds_controller_isr(scic)) {
  78. tasklet_schedule(&ihost->completion_tasklet);
  79. ret = IRQ_HANDLED;
  80. }
  81. }
  82. return ret;
  83. }
  84. /**
  85. * isci_host_start_complete() - This function is called by the core library,
  86. * through the ISCI Module, to indicate controller start status.
  87. * @isci_host: This parameter specifies the ISCI host object
  88. * @completion_status: This parameter specifies the completion status from the
  89. * core library.
  90. *
  91. */
  92. void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status)
  93. {
  94. if (completion_status != SCI_SUCCESS)
  95. dev_info(&ihost->pdev->dev,
  96. "controller start timed out, continuing...\n");
  97. isci_host_change_state(ihost, isci_ready);
  98. clear_bit(IHOST_START_PENDING, &ihost->flags);
  99. wake_up(&ihost->eventq);
  100. }
  101. int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)
  102. {
  103. struct isci_host *ihost = isci_host_from_sas_ha(SHOST_TO_SAS_HA(shost));
  104. if (test_bit(IHOST_START_PENDING, &ihost->flags))
  105. return 0;
  106. /* todo: use sas_flush_discovery once it is upstream */
  107. scsi_flush_work(shost);
  108. scsi_flush_work(shost);
  109. dev_dbg(&ihost->pdev->dev,
  110. "%s: ihost->status = %d, time = %ld\n",
  111. __func__, isci_host_get_state(ihost), time);
  112. return 1;
  113. }
  114. void isci_host_scan_start(struct Scsi_Host *shost)
  115. {
  116. struct isci_host *ihost = isci_host_from_sas_ha(SHOST_TO_SAS_HA(shost));
  117. struct scic_sds_controller *scic = ihost->core_controller;
  118. unsigned long tmo = scic_controller_get_suggested_start_timeout(scic);
  119. set_bit(IHOST_START_PENDING, &ihost->flags);
  120. spin_lock_irq(&ihost->scic_lock);
  121. scic_controller_start(scic, tmo);
  122. scic_controller_enable_interrupts(scic);
  123. spin_unlock_irq(&ihost->scic_lock);
  124. }
  125. void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)
  126. {
  127. isci_host_change_state(ihost, isci_stopped);
  128. scic_controller_disable_interrupts(ihost->core_controller);
  129. clear_bit(IHOST_STOP_PENDING, &ihost->flags);
  130. wake_up(&ihost->eventq);
  131. }
  132. static struct coherent_memory_info *isci_host_alloc_mdl_struct(
  133. struct isci_host *isci_host,
  134. u32 size)
  135. {
  136. struct coherent_memory_info *mdl_struct;
  137. void *uncached_address = NULL;
  138. mdl_struct = devm_kzalloc(&isci_host->pdev->dev,
  139. sizeof(*mdl_struct),
  140. GFP_KERNEL);
  141. if (!mdl_struct)
  142. return NULL;
  143. INIT_LIST_HEAD(&mdl_struct->node);
  144. uncached_address = dmam_alloc_coherent(&isci_host->pdev->dev,
  145. size,
  146. &mdl_struct->dma_handle,
  147. GFP_KERNEL);
  148. if (!uncached_address)
  149. return NULL;
  150. /* memset the whole memory area. */
  151. memset((char *)uncached_address, 0, size);
  152. mdl_struct->vaddr = uncached_address;
  153. mdl_struct->size = (size_t)size;
  154. return mdl_struct;
  155. }
  156. static void isci_host_build_mde(
  157. struct sci_physical_memory_descriptor *mde_struct,
  158. struct coherent_memory_info *mdl_struct)
  159. {
  160. unsigned long address = 0;
  161. dma_addr_t dma_addr = 0;
  162. address = (unsigned long)mdl_struct->vaddr;
  163. dma_addr = mdl_struct->dma_handle;
  164. /* to satisfy the alignment. */
  165. if ((address % mde_struct->constant_memory_alignment) != 0) {
  166. int align_offset
  167. = (mde_struct->constant_memory_alignment
  168. - (address % mde_struct->constant_memory_alignment));
  169. address += align_offset;
  170. dma_addr += align_offset;
  171. }
  172. mde_struct->virtual_address = (void *)address;
  173. mde_struct->physical_address = dma_addr;
  174. mdl_struct->mde = mde_struct;
  175. }
  176. static int isci_host_mdl_allocate_coherent(
  177. struct isci_host *isci_host)
  178. {
  179. struct sci_physical_memory_descriptor *current_mde;
  180. struct coherent_memory_info *mdl_struct;
  181. u32 size = 0;
  182. struct sci_base_memory_descriptor_list *mdl_handle
  183. = sci_controller_get_memory_descriptor_list_handle(
  184. isci_host->core_controller);
  185. sci_mdl_first_entry(mdl_handle);
  186. current_mde = sci_mdl_get_current_entry(mdl_handle);
  187. while (current_mde != NULL) {
  188. size = (current_mde->constant_memory_size
  189. + current_mde->constant_memory_alignment);
  190. mdl_struct = isci_host_alloc_mdl_struct(isci_host, size);
  191. if (!mdl_struct)
  192. return -ENOMEM;
  193. list_add_tail(&mdl_struct->node, &isci_host->mdl_struct_list);
  194. isci_host_build_mde(current_mde, mdl_struct);
  195. sci_mdl_next_entry(mdl_handle);
  196. current_mde = sci_mdl_get_current_entry(mdl_handle);
  197. }
  198. return 0;
  199. }
  200. /**
  201. * isci_host_completion_routine() - This function is the delayed service
  202. * routine that calls the sci core library's completion handler. It's
  203. * scheduled as a tasklet from the interrupt service routine when interrupts
  204. * in use, or set as the timeout function in polled mode.
  205. * @data: This parameter specifies the ISCI host object
  206. *
  207. */
  208. static void isci_host_completion_routine(unsigned long data)
  209. {
  210. struct isci_host *isci_host = (struct isci_host *)data;
  211. struct list_head completed_request_list;
  212. struct list_head aborted_request_list;
  213. struct list_head *current_position;
  214. struct list_head *next_position;
  215. struct isci_request *request;
  216. struct isci_request *next_request;
  217. struct sas_task *task;
  218. INIT_LIST_HEAD(&completed_request_list);
  219. INIT_LIST_HEAD(&aborted_request_list);
  220. spin_lock_irq(&isci_host->scic_lock);
  221. scic_sds_controller_completion_handler(isci_host->core_controller);
  222. /* Take the lists of completed I/Os from the host. */
  223. list_splice_init(&isci_host->requests_to_complete,
  224. &completed_request_list);
  225. list_splice_init(&isci_host->requests_to_abort,
  226. &aborted_request_list);
  227. spin_unlock_irq(&isci_host->scic_lock);
  228. /* Process any completions in the lists. */
  229. list_for_each_safe(current_position, next_position,
  230. &completed_request_list) {
  231. request = list_entry(current_position, struct isci_request,
  232. completed_node);
  233. task = isci_request_access_task(request);
  234. /* Normal notification (task_done) */
  235. dev_dbg(&isci_host->pdev->dev,
  236. "%s: Normal - request/task = %p/%p\n",
  237. __func__,
  238. request,
  239. task);
  240. task->task_done(task);
  241. task->lldd_task = NULL;
  242. /* Free the request object. */
  243. isci_request_free(isci_host, request);
  244. }
  245. list_for_each_entry_safe(request, next_request, &aborted_request_list,
  246. completed_node) {
  247. task = isci_request_access_task(request);
  248. /* Use sas_task_abort */
  249. dev_warn(&isci_host->pdev->dev,
  250. "%s: Error - request/task = %p/%p\n",
  251. __func__,
  252. request,
  253. task);
  254. /* Put the task into the abort path. */
  255. sas_task_abort(task);
  256. }
  257. }
  258. void isci_host_deinit(struct isci_host *ihost)
  259. {
  260. struct scic_sds_controller *scic = ihost->core_controller;
  261. int i;
  262. isci_host_change_state(ihost, isci_stopping);
  263. for (i = 0; i < SCI_MAX_PORTS; i++) {
  264. struct isci_port *port = &ihost->isci_ports[i];
  265. struct isci_remote_device *idev, *d;
  266. list_for_each_entry_safe(idev, d, &port->remote_dev_list, node) {
  267. isci_remote_device_change_state(idev, isci_stopping);
  268. isci_remote_device_stop(idev);
  269. }
  270. }
  271. set_bit(IHOST_STOP_PENDING, &ihost->flags);
  272. scic_controller_stop(scic, SCIC_CONTROLLER_STOP_TIMEOUT);
  273. wait_for_stop(ihost);
  274. scic_controller_reset(scic);
  275. }
  276. static int isci_verify_firmware(const struct firmware *fw,
  277. struct isci_firmware *isci_fw)
  278. {
  279. const u8 *tmp;
  280. if (fw->size < ISCI_FIRMWARE_MIN_SIZE)
  281. return -EINVAL;
  282. tmp = fw->data;
  283. /* 12th char should be the NULL terminate for the ID string */
  284. if (tmp[11] != '\0')
  285. return -EINVAL;
  286. if (strncmp("#SCU MAGIC#", tmp, 11) != 0)
  287. return -EINVAL;
  288. isci_fw->id = tmp;
  289. isci_fw->version = fw->data[ISCI_FW_VER_OFS];
  290. isci_fw->subversion = fw->data[ISCI_FW_SUBVER_OFS];
  291. tmp = fw->data + ISCI_FW_DATA_OFS;
  292. while (*tmp != ISCI_FW_HDR_EOF) {
  293. switch (*tmp) {
  294. case ISCI_FW_HDR_PHYMASK:
  295. tmp++;
  296. isci_fw->phy_masks_size = *tmp;
  297. tmp++;
  298. isci_fw->phy_masks = (const u32 *)tmp;
  299. tmp += sizeof(u32) * isci_fw->phy_masks_size;
  300. break;
  301. case ISCI_FW_HDR_PHYGEN:
  302. tmp++;
  303. isci_fw->phy_gens_size = *tmp;
  304. tmp++;
  305. isci_fw->phy_gens = (const u32 *)tmp;
  306. tmp += sizeof(u32) * isci_fw->phy_gens_size;
  307. break;
  308. case ISCI_FW_HDR_SASADDR:
  309. tmp++;
  310. isci_fw->sas_addrs_size = *tmp;
  311. tmp++;
  312. isci_fw->sas_addrs = (const u64 *)tmp;
  313. tmp += sizeof(u64) * isci_fw->sas_addrs_size;
  314. break;
  315. default:
  316. pr_err("bad field in firmware binary blob\n");
  317. return -EINVAL;
  318. }
  319. }
  320. pr_info("isci firmware v%u.%u loaded.\n",
  321. isci_fw->version, isci_fw->subversion);
  322. return SCI_SUCCESS;
  323. }
  324. static void __iomem *scu_base(struct isci_host *isci_host)
  325. {
  326. struct pci_dev *pdev = isci_host->pdev;
  327. int id = isci_host->id;
  328. return pcim_iomap_table(pdev)[SCI_SCU_BAR * 2] + SCI_SCU_BAR_SIZE * id;
  329. }
  330. static void __iomem *smu_base(struct isci_host *isci_host)
  331. {
  332. struct pci_dev *pdev = isci_host->pdev;
  333. int id = isci_host->id;
  334. return pcim_iomap_table(pdev)[SCI_SMU_BAR * 2] + SCI_SMU_BAR_SIZE * id;
  335. }
  336. #define SCI_MAX_TIMER_COUNT 25
  337. int isci_host_init(struct isci_host *isci_host)
  338. {
  339. int err = 0;
  340. int index = 0;
  341. enum sci_status status;
  342. struct scic_sds_controller *controller;
  343. struct scic_sds_port *scic_port;
  344. union scic_oem_parameters scic_oem_params;
  345. union scic_user_parameters scic_user_params;
  346. const struct firmware *fw = NULL;
  347. struct isci_firmware *isci_fw = NULL;
  348. INIT_LIST_HEAD(&isci_host->timer_list_struct.timers);
  349. isci_timer_list_construct(
  350. &isci_host->timer_list_struct,
  351. SCI_MAX_TIMER_COUNT
  352. );
  353. controller = scic_controller_alloc(&isci_host->pdev->dev);
  354. if (!controller) {
  355. err = -ENOMEM;
  356. dev_err(&isci_host->pdev->dev, "%s: failed (%d)\n", __func__, err);
  357. goto out;
  358. }
  359. isci_host->core_controller = controller;
  360. spin_lock_init(&isci_host->state_lock);
  361. spin_lock_init(&isci_host->scic_lock);
  362. spin_lock_init(&isci_host->queue_lock);
  363. init_waitqueue_head(&isci_host->eventq);
  364. isci_host_change_state(isci_host, isci_starting);
  365. isci_host->can_queue = ISCI_CAN_QUEUE_VAL;
  366. status = scic_controller_construct(controller, scu_base(isci_host),
  367. smu_base(isci_host));
  368. if (status != SCI_SUCCESS) {
  369. dev_err(&isci_host->pdev->dev,
  370. "%s: scic_controller_construct failed - status = %x\n",
  371. __func__,
  372. status);
  373. err = -ENODEV;
  374. goto out;
  375. }
  376. isci_host->sas_ha.dev = &isci_host->pdev->dev;
  377. isci_host->sas_ha.lldd_ha = isci_host;
  378. /*----------- SCIC controller Initialization Stuff ------------------
  379. * set association host adapter struct in core controller.
  380. */
  381. sci_object_set_association(isci_host->core_controller,
  382. (void *)isci_host
  383. );
  384. /* grab initial values stored in the controller object for OEM and USER
  385. * parameters */
  386. scic_oem_parameters_get(controller, &scic_oem_params);
  387. scic_user_parameters_get(controller, &scic_user_params);
  388. isci_fw = devm_kzalloc(&isci_host->pdev->dev,
  389. sizeof(struct isci_firmware),
  390. GFP_KERNEL);
  391. if (!isci_fw) {
  392. dev_warn(&isci_host->pdev->dev,
  393. "allocating firmware struct failed\n");
  394. dev_warn(&isci_host->pdev->dev,
  395. "Default OEM configuration being used:"
  396. " 4 narrow ports, and default SAS Addresses\n");
  397. goto set_default_params;
  398. }
  399. status = request_firmware(&fw, ISCI_FW_NAME, &isci_host->pdev->dev);
  400. if (status) {
  401. dev_warn(&isci_host->pdev->dev,
  402. "Loading firmware failed, using default values\n");
  403. dev_warn(&isci_host->pdev->dev,
  404. "Default OEM configuration being used:"
  405. " 4 narrow ports, and default SAS Addresses\n");
  406. goto set_default_params;
  407. }
  408. else {
  409. status = isci_verify_firmware(fw, isci_fw);
  410. if (status != SCI_SUCCESS) {
  411. dev_warn(&isci_host->pdev->dev,
  412. "firmware verification failed\n");
  413. dev_warn(&isci_host->pdev->dev,
  414. "Default OEM configuration being used:"
  415. " 4 narrow ports, and default SAS "
  416. "Addresses\n");
  417. goto set_default_params;
  418. }
  419. /* grab any OEM and USER parameters specified at module load */
  420. status = isci_parse_oem_parameters(&scic_oem_params,
  421. isci_host->id, isci_fw);
  422. if (status != SCI_SUCCESS) {
  423. dev_warn(&isci_host->pdev->dev,
  424. "parsing firmware oem parameters failed\n");
  425. err = -EINVAL;
  426. goto out;
  427. }
  428. status = isci_parse_user_parameters(&scic_user_params,
  429. isci_host->id, isci_fw);
  430. if (status != SCI_SUCCESS) {
  431. dev_warn(&isci_host->pdev->dev,
  432. "%s: isci_parse_user_parameters"
  433. " failed\n", __func__);
  434. err = -EINVAL;
  435. goto out;
  436. }
  437. }
  438. set_default_params:
  439. status = scic_oem_parameters_set(isci_host->core_controller,
  440. &scic_oem_params
  441. );
  442. if (status != SCI_SUCCESS) {
  443. dev_warn(&isci_host->pdev->dev,
  444. "%s: scic_oem_parameters_set failed\n",
  445. __func__);
  446. err = -ENODEV;
  447. goto out;
  448. }
  449. status = scic_user_parameters_set(isci_host->core_controller,
  450. &scic_user_params
  451. );
  452. if (status != SCI_SUCCESS) {
  453. dev_warn(&isci_host->pdev->dev,
  454. "%s: scic_user_parameters_set failed\n",
  455. __func__);
  456. err = -ENODEV;
  457. goto out;
  458. }
  459. status = scic_controller_initialize(isci_host->core_controller);
  460. if (status != SCI_SUCCESS) {
  461. dev_warn(&isci_host->pdev->dev,
  462. "%s: scic_controller_initialize failed -"
  463. " status = 0x%x\n",
  464. __func__, status);
  465. err = -ENODEV;
  466. goto out;
  467. }
  468. tasklet_init(&isci_host->completion_tasklet,
  469. isci_host_completion_routine, (unsigned long)isci_host);
  470. INIT_LIST_HEAD(&(isci_host->mdl_struct_list));
  471. INIT_LIST_HEAD(&isci_host->requests_to_complete);
  472. INIT_LIST_HEAD(&isci_host->requests_to_abort);
  473. /* populate mdl with dma memory. scu_mdl_allocate_coherent() */
  474. err = isci_host_mdl_allocate_coherent(isci_host);
  475. if (err)
  476. goto err_out;
  477. /*
  478. * keep the pool alloc size around, will use it for a bounds checking
  479. * when trying to convert virtual addresses to physical addresses
  480. */
  481. isci_host->dma_pool_alloc_size = sizeof(struct isci_request) +
  482. scic_io_request_get_object_size();
  483. isci_host->dma_pool = dmam_pool_create(DRV_NAME, &isci_host->pdev->dev,
  484. isci_host->dma_pool_alloc_size,
  485. SLAB_HWCACHE_ALIGN, 0);
  486. if (!isci_host->dma_pool) {
  487. err = -ENOMEM;
  488. goto req_obj_err_out;
  489. }
  490. for (index = 0; index < SCI_MAX_PORTS; index++) {
  491. isci_port_init(&isci_host->isci_ports[index],
  492. isci_host, index);
  493. }
  494. for (index = 0; index < SCI_MAX_PHYS; index++)
  495. isci_phy_init(&isci_host->phys[index], isci_host, index);
  496. /* Why are we doing this? Is this even necessary? */
  497. memcpy(&isci_host->sas_addr[0], &isci_host->phys[0].sas_addr[0],
  498. SAS_ADDR_SIZE);
  499. /* Start the ports */
  500. for (index = 0; index < SCI_MAX_PORTS; index++) {
  501. scic_controller_get_port_handle(controller, index, &scic_port);
  502. scic_port_start(scic_port);
  503. }
  504. goto out;
  505. /* SPB_Debug: destroy request object cache */
  506. req_obj_err_out:
  507. /* SPB_Debug: destroy remote object cache */
  508. err_out:
  509. /* SPB_Debug: undo controller init, construct and alloc, remove from parent
  510. * controller list. */
  511. out:
  512. if (fw)
  513. release_firmware(fw);
  514. return err;
  515. }