board-ap4evb.c 34 KB

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  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/regulator/fixed.h>
  38. #include <linux/regulator/machine.h>
  39. #include <linux/smsc911x.h>
  40. #include <linux/sh_intc.h>
  41. #include <linux/sh_clk.h>
  42. #include <linux/gpio.h>
  43. #include <linux/input.h>
  44. #include <linux/leds.h>
  45. #include <linux/input/sh_keysc.h>
  46. #include <linux/usb/r8a66597.h>
  47. #include <linux/pm_clock.h>
  48. #include <linux/dma-mapping.h>
  49. #include <media/sh_mobile_ceu.h>
  50. #include <media/sh_mobile_csi2.h>
  51. #include <media/soc_camera.h>
  52. #include <sound/sh_fsi.h>
  53. #include <sound/simple_card.h>
  54. #include <video/sh_mobile_hdmi.h>
  55. #include <video/sh_mobile_lcdc.h>
  56. #include <video/sh_mipi_dsi.h>
  57. #include <mach/common.h>
  58. #include <mach/irqs.h>
  59. #include <mach/sh7372.h>
  60. #include <asm/mach-types.h>
  61. #include <asm/mach/arch.h>
  62. #include <asm/setup.h>
  63. #include "sh-gpio.h"
  64. /*
  65. * Address Interface BusWidth note
  66. * ------------------------------------------------------------------
  67. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  68. * 0x0800_0000 user area -
  69. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  70. * 0x1400_0000 Ether (LAN9220) 16bit
  71. * 0x1600_0000 user area - cannot use with NAND
  72. * 0x1800_0000 user area -
  73. * 0x1A00_0000 -
  74. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  75. */
  76. /*
  77. * NOR Flash ROM
  78. *
  79. * SW1 | SW2 | SW7 | NOR Flash ROM
  80. * bit1 | bit1 bit2 | bit1 | Memory allocation
  81. * ------+------------+------+------------------
  82. * OFF | ON OFF | ON | Area 0
  83. * OFF | ON OFF | OFF | Area 4
  84. */
  85. /*
  86. * NAND Flash ROM
  87. *
  88. * SW1 | SW2 | SW7 | NAND Flash ROM
  89. * bit1 | bit1 bit2 | bit2 | Memory allocation
  90. * ------+------------+------+------------------
  91. * OFF | ON OFF | ON | FCE 0
  92. * OFF | ON OFF | OFF | FCE 1
  93. */
  94. /*
  95. * SMSC 9220
  96. *
  97. * SW1 SMSC 9220
  98. * -----------------------
  99. * ON access disable
  100. * OFF access enable
  101. */
  102. /*
  103. * LCD / IRQ / KEYSC / IrDA
  104. *
  105. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  106. * LCD = 2nd LCDC (WVGA)
  107. *
  108. * | SW43 |
  109. * SW3 | ON | OFF |
  110. * -------------+-----------------------+---------------+
  111. * ON | KEY / IrDA | LCD |
  112. * OFF | KEY / IrDA / IRQ | IRQ |
  113. *
  114. *
  115. * QHD / WVGA display
  116. *
  117. * You can choice display type on menuconfig.
  118. * Then, check above dip-switch.
  119. */
  120. /*
  121. * USB
  122. *
  123. * J7 : 1-2 MAX3355E VBUS
  124. * 2-3 DC 5.0V
  125. *
  126. * S39: bit2: off
  127. */
  128. /*
  129. * FSI/FSMI
  130. *
  131. * SW41 : ON : SH-Mobile AP4 Audio Mode
  132. * : OFF : Bluetooth Audio Mode
  133. */
  134. /*
  135. * MMC0/SDHI1 (CN7)
  136. *
  137. * J22 : select card voltage
  138. * 1-2 pin : 1.8v
  139. * 2-3 pin : 3.3v
  140. *
  141. * SW1 | SW33
  142. * | bit1 | bit2 | bit3 | bit4
  143. * ------------+------+------+------+-------
  144. * MMC0 OFF | OFF | ON | ON | X
  145. * SDHI1 OFF | ON | X | OFF | ON
  146. *
  147. * voltage lebel
  148. * CN7 : 1.8v
  149. * CN12: 3.3v
  150. */
  151. /* Dummy supplies, where voltage doesn't matter */
  152. static struct regulator_consumer_supply fixed1v8_power_consumers[] =
  153. {
  154. /* J22 default position: 1.8V */
  155. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
  156. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
  157. REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
  158. REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
  159. };
  160. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  161. {
  162. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
  163. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
  164. };
  165. static struct regulator_consumer_supply dummy_supplies[] = {
  166. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  167. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  168. };
  169. /* MTD */
  170. static struct mtd_partition nor_flash_partitions[] = {
  171. {
  172. .name = "loader",
  173. .offset = 0x00000000,
  174. .size = 512 * 1024,
  175. .mask_flags = MTD_WRITEABLE,
  176. },
  177. {
  178. .name = "bootenv",
  179. .offset = MTDPART_OFS_APPEND,
  180. .size = 512 * 1024,
  181. .mask_flags = MTD_WRITEABLE,
  182. },
  183. {
  184. .name = "kernel_ro",
  185. .offset = MTDPART_OFS_APPEND,
  186. .size = 8 * 1024 * 1024,
  187. .mask_flags = MTD_WRITEABLE,
  188. },
  189. {
  190. .name = "kernel",
  191. .offset = MTDPART_OFS_APPEND,
  192. .size = 8 * 1024 * 1024,
  193. },
  194. {
  195. .name = "data",
  196. .offset = MTDPART_OFS_APPEND,
  197. .size = MTDPART_SIZ_FULL,
  198. },
  199. };
  200. static struct physmap_flash_data nor_flash_data = {
  201. .width = 2,
  202. .parts = nor_flash_partitions,
  203. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  204. };
  205. static struct resource nor_flash_resources[] = {
  206. [0] = {
  207. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  208. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  209. .flags = IORESOURCE_MEM,
  210. }
  211. };
  212. static struct platform_device nor_flash_device = {
  213. .name = "physmap-flash",
  214. .dev = {
  215. .platform_data = &nor_flash_data,
  216. },
  217. .num_resources = ARRAY_SIZE(nor_flash_resources),
  218. .resource = nor_flash_resources,
  219. };
  220. /* SMSC 9220 */
  221. static struct resource smc911x_resources[] = {
  222. {
  223. .start = 0x14000000,
  224. .end = 0x16000000 - 1,
  225. .flags = IORESOURCE_MEM,
  226. }, {
  227. .start = evt2irq(0x02c0) /* IRQ6A */,
  228. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  229. },
  230. };
  231. static struct smsc911x_platform_config smsc911x_info = {
  232. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  233. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  234. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  235. };
  236. static struct platform_device smc911x_device = {
  237. .name = "smsc911x",
  238. .id = -1,
  239. .num_resources = ARRAY_SIZE(smc911x_resources),
  240. .resource = smc911x_resources,
  241. .dev = {
  242. .platform_data = &smsc911x_info,
  243. },
  244. };
  245. /*
  246. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  247. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  248. */
  249. static int slot_cn7_get_cd(struct platform_device *pdev)
  250. {
  251. return !gpio_get_value(GPIO_PORT41);
  252. }
  253. /* MERAM */
  254. static struct sh_mobile_meram_info meram_info = {
  255. .addr_mode = SH_MOBILE_MERAM_MODE1,
  256. };
  257. static struct resource meram_resources[] = {
  258. [0] = {
  259. .name = "regs",
  260. .start = 0xe8000000,
  261. .end = 0xe807ffff,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. [1] = {
  265. .name = "meram",
  266. .start = 0xe8080000,
  267. .end = 0xe81fffff,
  268. .flags = IORESOURCE_MEM,
  269. },
  270. };
  271. static struct platform_device meram_device = {
  272. .name = "sh_mobile_meram",
  273. .id = 0,
  274. .num_resources = ARRAY_SIZE(meram_resources),
  275. .resource = meram_resources,
  276. .dev = {
  277. .platform_data = &meram_info,
  278. },
  279. };
  280. /* SH_MMCIF */
  281. static struct resource sh_mmcif_resources[] = {
  282. [0] = {
  283. .name = "MMCIF",
  284. .start = 0xE6BD0000,
  285. .end = 0xE6BD00FF,
  286. .flags = IORESOURCE_MEM,
  287. },
  288. [1] = {
  289. /* MMC ERR */
  290. .start = evt2irq(0x1ac0),
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. [2] = {
  294. /* MMC NOR */
  295. .start = evt2irq(0x1ae0),
  296. .flags = IORESOURCE_IRQ,
  297. },
  298. };
  299. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  300. .sup_pclk = 0,
  301. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  302. .caps = MMC_CAP_4_BIT_DATA |
  303. MMC_CAP_8_BIT_DATA |
  304. MMC_CAP_NEEDS_POLL,
  305. .get_cd = slot_cn7_get_cd,
  306. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  307. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  308. };
  309. static struct platform_device sh_mmcif_device = {
  310. .name = "sh_mmcif",
  311. .id = 0,
  312. .dev = {
  313. .dma_mask = NULL,
  314. .coherent_dma_mask = 0xffffffff,
  315. .platform_data = &sh_mmcif_plat,
  316. },
  317. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  318. .resource = sh_mmcif_resources,
  319. };
  320. /* SDHI0 */
  321. static struct sh_mobile_sdhi_info sdhi0_info = {
  322. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  323. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  324. .tmio_caps = MMC_CAP_SDIO_IRQ,
  325. };
  326. static struct resource sdhi0_resources[] = {
  327. [0] = {
  328. .name = "SDHI0",
  329. .start = 0xe6850000,
  330. .end = 0xe68500ff,
  331. .flags = IORESOURCE_MEM,
  332. },
  333. [1] = {
  334. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  335. .flags = IORESOURCE_IRQ,
  336. },
  337. [2] = {
  338. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  339. .flags = IORESOURCE_IRQ,
  340. },
  341. [3] = {
  342. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  343. .flags = IORESOURCE_IRQ,
  344. },
  345. };
  346. static struct platform_device sdhi0_device = {
  347. .name = "sh_mobile_sdhi",
  348. .num_resources = ARRAY_SIZE(sdhi0_resources),
  349. .resource = sdhi0_resources,
  350. .id = 0,
  351. .dev = {
  352. .platform_data = &sdhi0_info,
  353. },
  354. };
  355. /* SDHI1 */
  356. static struct sh_mobile_sdhi_info sdhi1_info = {
  357. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  358. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  359. .tmio_ocr_mask = MMC_VDD_165_195,
  360. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  361. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  362. .get_cd = slot_cn7_get_cd,
  363. };
  364. static struct resource sdhi1_resources[] = {
  365. [0] = {
  366. .name = "SDHI1",
  367. .start = 0xe6860000,
  368. .end = 0xe68600ff,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. [1] = {
  372. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  373. .flags = IORESOURCE_IRQ,
  374. },
  375. [2] = {
  376. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  377. .flags = IORESOURCE_IRQ,
  378. },
  379. [3] = {
  380. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  381. .flags = IORESOURCE_IRQ,
  382. },
  383. };
  384. static struct platform_device sdhi1_device = {
  385. .name = "sh_mobile_sdhi",
  386. .num_resources = ARRAY_SIZE(sdhi1_resources),
  387. .resource = sdhi1_resources,
  388. .id = 1,
  389. .dev = {
  390. .platform_data = &sdhi1_info,
  391. },
  392. };
  393. /* USB1 */
  394. static void usb1_host_port_power(int port, int power)
  395. {
  396. if (!power) /* only power-on supported for now */
  397. return;
  398. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  399. __raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
  400. }
  401. static struct r8a66597_platdata usb1_host_data = {
  402. .on_chip = 1,
  403. .port_power = usb1_host_port_power,
  404. };
  405. static struct resource usb1_host_resources[] = {
  406. [0] = {
  407. .name = "USBHS",
  408. .start = 0xE68B0000,
  409. .end = 0xE68B00E6 - 1,
  410. .flags = IORESOURCE_MEM,
  411. },
  412. [1] = {
  413. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static struct platform_device usb1_host_device = {
  418. .name = "r8a66597_hcd",
  419. .id = 1,
  420. .dev = {
  421. .dma_mask = NULL, /* not use dma */
  422. .coherent_dma_mask = 0xffffffff,
  423. .platform_data = &usb1_host_data,
  424. },
  425. .num_resources = ARRAY_SIZE(usb1_host_resources),
  426. .resource = usb1_host_resources,
  427. };
  428. /*
  429. * QHD display
  430. */
  431. #ifdef CONFIG_AP4EVB_QHD
  432. /* KEYSC (Needs SW43 set to ON) */
  433. static struct sh_keysc_info keysc_info = {
  434. .mode = SH_KEYSC_MODE_1,
  435. .scan_timing = 3,
  436. .delay = 2500,
  437. .keycodes = {
  438. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  439. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  440. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  441. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  442. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  443. },
  444. };
  445. static struct resource keysc_resources[] = {
  446. [0] = {
  447. .name = "KEYSC",
  448. .start = 0xe61b0000,
  449. .end = 0xe61b0063,
  450. .flags = IORESOURCE_MEM,
  451. },
  452. [1] = {
  453. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  454. .flags = IORESOURCE_IRQ,
  455. },
  456. };
  457. static struct platform_device keysc_device = {
  458. .name = "sh_keysc",
  459. .id = 0, /* "keysc0" clock */
  460. .num_resources = ARRAY_SIZE(keysc_resources),
  461. .resource = keysc_resources,
  462. .dev = {
  463. .platform_data = &keysc_info,
  464. },
  465. };
  466. /* MIPI-DSI */
  467. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  468. void __iomem *base,
  469. int enable)
  470. {
  471. struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
  472. if (IS_ERR(pck))
  473. return PTR_ERR(pck);
  474. if (enable) {
  475. /*
  476. * DSIPCLK = 24MHz
  477. * D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
  478. * HsByteCLK = D-PHY/8 = 39MHz
  479. *
  480. * X * Y * FPS =
  481. * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
  482. */
  483. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  484. clk_enable(pck);
  485. } else {
  486. clk_disable(pck);
  487. }
  488. clk_put(pck);
  489. return 0;
  490. }
  491. static struct resource mipidsi0_resources[] = {
  492. [0] = {
  493. .start = 0xffc60000,
  494. .end = 0xffc63073,
  495. .flags = IORESOURCE_MEM,
  496. },
  497. [1] = {
  498. .start = 0xffc68000,
  499. .end = 0xffc680ef,
  500. .flags = IORESOURCE_MEM,
  501. },
  502. };
  503. static struct sh_mobile_lcdc_info lcdc_info;
  504. static struct sh_mipi_dsi_info mipidsi0_info = {
  505. .data_format = MIPI_RGB888,
  506. .lcd_chan = &lcdc_info.ch[0],
  507. .channel = LCDC_CHAN_MAINLCD,
  508. .lane = 2,
  509. .vsynw_offset = 17,
  510. .phyctrl = 0x6 << 8,
  511. .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
  512. SH_MIPI_DSI_HSbyteCLK,
  513. .set_dot_clock = sh_mipi_set_dot_clock,
  514. };
  515. static struct platform_device mipidsi0_device = {
  516. .name = "sh-mipi-dsi",
  517. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  518. .resource = mipidsi0_resources,
  519. .id = 0,
  520. .dev = {
  521. .platform_data = &mipidsi0_info,
  522. },
  523. };
  524. static struct platform_device *qhd_devices[] __initdata = {
  525. &mipidsi0_device,
  526. &keysc_device,
  527. };
  528. #endif /* CONFIG_AP4EVB_QHD */
  529. /* LCDC0 */
  530. static const struct fb_videomode ap4evb_lcdc_modes[] = {
  531. {
  532. #ifdef CONFIG_AP4EVB_QHD
  533. .name = "R63302(QHD)",
  534. .xres = 544,
  535. .yres = 961,
  536. .left_margin = 72,
  537. .right_margin = 600,
  538. .hsync_len = 16,
  539. .upper_margin = 8,
  540. .lower_margin = 8,
  541. .vsync_len = 2,
  542. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  543. #else
  544. .name = "WVGA Panel",
  545. .xres = 800,
  546. .yres = 480,
  547. .left_margin = 220,
  548. .right_margin = 110,
  549. .hsync_len = 70,
  550. .upper_margin = 20,
  551. .lower_margin = 5,
  552. .vsync_len = 5,
  553. .sync = 0,
  554. #endif
  555. },
  556. };
  557. static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
  558. .icb[0] = {
  559. .meram_size = 0x40,
  560. },
  561. .icb[1] = {
  562. .meram_size = 0x40,
  563. },
  564. };
  565. static struct sh_mobile_lcdc_info lcdc_info = {
  566. .meram_dev = &meram_info,
  567. .ch[0] = {
  568. .chan = LCDC_CHAN_MAINLCD,
  569. .fourcc = V4L2_PIX_FMT_RGB565,
  570. .lcd_modes = ap4evb_lcdc_modes,
  571. .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
  572. .meram_cfg = &lcd_meram_cfg,
  573. #ifdef CONFIG_AP4EVB_QHD
  574. .tx_dev = &mipidsi0_device,
  575. #endif
  576. }
  577. };
  578. static struct resource lcdc_resources[] = {
  579. [0] = {
  580. .name = "LCDC",
  581. .start = 0xfe940000, /* P4-only space */
  582. .end = 0xfe943fff,
  583. .flags = IORESOURCE_MEM,
  584. },
  585. [1] = {
  586. .start = intcs_evt2irq(0x580),
  587. .flags = IORESOURCE_IRQ,
  588. },
  589. };
  590. static struct platform_device lcdc_device = {
  591. .name = "sh_mobile_lcdc_fb",
  592. .num_resources = ARRAY_SIZE(lcdc_resources),
  593. .resource = lcdc_resources,
  594. .dev = {
  595. .platform_data = &lcdc_info,
  596. .coherent_dma_mask = ~0,
  597. },
  598. };
  599. /* FSI */
  600. #define IRQ_FSI evt2irq(0x1840)
  601. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  602. {
  603. int ret = 0;
  604. if (rate <= 0)
  605. return ret;
  606. if (enable) {
  607. ret = clk_set_rate(clk, rate);
  608. if (0 == ret)
  609. ret = clk_enable(clk);
  610. } else {
  611. clk_disable(clk);
  612. }
  613. return ret;
  614. }
  615. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  616. {
  617. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  618. }
  619. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  620. {
  621. struct clk *fsia_ick;
  622. struct clk *fsiack;
  623. int ret = -EIO;
  624. fsia_ick = clk_get(dev, "icka");
  625. if (IS_ERR(fsia_ick))
  626. return PTR_ERR(fsia_ick);
  627. /*
  628. * FSIACK is connected to AK4642,
  629. * and use external clock pin from it.
  630. * it is parent of fsia_ick now.
  631. */
  632. fsiack = clk_get_parent(fsia_ick);
  633. if (!fsiack)
  634. goto fsia_ick_out;
  635. /*
  636. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  637. *
  638. ** FIXME **
  639. * Because the freq_table of external clk (fsiack) are all 0,
  640. * the return value of clk_round_rate became 0.
  641. * So, it use __fsi_set_rate here.
  642. */
  643. ret = __fsi_set_rate(fsiack, rate, enable);
  644. if (ret < 0)
  645. goto fsiack_out;
  646. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  647. if ((ret < 0) && enable)
  648. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  649. fsiack_out:
  650. clk_put(fsiack);
  651. fsia_ick_out:
  652. clk_put(fsia_ick);
  653. return 0;
  654. }
  655. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  656. {
  657. struct clk *fsib_clk;
  658. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  659. long fsib_rate = 0;
  660. long fdiv_rate = 0;
  661. int ackmd_bpfmd;
  662. int ret;
  663. switch (rate) {
  664. case 44100:
  665. fsib_rate = rate * 256;
  666. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  667. break;
  668. case 48000:
  669. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  670. fdiv_rate = rate * 256;
  671. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  672. break;
  673. default:
  674. pr_err("unsupported rate in FSI2 port B\n");
  675. return -EINVAL;
  676. }
  677. /* FSI B setting */
  678. fsib_clk = clk_get(dev, "ickb");
  679. if (IS_ERR(fsib_clk))
  680. return -EIO;
  681. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  682. if (ret < 0)
  683. goto fsi_set_rate_end;
  684. /* FSI DIV setting */
  685. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  686. if (ret < 0) {
  687. /* disable FSI B */
  688. if (enable)
  689. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  690. goto fsi_set_rate_end;
  691. }
  692. ret = ackmd_bpfmd;
  693. fsi_set_rate_end:
  694. clk_put(fsib_clk);
  695. return ret;
  696. }
  697. static struct sh_fsi_platform_info fsi_info = {
  698. .port_a = {
  699. .flags = SH_FSI_BRS_INV,
  700. .set_rate = fsi_ak4642_set_rate,
  701. },
  702. .port_b = {
  703. .flags = SH_FSI_BRS_INV |
  704. SH_FSI_BRM_INV |
  705. SH_FSI_LRS_INV |
  706. SH_FSI_FMT_SPDIF,
  707. .set_rate = fsi_hdmi_set_rate,
  708. },
  709. };
  710. static struct resource fsi_resources[] = {
  711. [0] = {
  712. .name = "FSI",
  713. .start = 0xFE3C0000,
  714. .end = 0xFE3C0400 - 1,
  715. .flags = IORESOURCE_MEM,
  716. },
  717. [1] = {
  718. .start = IRQ_FSI,
  719. .flags = IORESOURCE_IRQ,
  720. },
  721. };
  722. static struct platform_device fsi_device = {
  723. .name = "sh_fsi2",
  724. .id = -1,
  725. .num_resources = ARRAY_SIZE(fsi_resources),
  726. .resource = fsi_resources,
  727. .dev = {
  728. .platform_data = &fsi_info,
  729. },
  730. };
  731. static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
  732. .fmt = SND_SOC_DAIFMT_LEFT_J,
  733. .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  734. .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
  735. .sysclk = 11289600,
  736. };
  737. static struct asoc_simple_card_info fsi2_ak4643_info = {
  738. .name = "AK4643",
  739. .card = "FSI2A-AK4643",
  740. .cpu_dai = "fsia-dai",
  741. .codec = "ak4642-codec.0-0013",
  742. .platform = "sh_fsi2",
  743. .codec_dai = "ak4642-hifi",
  744. .init = &fsi2_ak4643_init_info,
  745. };
  746. static struct platform_device fsi_ak4643_device = {
  747. .name = "asoc-simple-card",
  748. .dev = {
  749. .platform_data = &fsi2_ak4643_info,
  750. },
  751. };
  752. /* LCDC1 */
  753. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  754. unsigned long *parent_freq);
  755. static struct sh_mobile_hdmi_info hdmi_info = {
  756. .flags = HDMI_SND_SRC_SPDIF,
  757. .clk_optimize_parent = ap4evb_clk_optimize,
  758. };
  759. static struct resource hdmi_resources[] = {
  760. [0] = {
  761. .name = "HDMI",
  762. .start = 0xe6be0000,
  763. .end = 0xe6be00ff,
  764. .flags = IORESOURCE_MEM,
  765. },
  766. [1] = {
  767. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  768. .start = evt2irq(0x17e0),
  769. .flags = IORESOURCE_IRQ,
  770. },
  771. };
  772. static struct platform_device hdmi_device = {
  773. .name = "sh-mobile-hdmi",
  774. .num_resources = ARRAY_SIZE(hdmi_resources),
  775. .resource = hdmi_resources,
  776. .id = -1,
  777. .dev = {
  778. .platform_data = &hdmi_info,
  779. },
  780. };
  781. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  782. unsigned long *parent_freq)
  783. {
  784. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  785. long error;
  786. if (IS_ERR(hdmi_ick)) {
  787. int ret = PTR_ERR(hdmi_ick);
  788. pr_err("Cannot get HDMI ICK: %d\n", ret);
  789. return ret;
  790. }
  791. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  792. clk_put(hdmi_ick);
  793. return error;
  794. }
  795. static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  796. .icb[0] = {
  797. .meram_size = 0x100,
  798. },
  799. .icb[1] = {
  800. .meram_size = 0x100,
  801. },
  802. };
  803. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  804. .clock_source = LCDC_CLK_EXTERNAL,
  805. .meram_dev = &meram_info,
  806. .ch[0] = {
  807. .chan = LCDC_CHAN_MAINLCD,
  808. .fourcc = V4L2_PIX_FMT_RGB565,
  809. .interface_type = RGB24,
  810. .clock_divider = 1,
  811. .flags = LCDC_FLAGS_DWPOL,
  812. .meram_cfg = &hdmi_meram_cfg,
  813. .tx_dev = &hdmi_device,
  814. }
  815. };
  816. static struct resource lcdc1_resources[] = {
  817. [0] = {
  818. .name = "LCDC1",
  819. .start = 0xfe944000,
  820. .end = 0xfe947fff,
  821. .flags = IORESOURCE_MEM,
  822. },
  823. [1] = {
  824. .start = intcs_evt2irq(0x1780),
  825. .flags = IORESOURCE_IRQ,
  826. },
  827. };
  828. static struct platform_device lcdc1_device = {
  829. .name = "sh_mobile_lcdc_fb",
  830. .num_resources = ARRAY_SIZE(lcdc1_resources),
  831. .resource = lcdc1_resources,
  832. .id = 1,
  833. .dev = {
  834. .platform_data = &sh_mobile_lcdc1_info,
  835. .coherent_dma_mask = ~0,
  836. },
  837. };
  838. static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
  839. .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  840. };
  841. static struct asoc_simple_card_info fsi2_hdmi_info = {
  842. .name = "HDMI",
  843. .card = "FSI2B-HDMI",
  844. .cpu_dai = "fsib-dai",
  845. .codec = "sh-mobile-hdmi",
  846. .platform = "sh_fsi2",
  847. .codec_dai = "sh_mobile_hdmi-hifi",
  848. .init = &fsi2_hdmi_init_info,
  849. };
  850. static struct platform_device fsi_hdmi_device = {
  851. .name = "asoc-simple-card",
  852. .id = 1,
  853. .dev = {
  854. .platform_data = &fsi2_hdmi_info,
  855. },
  856. };
  857. static struct gpio_led ap4evb_leds[] = {
  858. {
  859. .name = "led4",
  860. .gpio = GPIO_PORT185,
  861. .default_state = LEDS_GPIO_DEFSTATE_ON,
  862. },
  863. {
  864. .name = "led2",
  865. .gpio = GPIO_PORT186,
  866. .default_state = LEDS_GPIO_DEFSTATE_ON,
  867. },
  868. {
  869. .name = "led3",
  870. .gpio = GPIO_PORT187,
  871. .default_state = LEDS_GPIO_DEFSTATE_ON,
  872. },
  873. {
  874. .name = "led1",
  875. .gpio = GPIO_PORT188,
  876. .default_state = LEDS_GPIO_DEFSTATE_ON,
  877. }
  878. };
  879. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  880. .num_leds = ARRAY_SIZE(ap4evb_leds),
  881. .leds = ap4evb_leds,
  882. };
  883. static struct platform_device leds_device = {
  884. .name = "leds-gpio",
  885. .id = 0,
  886. .dev = {
  887. .platform_data = &ap4evb_leds_pdata,
  888. },
  889. };
  890. static struct i2c_board_info imx074_info = {
  891. I2C_BOARD_INFO("imx074", 0x1a),
  892. };
  893. static struct soc_camera_link imx074_link = {
  894. .bus_id = 0,
  895. .board_info = &imx074_info,
  896. .i2c_adapter_id = 0,
  897. .module_name = "imx074",
  898. };
  899. static struct platform_device ap4evb_camera = {
  900. .name = "soc-camera-pdrv",
  901. .id = 0,
  902. .dev = {
  903. .platform_data = &imx074_link,
  904. },
  905. };
  906. static struct sh_csi2_client_config csi2_clients[] = {
  907. {
  908. .phy = SH_CSI2_PHY_MAIN,
  909. .lanes = 0, /* default: 2 lanes */
  910. .channel = 0,
  911. .pdev = &ap4evb_camera,
  912. },
  913. };
  914. static struct sh_csi2_pdata csi2_info = {
  915. .type = SH_CSI2C,
  916. .clients = csi2_clients,
  917. .num_clients = ARRAY_SIZE(csi2_clients),
  918. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  919. };
  920. static struct resource csi2_resources[] = {
  921. [0] = {
  922. .name = "CSI2",
  923. .start = 0xffc90000,
  924. .end = 0xffc90fff,
  925. .flags = IORESOURCE_MEM,
  926. },
  927. [1] = {
  928. .start = intcs_evt2irq(0x17a0),
  929. .flags = IORESOURCE_IRQ,
  930. },
  931. };
  932. static struct sh_mobile_ceu_companion csi2 = {
  933. .id = 0,
  934. .num_resources = ARRAY_SIZE(csi2_resources),
  935. .resource = csi2_resources,
  936. .platform_data = &csi2_info,
  937. };
  938. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  939. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  940. .max_width = 8188,
  941. .max_height = 8188,
  942. .csi2 = &csi2,
  943. };
  944. static struct resource ceu_resources[] = {
  945. [0] = {
  946. .name = "CEU",
  947. .start = 0xfe910000,
  948. .end = 0xfe91009f,
  949. .flags = IORESOURCE_MEM,
  950. },
  951. [1] = {
  952. .start = intcs_evt2irq(0x880),
  953. .flags = IORESOURCE_IRQ,
  954. },
  955. [2] = {
  956. /* place holder for contiguous memory */
  957. },
  958. };
  959. static struct platform_device ceu_device = {
  960. .name = "sh_mobile_ceu",
  961. .id = 0, /* "ceu0" clock */
  962. .num_resources = ARRAY_SIZE(ceu_resources),
  963. .resource = ceu_resources,
  964. .dev = {
  965. .platform_data = &sh_mobile_ceu_info,
  966. .coherent_dma_mask = 0xffffffff,
  967. },
  968. };
  969. static struct platform_device *ap4evb_devices[] __initdata = {
  970. &leds_device,
  971. &nor_flash_device,
  972. &smc911x_device,
  973. &sdhi0_device,
  974. &sdhi1_device,
  975. &usb1_host_device,
  976. &fsi_device,
  977. &fsi_ak4643_device,
  978. &fsi_hdmi_device,
  979. &sh_mmcif_device,
  980. &hdmi_device,
  981. &lcdc_device,
  982. &lcdc1_device,
  983. &ceu_device,
  984. &ap4evb_camera,
  985. &meram_device,
  986. };
  987. static void __init hdmi_init_pm_clock(void)
  988. {
  989. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  990. int ret;
  991. long rate;
  992. if (IS_ERR(hdmi_ick)) {
  993. ret = PTR_ERR(hdmi_ick);
  994. pr_err("Cannot get HDMI ICK: %d\n", ret);
  995. goto out;
  996. }
  997. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  998. if (ret < 0) {
  999. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  1000. goto out;
  1001. }
  1002. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  1003. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  1004. if (rate < 0) {
  1005. pr_err("Cannot get suitable rate: %ld\n", rate);
  1006. ret = rate;
  1007. goto out;
  1008. }
  1009. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  1010. if (ret < 0) {
  1011. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  1012. goto out;
  1013. }
  1014. pr_debug("PLLC2 set frequency %lu\n", rate);
  1015. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  1016. if (ret < 0)
  1017. pr_err("Cannot set HDMI parent: %d\n", ret);
  1018. out:
  1019. if (!IS_ERR(hdmi_ick))
  1020. clk_put(hdmi_ick);
  1021. }
  1022. static void __init fsi_init_pm_clock(void)
  1023. {
  1024. struct clk *fsia_ick;
  1025. int ret;
  1026. fsia_ick = clk_get(&fsi_device.dev, "icka");
  1027. if (IS_ERR(fsia_ick)) {
  1028. ret = PTR_ERR(fsia_ick);
  1029. pr_err("Cannot get FSI ICK: %d\n", ret);
  1030. return;
  1031. }
  1032. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  1033. if (ret < 0)
  1034. pr_err("Cannot set FSI-A parent: %d\n", ret);
  1035. clk_put(fsia_ick);
  1036. }
  1037. /* TouchScreen */
  1038. #ifdef CONFIG_AP4EVB_QHD
  1039. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  1040. # define GPIO_TSC_PORT GPIO_PORT123
  1041. #else /* WVGA */
  1042. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  1043. # define GPIO_TSC_PORT GPIO_PORT40
  1044. #endif
  1045. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  1046. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  1047. static int ts_get_pendown_state(void)
  1048. {
  1049. int val;
  1050. gpio_free(GPIO_TSC_IRQ);
  1051. gpio_request(GPIO_TSC_PORT, NULL);
  1052. gpio_direction_input(GPIO_TSC_PORT);
  1053. val = gpio_get_value(GPIO_TSC_PORT);
  1054. gpio_request(GPIO_TSC_IRQ, NULL);
  1055. return !val;
  1056. }
  1057. static int ts_init(void)
  1058. {
  1059. gpio_request(GPIO_TSC_IRQ, NULL);
  1060. return 0;
  1061. }
  1062. static struct tsc2007_platform_data tsc2007_info = {
  1063. .model = 2007,
  1064. .x_plate_ohms = 180,
  1065. .get_pendown_state = ts_get_pendown_state,
  1066. .init_platform_hw = ts_init,
  1067. };
  1068. static struct i2c_board_info tsc_device = {
  1069. I2C_BOARD_INFO("tsc2007", 0x48),
  1070. .type = "tsc2007",
  1071. .platform_data = &tsc2007_info,
  1072. /*.irq is selected on ap4evb_init */
  1073. };
  1074. /* I2C */
  1075. static struct i2c_board_info i2c0_devices[] = {
  1076. {
  1077. I2C_BOARD_INFO("ak4643", 0x13),
  1078. },
  1079. };
  1080. static struct i2c_board_info i2c1_devices[] = {
  1081. {
  1082. I2C_BOARD_INFO("r2025sd", 0x32),
  1083. },
  1084. };
  1085. #define GPIO_PORT9CR IOMEM(0xE6051009)
  1086. #define GPIO_PORT10CR IOMEM(0xE605100A)
  1087. #define USCCR1 IOMEM(0xE6058144)
  1088. static void __init ap4evb_init(void)
  1089. {
  1090. struct pm_domain_device domain_devices[] = {
  1091. { "A4LC", &lcdc1_device, },
  1092. { "A4LC", &lcdc_device, },
  1093. { "A4MP", &fsi_device, },
  1094. { "A3SP", &sh_mmcif_device, },
  1095. { "A3SP", &sdhi0_device, },
  1096. { "A3SP", &sdhi1_device, },
  1097. { "A4R", &ceu_device, },
  1098. };
  1099. u32 srcr4;
  1100. struct clk *clk;
  1101. regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
  1102. ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
  1103. regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
  1104. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  1105. regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  1106. /* External clock source */
  1107. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1108. sh7372_pinmux_init();
  1109. /* enable SCIFA0 */
  1110. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1111. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1112. /* enable SMSC911X */
  1113. gpio_request(GPIO_FN_CS5A, NULL);
  1114. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1115. /* enable Debug switch (S6) */
  1116. gpio_request(GPIO_PORT32, NULL);
  1117. gpio_request(GPIO_PORT33, NULL);
  1118. gpio_request(GPIO_PORT34, NULL);
  1119. gpio_request(GPIO_PORT35, NULL);
  1120. gpio_direction_input(GPIO_PORT32);
  1121. gpio_direction_input(GPIO_PORT33);
  1122. gpio_direction_input(GPIO_PORT34);
  1123. gpio_direction_input(GPIO_PORT35);
  1124. gpio_export(GPIO_PORT32, 0);
  1125. gpio_export(GPIO_PORT33, 0);
  1126. gpio_export(GPIO_PORT34, 0);
  1127. gpio_export(GPIO_PORT35, 0);
  1128. /* SDHI0 */
  1129. gpio_request(GPIO_FN_SDHICD0, NULL);
  1130. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1131. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1132. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1133. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1134. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1135. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1136. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1137. /* SDHI1 */
  1138. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1139. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1140. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1141. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1142. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1143. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1144. /* MMCIF */
  1145. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1146. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1147. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1148. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1149. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1150. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1151. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1152. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1153. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1154. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1155. /* USB enable */
  1156. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1157. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1158. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1159. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1160. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1161. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1162. /* setup USB phy */
  1163. __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
  1164. /* enable FSI2 port A (ak4643) */
  1165. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1166. gpio_request(GPIO_FN_FSIAILR, NULL);
  1167. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1168. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1169. gpio_request(GPIO_PORT161, NULL);
  1170. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1171. gpio_request(GPIO_PORT9, NULL);
  1172. gpio_request(GPIO_PORT10, NULL);
  1173. gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1174. gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1175. /* card detect pin for MMC slot (CN7) */
  1176. gpio_request(GPIO_PORT41, NULL);
  1177. gpio_direction_input(GPIO_PORT41);
  1178. /* setup FSI2 port B (HDMI) */
  1179. gpio_request(GPIO_FN_FSIBCK, NULL);
  1180. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1181. /* set SPU2 clock to 119.6 MHz */
  1182. clk = clk_get(NULL, "spu_clk");
  1183. if (!IS_ERR(clk)) {
  1184. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1185. clk_put(clk);
  1186. }
  1187. /*
  1188. * set irq priority, to avoid sound chopping
  1189. * when NFS rootfs is used
  1190. * FSI(3) > SMSC911X(2)
  1191. */
  1192. intc_set_priority(IRQ_FSI, 3);
  1193. i2c_register_board_info(0, i2c0_devices,
  1194. ARRAY_SIZE(i2c0_devices));
  1195. i2c_register_board_info(1, i2c1_devices,
  1196. ARRAY_SIZE(i2c1_devices));
  1197. #ifdef CONFIG_AP4EVB_QHD
  1198. /*
  1199. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1200. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1201. */
  1202. /* enable KEYSC */
  1203. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1204. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1205. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1206. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1207. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1208. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1209. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1210. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1211. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1212. gpio_request(GPIO_FN_KEYIN4, NULL);
  1213. /* enable TouchScreen */
  1214. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1215. tsc_device.irq = IRQ28;
  1216. i2c_register_board_info(1, &tsc_device, 1);
  1217. /* LCDC0 */
  1218. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1219. lcdc_info.ch[0].interface_type = RGB24;
  1220. lcdc_info.ch[0].clock_divider = 1;
  1221. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1222. lcdc_info.ch[0].panel_cfg.width = 44;
  1223. lcdc_info.ch[0].panel_cfg.height = 79;
  1224. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1225. #else
  1226. /*
  1227. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1228. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1229. */
  1230. gpio_request(GPIO_FN_LCDD17, NULL);
  1231. gpio_request(GPIO_FN_LCDD16, NULL);
  1232. gpio_request(GPIO_FN_LCDD15, NULL);
  1233. gpio_request(GPIO_FN_LCDD14, NULL);
  1234. gpio_request(GPIO_FN_LCDD13, NULL);
  1235. gpio_request(GPIO_FN_LCDD12, NULL);
  1236. gpio_request(GPIO_FN_LCDD11, NULL);
  1237. gpio_request(GPIO_FN_LCDD10, NULL);
  1238. gpio_request(GPIO_FN_LCDD9, NULL);
  1239. gpio_request(GPIO_FN_LCDD8, NULL);
  1240. gpio_request(GPIO_FN_LCDD7, NULL);
  1241. gpio_request(GPIO_FN_LCDD6, NULL);
  1242. gpio_request(GPIO_FN_LCDD5, NULL);
  1243. gpio_request(GPIO_FN_LCDD4, NULL);
  1244. gpio_request(GPIO_FN_LCDD3, NULL);
  1245. gpio_request(GPIO_FN_LCDD2, NULL);
  1246. gpio_request(GPIO_FN_LCDD1, NULL);
  1247. gpio_request(GPIO_FN_LCDD0, NULL);
  1248. gpio_request(GPIO_FN_LCDDISP, NULL);
  1249. gpio_request(GPIO_FN_LCDDCK, NULL);
  1250. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1251. gpio_direction_output(GPIO_PORT189, 1);
  1252. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1253. gpio_direction_output(GPIO_PORT151, 1);
  1254. lcdc_info.clock_source = LCDC_CLK_BUS;
  1255. lcdc_info.ch[0].interface_type = RGB18;
  1256. lcdc_info.ch[0].clock_divider = 3;
  1257. lcdc_info.ch[0].flags = 0;
  1258. lcdc_info.ch[0].panel_cfg.width = 152;
  1259. lcdc_info.ch[0].panel_cfg.height = 91;
  1260. /* enable TouchScreen */
  1261. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1262. tsc_device.irq = IRQ7;
  1263. i2c_register_board_info(0, &tsc_device, 1);
  1264. #endif /* CONFIG_AP4EVB_QHD */
  1265. /* CEU */
  1266. /*
  1267. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1268. * becomes available
  1269. */
  1270. /* MIPI-CSI stuff */
  1271. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1272. clk = clk_get(NULL, "vck1_clk");
  1273. if (!IS_ERR(clk)) {
  1274. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1275. clk_enable(clk);
  1276. clk_put(clk);
  1277. }
  1278. sh7372_add_standard_devices();
  1279. /* HDMI */
  1280. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1281. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1282. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1283. #define SRCR4 IOMEM(0xe61580bc)
  1284. srcr4 = __raw_readl(SRCR4);
  1285. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1286. udelay(50);
  1287. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1288. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1289. rmobile_add_devices_to_domains(domain_devices,
  1290. ARRAY_SIZE(domain_devices));
  1291. hdmi_init_pm_clock();
  1292. fsi_init_pm_clock();
  1293. sh7372_pm_init();
  1294. pm_clk_add(&fsi_device.dev, "spu2");
  1295. pm_clk_add(&lcdc1_device.dev, "hdmi");
  1296. }
  1297. MACHINE_START(AP4EVB, "ap4evb")
  1298. .map_io = sh7372_map_io,
  1299. .init_early = sh7372_add_early_devices,
  1300. .init_irq = sh7372_init_irq,
  1301. .handle_irq = shmobile_handle_irq_intc,
  1302. .init_machine = ap4evb_init,
  1303. .init_late = sh7372_pm_init_late,
  1304. .timer = &shmobile_timer,
  1305. MACHINE_END