bnad.h 8.2 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #ifndef __BNAD_H__
  19. #define __BNAD_H__
  20. #include <linux/rtnetlink.h>
  21. #include <linux/workqueue.h>
  22. #include <linux/ipv6.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/mutex.h>
  25. #include <linux/firmware.h>
  26. #include <linux/if_vlan.h>
  27. /* Fix for IA64 */
  28. #include <asm/checksum.h>
  29. #include <net/ip6_checksum.h>
  30. #include <net/ip.h>
  31. #include <net/tcp.h>
  32. #include "bna.h"
  33. #define BNAD_TXQ_DEPTH 2048
  34. #define BNAD_RXQ_DEPTH 2048
  35. #define BNAD_MAX_TX 1
  36. #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */
  37. #define BNAD_TXQ_NUM 1
  38. #define BNAD_MAX_RX 1
  39. #define BNAD_MAX_RXP_PER_RX 16
  40. #define BNAD_MAX_RXQ_PER_RXP 2
  41. /*
  42. * Control structure pointed to ccb->ctrl, which
  43. * determines the NAPI / LRO behavior CCB
  44. * There is 1:1 corres. between ccb & ctrl
  45. */
  46. struct bnad_rx_ctrl {
  47. struct bna_ccb *ccb;
  48. unsigned long flags;
  49. struct napi_struct napi;
  50. };
  51. #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
  52. #define BNAD_GET_TX_ID(_skb) (0)
  53. /*
  54. * GLOBAL #defines (CONSTANTS)
  55. */
  56. #define BNAD_NAME "bna"
  57. #define BNAD_NAME_LEN 64
  58. #define BNAD_VERSION "3.0.2.0"
  59. #define BNAD_MAILBOX_MSIX_INDEX 0
  60. #define BNAD_MAILBOX_MSIX_VECTORS 1
  61. #define BNAD_INTX_TX_IB_BITMASK 0x1
  62. #define BNAD_INTX_RX_IB_BITMASK 0x2
  63. #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */
  64. #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */
  65. #define BNAD_IOCETH_TIMEOUT 10000
  66. #define BNAD_MAX_Q_DEPTH 0x10000
  67. #define BNAD_MIN_Q_DEPTH 0x200
  68. #define BNAD_JUMBO_MTU 9000
  69. #define BNAD_NETIF_WAKE_THRESHOLD 8
  70. #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
  71. /* Bit positions for tcb->flags */
  72. #define BNAD_TXQ_FREE_SENT 0
  73. #define BNAD_TXQ_TX_STARTED 1
  74. /* Bit positions for rcb->flags */
  75. #define BNAD_RXQ_REFILL 0
  76. #define BNAD_RXQ_STARTED 1
  77. /* Resource limits */
  78. #define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx)
  79. #define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx)
  80. /*
  81. * DATA STRUCTURES
  82. */
  83. /* enums */
  84. enum bnad_intr_source {
  85. BNAD_INTR_TX = 1,
  86. BNAD_INTR_RX = 2
  87. };
  88. enum bnad_link_state {
  89. BNAD_LS_DOWN = 0,
  90. BNAD_LS_UP = 1
  91. };
  92. struct bnad_completion {
  93. struct completion ioc_comp;
  94. struct completion ucast_comp;
  95. struct completion mcast_comp;
  96. struct completion tx_comp;
  97. struct completion rx_comp;
  98. struct completion stats_comp;
  99. struct completion enet_comp;
  100. struct completion mtu_comp;
  101. u8 ioc_comp_status;
  102. u8 ucast_comp_status;
  103. u8 mcast_comp_status;
  104. u8 tx_comp_status;
  105. u8 rx_comp_status;
  106. u8 stats_comp_status;
  107. u8 port_comp_status;
  108. u8 mtu_comp_status;
  109. };
  110. /* Tx Rx Control Stats */
  111. struct bnad_drv_stats {
  112. u64 netif_queue_stop;
  113. u64 netif_queue_wakeup;
  114. u64 netif_queue_stopped;
  115. u64 tso4;
  116. u64 tso6;
  117. u64 tso_err;
  118. u64 tcpcsum_offload;
  119. u64 udpcsum_offload;
  120. u64 csum_help;
  121. u64 csum_help_err;
  122. u64 hw_stats_updates;
  123. u64 netif_rx_schedule;
  124. u64 netif_rx_complete;
  125. u64 netif_rx_dropped;
  126. u64 link_toggle;
  127. u64 cee_toggle;
  128. u64 cee_up;
  129. u64 rxp_info_alloc_failed;
  130. u64 mbox_intr_disabled;
  131. u64 mbox_intr_enabled;
  132. u64 tx_unmap_q_alloc_failed;
  133. u64 rx_unmap_q_alloc_failed;
  134. u64 rxbuf_alloc_failed;
  135. };
  136. /* Complete driver stats */
  137. struct bnad_stats {
  138. struct bnad_drv_stats drv_stats;
  139. struct bna_stats *bna_stats;
  140. };
  141. /* Tx / Rx Resources */
  142. struct bnad_tx_res_info {
  143. struct bna_res_info res_info[BNA_TX_RES_T_MAX];
  144. };
  145. struct bnad_rx_res_info {
  146. struct bna_res_info res_info[BNA_RX_RES_T_MAX];
  147. };
  148. struct bnad_tx_info {
  149. struct bna_tx *tx; /* 1:1 between tx_info & tx */
  150. struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
  151. u32 tx_id;
  152. } ____cacheline_aligned;
  153. struct bnad_rx_info {
  154. struct bna_rx *rx; /* 1:1 between rx_info & rx */
  155. struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
  156. u32 rx_id;
  157. } ____cacheline_aligned;
  158. /* Unmap queues for Tx / Rx cleanup */
  159. struct bnad_skb_unmap {
  160. struct sk_buff *skb;
  161. DEFINE_DMA_UNMAP_ADDR(dma_addr);
  162. };
  163. struct bnad_unmap_q {
  164. u32 producer_index;
  165. u32 consumer_index;
  166. u32 q_depth;
  167. /* This should be the last one */
  168. struct bnad_skb_unmap unmap_array[1];
  169. };
  170. /* Bit mask values for bnad->cfg_flags */
  171. #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */
  172. #define BNAD_CF_PROMISC 0x02
  173. #define BNAD_CF_ALLMULTI 0x04
  174. #define BNAD_CF_MSIX 0x08 /* If in MSIx mode */
  175. /* Defines for run_flags bit-mask */
  176. /* Set, tested & cleared using xxx_bit() functions */
  177. /* Values indicated bit positions */
  178. #define BNAD_RF_CEE_RUNNING 0
  179. #define BNAD_RF_MTU_SET 1
  180. #define BNAD_RF_MBOX_IRQ_DISABLED 2
  181. #define BNAD_RF_NETDEV_REGISTERED 3
  182. #define BNAD_RF_DIM_TIMER_RUNNING 4
  183. #define BNAD_RF_STATS_TIMER_RUNNING 5
  184. #define BNAD_RF_TX_PRIO_SET 6
  185. /* Define for Fast Path flags */
  186. /* Defined as bit positions */
  187. #define BNAD_FP_IN_RX_PATH 0
  188. struct bnad {
  189. struct net_device *netdev;
  190. /* Data path */
  191. struct bnad_tx_info tx_info[BNAD_MAX_TX];
  192. struct bnad_rx_info rx_info[BNAD_MAX_RX];
  193. unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
  194. /*
  195. * These q numbers are global only because
  196. * they are used to calculate MSIx vectors.
  197. * Actually the exact # of queues are per Tx/Rx
  198. * object.
  199. */
  200. u32 num_tx;
  201. u32 num_rx;
  202. u32 num_txq_per_tx;
  203. u32 num_rxp_per_rx;
  204. u32 txq_depth;
  205. u32 rxq_depth;
  206. u8 tx_coalescing_timeo;
  207. u8 rx_coalescing_timeo;
  208. struct bna_rx_config rx_config[BNAD_MAX_RX];
  209. struct bna_tx_config tx_config[BNAD_MAX_TX];
  210. void __iomem *bar0; /* BAR0 address */
  211. struct bna bna;
  212. u32 cfg_flags;
  213. unsigned long run_flags;
  214. struct pci_dev *pcidev;
  215. u64 mmio_start;
  216. u64 mmio_len;
  217. u32 msix_num;
  218. struct msix_entry *msix_table;
  219. struct mutex conf_mutex;
  220. spinlock_t bna_lock ____cacheline_aligned;
  221. /* Timers */
  222. struct timer_list ioc_timer;
  223. struct timer_list dim_timer;
  224. struct timer_list stats_timer;
  225. /* Control path resources, memory & irq */
  226. struct bna_res_info res_info[BNA_RES_T_MAX];
  227. struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
  228. struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
  229. struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
  230. struct bnad_completion bnad_completions;
  231. /* Burnt in MAC address */
  232. mac_t perm_addr;
  233. struct tasklet_struct tx_free_tasklet;
  234. /* Statistics */
  235. struct bnad_stats stats;
  236. struct bnad_diag *diag;
  237. char adapter_name[BNAD_NAME_LEN];
  238. char port_name[BNAD_NAME_LEN];
  239. char mbox_irq_name[BNAD_NAME_LEN];
  240. };
  241. /*
  242. * EXTERN VARIABLES
  243. */
  244. extern struct firmware *bfi_fw;
  245. extern u32 bnad_rxqs_per_cq;
  246. /*
  247. * EXTERN PROTOTYPES
  248. */
  249. extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
  250. /* Netdev entry point prototypes */
  251. extern void bnad_set_ethtool_ops(struct net_device *netdev);
  252. /* Configuration & setup */
  253. extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
  254. extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
  255. extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
  256. extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
  257. extern void bnad_cleanup_tx(struct bnad *bnad, u32 tx_id);
  258. extern void bnad_cleanup_rx(struct bnad *bnad, u32 rx_id);
  259. /* Timer start/stop protos */
  260. extern void bnad_dim_timer_start(struct bnad *bnad);
  261. /* Statistics */
  262. extern void bnad_netdev_qstats_fill(struct bnad *bnad,
  263. struct rtnl_link_stats64 *stats);
  264. extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
  265. struct rtnl_link_stats64 *stats);
  266. /**
  267. * MACROS
  268. */
  269. /* To set & get the stats counters */
  270. #define BNAD_UPDATE_CTR(_bnad, _ctr) \
  271. (((_bnad)->stats.drv_stats._ctr)++)
  272. #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
  273. #define bnad_enable_rx_irq_unsafe(_ccb) \
  274. { \
  275. if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\
  276. bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
  277. (_ccb)->rx_coalescing_timeo); \
  278. bna_ib_ack((_ccb)->i_dbell, 0); \
  279. } \
  280. }
  281. #define bnad_dim_timer_running(_bnad) \
  282. (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) && \
  283. (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags))))
  284. #endif /* __BNAD_H__ */