nouveau_drm.c 17 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include "nouveau_drm.h"
  34. #include "nouveau_irq.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_pm.h"
  41. #include "nouveau_acpi.h"
  42. #include "nouveau_bios.h"
  43. #include "nouveau_ioctl.h"
  44. #include "nouveau_abi16.h"
  45. #include "nouveau_fbcon.h"
  46. #include "nouveau_fence.h"
  47. #include "nouveau_ttm.h"
  48. MODULE_PARM_DESC(config, "option string to pass to driver core");
  49. static char *nouveau_config;
  50. module_param_named(config, nouveau_config, charp, 0400);
  51. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  52. static char *nouveau_debug;
  53. module_param_named(debug, nouveau_debug, charp, 0400);
  54. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  55. static int nouveau_noaccel = 0;
  56. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  57. MODULE_PARM_DESC(modeset, "enable driver");
  58. int nouveau_modeset = -1;
  59. module_param_named(modeset, nouveau_modeset, int, 0400);
  60. static struct drm_driver driver;
  61. static u64
  62. nouveau_name(struct pci_dev *pdev)
  63. {
  64. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  65. name |= pdev->bus->number << 16;
  66. name |= PCI_SLOT(pdev->devfn) << 8;
  67. return name | PCI_FUNC(pdev->devfn);
  68. }
  69. static int
  70. nouveau_cli_create(struct pci_dev *pdev, u32 name, int size, void **pcli)
  71. {
  72. struct nouveau_cli *cli;
  73. int ret;
  74. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  75. nouveau_debug, size, pcli);
  76. cli = *pcli;
  77. if (ret)
  78. return ret;
  79. mutex_init(&cli->mutex);
  80. return 0;
  81. }
  82. static void
  83. nouveau_cli_destroy(struct nouveau_cli *cli)
  84. {
  85. struct nouveau_object *client = nv_object(cli);
  86. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  87. nouveau_client_fini(&cli->base, false);
  88. atomic_set(&client->refcount, 1);
  89. nouveau_object_ref(NULL, &client);
  90. }
  91. static void
  92. nouveau_accel_fini(struct nouveau_drm *drm)
  93. {
  94. nouveau_gpuobj_ref(NULL, &drm->notify);
  95. nouveau_channel_del(&drm->channel);
  96. if (drm->fence)
  97. nouveau_fence(drm)->dtor(drm);
  98. }
  99. static void
  100. nouveau_accel_init(struct nouveau_drm *drm)
  101. {
  102. struct nouveau_device *device = nv_device(drm->device);
  103. struct nouveau_object *object;
  104. int ret;
  105. if (nouveau_noaccel)
  106. return;
  107. /* initialise synchronisation routines */
  108. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  109. else if (device->chipset < 0x84) ret = nv10_fence_create(drm);
  110. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  111. else ret = nvc0_fence_create(drm);
  112. if (ret) {
  113. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  114. nouveau_accel_fini(drm);
  115. return;
  116. }
  117. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  118. NvDmaFB, NvDmaTT, &drm->channel);
  119. if (ret) {
  120. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  121. nouveau_accel_fini(drm);
  122. return;
  123. }
  124. if (device->card_type < NV_C0) {
  125. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  126. &drm->notify);
  127. if (ret) {
  128. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  129. nouveau_accel_fini(drm);
  130. return;
  131. }
  132. ret = nouveau_object_new(nv_object(drm),
  133. drm->channel->handle, NvNotify0,
  134. 0x003d, &(struct nv_dma_class) {
  135. .flags = NV_DMA_TARGET_VRAM |
  136. NV_DMA_ACCESS_RDWR,
  137. .start = drm->notify->addr,
  138. .limit = drm->notify->addr + 31
  139. }, sizeof(struct nv_dma_class),
  140. &object);
  141. if (ret) {
  142. nouveau_accel_fini(drm);
  143. return;
  144. }
  145. }
  146. nouveau_bo_move_init(drm->channel);
  147. }
  148. static int __devinit
  149. nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
  150. {
  151. struct nouveau_device *device;
  152. struct apertures_struct *aper;
  153. bool boot = false;
  154. int ret;
  155. /* remove conflicting drivers (vesafb, efifb etc) */
  156. aper = alloc_apertures(3);
  157. if (!aper)
  158. return -ENOMEM;
  159. aper->ranges[0].base = pci_resource_start(pdev, 1);
  160. aper->ranges[0].size = pci_resource_len(pdev, 1);
  161. aper->count = 1;
  162. if (pci_resource_len(pdev, 2)) {
  163. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  164. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  165. aper->count++;
  166. }
  167. if (pci_resource_len(pdev, 3)) {
  168. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  169. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  170. aper->count++;
  171. }
  172. #ifdef CONFIG_X86
  173. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  174. #endif
  175. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  176. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  177. nouveau_config, nouveau_debug, &device);
  178. if (ret)
  179. return ret;
  180. pci_set_master(pdev);
  181. ret = drm_get_pci_dev(pdev, pent, &driver);
  182. if (ret) {
  183. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  184. return ret;
  185. }
  186. return 0;
  187. }
  188. int
  189. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  190. {
  191. struct pci_dev *pdev = dev->pdev;
  192. struct nouveau_device *device;
  193. struct nouveau_drm *drm;
  194. int ret;
  195. ret = nouveau_cli_create(pdev, 0, sizeof(*drm), (void**)&drm);
  196. if (ret)
  197. return ret;
  198. dev->dev_private = drm;
  199. drm->dev = dev;
  200. INIT_LIST_HEAD(&drm->clients);
  201. spin_lock_init(&drm->tile.lock);
  202. /* make sure AGP controller is in a consistent state before we
  203. * (possibly) execute vbios init tables (see nouveau_agp.h)
  204. */
  205. if (drm_pci_device_is_agp(dev) && dev->agp) {
  206. /* dummy device object, doesn't init anything, but allows
  207. * agp code access to registers
  208. */
  209. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  210. NVDRM_DEVICE, 0x0080,
  211. &(struct nv_device_class) {
  212. .device = ~0,
  213. .disable =
  214. ~(NV_DEVICE_DISABLE_MMIO |
  215. NV_DEVICE_DISABLE_IDENTIFY),
  216. .debug0 = ~0,
  217. }, sizeof(struct nv_device_class),
  218. &drm->device);
  219. if (ret)
  220. goto fail_device;
  221. nouveau_agp_reset(drm);
  222. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  223. }
  224. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  225. 0x0080, &(struct nv_device_class) {
  226. .device = ~0,
  227. .disable = 0,
  228. .debug0 = 0,
  229. }, sizeof(struct nv_device_class),
  230. &drm->device);
  231. if (ret)
  232. goto fail_device;
  233. /* workaround an odd issue on nvc1 by disabling the device's
  234. * nosnoop capability. hopefully won't cause issues until a
  235. * better fix is found - assuming there is one...
  236. */
  237. device = nv_device(drm->device);
  238. if (nv_device(drm->device)->chipset == 0xc1)
  239. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  240. nouveau_vga_init(drm);
  241. nouveau_agp_init(drm);
  242. if (device->card_type >= NV_50) {
  243. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  244. 0x1000, &drm->client.base.vm);
  245. if (ret)
  246. goto fail_device;
  247. }
  248. ret = nouveau_ttm_init(drm);
  249. if (ret)
  250. goto fail_ttm;
  251. ret = nouveau_bios_init(dev);
  252. if (ret)
  253. goto fail_bios;
  254. ret = nouveau_irq_init(dev);
  255. if (ret)
  256. goto fail_irq;
  257. ret = nouveau_display_create(dev);
  258. if (ret)
  259. goto fail_dispctor;
  260. if (dev->mode_config.num_crtc) {
  261. ret = nouveau_display_init(dev);
  262. if (ret)
  263. goto fail_dispinit;
  264. }
  265. nouveau_pm_init(dev);
  266. nouveau_accel_init(drm);
  267. nouveau_fbcon_init(dev);
  268. return 0;
  269. fail_dispinit:
  270. nouveau_display_destroy(dev);
  271. fail_dispctor:
  272. nouveau_irq_fini(dev);
  273. fail_irq:
  274. nouveau_bios_takedown(dev);
  275. fail_bios:
  276. nouveau_ttm_fini(drm);
  277. fail_ttm:
  278. nouveau_agp_fini(drm);
  279. nouveau_vga_fini(drm);
  280. fail_device:
  281. nouveau_cli_destroy(&drm->client);
  282. return ret;
  283. }
  284. int
  285. nouveau_drm_unload(struct drm_device *dev)
  286. {
  287. struct nouveau_drm *drm = nouveau_drm(dev);
  288. nouveau_fbcon_fini(dev);
  289. nouveau_accel_fini(drm);
  290. nouveau_pm_fini(dev);
  291. nouveau_display_fini(dev);
  292. nouveau_display_destroy(dev);
  293. nouveau_irq_fini(dev);
  294. nouveau_bios_takedown(dev);
  295. nouveau_ttm_fini(drm);
  296. nouveau_agp_fini(drm);
  297. nouveau_vga_fini(drm);
  298. nouveau_cli_destroy(&drm->client);
  299. return 0;
  300. }
  301. static void
  302. nouveau_drm_remove(struct pci_dev *pdev)
  303. {
  304. struct drm_device *dev = pci_get_drvdata(pdev);
  305. struct nouveau_drm *drm = nouveau_drm(dev);
  306. struct nouveau_object *device;
  307. device = drm->client.base.device;
  308. drm_put_dev(dev);
  309. nouveau_object_ref(NULL, &device);
  310. nouveau_object_debug();
  311. }
  312. int
  313. nouveau_drm_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  314. {
  315. struct drm_device *dev = pci_get_drvdata(pdev);
  316. struct nouveau_drm *drm = nouveau_drm(dev);
  317. struct nouveau_cli *cli;
  318. int ret;
  319. if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  320. pm_state.event == PM_EVENT_PRETHAW)
  321. return 0;
  322. NV_INFO(drm, "suspending fbcon...\n");
  323. nouveau_fbcon_set_suspend(dev, 1);
  324. NV_INFO(drm, "suspending display...\n");
  325. ret = nouveau_display_suspend(dev);
  326. if (ret)
  327. return ret;
  328. NV_INFO(drm, "evicting buffers...\n");
  329. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  330. if (drm->fence && nouveau_fence(drm)->suspend) {
  331. if (!nouveau_fence(drm)->suspend(drm))
  332. return -ENOMEM;
  333. }
  334. NV_INFO(drm, "suspending client object trees...\n");
  335. list_for_each_entry(cli, &drm->clients, head) {
  336. ret = nouveau_client_fini(&cli->base, true);
  337. if (ret)
  338. goto fail_client;
  339. }
  340. ret = nouveau_client_fini(&drm->client.base, true);
  341. if (ret)
  342. goto fail_client;
  343. nouveau_agp_fini(drm);
  344. pci_save_state(pdev);
  345. if (pm_state.event == PM_EVENT_SUSPEND) {
  346. pci_disable_device(pdev);
  347. pci_set_power_state(pdev, PCI_D3hot);
  348. }
  349. return 0;
  350. fail_client:
  351. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  352. nouveau_client_init(&cli->base);
  353. }
  354. NV_INFO(drm, "resuming display...\n");
  355. nouveau_display_resume(dev);
  356. return ret;
  357. }
  358. int
  359. nouveau_drm_resume(struct pci_dev *pdev)
  360. {
  361. struct drm_device *dev = pci_get_drvdata(pdev);
  362. struct nouveau_drm *drm = nouveau_drm(dev);
  363. struct nouveau_cli *cli;
  364. int ret;
  365. if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  366. return 0;
  367. NV_INFO(drm, "re-enabling device...\n");
  368. pci_set_power_state(pdev, PCI_D0);
  369. pci_restore_state(pdev);
  370. ret = pci_enable_device(pdev);
  371. if (ret)
  372. return ret;
  373. pci_set_master(pdev);
  374. nouveau_agp_reset(drm);
  375. NV_INFO(drm, "resuming client object trees...\n");
  376. nouveau_client_init(&drm->client.base);
  377. nouveau_agp_init(drm);
  378. list_for_each_entry(cli, &drm->clients, head) {
  379. nouveau_client_init(&cli->base);
  380. }
  381. if (drm->fence && nouveau_fence(drm)->resume)
  382. nouveau_fence(drm)->resume(drm);
  383. nouveau_run_vbios_init(dev);
  384. nouveau_irq_postinstall(dev);
  385. nouveau_pm_resume(dev);
  386. NV_INFO(drm, "resuming display...\n");
  387. nouveau_display_resume(dev);
  388. return 0;
  389. }
  390. int
  391. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  392. {
  393. struct pci_dev *pdev = dev->pdev;
  394. struct nouveau_drm *drm = nouveau_drm(dev);
  395. struct nouveau_cli *cli;
  396. int ret;
  397. ret = nouveau_cli_create(pdev, fpriv->pid, sizeof(*cli), (void **)&cli);
  398. if (ret)
  399. return ret;
  400. if (nv_device(drm->device)->card_type >= NV_50) {
  401. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  402. 0x1000, &cli->base.vm);
  403. if (ret) {
  404. nouveau_cli_destroy(cli);
  405. return ret;
  406. }
  407. }
  408. fpriv->driver_priv = cli;
  409. mutex_lock(&drm->client.mutex);
  410. list_add(&cli->head, &drm->clients);
  411. mutex_unlock(&drm->client.mutex);
  412. return 0;
  413. }
  414. void
  415. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  416. {
  417. struct nouveau_cli *cli = nouveau_cli(fpriv);
  418. struct nouveau_drm *drm = nouveau_drm(dev);
  419. if (cli->abi16)
  420. nouveau_abi16_fini(cli->abi16);
  421. mutex_lock(&drm->client.mutex);
  422. list_del(&cli->head);
  423. mutex_unlock(&drm->client.mutex);
  424. }
  425. void
  426. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  427. {
  428. struct nouveau_cli *cli = nouveau_cli(fpriv);
  429. nouveau_cli_destroy(cli);
  430. }
  431. static struct drm_ioctl_desc
  432. nouveau_ioctls[] = {
  433. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  434. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  435. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  436. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  437. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  438. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  439. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  440. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  441. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  442. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  443. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  444. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  445. };
  446. static const struct file_operations
  447. nouveau_driver_fops = {
  448. .owner = THIS_MODULE,
  449. .open = drm_open,
  450. .release = drm_release,
  451. .unlocked_ioctl = drm_ioctl,
  452. .mmap = nouveau_ttm_mmap,
  453. .poll = drm_poll,
  454. .fasync = drm_fasync,
  455. .read = drm_read,
  456. #if defined(CONFIG_COMPAT)
  457. .compat_ioctl = nouveau_compat_ioctl,
  458. #endif
  459. .llseek = noop_llseek,
  460. };
  461. static struct drm_driver
  462. driver = {
  463. .driver_features =
  464. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  465. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  466. DRIVER_MODESET | DRIVER_PRIME,
  467. .load = nouveau_drm_load,
  468. .unload = nouveau_drm_unload,
  469. .open = nouveau_drm_open,
  470. .preclose = nouveau_drm_preclose,
  471. .postclose = nouveau_drm_postclose,
  472. .lastclose = nouveau_vga_lastclose,
  473. .irq_preinstall = nouveau_irq_preinstall,
  474. .irq_postinstall = nouveau_irq_postinstall,
  475. .irq_uninstall = nouveau_irq_uninstall,
  476. .irq_handler = nouveau_irq_handler,
  477. .get_vblank_counter = drm_vblank_count,
  478. .enable_vblank = nouveau_vblank_enable,
  479. .disable_vblank = nouveau_vblank_disable,
  480. .ioctls = nouveau_ioctls,
  481. .fops = &nouveau_driver_fops,
  482. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  483. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  484. .gem_prime_export = nouveau_gem_prime_export,
  485. .gem_prime_import = nouveau_gem_prime_import,
  486. .gem_init_object = nouveau_gem_object_new,
  487. .gem_free_object = nouveau_gem_object_del,
  488. .gem_open_object = nouveau_gem_object_open,
  489. .gem_close_object = nouveau_gem_object_close,
  490. .dumb_create = nouveau_display_dumb_create,
  491. .dumb_map_offset = nouveau_display_dumb_map_offset,
  492. .dumb_destroy = nouveau_display_dumb_destroy,
  493. .name = DRIVER_NAME,
  494. .desc = DRIVER_DESC,
  495. #ifdef GIT_REVISION
  496. .date = GIT_REVISION,
  497. #else
  498. .date = DRIVER_DATE,
  499. #endif
  500. .major = DRIVER_MAJOR,
  501. .minor = DRIVER_MINOR,
  502. .patchlevel = DRIVER_PATCHLEVEL,
  503. };
  504. static struct pci_device_id
  505. nouveau_drm_pci_table[] = {
  506. {
  507. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  508. .class = PCI_BASE_CLASS_DISPLAY << 16,
  509. .class_mask = 0xff << 16,
  510. },
  511. {
  512. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  513. .class = PCI_BASE_CLASS_DISPLAY << 16,
  514. .class_mask = 0xff << 16,
  515. },
  516. {}
  517. };
  518. static struct pci_driver
  519. nouveau_drm_pci_driver = {
  520. .name = "nouveau",
  521. .id_table = nouveau_drm_pci_table,
  522. .probe = nouveau_drm_probe,
  523. .remove = nouveau_drm_remove,
  524. .suspend = nouveau_drm_suspend,
  525. .resume = nouveau_drm_resume,
  526. };
  527. static int __init
  528. nouveau_drm_init(void)
  529. {
  530. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  531. if (nouveau_modeset == -1) {
  532. #ifdef CONFIG_VGA_CONSOLE
  533. if (vgacon_text_force())
  534. nouveau_modeset = 0;
  535. else
  536. #endif
  537. nouveau_modeset = 1;
  538. }
  539. if (!nouveau_modeset)
  540. return 0;
  541. nouveau_register_dsm_handler();
  542. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  543. }
  544. static void __exit
  545. nouveau_drm_exit(void)
  546. {
  547. if (!nouveau_modeset)
  548. return;
  549. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  550. nouveau_unregister_dsm_handler();
  551. }
  552. module_init(nouveau_drm_init);
  553. module_exit(nouveau_drm_exit);
  554. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  555. MODULE_AUTHOR(DRIVER_AUTHOR);
  556. MODULE_DESCRIPTION(DRIVER_DESC);
  557. MODULE_LICENSE("GPL and additional rights");