sunlance.c 42 KB

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  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/slab.h>
  79. #include <linux/string.h>
  80. #include <linux/delay.h>
  81. #include <linux/init.h>
  82. #include <linux/crc32.h>
  83. #include <linux/errno.h>
  84. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  85. #include <linux/route.h>
  86. #include <linux/netdevice.h>
  87. #include <linux/etherdevice.h>
  88. #include <linux/skbuff.h>
  89. #include <linux/ethtool.h>
  90. #include <linux/bitops.h>
  91. #include <asm/system.h>
  92. #include <asm/io.h>
  93. #include <asm/dma.h>
  94. #include <asm/pgtable.h>
  95. #include <asm/byteorder.h> /* Used by the checksum routines */
  96. #include <asm/idprom.h>
  97. #include <asm/sbus.h>
  98. #include <asm/prom.h>
  99. #include <asm/auxio.h> /* For tpe-link-test? setting */
  100. #include <asm/irq.h>
  101. #define DRV_NAME "sunlance"
  102. #define DRV_VERSION "2.02"
  103. #define DRV_RELDATE "8/24/03"
  104. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  105. static char version[] =
  106. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  107. MODULE_VERSION(DRV_VERSION);
  108. MODULE_AUTHOR(DRV_AUTHOR);
  109. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  110. MODULE_LICENSE("GPL");
  111. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  112. #ifndef LANCE_LOG_TX_BUFFERS
  113. #define LANCE_LOG_TX_BUFFERS 4
  114. #define LANCE_LOG_RX_BUFFERS 4
  115. #endif
  116. #define LE_CSR0 0
  117. #define LE_CSR1 1
  118. #define LE_CSR2 2
  119. #define LE_CSR3 3
  120. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  121. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  122. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  123. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  124. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  125. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  126. #define LE_C0_RINT 0x0400 /* Received interrupt */
  127. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  128. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  129. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  130. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  131. #define LE_C0_RXON 0x0020 /* Receiver on */
  132. #define LE_C0_TXON 0x0010 /* Transmitter on */
  133. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  134. #define LE_C0_STOP 0x0004 /* Stop the card */
  135. #define LE_C0_STRT 0x0002 /* Start the card */
  136. #define LE_C0_INIT 0x0001 /* Init the card */
  137. #define LE_C3_BSWP 0x4 /* SWAP */
  138. #define LE_C3_ACON 0x2 /* ALE Control */
  139. #define LE_C3_BCON 0x1 /* Byte control */
  140. /* Receive message descriptor 1 */
  141. #define LE_R1_OWN 0x80 /* Who owns the entry */
  142. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  143. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  144. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  145. #define LE_R1_CRC 0x08 /* CRC error */
  146. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  147. #define LE_R1_SOP 0x02 /* Start of packet */
  148. #define LE_R1_EOP 0x01 /* End of packet */
  149. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  150. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  151. #define LE_T1_ERR 0x40 /* Error summary */
  152. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  153. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  154. #define LE_T1_EDEF 0x04 /* Error: deferred */
  155. #define LE_T1_SOP 0x02 /* Start of packet */
  156. #define LE_T1_EOP 0x01 /* End of packet */
  157. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  158. #define LE_T3_BUF 0x8000 /* Buffer error */
  159. #define LE_T3_UFL 0x4000 /* Error underflow */
  160. #define LE_T3_LCOL 0x1000 /* Error late collision */
  161. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  162. #define LE_T3_RTY 0x0400 /* Error retry */
  163. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  164. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  165. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  166. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  167. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  168. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  169. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  170. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  171. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  172. #define PKT_BUF_SZ 1544
  173. #define RX_BUFF_SIZE PKT_BUF_SZ
  174. #define TX_BUFF_SIZE PKT_BUF_SZ
  175. struct lance_rx_desc {
  176. u16 rmd0; /* low address of packet */
  177. u8 rmd1_bits; /* descriptor bits */
  178. u8 rmd1_hadr; /* high address of packet */
  179. s16 length; /* This length is 2s complement (negative)!
  180. * Buffer length
  181. */
  182. u16 mblength; /* This is the actual number of bytes received */
  183. };
  184. struct lance_tx_desc {
  185. u16 tmd0; /* low address of packet */
  186. u8 tmd1_bits; /* descriptor bits */
  187. u8 tmd1_hadr; /* high address of packet */
  188. s16 length; /* Length is 2s complement (negative)! */
  189. u16 misc;
  190. };
  191. /* The LANCE initialization block, described in databook. */
  192. /* On the Sparc, this block should be on a DMA region */
  193. struct lance_init_block {
  194. u16 mode; /* Pre-set mode (reg. 15) */
  195. u8 phys_addr[6]; /* Physical ethernet address */
  196. u32 filter[2]; /* Multicast filter. */
  197. /* Receive and transmit ring base, along with extra bits. */
  198. u16 rx_ptr; /* receive descriptor addr */
  199. u16 rx_len; /* receive len and high addr */
  200. u16 tx_ptr; /* transmit descriptor addr */
  201. u16 tx_len; /* transmit len and high addr */
  202. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  203. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  204. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  205. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  206. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  207. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  208. };
  209. #define libdesc_offset(rt, elem) \
  210. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  211. #define libbuff_offset(rt, elem) \
  212. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  213. struct lance_private {
  214. void __iomem *lregs; /* Lance RAP/RDP regs. */
  215. void __iomem *dregs; /* DMA controller regs. */
  216. struct lance_init_block __iomem *init_block_iomem;
  217. struct lance_init_block *init_block_mem;
  218. spinlock_t lock;
  219. int rx_new, tx_new;
  220. int rx_old, tx_old;
  221. struct net_device_stats stats;
  222. struct sbus_dma *ledma; /* If set this points to ledma */
  223. char tpe; /* cable-selection is TPE */
  224. char auto_select; /* cable-selection by carrier */
  225. char burst_sizes; /* ledma SBus burst sizes */
  226. char pio_buffer; /* init block in PIO space? */
  227. unsigned short busmaster_regval;
  228. void (*init_ring)(struct net_device *);
  229. void (*rx)(struct net_device *);
  230. void (*tx)(struct net_device *);
  231. char *name;
  232. dma_addr_t init_block_dvma;
  233. struct net_device *dev; /* Backpointer */
  234. struct sbus_dev *sdev;
  235. struct timer_list multicast_timer;
  236. };
  237. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  238. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  239. lp->tx_old - lp->tx_new-1)
  240. /* Lance registers. */
  241. #define RDP 0x00UL /* register data port */
  242. #define RAP 0x02UL /* register address port */
  243. #define LANCE_REG_SIZE 0x04UL
  244. #define STOP_LANCE(__lp) \
  245. do { void __iomem *__base = (__lp)->lregs; \
  246. sbus_writew(LE_CSR0, __base + RAP); \
  247. sbus_writew(LE_C0_STOP, __base + RDP); \
  248. } while (0)
  249. int sparc_lance_debug = 2;
  250. /* The Lance uses 24 bit addresses */
  251. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  252. /* On the Sun4m we have to instruct the ledma to provide them */
  253. /* Even worse, on scsi/ether SBUS cards, the init block and the
  254. * transmit/receive buffers are addresses as offsets from absolute
  255. * zero on the lebuffer PIO area. -DaveM
  256. */
  257. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  258. /* Load the CSR registers */
  259. static void load_csrs(struct lance_private *lp)
  260. {
  261. u32 leptr;
  262. if (lp->pio_buffer)
  263. leptr = 0;
  264. else
  265. leptr = LANCE_ADDR(lp->init_block_dvma);
  266. sbus_writew(LE_CSR1, lp->lregs + RAP);
  267. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  268. sbus_writew(LE_CSR2, lp->lregs + RAP);
  269. sbus_writew(leptr >> 16, lp->lregs + RDP);
  270. sbus_writew(LE_CSR3, lp->lregs + RAP);
  271. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  272. /* Point back to csr0 */
  273. sbus_writew(LE_CSR0, lp->lregs + RAP);
  274. }
  275. /* Setup the Lance Rx and Tx rings */
  276. static void lance_init_ring_dvma(struct net_device *dev)
  277. {
  278. struct lance_private *lp = netdev_priv(dev);
  279. struct lance_init_block *ib = lp->init_block_mem;
  280. dma_addr_t aib = lp->init_block_dvma;
  281. __u32 leptr;
  282. int i;
  283. /* Lock out other processes while setting up hardware */
  284. netif_stop_queue(dev);
  285. lp->rx_new = lp->tx_new = 0;
  286. lp->rx_old = lp->tx_old = 0;
  287. /* Copy the ethernet address to the lance init block
  288. * Note that on the sparc you need to swap the ethernet address.
  289. */
  290. ib->phys_addr [0] = dev->dev_addr [1];
  291. ib->phys_addr [1] = dev->dev_addr [0];
  292. ib->phys_addr [2] = dev->dev_addr [3];
  293. ib->phys_addr [3] = dev->dev_addr [2];
  294. ib->phys_addr [4] = dev->dev_addr [5];
  295. ib->phys_addr [5] = dev->dev_addr [4];
  296. /* Setup the Tx ring entries */
  297. for (i = 0; i <= TX_RING_SIZE; i++) {
  298. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  299. ib->btx_ring [i].tmd0 = leptr;
  300. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  301. ib->btx_ring [i].tmd1_bits = 0;
  302. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  303. ib->btx_ring [i].misc = 0;
  304. }
  305. /* Setup the Rx ring entries */
  306. for (i = 0; i < RX_RING_SIZE; i++) {
  307. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  308. ib->brx_ring [i].rmd0 = leptr;
  309. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  310. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  311. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  312. ib->brx_ring [i].mblength = 0;
  313. }
  314. /* Setup the initialization block */
  315. /* Setup rx descriptor pointer */
  316. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  317. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  318. ib->rx_ptr = leptr;
  319. /* Setup tx descriptor pointer */
  320. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  321. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  322. ib->tx_ptr = leptr;
  323. }
  324. static void lance_init_ring_pio(struct net_device *dev)
  325. {
  326. struct lance_private *lp = netdev_priv(dev);
  327. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  328. u32 leptr;
  329. int i;
  330. /* Lock out other processes while setting up hardware */
  331. netif_stop_queue(dev);
  332. lp->rx_new = lp->tx_new = 0;
  333. lp->rx_old = lp->tx_old = 0;
  334. /* Copy the ethernet address to the lance init block
  335. * Note that on the sparc you need to swap the ethernet address.
  336. */
  337. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  338. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  339. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  340. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  341. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  342. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  343. /* Setup the Tx ring entries */
  344. for (i = 0; i <= TX_RING_SIZE; i++) {
  345. leptr = libbuff_offset(tx_buf, i);
  346. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  347. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  348. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  349. /* The ones required by tmd2 */
  350. sbus_writew(0xf000, &ib->btx_ring [i].length);
  351. sbus_writew(0, &ib->btx_ring [i].misc);
  352. }
  353. /* Setup the Rx ring entries */
  354. for (i = 0; i < RX_RING_SIZE; i++) {
  355. leptr = libbuff_offset(rx_buf, i);
  356. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  357. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  358. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  359. sbus_writew(-RX_BUFF_SIZE|0xf000,
  360. &ib->brx_ring [i].length);
  361. sbus_writew(0, &ib->brx_ring [i].mblength);
  362. }
  363. /* Setup the initialization block */
  364. /* Setup rx descriptor pointer */
  365. leptr = libdesc_offset(brx_ring, 0);
  366. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  367. &ib->rx_len);
  368. sbus_writew(leptr, &ib->rx_ptr);
  369. /* Setup tx descriptor pointer */
  370. leptr = libdesc_offset(btx_ring, 0);
  371. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  372. &ib->tx_len);
  373. sbus_writew(leptr, &ib->tx_ptr);
  374. }
  375. static void init_restart_ledma(struct lance_private *lp)
  376. {
  377. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  378. if (!(csr & DMA_HNDL_ERROR)) {
  379. /* E-Cache draining */
  380. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  381. barrier();
  382. }
  383. csr = sbus_readl(lp->dregs + DMA_CSR);
  384. csr &= ~DMA_E_BURSTS;
  385. if (lp->burst_sizes & DMA_BURST32)
  386. csr |= DMA_E_BURST32;
  387. else
  388. csr |= DMA_E_BURST16;
  389. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  390. if (lp->tpe)
  391. csr |= DMA_EN_ENETAUI;
  392. else
  393. csr &= ~DMA_EN_ENETAUI;
  394. udelay(20);
  395. sbus_writel(csr, lp->dregs + DMA_CSR);
  396. udelay(200);
  397. }
  398. static int init_restart_lance(struct lance_private *lp)
  399. {
  400. u16 regval = 0;
  401. int i;
  402. if (lp->dregs)
  403. init_restart_ledma(lp);
  404. sbus_writew(LE_CSR0, lp->lregs + RAP);
  405. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  406. /* Wait for the lance to complete initialization */
  407. for (i = 0; i < 100; i++) {
  408. regval = sbus_readw(lp->lregs + RDP);
  409. if (regval & (LE_C0_ERR | LE_C0_IDON))
  410. break;
  411. barrier();
  412. }
  413. if (i == 100 || (regval & LE_C0_ERR)) {
  414. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  415. i, regval);
  416. if (lp->dregs)
  417. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  418. return -1;
  419. }
  420. /* Clear IDON by writing a "1", enable interrupts and start lance */
  421. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  422. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  423. if (lp->dregs) {
  424. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  425. csr |= DMA_INT_ENAB;
  426. sbus_writel(csr, lp->dregs + DMA_CSR);
  427. }
  428. return 0;
  429. }
  430. static void lance_rx_dvma(struct net_device *dev)
  431. {
  432. struct lance_private *lp = netdev_priv(dev);
  433. struct lance_init_block *ib = lp->init_block_mem;
  434. struct lance_rx_desc *rd;
  435. u8 bits;
  436. int len, entry = lp->rx_new;
  437. struct sk_buff *skb;
  438. for (rd = &ib->brx_ring [entry];
  439. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  440. rd = &ib->brx_ring [entry]) {
  441. /* We got an incomplete frame? */
  442. if ((bits & LE_R1_POK) != LE_R1_POK) {
  443. lp->stats.rx_over_errors++;
  444. lp->stats.rx_errors++;
  445. } else if (bits & LE_R1_ERR) {
  446. /* Count only the end frame as a rx error,
  447. * not the beginning
  448. */
  449. if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
  450. if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
  451. if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
  452. if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
  453. if (bits & LE_R1_EOP) lp->stats.rx_errors++;
  454. } else {
  455. len = (rd->mblength & 0xfff) - 4;
  456. skb = dev_alloc_skb(len + 2);
  457. if (skb == NULL) {
  458. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  459. dev->name);
  460. lp->stats.rx_dropped++;
  461. rd->mblength = 0;
  462. rd->rmd1_bits = LE_R1_OWN;
  463. lp->rx_new = RX_NEXT(entry);
  464. return;
  465. }
  466. lp->stats.rx_bytes += len;
  467. skb_reserve(skb, 2); /* 16 byte align */
  468. skb_put(skb, len); /* make room */
  469. skb_copy_to_linear_data(skb,
  470. (unsigned char *)&(ib->rx_buf [entry][0]),
  471. len);
  472. skb->protocol = eth_type_trans(skb, dev);
  473. netif_rx(skb);
  474. dev->last_rx = jiffies;
  475. lp->stats.rx_packets++;
  476. }
  477. /* Return the packet to the pool */
  478. rd->mblength = 0;
  479. rd->rmd1_bits = LE_R1_OWN;
  480. entry = RX_NEXT(entry);
  481. }
  482. lp->rx_new = entry;
  483. }
  484. static void lance_tx_dvma(struct net_device *dev)
  485. {
  486. struct lance_private *lp = netdev_priv(dev);
  487. struct lance_init_block *ib = lp->init_block_mem;
  488. int i, j;
  489. spin_lock(&lp->lock);
  490. j = lp->tx_old;
  491. for (i = j; i != lp->tx_new; i = j) {
  492. struct lance_tx_desc *td = &ib->btx_ring [i];
  493. u8 bits = td->tmd1_bits;
  494. /* If we hit a packet not owned by us, stop */
  495. if (bits & LE_T1_OWN)
  496. break;
  497. if (bits & LE_T1_ERR) {
  498. u16 status = td->misc;
  499. lp->stats.tx_errors++;
  500. if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
  501. if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
  502. if (status & LE_T3_CLOS) {
  503. lp->stats.tx_carrier_errors++;
  504. if (lp->auto_select) {
  505. lp->tpe = 1 - lp->tpe;
  506. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  507. dev->name, lp->tpe?"TPE":"AUI");
  508. STOP_LANCE(lp);
  509. lp->init_ring(dev);
  510. load_csrs(lp);
  511. init_restart_lance(lp);
  512. goto out;
  513. }
  514. }
  515. /* Buffer errors and underflows turn off the
  516. * transmitter, restart the adapter.
  517. */
  518. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  519. lp->stats.tx_fifo_errors++;
  520. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  521. dev->name);
  522. STOP_LANCE(lp);
  523. lp->init_ring(dev);
  524. load_csrs(lp);
  525. init_restart_lance(lp);
  526. goto out;
  527. }
  528. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  529. /*
  530. * So we don't count the packet more than once.
  531. */
  532. td->tmd1_bits = bits & ~(LE_T1_POK);
  533. /* One collision before packet was sent. */
  534. if (bits & LE_T1_EONE)
  535. lp->stats.collisions++;
  536. /* More than one collision, be optimistic. */
  537. if (bits & LE_T1_EMORE)
  538. lp->stats.collisions += 2;
  539. lp->stats.tx_packets++;
  540. }
  541. j = TX_NEXT(j);
  542. }
  543. lp->tx_old = j;
  544. out:
  545. if (netif_queue_stopped(dev) &&
  546. TX_BUFFS_AVAIL > 0)
  547. netif_wake_queue(dev);
  548. spin_unlock(&lp->lock);
  549. }
  550. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  551. {
  552. u16 *p16 = (u16 *) skb->data;
  553. u32 *p32;
  554. u8 *p8;
  555. void __iomem *pbuf = piobuf;
  556. /* We know here that both src and dest are on a 16bit boundary. */
  557. *p16++ = sbus_readw(pbuf);
  558. p32 = (u32 *) p16;
  559. pbuf += 2;
  560. len -= 2;
  561. while (len >= 4) {
  562. *p32++ = sbus_readl(pbuf);
  563. pbuf += 4;
  564. len -= 4;
  565. }
  566. p8 = (u8 *) p32;
  567. if (len >= 2) {
  568. p16 = (u16 *) p32;
  569. *p16++ = sbus_readw(pbuf);
  570. pbuf += 2;
  571. len -= 2;
  572. p8 = (u8 *) p16;
  573. }
  574. if (len >= 1)
  575. *p8 = sbus_readb(pbuf);
  576. }
  577. static void lance_rx_pio(struct net_device *dev)
  578. {
  579. struct lance_private *lp = netdev_priv(dev);
  580. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  581. struct lance_rx_desc __iomem *rd;
  582. unsigned char bits;
  583. int len, entry;
  584. struct sk_buff *skb;
  585. entry = lp->rx_new;
  586. for (rd = &ib->brx_ring [entry];
  587. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  588. rd = &ib->brx_ring [entry]) {
  589. /* We got an incomplete frame? */
  590. if ((bits & LE_R1_POK) != LE_R1_POK) {
  591. lp->stats.rx_over_errors++;
  592. lp->stats.rx_errors++;
  593. } else if (bits & LE_R1_ERR) {
  594. /* Count only the end frame as a rx error,
  595. * not the beginning
  596. */
  597. if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
  598. if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
  599. if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
  600. if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
  601. if (bits & LE_R1_EOP) lp->stats.rx_errors++;
  602. } else {
  603. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  604. skb = dev_alloc_skb(len + 2);
  605. if (skb == NULL) {
  606. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  607. dev->name);
  608. lp->stats.rx_dropped++;
  609. sbus_writew(0, &rd->mblength);
  610. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  611. lp->rx_new = RX_NEXT(entry);
  612. return;
  613. }
  614. lp->stats.rx_bytes += len;
  615. skb_reserve (skb, 2); /* 16 byte align */
  616. skb_put(skb, len); /* make room */
  617. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  618. skb->protocol = eth_type_trans(skb, dev);
  619. netif_rx(skb);
  620. dev->last_rx = jiffies;
  621. lp->stats.rx_packets++;
  622. }
  623. /* Return the packet to the pool */
  624. sbus_writew(0, &rd->mblength);
  625. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  626. entry = RX_NEXT(entry);
  627. }
  628. lp->rx_new = entry;
  629. }
  630. static void lance_tx_pio(struct net_device *dev)
  631. {
  632. struct lance_private *lp = netdev_priv(dev);
  633. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  634. int i, j;
  635. spin_lock(&lp->lock);
  636. j = lp->tx_old;
  637. for (i = j; i != lp->tx_new; i = j) {
  638. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  639. u8 bits = sbus_readb(&td->tmd1_bits);
  640. /* If we hit a packet not owned by us, stop */
  641. if (bits & LE_T1_OWN)
  642. break;
  643. if (bits & LE_T1_ERR) {
  644. u16 status = sbus_readw(&td->misc);
  645. lp->stats.tx_errors++;
  646. if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
  647. if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
  648. if (status & LE_T3_CLOS) {
  649. lp->stats.tx_carrier_errors++;
  650. if (lp->auto_select) {
  651. lp->tpe = 1 - lp->tpe;
  652. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  653. dev->name, lp->tpe?"TPE":"AUI");
  654. STOP_LANCE(lp);
  655. lp->init_ring(dev);
  656. load_csrs(lp);
  657. init_restart_lance(lp);
  658. goto out;
  659. }
  660. }
  661. /* Buffer errors and underflows turn off the
  662. * transmitter, restart the adapter.
  663. */
  664. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  665. lp->stats.tx_fifo_errors++;
  666. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  667. dev->name);
  668. STOP_LANCE(lp);
  669. lp->init_ring(dev);
  670. load_csrs(lp);
  671. init_restart_lance(lp);
  672. goto out;
  673. }
  674. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  675. /*
  676. * So we don't count the packet more than once.
  677. */
  678. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  679. /* One collision before packet was sent. */
  680. if (bits & LE_T1_EONE)
  681. lp->stats.collisions++;
  682. /* More than one collision, be optimistic. */
  683. if (bits & LE_T1_EMORE)
  684. lp->stats.collisions += 2;
  685. lp->stats.tx_packets++;
  686. }
  687. j = TX_NEXT(j);
  688. }
  689. lp->tx_old = j;
  690. if (netif_queue_stopped(dev) &&
  691. TX_BUFFS_AVAIL > 0)
  692. netif_wake_queue(dev);
  693. out:
  694. spin_unlock(&lp->lock);
  695. }
  696. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  697. {
  698. struct net_device *dev = dev_id;
  699. struct lance_private *lp = netdev_priv(dev);
  700. int csr0;
  701. sbus_writew(LE_CSR0, lp->lregs + RAP);
  702. csr0 = sbus_readw(lp->lregs + RDP);
  703. /* Acknowledge all the interrupt sources ASAP */
  704. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  705. lp->lregs + RDP);
  706. if ((csr0 & LE_C0_ERR) != 0) {
  707. /* Clear the error condition */
  708. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  709. LE_C0_CERR | LE_C0_MERR),
  710. lp->lregs + RDP);
  711. }
  712. if (csr0 & LE_C0_RINT)
  713. lp->rx(dev);
  714. if (csr0 & LE_C0_TINT)
  715. lp->tx(dev);
  716. if (csr0 & LE_C0_BABL)
  717. lp->stats.tx_errors++;
  718. if (csr0 & LE_C0_MISS)
  719. lp->stats.rx_errors++;
  720. if (csr0 & LE_C0_MERR) {
  721. if (lp->dregs) {
  722. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  723. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  724. dev->name, csr0, addr & 0xffffff);
  725. } else {
  726. printk(KERN_ERR "%s: Memory error, status %04x\n",
  727. dev->name, csr0);
  728. }
  729. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  730. if (lp->dregs) {
  731. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  732. dma_csr |= DMA_FIFO_INV;
  733. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  734. }
  735. lp->init_ring(dev);
  736. load_csrs(lp);
  737. init_restart_lance(lp);
  738. netif_wake_queue(dev);
  739. }
  740. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  741. return IRQ_HANDLED;
  742. }
  743. /* Build a fake network packet and send it to ourselves. */
  744. static void build_fake_packet(struct lance_private *lp)
  745. {
  746. struct net_device *dev = lp->dev;
  747. int i, entry;
  748. entry = lp->tx_new & TX_RING_MOD_MASK;
  749. if (lp->pio_buffer) {
  750. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  751. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  752. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  753. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  754. sbus_writew(0, &packet[i]);
  755. for (i = 0; i < 6; i++) {
  756. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  757. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  758. }
  759. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  760. sbus_writew(0, &ib->btx_ring[entry].misc);
  761. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  762. } else {
  763. struct lance_init_block *ib = lp->init_block_mem;
  764. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  765. struct ethhdr *eth = (struct ethhdr *) packet;
  766. memset(packet, 0, ETH_ZLEN);
  767. for (i = 0; i < 6; i++) {
  768. eth->h_dest[i] = dev->dev_addr[i];
  769. eth->h_source[i] = dev->dev_addr[i];
  770. }
  771. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  772. ib->btx_ring[entry].misc = 0;
  773. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  774. }
  775. lp->tx_new = TX_NEXT(entry);
  776. }
  777. struct net_device *last_dev;
  778. static int lance_open(struct net_device *dev)
  779. {
  780. struct lance_private *lp = netdev_priv(dev);
  781. int status = 0;
  782. last_dev = dev;
  783. STOP_LANCE(lp);
  784. if (request_irq(dev->irq, &lance_interrupt, IRQF_SHARED,
  785. lancestr, (void *) dev)) {
  786. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  787. return -EAGAIN;
  788. }
  789. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  790. if (lp->dregs) {
  791. u32 regval = lp->init_block_dvma & 0xff000000;
  792. sbus_writel(regval, lp->dregs + DMA_TEST);
  793. }
  794. /* Set mode and clear multicast filter only at device open,
  795. * so that lance_init_ring() called at any error will not
  796. * forget multicast filters.
  797. *
  798. * BTW it is common bug in all lance drivers! --ANK
  799. */
  800. if (lp->pio_buffer) {
  801. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  802. sbus_writew(0, &ib->mode);
  803. sbus_writel(0, &ib->filter[0]);
  804. sbus_writel(0, &ib->filter[1]);
  805. } else {
  806. struct lance_init_block *ib = lp->init_block_mem;
  807. ib->mode = 0;
  808. ib->filter [0] = 0;
  809. ib->filter [1] = 0;
  810. }
  811. lp->init_ring(dev);
  812. load_csrs(lp);
  813. netif_start_queue(dev);
  814. status = init_restart_lance(lp);
  815. if (!status && lp->auto_select) {
  816. build_fake_packet(lp);
  817. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  818. }
  819. return status;
  820. }
  821. static int lance_close(struct net_device *dev)
  822. {
  823. struct lance_private *lp = netdev_priv(dev);
  824. netif_stop_queue(dev);
  825. del_timer_sync(&lp->multicast_timer);
  826. STOP_LANCE(lp);
  827. free_irq(dev->irq, (void *) dev);
  828. return 0;
  829. }
  830. static int lance_reset(struct net_device *dev)
  831. {
  832. struct lance_private *lp = netdev_priv(dev);
  833. int status;
  834. STOP_LANCE(lp);
  835. /* On the 4m, reset the dma too */
  836. if (lp->dregs) {
  837. u32 csr, addr;
  838. printk(KERN_ERR "resetting ledma\n");
  839. csr = sbus_readl(lp->dregs + DMA_CSR);
  840. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  841. udelay(200);
  842. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  843. addr = lp->init_block_dvma & 0xff000000;
  844. sbus_writel(addr, lp->dregs + DMA_TEST);
  845. }
  846. lp->init_ring(dev);
  847. load_csrs(lp);
  848. dev->trans_start = jiffies;
  849. status = init_restart_lance(lp);
  850. return status;
  851. }
  852. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  853. {
  854. void __iomem *piobuf = dest;
  855. u32 *p32;
  856. u16 *p16;
  857. u8 *p8;
  858. switch ((unsigned long)src & 0x3) {
  859. case 0:
  860. p32 = (u32 *) src;
  861. while (len >= 4) {
  862. sbus_writel(*p32, piobuf);
  863. p32++;
  864. piobuf += 4;
  865. len -= 4;
  866. }
  867. src = (char *) p32;
  868. break;
  869. case 1:
  870. case 3:
  871. p8 = (u8 *) src;
  872. while (len >= 4) {
  873. u32 val;
  874. val = p8[0] << 24;
  875. val |= p8[1] << 16;
  876. val |= p8[2] << 8;
  877. val |= p8[3];
  878. sbus_writel(val, piobuf);
  879. p8 += 4;
  880. piobuf += 4;
  881. len -= 4;
  882. }
  883. src = (char *) p8;
  884. break;
  885. case 2:
  886. p16 = (u16 *) src;
  887. while (len >= 4) {
  888. u32 val = p16[0]<<16 | p16[1];
  889. sbus_writel(val, piobuf);
  890. p16 += 2;
  891. piobuf += 4;
  892. len -= 4;
  893. }
  894. src = (char *) p16;
  895. break;
  896. };
  897. if (len >= 2) {
  898. u16 val = src[0] << 8 | src[1];
  899. sbus_writew(val, piobuf);
  900. src += 2;
  901. piobuf += 2;
  902. len -= 2;
  903. }
  904. if (len >= 1)
  905. sbus_writeb(src[0], piobuf);
  906. }
  907. static void lance_piozero(void __iomem *dest, int len)
  908. {
  909. void __iomem *piobuf = dest;
  910. if ((unsigned long)piobuf & 1) {
  911. sbus_writeb(0, piobuf);
  912. piobuf += 1;
  913. len -= 1;
  914. if (len == 0)
  915. return;
  916. }
  917. if (len == 1) {
  918. sbus_writeb(0, piobuf);
  919. return;
  920. }
  921. if ((unsigned long)piobuf & 2) {
  922. sbus_writew(0, piobuf);
  923. piobuf += 2;
  924. len -= 2;
  925. if (len == 0)
  926. return;
  927. }
  928. while (len >= 4) {
  929. sbus_writel(0, piobuf);
  930. piobuf += 4;
  931. len -= 4;
  932. }
  933. if (len >= 2) {
  934. sbus_writew(0, piobuf);
  935. piobuf += 2;
  936. len -= 2;
  937. }
  938. if (len >= 1)
  939. sbus_writeb(0, piobuf);
  940. }
  941. static void lance_tx_timeout(struct net_device *dev)
  942. {
  943. struct lance_private *lp = netdev_priv(dev);
  944. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  945. dev->name, sbus_readw(lp->lregs + RDP));
  946. lance_reset(dev);
  947. netif_wake_queue(dev);
  948. }
  949. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  950. {
  951. struct lance_private *lp = netdev_priv(dev);
  952. int entry, skblen, len;
  953. skblen = skb->len;
  954. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  955. spin_lock_irq(&lp->lock);
  956. lp->stats.tx_bytes += len;
  957. entry = lp->tx_new & TX_RING_MOD_MASK;
  958. if (lp->pio_buffer) {
  959. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  960. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  961. sbus_writew(0, &ib->btx_ring[entry].misc);
  962. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  963. if (len != skblen)
  964. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  965. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  966. } else {
  967. struct lance_init_block *ib = lp->init_block_mem;
  968. ib->btx_ring [entry].length = (-len) | 0xf000;
  969. ib->btx_ring [entry].misc = 0;
  970. skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
  971. if (len != skblen)
  972. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  973. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  974. }
  975. lp->tx_new = TX_NEXT(entry);
  976. if (TX_BUFFS_AVAIL <= 0)
  977. netif_stop_queue(dev);
  978. /* Kick the lance: transmit now */
  979. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  980. /* Read back CSR to invalidate the E-Cache.
  981. * This is needed, because DMA_DSBL_WR_INV is set.
  982. */
  983. if (lp->dregs)
  984. sbus_readw(lp->lregs + RDP);
  985. spin_unlock_irq(&lp->lock);
  986. dev->trans_start = jiffies;
  987. dev_kfree_skb(skb);
  988. return 0;
  989. }
  990. static struct net_device_stats *lance_get_stats(struct net_device *dev)
  991. {
  992. struct lance_private *lp = netdev_priv(dev);
  993. return &lp->stats;
  994. }
  995. /* taken from the depca driver */
  996. static void lance_load_multicast(struct net_device *dev)
  997. {
  998. struct lance_private *lp = netdev_priv(dev);
  999. struct dev_mc_list *dmi = dev->mc_list;
  1000. char *addrs;
  1001. int i;
  1002. u32 crc;
  1003. u32 val;
  1004. /* set all multicast bits */
  1005. if (dev->flags & IFF_ALLMULTI)
  1006. val = ~0;
  1007. else
  1008. val = 0;
  1009. if (lp->pio_buffer) {
  1010. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1011. sbus_writel(val, &ib->filter[0]);
  1012. sbus_writel(val, &ib->filter[1]);
  1013. } else {
  1014. struct lance_init_block *ib = lp->init_block_mem;
  1015. ib->filter [0] = val;
  1016. ib->filter [1] = val;
  1017. }
  1018. if (dev->flags & IFF_ALLMULTI)
  1019. return;
  1020. /* Add addresses */
  1021. for (i = 0; i < dev->mc_count; i++) {
  1022. addrs = dmi->dmi_addr;
  1023. dmi = dmi->next;
  1024. /* multicast address? */
  1025. if (!(*addrs & 1))
  1026. continue;
  1027. crc = ether_crc_le(6, addrs);
  1028. crc = crc >> 26;
  1029. if (lp->pio_buffer) {
  1030. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1031. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1032. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1033. tmp |= 1 << (crc & 0xf);
  1034. sbus_writew(tmp, &mcast_table[crc>>4]);
  1035. } else {
  1036. struct lance_init_block *ib = lp->init_block_mem;
  1037. u16 *mcast_table = (u16 *) &ib->filter;
  1038. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1039. }
  1040. }
  1041. }
  1042. static void lance_set_multicast(struct net_device *dev)
  1043. {
  1044. struct lance_private *lp = netdev_priv(dev);
  1045. struct lance_init_block *ib_mem = lp->init_block_mem;
  1046. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1047. u16 mode;
  1048. if (!netif_running(dev))
  1049. return;
  1050. if (lp->tx_old != lp->tx_new) {
  1051. mod_timer(&lp->multicast_timer, jiffies + 4);
  1052. netif_wake_queue(dev);
  1053. return;
  1054. }
  1055. netif_stop_queue(dev);
  1056. STOP_LANCE(lp);
  1057. lp->init_ring(dev);
  1058. if (lp->pio_buffer)
  1059. mode = sbus_readw(&ib_iomem->mode);
  1060. else
  1061. mode = ib_mem->mode;
  1062. if (dev->flags & IFF_PROMISC) {
  1063. mode |= LE_MO_PROM;
  1064. if (lp->pio_buffer)
  1065. sbus_writew(mode, &ib_iomem->mode);
  1066. else
  1067. ib_mem->mode = mode;
  1068. } else {
  1069. mode &= ~LE_MO_PROM;
  1070. if (lp->pio_buffer)
  1071. sbus_writew(mode, &ib_iomem->mode);
  1072. else
  1073. ib_mem->mode = mode;
  1074. lance_load_multicast(dev);
  1075. }
  1076. load_csrs(lp);
  1077. init_restart_lance(lp);
  1078. netif_wake_queue(dev);
  1079. }
  1080. static void lance_set_multicast_retry(unsigned long _opaque)
  1081. {
  1082. struct net_device *dev = (struct net_device *) _opaque;
  1083. lance_set_multicast(dev);
  1084. }
  1085. static void lance_free_hwresources(struct lance_private *lp)
  1086. {
  1087. if (lp->lregs)
  1088. sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
  1089. if (lp->init_block_iomem) {
  1090. sbus_iounmap(lp->init_block_iomem,
  1091. sizeof(struct lance_init_block));
  1092. } else if (lp->init_block_mem) {
  1093. sbus_free_consistent(lp->sdev,
  1094. sizeof(struct lance_init_block),
  1095. lp->init_block_mem,
  1096. lp->init_block_dvma);
  1097. }
  1098. }
  1099. /* Ethtool support... */
  1100. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1101. {
  1102. struct lance_private *lp = netdev_priv(dev);
  1103. strcpy(info->driver, "sunlance");
  1104. strcpy(info->version, "2.02");
  1105. sprintf(info->bus_info, "SBUS:%d",
  1106. lp->sdev->slot);
  1107. }
  1108. static u32 sparc_lance_get_link(struct net_device *dev)
  1109. {
  1110. /* We really do not keep track of this, but this
  1111. * is better than not reporting anything at all.
  1112. */
  1113. return 1;
  1114. }
  1115. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1116. .get_drvinfo = sparc_lance_get_drvinfo,
  1117. .get_link = sparc_lance_get_link,
  1118. };
  1119. static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev,
  1120. struct sbus_dma *ledma,
  1121. struct sbus_dev *lebuffer)
  1122. {
  1123. static unsigned version_printed;
  1124. struct device_node *dp = sdev->ofdev.node;
  1125. struct net_device *dev;
  1126. struct lance_private *lp;
  1127. int i;
  1128. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1129. if (!dev)
  1130. return -ENOMEM;
  1131. lp = netdev_priv(dev);
  1132. memset(lp, 0, sizeof(*lp));
  1133. if (sparc_lance_debug && version_printed++ == 0)
  1134. printk (KERN_INFO "%s", version);
  1135. spin_lock_init(&lp->lock);
  1136. /* Copy the IDPROM ethernet address to the device structure, later we
  1137. * will copy the address in the device structure to the lance
  1138. * initialization block.
  1139. */
  1140. for (i = 0; i < 6; i++)
  1141. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1142. /* Get the IO region */
  1143. lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
  1144. LANCE_REG_SIZE, lancestr);
  1145. if (!lp->lregs) {
  1146. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1147. goto fail;
  1148. }
  1149. lp->sdev = sdev;
  1150. if (lebuffer) {
  1151. /* sanity check */
  1152. if (lebuffer->resource[0].start & 7) {
  1153. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1154. goto fail;
  1155. }
  1156. lp->init_block_iomem =
  1157. sbus_ioremap(&lebuffer->resource[0], 0,
  1158. sizeof(struct lance_init_block), "lebuffer");
  1159. if (!lp->init_block_iomem) {
  1160. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1161. goto fail;
  1162. }
  1163. lp->init_block_dvma = 0;
  1164. lp->pio_buffer = 1;
  1165. lp->init_ring = lance_init_ring_pio;
  1166. lp->rx = lance_rx_pio;
  1167. lp->tx = lance_tx_pio;
  1168. } else {
  1169. lp->init_block_mem =
  1170. sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
  1171. &lp->init_block_dvma);
  1172. if (!lp->init_block_mem || lp->init_block_dvma == 0) {
  1173. printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
  1174. goto fail;
  1175. }
  1176. lp->pio_buffer = 0;
  1177. lp->init_ring = lance_init_ring_dvma;
  1178. lp->rx = lance_rx_dvma;
  1179. lp->tx = lance_tx_dvma;
  1180. }
  1181. lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
  1182. (LE_C3_BSWP |
  1183. LE_C3_ACON |
  1184. LE_C3_BCON));
  1185. lp->name = lancestr;
  1186. lp->ledma = ledma;
  1187. lp->burst_sizes = 0;
  1188. if (lp->ledma) {
  1189. struct device_node *ledma_dp = ledma->sdev->ofdev.node;
  1190. const char *prop;
  1191. unsigned int sbmask;
  1192. u32 csr;
  1193. /* Find burst-size property for ledma */
  1194. lp->burst_sizes = of_getintprop_default(ledma_dp,
  1195. "burst-sizes", 0);
  1196. /* ledma may be capable of fast bursts, but sbus may not. */
  1197. sbmask = of_getintprop_default(ledma_dp, "burst-sizes",
  1198. DMA_BURSTBITS);
  1199. lp->burst_sizes &= sbmask;
  1200. /* Get the cable-selection property */
  1201. prop = of_get_property(ledma_dp, "cable-selection", NULL);
  1202. if (!prop || prop[0] == '\0') {
  1203. struct device_node *nd;
  1204. printk(KERN_INFO "SunLance: using "
  1205. "auto-carrier-detection.\n");
  1206. nd = of_find_node_by_path("/options");
  1207. if (!nd)
  1208. goto no_link_test;
  1209. prop = of_get_property(nd, "tpe-link-test?", NULL);
  1210. if (!prop)
  1211. goto no_link_test;
  1212. if (strcmp(prop, "true")) {
  1213. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1214. "'tpe-link-test?'\n");
  1215. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1216. "to ecd@skynet.be\n");
  1217. auxio_set_lte(AUXIO_LTE_ON);
  1218. }
  1219. no_link_test:
  1220. lp->auto_select = 1;
  1221. lp->tpe = 0;
  1222. } else if (!strcmp(prop, "aui")) {
  1223. lp->auto_select = 0;
  1224. lp->tpe = 0;
  1225. } else {
  1226. lp->auto_select = 0;
  1227. lp->tpe = 1;
  1228. }
  1229. lp->dregs = ledma->regs;
  1230. /* Reset ledma */
  1231. csr = sbus_readl(lp->dregs + DMA_CSR);
  1232. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1233. udelay(200);
  1234. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1235. } else
  1236. lp->dregs = NULL;
  1237. lp->dev = dev;
  1238. SET_MODULE_OWNER(dev);
  1239. SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
  1240. dev->open = &lance_open;
  1241. dev->stop = &lance_close;
  1242. dev->hard_start_xmit = &lance_start_xmit;
  1243. dev->tx_timeout = &lance_tx_timeout;
  1244. dev->watchdog_timeo = 5*HZ;
  1245. dev->get_stats = &lance_get_stats;
  1246. dev->set_multicast_list = &lance_set_multicast;
  1247. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1248. dev->irq = sdev->irqs[0];
  1249. dev->dma = 0;
  1250. /* We cannot sleep if the chip is busy during a
  1251. * multicast list update event, because such events
  1252. * can occur from interrupts (ex. IPv6). So we
  1253. * use a timer to try again later when necessary. -DaveM
  1254. */
  1255. init_timer(&lp->multicast_timer);
  1256. lp->multicast_timer.data = (unsigned long) dev;
  1257. lp->multicast_timer.function = &lance_set_multicast_retry;
  1258. if (register_netdev(dev)) {
  1259. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1260. goto fail;
  1261. }
  1262. dev_set_drvdata(&sdev->ofdev.dev, lp);
  1263. printk(KERN_INFO "%s: LANCE ", dev->name);
  1264. for (i = 0; i < 6; i++)
  1265. printk("%2.2x%c", dev->dev_addr[i],
  1266. i == 5 ? ' ': ':');
  1267. printk("\n");
  1268. return 0;
  1269. fail:
  1270. lance_free_hwresources(lp);
  1271. free_netdev(dev);
  1272. return -ENODEV;
  1273. }
  1274. /* On 4m, find the associated dma for the lance chip */
  1275. static struct sbus_dma * __devinit find_ledma(struct sbus_dev *sdev)
  1276. {
  1277. struct sbus_dma *p;
  1278. for_each_dvma(p) {
  1279. if (p->sdev == sdev)
  1280. return p;
  1281. }
  1282. return NULL;
  1283. }
  1284. #ifdef CONFIG_SUN4
  1285. #include <asm/sun4paddr.h>
  1286. #include <asm/machines.h>
  1287. /* Find all the lance cards on the system and initialize them */
  1288. static struct sbus_dev sun4_sdev;
  1289. static int __devinit sparc_lance_init(void)
  1290. {
  1291. if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
  1292. (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
  1293. memset(&sun4_sdev, 0, sizeof(struct sbus_dev));
  1294. sun4_sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
  1295. sun4_sdev.irqs[0] = 6;
  1296. return sparc_lance_probe_one(&sun4_sdev, NULL, NULL);
  1297. }
  1298. return -ENODEV;
  1299. }
  1300. static int __exit sunlance_sun4_remove(void)
  1301. {
  1302. struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev);
  1303. struct net_device *net_dev = lp->dev;
  1304. unregister_netdev(net_dev);
  1305. lance_free_hwresources(lp);
  1306. free_netdev(net_dev);
  1307. dev_set_drvdata(&sun4_sdev.ofdev.dev, NULL);
  1308. return 0;
  1309. }
  1310. #else /* !CONFIG_SUN4 */
  1311. static int __devinit sunlance_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1312. {
  1313. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1314. int err;
  1315. if (sdev->parent) {
  1316. struct of_device *parent = &sdev->parent->ofdev;
  1317. if (!strcmp(parent->node->name, "ledma")) {
  1318. struct sbus_dma *ledma = find_ledma(to_sbus_device(&parent->dev));
  1319. err = sparc_lance_probe_one(sdev, ledma, NULL);
  1320. } else if (!strcmp(parent->node->name, "lebuffer")) {
  1321. err = sparc_lance_probe_one(sdev, NULL, to_sbus_device(&parent->dev));
  1322. } else
  1323. err = sparc_lance_probe_one(sdev, NULL, NULL);
  1324. } else
  1325. err = sparc_lance_probe_one(sdev, NULL, NULL);
  1326. return err;
  1327. }
  1328. static int __devexit sunlance_sbus_remove(struct of_device *dev)
  1329. {
  1330. struct lance_private *lp = dev_get_drvdata(&dev->dev);
  1331. struct net_device *net_dev = lp->dev;
  1332. unregister_netdev(net_dev);
  1333. lance_free_hwresources(lp);
  1334. free_netdev(net_dev);
  1335. dev_set_drvdata(&dev->dev, NULL);
  1336. return 0;
  1337. }
  1338. static struct of_device_id sunlance_sbus_match[] = {
  1339. {
  1340. .name = "le",
  1341. },
  1342. {},
  1343. };
  1344. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1345. static struct of_platform_driver sunlance_sbus_driver = {
  1346. .name = "sunlance",
  1347. .match_table = sunlance_sbus_match,
  1348. .probe = sunlance_sbus_probe,
  1349. .remove = __devexit_p(sunlance_sbus_remove),
  1350. };
  1351. /* Find all the lance cards on the system and initialize them */
  1352. static int __init sparc_lance_init(void)
  1353. {
  1354. return of_register_driver(&sunlance_sbus_driver, &sbus_bus_type);
  1355. }
  1356. #endif /* !CONFIG_SUN4 */
  1357. static void __exit sparc_lance_exit(void)
  1358. {
  1359. #ifdef CONFIG_SUN4
  1360. sunlance_sun4_remove();
  1361. #else
  1362. of_unregister_driver(&sunlance_sbus_driver);
  1363. #endif
  1364. }
  1365. module_init(sparc_lance_init);
  1366. module_exit(sparc_lance_exit);