cx88-dvb.c 26 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #ifdef HAVE_VP3054_I2C
  36. # include "cx88-vp3054-i2c.h"
  37. #endif
  38. #include "zl10353.h"
  39. #include "cx22702.h"
  40. #include "or51132.h"
  41. #include "lgdt330x.h"
  42. #include "lgh06xf.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  47. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  48. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  49. MODULE_LICENSE("GPL");
  50. static unsigned int debug = 0;
  51. module_param(debug, int, 0644);
  52. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  53. #define dprintk(level,fmt, arg...) if (debug >= level) \
  54. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  55. /* ------------------------------------------------------------------ */
  56. static int dvb_buf_setup(struct videobuf_queue *q,
  57. unsigned int *count, unsigned int *size)
  58. {
  59. struct cx8802_dev *dev = q->priv_data;
  60. dev->ts_packet_size = 188 * 4;
  61. dev->ts_packet_count = 32;
  62. *size = dev->ts_packet_size * dev->ts_packet_count;
  63. *count = 32;
  64. return 0;
  65. }
  66. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  67. enum v4l2_field field)
  68. {
  69. struct cx8802_dev *dev = q->priv_data;
  70. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  71. }
  72. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  73. {
  74. struct cx8802_dev *dev = q->priv_data;
  75. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  76. }
  77. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  78. {
  79. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  80. }
  81. static struct videobuf_queue_ops dvb_qops = {
  82. .buf_setup = dvb_buf_setup,
  83. .buf_prepare = dvb_buf_prepare,
  84. .buf_queue = dvb_buf_queue,
  85. .buf_release = dvb_buf_release,
  86. };
  87. /* ------------------------------------------------------------------ */
  88. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  89. {
  90. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  91. static u8 reset [] = { RESET, 0x80 };
  92. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  93. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  94. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  95. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  96. mt352_write(fe, clock_config, sizeof(clock_config));
  97. udelay(200);
  98. mt352_write(fe, reset, sizeof(reset));
  99. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  100. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  101. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  102. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  103. return 0;
  104. }
  105. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  106. {
  107. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  108. static u8 reset [] = { RESET, 0x80 };
  109. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  110. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  111. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  112. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  113. mt352_write(fe, clock_config, sizeof(clock_config));
  114. udelay(200);
  115. mt352_write(fe, reset, sizeof(reset));
  116. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  117. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  118. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  119. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  120. return 0;
  121. }
  122. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  123. {
  124. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  125. static u8 reset [] = { 0x50, 0x80 };
  126. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  127. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  128. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  129. static u8 dntv_extra[] = { 0xB5, 0x7A };
  130. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  131. mt352_write(fe, clock_config, sizeof(clock_config));
  132. udelay(2000);
  133. mt352_write(fe, reset, sizeof(reset));
  134. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  135. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  136. udelay(2000);
  137. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static struct mt352_config dvico_fusionhdtv = {
  142. .demod_address = 0x0f,
  143. .demod_init = dvico_fusionhdtv_demod_init,
  144. };
  145. static struct mt352_config dntv_live_dvbt_config = {
  146. .demod_address = 0x0f,
  147. .demod_init = dntv_live_dvbt_demod_init,
  148. };
  149. static struct mt352_config dvico_fusionhdtv_dual = {
  150. .demod_address = 0x0f,
  151. .demod_init = dvico_dual_demod_init,
  152. };
  153. #ifdef HAVE_VP3054_I2C
  154. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  155. {
  156. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  157. static u8 reset [] = { 0x50, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  159. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  160. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  161. static u8 dntv_extra[] = { 0xB5, 0x7A };
  162. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  163. mt352_write(fe, clock_config, sizeof(clock_config));
  164. udelay(2000);
  165. mt352_write(fe, reset, sizeof(reset));
  166. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  167. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  168. udelay(2000);
  169. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  170. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  171. return 0;
  172. }
  173. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  174. {
  175. struct cx8802_dev *dev= fe->dvb->priv;
  176. /* this message is to set up ATC and ALC */
  177. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  178. struct i2c_msg msg =
  179. { .addr = dev->core->pll_addr, .flags = 0,
  180. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  181. int err;
  182. if (fe->ops.i2c_gate_ctrl)
  183. fe->ops.i2c_gate_ctrl(fe, 1);
  184. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  185. if (err < 0)
  186. return err;
  187. else
  188. return -EREMOTEIO;
  189. }
  190. return 0;
  191. }
  192. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  193. struct dvb_frontend_parameters* params)
  194. {
  195. struct cx8802_dev *dev= fe->dvb->priv;
  196. u8 buf[4];
  197. struct i2c_msg msg =
  198. { .addr = dev->core->pll_addr, .flags = 0,
  199. .buf = buf, .len = 4 };
  200. int err;
  201. /* Switch PLL to DVB mode */
  202. err = philips_fmd1216_pll_init(fe);
  203. if (err)
  204. return err;
  205. /* Tune PLL */
  206. dvb_pll_configure(dev->core->pll_desc, buf,
  207. params->frequency,
  208. params->u.ofdm.bandwidth);
  209. if (fe->ops.i2c_gate_ctrl)
  210. fe->ops.i2c_gate_ctrl(fe, 1);
  211. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  212. printk(KERN_WARNING "cx88-dvb: %s error "
  213. "(addr %02x <- %02x, err = %i)\n",
  214. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  215. if (err < 0)
  216. return err;
  217. else
  218. return -EREMOTEIO;
  219. }
  220. return 0;
  221. }
  222. static struct mt352_config dntv_live_dvbt_pro_config = {
  223. .demod_address = 0x0f,
  224. .no_tuner = 1,
  225. .demod_init = dntv_live_dvbt_pro_demod_init,
  226. };
  227. #endif
  228. static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
  229. struct dvb_frontend_parameters *params)
  230. {
  231. u8 pllbuf[4];
  232. struct cx8802_dev *dev= fe->dvb->priv;
  233. struct i2c_msg msg =
  234. { .addr = dev->core->pll_addr, .flags = 0,
  235. .buf = pllbuf, .len = 4 };
  236. int err;
  237. dvb_pll_configure(dev->core->pll_desc, pllbuf,
  238. params->frequency,
  239. params->u.ofdm.bandwidth);
  240. if (fe->ops.i2c_gate_ctrl)
  241. fe->ops.i2c_gate_ctrl(fe, 1);
  242. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  243. printk(KERN_WARNING "cx88-dvb: %s error "
  244. "(addr %02x <- %02x, err = %i)\n",
  245. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  246. if (err < 0)
  247. return err;
  248. else
  249. return -EREMOTEIO;
  250. }
  251. return 0;
  252. }
  253. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  254. .demod_address = 0x0f,
  255. .no_tuner = 1,
  256. };
  257. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  258. .demod_address = 0x0f,
  259. };
  260. static struct cx22702_config connexant_refboard_config = {
  261. .demod_address = 0x43,
  262. .output_mode = CX22702_SERIAL_OUTPUT,
  263. };
  264. static struct cx22702_config hauppauge_novat_config = {
  265. .demod_address = 0x43,
  266. .output_mode = CX22702_SERIAL_OUTPUT,
  267. };
  268. static struct cx22702_config hauppauge_hvr1100_config = {
  269. .demod_address = 0x63,
  270. .output_mode = CX22702_SERIAL_OUTPUT,
  271. };
  272. static struct cx22702_config hauppauge_hvr3000_config = {
  273. .demod_address = 0x63,
  274. .output_mode = CX22702_SERIAL_OUTPUT,
  275. };
  276. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe,
  277. int acquire)
  278. {
  279. struct cx8802_dev *dev= fe->dvb->priv;
  280. struct cx8802_driver *drv = NULL;
  281. int ret = 0;
  282. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  283. if (drv) {
  284. if(acquire)
  285. ret = drv->request_acquire(drv);
  286. else
  287. ret = drv->request_release(drv);
  288. }
  289. return ret;
  290. }
  291. static struct cx22702_config hauppauge_hvr1300_config = {
  292. .demod_address = 0x63,
  293. .output_mode = CX22702_SERIAL_OUTPUT,
  294. };
  295. static int or51132_set_ts_param(struct dvb_frontend* fe,
  296. int is_punctured)
  297. {
  298. struct cx8802_dev *dev= fe->dvb->priv;
  299. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  300. return 0;
  301. }
  302. static struct or51132_config pchdtv_hd3000 = {
  303. .demod_address = 0x15,
  304. .set_ts_params = or51132_set_ts_param,
  305. };
  306. static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
  307. struct dvb_frontend_parameters* params)
  308. {
  309. /* FIXME make this routine use the tuner-simple code.
  310. * It could probably be shared with a number of ATSC
  311. * frontends. Many share the same tuner with analog TV. */
  312. struct cx8802_dev *dev= fe->dvb->priv;
  313. struct cx88_core *core = dev->core;
  314. u8 buf[4];
  315. struct i2c_msg msg =
  316. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  317. int err;
  318. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  319. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  320. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  321. if (fe->ops.i2c_gate_ctrl)
  322. fe->ops.i2c_gate_ctrl(fe, 1);
  323. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  324. printk(KERN_WARNING "cx88-dvb: %s error "
  325. "(addr %02x <- %02x, err = %i)\n",
  326. __FUNCTION__, buf[0], buf[1], err);
  327. if (err < 0)
  328. return err;
  329. else
  330. return -EREMOTEIO;
  331. }
  332. return 0;
  333. }
  334. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  335. {
  336. struct cx8802_dev *dev= fe->dvb->priv;
  337. struct cx88_core *core = dev->core;
  338. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  339. if (index == 0)
  340. cx_clear(MO_GP0_IO, 8);
  341. else
  342. cx_set(MO_GP0_IO, 8);
  343. return 0;
  344. }
  345. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  346. {
  347. struct cx8802_dev *dev= fe->dvb->priv;
  348. if (is_punctured)
  349. dev->ts_gen_cntrl |= 0x04;
  350. else
  351. dev->ts_gen_cntrl &= ~0x04;
  352. return 0;
  353. }
  354. static struct lgdt330x_config fusionhdtv_3_gold = {
  355. .demod_address = 0x0e,
  356. .demod_chip = LGDT3302,
  357. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  358. .set_ts_params = lgdt330x_set_ts_param,
  359. };
  360. static struct lgdt330x_config fusionhdtv_5_gold = {
  361. .demod_address = 0x0e,
  362. .demod_chip = LGDT3303,
  363. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  364. .set_ts_params = lgdt330x_set_ts_param,
  365. };
  366. static struct lgdt330x_config pchdtv_hd5500 = {
  367. .demod_address = 0x59,
  368. .demod_chip = LGDT3303,
  369. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  370. .set_ts_params = lgdt330x_set_ts_param,
  371. };
  372. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  373. int is_punctured)
  374. {
  375. struct cx8802_dev *dev= fe->dvb->priv;
  376. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  377. return 0;
  378. }
  379. static int nxt200x_set_pll_input(u8* buf, int input)
  380. {
  381. if (input)
  382. buf[3] |= 0x08;
  383. else
  384. buf[3] &= ~0x08;
  385. return 0;
  386. }
  387. static struct nxt200x_config ati_hdtvwonder = {
  388. .demod_address = 0x0a,
  389. .set_pll_input = nxt200x_set_pll_input,
  390. .set_ts_params = nxt200x_set_ts_param,
  391. };
  392. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  393. int is_punctured)
  394. {
  395. struct cx8802_dev *dev= fe->dvb->priv;
  396. dev->ts_gen_cntrl = 0x02;
  397. return 0;
  398. }
  399. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  400. fe_sec_voltage_t voltage)
  401. {
  402. struct cx8802_dev *dev= fe->dvb->priv;
  403. struct cx88_core *core = dev->core;
  404. if (voltage == SEC_VOLTAGE_OFF) {
  405. cx_write(MO_GP0_IO, 0x000006fb);
  406. } else {
  407. cx_write(MO_GP0_IO, 0x000006f9);
  408. }
  409. if (core->prev_set_voltage)
  410. return core->prev_set_voltage(fe, voltage);
  411. return 0;
  412. }
  413. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  414. fe_sec_voltage_t voltage)
  415. {
  416. struct cx8802_dev *dev= fe->dvb->priv;
  417. struct cx88_core *core = dev->core;
  418. if (voltage == SEC_VOLTAGE_OFF) {
  419. dprintk(1,"LNB Voltage OFF\n");
  420. cx_write(MO_GP0_IO, 0x0000efff);
  421. }
  422. if (core->prev_set_voltage)
  423. return core->prev_set_voltage(fe, voltage);
  424. return 0;
  425. }
  426. static struct cx24123_config geniatech_dvbs_config = {
  427. .demod_address = 0x55,
  428. .set_ts_params = cx24123_set_ts_param,
  429. };
  430. static struct cx24123_config hauppauge_novas_config = {
  431. .demod_address = 0x55,
  432. .set_ts_params = cx24123_set_ts_param,
  433. };
  434. static struct cx24123_config kworld_dvbs_100_config = {
  435. .demod_address = 0x15,
  436. .set_ts_params = cx24123_set_ts_param,
  437. .lnb_polarity = 1,
  438. };
  439. static int dvb_register(struct cx8802_dev *dev)
  440. {
  441. /* init struct videobuf_dvb */
  442. dev->dvb.name = dev->core->name;
  443. dev->ts_gen_cntrl = 0x0c;
  444. /* init frontend */
  445. switch (dev->core->board) {
  446. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  447. dev->dvb.frontend = dvb_attach(cx22702_attach,
  448. &hauppauge_novat_config,
  449. &dev->core->i2c_adap);
  450. if (dev->dvb.frontend != NULL) {
  451. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  452. &dev->core->i2c_adap,
  453. &dvb_pll_thomson_dtt759x);
  454. }
  455. break;
  456. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  457. case CX88_BOARD_CONEXANT_DVB_T1:
  458. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  459. case CX88_BOARD_WINFAST_DTV1000:
  460. dev->dvb.frontend = dvb_attach(cx22702_attach,
  461. &connexant_refboard_config,
  462. &dev->core->i2c_adap);
  463. if (dev->dvb.frontend != NULL) {
  464. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  465. &dev->core->i2c_adap,
  466. &dvb_pll_thomson_dtt7579);
  467. }
  468. break;
  469. case CX88_BOARD_WINFAST_DTV2000H:
  470. case CX88_BOARD_HAUPPAUGE_HVR1100:
  471. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  472. dev->dvb.frontend = dvb_attach(cx22702_attach,
  473. &hauppauge_hvr1100_config,
  474. &dev->core->i2c_adap);
  475. if (dev->dvb.frontend != NULL) {
  476. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  477. &dev->core->i2c_adap,
  478. &dvb_pll_fmd1216me);
  479. }
  480. break;
  481. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  482. dev->dvb.frontend = dvb_attach(mt352_attach,
  483. &dvico_fusionhdtv,
  484. &dev->core->i2c_adap);
  485. if (dev->dvb.frontend != NULL) {
  486. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  487. NULL, &dvb_pll_thomson_dtt7579);
  488. break;
  489. }
  490. /* ZL10353 replaces MT352 on later cards */
  491. dev->dvb.frontend = dvb_attach(zl10353_attach,
  492. &dvico_fusionhdtv_plus_v1_1,
  493. &dev->core->i2c_adap);
  494. if (dev->dvb.frontend != NULL) {
  495. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  496. NULL, &dvb_pll_thomson_dtt7579);
  497. }
  498. break;
  499. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  500. /* The tin box says DEE1601, but it seems to be DTT7579
  501. * compatible, with a slightly different MT352 AGC gain. */
  502. dev->dvb.frontend = dvb_attach(mt352_attach,
  503. &dvico_fusionhdtv_dual,
  504. &dev->core->i2c_adap);
  505. if (dev->dvb.frontend != NULL) {
  506. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  507. NULL, &dvb_pll_thomson_dtt7579);
  508. break;
  509. }
  510. /* ZL10353 replaces MT352 on later cards */
  511. dev->dvb.frontend = dvb_attach(zl10353_attach,
  512. &dvico_fusionhdtv_plus_v1_1,
  513. &dev->core->i2c_adap);
  514. if (dev->dvb.frontend != NULL) {
  515. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  516. NULL, &dvb_pll_thomson_dtt7579);
  517. }
  518. break;
  519. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  520. dev->dvb.frontend = dvb_attach(mt352_attach,
  521. &dvico_fusionhdtv,
  522. &dev->core->i2c_adap);
  523. if (dev->dvb.frontend != NULL) {
  524. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  525. NULL, &dvb_pll_lg_z201);
  526. }
  527. break;
  528. case CX88_BOARD_KWORLD_DVB_T:
  529. case CX88_BOARD_DNTV_LIVE_DVB_T:
  530. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  531. dev->dvb.frontend = dvb_attach(mt352_attach,
  532. &dntv_live_dvbt_config,
  533. &dev->core->i2c_adap);
  534. if (dev->dvb.frontend != NULL) {
  535. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  536. NULL, &dvb_pll_unknown_1);
  537. }
  538. break;
  539. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  540. #ifdef HAVE_VP3054_I2C
  541. dev->core->pll_addr = 0x61;
  542. dev->core->pll_desc = &dvb_pll_fmd1216me;
  543. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  544. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  545. if (dev->dvb.frontend != NULL) {
  546. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  547. }
  548. #else
  549. printk("%s: built without vp3054 support\n", dev->core->name);
  550. #endif
  551. break;
  552. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  553. dev->core->pll_addr = 0x61;
  554. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  555. dev->dvb.frontend = dvb_attach(zl10353_attach,
  556. &dvico_fusionhdtv_hybrid,
  557. &dev->core->i2c_adap);
  558. if (dev->dvb.frontend != NULL) {
  559. dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
  560. }
  561. break;
  562. case CX88_BOARD_PCHDTV_HD3000:
  563. dev->dvb.frontend = dvb_attach(or51132_attach,
  564. &pchdtv_hd3000,
  565. &dev->core->i2c_adap);
  566. if (dev->dvb.frontend != NULL) {
  567. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  568. &dev->core->i2c_adap,
  569. &dvb_pll_thomson_dtt761x);
  570. }
  571. break;
  572. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  573. dev->ts_gen_cntrl = 0x08;
  574. {
  575. /* Do a hardware reset of chip before using it. */
  576. struct cx88_core *core = dev->core;
  577. cx_clear(MO_GP0_IO, 1);
  578. mdelay(100);
  579. cx_set(MO_GP0_IO, 1);
  580. mdelay(200);
  581. /* Select RF connector callback */
  582. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  583. dev->core->pll_addr = 0x61;
  584. dev->core->pll_desc = &dvb_pll_microtune_4042;
  585. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  586. &fusionhdtv_3_gold,
  587. &dev->core->i2c_adap);
  588. if (dev->dvb.frontend != NULL) {
  589. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  590. }
  591. }
  592. break;
  593. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  594. dev->ts_gen_cntrl = 0x08;
  595. {
  596. /* Do a hardware reset of chip before using it. */
  597. struct cx88_core *core = dev->core;
  598. cx_clear(MO_GP0_IO, 1);
  599. mdelay(100);
  600. cx_set(MO_GP0_IO, 9);
  601. mdelay(200);
  602. dev->core->pll_addr = 0x61;
  603. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  604. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  605. &fusionhdtv_3_gold,
  606. &dev->core->i2c_adap);
  607. if (dev->dvb.frontend != NULL) {
  608. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  609. }
  610. }
  611. break;
  612. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  613. dev->ts_gen_cntrl = 0x08;
  614. {
  615. /* Do a hardware reset of chip before using it. */
  616. struct cx88_core *core = dev->core;
  617. cx_clear(MO_GP0_IO, 1);
  618. mdelay(100);
  619. cx_set(MO_GP0_IO, 1);
  620. mdelay(200);
  621. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  622. &fusionhdtv_5_gold,
  623. &dev->core->i2c_adap);
  624. if (dev->dvb.frontend != NULL) {
  625. dvb_attach(lgh06xf_attach, dev->dvb.frontend,
  626. &dev->core->i2c_adap);
  627. }
  628. }
  629. break;
  630. case CX88_BOARD_PCHDTV_HD5500:
  631. dev->ts_gen_cntrl = 0x08;
  632. {
  633. /* Do a hardware reset of chip before using it. */
  634. struct cx88_core *core = dev->core;
  635. cx_clear(MO_GP0_IO, 1);
  636. mdelay(100);
  637. cx_set(MO_GP0_IO, 1);
  638. mdelay(200);
  639. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  640. &pchdtv_hd5500,
  641. &dev->core->i2c_adap);
  642. if (dev->dvb.frontend != NULL) {
  643. dvb_attach(lgh06xf_attach, dev->dvb.frontend,
  644. &dev->core->i2c_adap);
  645. }
  646. }
  647. break;
  648. case CX88_BOARD_ATI_HDTVWONDER:
  649. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  650. &ati_hdtvwonder,
  651. &dev->core->i2c_adap);
  652. if (dev->dvb.frontend != NULL) {
  653. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  654. NULL, &dvb_pll_tuv1236d);
  655. }
  656. break;
  657. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  658. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  659. dev->dvb.frontend = dvb_attach(cx24123_attach,
  660. &hauppauge_novas_config,
  661. &dev->core->i2c_adap);
  662. if (dev->dvb.frontend) {
  663. dvb_attach(isl6421_attach, dev->dvb.frontend,
  664. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  665. }
  666. break;
  667. case CX88_BOARD_KWORLD_DVBS_100:
  668. dev->dvb.frontend = dvb_attach(cx24123_attach,
  669. &kworld_dvbs_100_config,
  670. &dev->core->i2c_adap);
  671. if (dev->dvb.frontend) {
  672. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  673. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  674. }
  675. break;
  676. case CX88_BOARD_GENIATECH_DVBS:
  677. dev->dvb.frontend = dvb_attach(cx24123_attach,
  678. &geniatech_dvbs_config,
  679. &dev->core->i2c_adap);
  680. if (dev->dvb.frontend) {
  681. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  682. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  683. }
  684. break;
  685. case CX88_BOARD_HAUPPAUGE_HVR1300:
  686. dev->dvb.frontend = dvb_attach(cx22702_attach,
  687. &hauppauge_hvr1300_config,
  688. &dev->core->i2c_adap);
  689. if (dev->dvb.frontend != NULL) {
  690. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  691. &dev->core->i2c_adap,
  692. &dvb_pll_fmd1216me);
  693. }
  694. break;
  695. case CX88_BOARD_HAUPPAUGE_HVR3000:
  696. dev->dvb.frontend = dvb_attach(cx22702_attach,
  697. &hauppauge_hvr3000_config,
  698. &dev->core->i2c_adap);
  699. if (dev->dvb.frontend != NULL) {
  700. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  701. &dev->core->i2c_adap,
  702. &dvb_pll_fmd1216me);
  703. }
  704. break;
  705. default:
  706. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  707. dev->core->name);
  708. break;
  709. }
  710. if (NULL == dev->dvb.frontend) {
  711. printk("%s: frontend initialization failed\n",dev->core->name);
  712. return -1;
  713. }
  714. if (dev->core->pll_desc) {
  715. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  716. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  717. }
  718. /* Ensure all frontends negotiate bus access */
  719. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  720. /* Put the analog decoder in standby to keep it quiet */
  721. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  722. /* register everything */
  723. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  724. }
  725. /* ----------------------------------------------------------- */
  726. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  727. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  728. {
  729. struct cx88_core *core = drv->core;
  730. int err = 0;
  731. dprintk( 1, "%s\n", __FUNCTION__);
  732. switch (core->board) {
  733. case CX88_BOARD_HAUPPAUGE_HVR1300:
  734. /* We arrive here with either the cx23416 or the cx22702
  735. * on the bus. Take the bus from the cx23416 and enable the
  736. * cx22702 demod
  737. */
  738. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  739. cx_clear(MO_GP0_IO, 0x00000004);
  740. udelay(1000);
  741. break;
  742. default:
  743. err = -ENODEV;
  744. }
  745. return err;
  746. }
  747. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  748. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  749. {
  750. struct cx88_core *core = drv->core;
  751. int err = 0;
  752. dprintk( 1, "%s\n", __FUNCTION__);
  753. switch (core->board) {
  754. case CX88_BOARD_HAUPPAUGE_HVR1300:
  755. /* Do Nothing, leave the cx22702 on the bus. */
  756. break;
  757. default:
  758. err = -ENODEV;
  759. }
  760. return err;
  761. }
  762. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  763. {
  764. struct cx88_core *core = drv->core;
  765. struct cx8802_dev *dev = drv->core->dvbdev;
  766. int err;
  767. dprintk( 1, "%s\n", __FUNCTION__);
  768. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  769. core->board,
  770. core->name,
  771. core->pci_bus,
  772. core->pci_slot);
  773. err = -ENODEV;
  774. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  775. goto fail_core;
  776. #ifdef HAVE_VP3054_I2C
  777. err = vp3054_i2c_probe(dev);
  778. if (0 != err)
  779. goto fail_core;
  780. #endif
  781. /* dvb stuff */
  782. printk("%s/2: cx2388x based dvb card\n", core->name);
  783. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  784. dev->pci, &dev->slock,
  785. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  786. V4L2_FIELD_TOP,
  787. sizeof(struct cx88_buffer),
  788. dev);
  789. err = dvb_register(dev);
  790. if (err != 0)
  791. printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
  792. fail_core:
  793. return err;
  794. }
  795. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  796. {
  797. struct cx8802_dev *dev = drv->core->dvbdev;
  798. /* dvb */
  799. videobuf_dvb_unregister(&dev->dvb);
  800. #ifdef HAVE_VP3054_I2C
  801. vp3054_i2c_remove(dev);
  802. #endif
  803. return 0;
  804. }
  805. static struct cx8802_driver cx8802_dvb_driver = {
  806. .type_id = CX88_MPEG_DVB,
  807. .hw_access = CX8802_DRVCTL_SHARED,
  808. .probe = cx8802_dvb_probe,
  809. .remove = cx8802_dvb_remove,
  810. .advise_acquire = cx8802_dvb_advise_acquire,
  811. .advise_release = cx8802_dvb_advise_release,
  812. };
  813. static int dvb_init(void)
  814. {
  815. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  816. (CX88_VERSION_CODE >> 16) & 0xff,
  817. (CX88_VERSION_CODE >> 8) & 0xff,
  818. CX88_VERSION_CODE & 0xff);
  819. #ifdef SNAPSHOT
  820. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  821. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  822. #endif
  823. return cx8802_register_driver(&cx8802_dvb_driver);
  824. }
  825. static void dvb_fini(void)
  826. {
  827. cx8802_unregister_driver(&cx8802_dvb_driver);
  828. }
  829. module_init(dvb_init);
  830. module_exit(dvb_fini);
  831. /*
  832. * Local variables:
  833. * c-basic-offset: 8
  834. * compile-command: "make DVB=1"
  835. * End:
  836. */