mmu.c 40 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include "x86.h"
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <asm/page.h>
  28. #include <asm/cmpxchg.h>
  29. #include <asm/io.h>
  30. #undef MMU_DEBUG
  31. #undef AUDIT
  32. #ifdef AUDIT
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  34. #else
  35. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  36. #endif
  37. #ifdef MMU_DEBUG
  38. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  39. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  40. #else
  41. #define pgprintk(x...) do { } while (0)
  42. #define rmap_printk(x...) do { } while (0)
  43. #endif
  44. #if defined(MMU_DEBUG) || defined(AUDIT)
  45. static int dbg = 1;
  46. #endif
  47. #ifndef MMU_DEBUG
  48. #define ASSERT(x) do { } while (0)
  49. #else
  50. #define ASSERT(x) \
  51. if (!(x)) { \
  52. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  53. __FILE__, __LINE__, #x); \
  54. }
  55. #endif
  56. #define PT64_PT_BITS 9
  57. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  58. #define PT32_PT_BITS 10
  59. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  60. #define PT_WRITABLE_SHIFT 1
  61. #define PT_PRESENT_MASK (1ULL << 0)
  62. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  63. #define PT_USER_MASK (1ULL << 2)
  64. #define PT_PWT_MASK (1ULL << 3)
  65. #define PT_PCD_MASK (1ULL << 4)
  66. #define PT_ACCESSED_MASK (1ULL << 5)
  67. #define PT_DIRTY_MASK (1ULL << 6)
  68. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  69. #define PT_PAT_MASK (1ULL << 7)
  70. #define PT_GLOBAL_MASK (1ULL << 8)
  71. #define PT64_NX_MASK (1ULL << 63)
  72. #define PT_PAT_SHIFT 7
  73. #define PT_DIR_PAT_SHIFT 12
  74. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  75. #define PT32_DIR_PSE36_SIZE 4
  76. #define PT32_DIR_PSE36_SHIFT 13
  77. #define PT32_DIR_PSE36_MASK \
  78. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  79. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  80. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  81. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  82. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  83. #define PT64_LEVEL_BITS 9
  84. #define PT64_LEVEL_SHIFT(level) \
  85. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  86. #define PT64_LEVEL_MASK(level) \
  87. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  88. #define PT64_INDEX(address, level)\
  89. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  90. #define PT32_LEVEL_BITS 10
  91. #define PT32_LEVEL_SHIFT(level) \
  92. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  93. #define PT32_LEVEL_MASK(level) \
  94. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  95. #define PT32_INDEX(address, level)\
  96. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  97. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  98. #define PT64_DIR_BASE_ADDR_MASK \
  99. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  100. #define PT32_BASE_ADDR_MASK PAGE_MASK
  101. #define PT32_DIR_BASE_ADDR_MASK \
  102. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  103. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  104. | PT64_NX_MASK)
  105. #define PFERR_PRESENT_MASK (1U << 0)
  106. #define PFERR_WRITE_MASK (1U << 1)
  107. #define PFERR_USER_MASK (1U << 2)
  108. #define PFERR_FETCH_MASK (1U << 4)
  109. #define PT64_ROOT_LEVEL 4
  110. #define PT32_ROOT_LEVEL 2
  111. #define PT32E_ROOT_LEVEL 3
  112. #define PT_DIRECTORY_LEVEL 2
  113. #define PT_PAGE_TABLE_LEVEL 1
  114. #define RMAP_EXT 4
  115. struct kvm_rmap_desc {
  116. u64 *shadow_ptes[RMAP_EXT];
  117. struct kvm_rmap_desc *more;
  118. };
  119. static struct kmem_cache *pte_chain_cache;
  120. static struct kmem_cache *rmap_desc_cache;
  121. static struct kmem_cache *mmu_page_header_cache;
  122. static u64 __read_mostly shadow_trap_nonpresent_pte;
  123. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  124. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  125. {
  126. shadow_trap_nonpresent_pte = trap_pte;
  127. shadow_notrap_nonpresent_pte = notrap_pte;
  128. }
  129. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  130. static int is_write_protection(struct kvm_vcpu *vcpu)
  131. {
  132. return vcpu->cr0 & X86_CR0_WP;
  133. }
  134. static int is_cpuid_PSE36(void)
  135. {
  136. return 1;
  137. }
  138. static int is_nx(struct kvm_vcpu *vcpu)
  139. {
  140. return vcpu->shadow_efer & EFER_NX;
  141. }
  142. static int is_present_pte(unsigned long pte)
  143. {
  144. return pte & PT_PRESENT_MASK;
  145. }
  146. static int is_shadow_present_pte(u64 pte)
  147. {
  148. pte &= ~PT_SHADOW_IO_MARK;
  149. return pte != shadow_trap_nonpresent_pte
  150. && pte != shadow_notrap_nonpresent_pte;
  151. }
  152. static int is_writeble_pte(unsigned long pte)
  153. {
  154. return pte & PT_WRITABLE_MASK;
  155. }
  156. static int is_dirty_pte(unsigned long pte)
  157. {
  158. return pte & PT_DIRTY_MASK;
  159. }
  160. static int is_io_pte(unsigned long pte)
  161. {
  162. return pte & PT_SHADOW_IO_MARK;
  163. }
  164. static int is_rmap_pte(u64 pte)
  165. {
  166. return pte != shadow_trap_nonpresent_pte
  167. && pte != shadow_notrap_nonpresent_pte;
  168. }
  169. static gfn_t pse36_gfn_delta(u32 gpte)
  170. {
  171. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  172. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  173. }
  174. static void set_shadow_pte(u64 *sptep, u64 spte)
  175. {
  176. #ifdef CONFIG_X86_64
  177. set_64bit((unsigned long *)sptep, spte);
  178. #else
  179. set_64bit((unsigned long long *)sptep, spte);
  180. #endif
  181. }
  182. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  183. struct kmem_cache *base_cache, int min)
  184. {
  185. void *obj;
  186. if (cache->nobjs >= min)
  187. return 0;
  188. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  189. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  190. if (!obj)
  191. return -ENOMEM;
  192. cache->objects[cache->nobjs++] = obj;
  193. }
  194. return 0;
  195. }
  196. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  197. {
  198. while (mc->nobjs)
  199. kfree(mc->objects[--mc->nobjs]);
  200. }
  201. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  202. int min)
  203. {
  204. struct page *page;
  205. if (cache->nobjs >= min)
  206. return 0;
  207. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  208. page = alloc_page(GFP_KERNEL);
  209. if (!page)
  210. return -ENOMEM;
  211. set_page_private(page, 0);
  212. cache->objects[cache->nobjs++] = page_address(page);
  213. }
  214. return 0;
  215. }
  216. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  217. {
  218. while (mc->nobjs)
  219. free_page((unsigned long)mc->objects[--mc->nobjs]);
  220. }
  221. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  222. {
  223. int r;
  224. kvm_mmu_free_some_pages(vcpu);
  225. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  226. pte_chain_cache, 4);
  227. if (r)
  228. goto out;
  229. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  230. rmap_desc_cache, 1);
  231. if (r)
  232. goto out;
  233. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
  234. if (r)
  235. goto out;
  236. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  237. mmu_page_header_cache, 4);
  238. out:
  239. return r;
  240. }
  241. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  242. {
  243. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  244. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  245. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  246. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  247. }
  248. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  249. size_t size)
  250. {
  251. void *p;
  252. BUG_ON(!mc->nobjs);
  253. p = mc->objects[--mc->nobjs];
  254. memset(p, 0, size);
  255. return p;
  256. }
  257. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  258. {
  259. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  260. sizeof(struct kvm_pte_chain));
  261. }
  262. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  263. {
  264. kfree(pc);
  265. }
  266. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  267. {
  268. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  269. sizeof(struct kvm_rmap_desc));
  270. }
  271. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  272. {
  273. kfree(rd);
  274. }
  275. /*
  276. * Take gfn and return the reverse mapping to it.
  277. * Note: gfn must be unaliased before this function get called
  278. */
  279. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  280. {
  281. struct kvm_memory_slot *slot;
  282. slot = gfn_to_memslot(kvm, gfn);
  283. return &slot->rmap[gfn - slot->base_gfn];
  284. }
  285. /*
  286. * Reverse mapping data structures:
  287. *
  288. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  289. * that points to page_address(page).
  290. *
  291. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  292. * containing more mappings.
  293. */
  294. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  295. {
  296. struct kvm_mmu_page *sp;
  297. struct kvm_rmap_desc *desc;
  298. unsigned long *rmapp;
  299. int i;
  300. if (!is_rmap_pte(*spte))
  301. return;
  302. gfn = unalias_gfn(vcpu->kvm, gfn);
  303. sp = page_header(__pa(spte));
  304. sp->gfns[spte - sp->spt] = gfn;
  305. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  306. if (!*rmapp) {
  307. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  308. *rmapp = (unsigned long)spte;
  309. } else if (!(*rmapp & 1)) {
  310. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  311. desc = mmu_alloc_rmap_desc(vcpu);
  312. desc->shadow_ptes[0] = (u64 *)*rmapp;
  313. desc->shadow_ptes[1] = spte;
  314. *rmapp = (unsigned long)desc | 1;
  315. } else {
  316. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  317. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  318. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  319. desc = desc->more;
  320. if (desc->shadow_ptes[RMAP_EXT-1]) {
  321. desc->more = mmu_alloc_rmap_desc(vcpu);
  322. desc = desc->more;
  323. }
  324. for (i = 0; desc->shadow_ptes[i]; ++i)
  325. ;
  326. desc->shadow_ptes[i] = spte;
  327. }
  328. }
  329. static void rmap_desc_remove_entry(unsigned long *rmapp,
  330. struct kvm_rmap_desc *desc,
  331. int i,
  332. struct kvm_rmap_desc *prev_desc)
  333. {
  334. int j;
  335. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  336. ;
  337. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  338. desc->shadow_ptes[j] = NULL;
  339. if (j != 0)
  340. return;
  341. if (!prev_desc && !desc->more)
  342. *rmapp = (unsigned long)desc->shadow_ptes[0];
  343. else
  344. if (prev_desc)
  345. prev_desc->more = desc->more;
  346. else
  347. *rmapp = (unsigned long)desc->more | 1;
  348. mmu_free_rmap_desc(desc);
  349. }
  350. static void rmap_remove(struct kvm *kvm, u64 *spte)
  351. {
  352. struct kvm_rmap_desc *desc;
  353. struct kvm_rmap_desc *prev_desc;
  354. struct kvm_mmu_page *sp;
  355. struct page *page;
  356. unsigned long *rmapp;
  357. int i;
  358. if (!is_rmap_pte(*spte))
  359. return;
  360. sp = page_header(__pa(spte));
  361. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  362. if (is_writeble_pte(*spte))
  363. kvm_release_page_dirty(page);
  364. else
  365. kvm_release_page_clean(page);
  366. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
  367. if (!*rmapp) {
  368. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  369. BUG();
  370. } else if (!(*rmapp & 1)) {
  371. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  372. if ((u64 *)*rmapp != spte) {
  373. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  374. spte, *spte);
  375. BUG();
  376. }
  377. *rmapp = 0;
  378. } else {
  379. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  380. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  381. prev_desc = NULL;
  382. while (desc) {
  383. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  384. if (desc->shadow_ptes[i] == spte) {
  385. rmap_desc_remove_entry(rmapp,
  386. desc, i,
  387. prev_desc);
  388. return;
  389. }
  390. prev_desc = desc;
  391. desc = desc->more;
  392. }
  393. BUG();
  394. }
  395. }
  396. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  397. {
  398. struct kvm_rmap_desc *desc;
  399. struct kvm_rmap_desc *prev_desc;
  400. u64 *prev_spte;
  401. int i;
  402. if (!*rmapp)
  403. return NULL;
  404. else if (!(*rmapp & 1)) {
  405. if (!spte)
  406. return (u64 *)*rmapp;
  407. return NULL;
  408. }
  409. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  410. prev_desc = NULL;
  411. prev_spte = NULL;
  412. while (desc) {
  413. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  414. if (prev_spte == spte)
  415. return desc->shadow_ptes[i];
  416. prev_spte = desc->shadow_ptes[i];
  417. }
  418. desc = desc->more;
  419. }
  420. return NULL;
  421. }
  422. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  423. {
  424. unsigned long *rmapp;
  425. u64 *spte;
  426. gfn = unalias_gfn(kvm, gfn);
  427. rmapp = gfn_to_rmap(kvm, gfn);
  428. spte = rmap_next(kvm, rmapp, NULL);
  429. while (spte) {
  430. BUG_ON(!spte);
  431. BUG_ON(!(*spte & PT_PRESENT_MASK));
  432. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  433. if (is_writeble_pte(*spte))
  434. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  435. kvm_flush_remote_tlbs(kvm);
  436. spte = rmap_next(kvm, rmapp, spte);
  437. }
  438. }
  439. #ifdef MMU_DEBUG
  440. static int is_empty_shadow_page(u64 *spt)
  441. {
  442. u64 *pos;
  443. u64 *end;
  444. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  445. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  446. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  447. pos, *pos);
  448. return 0;
  449. }
  450. return 1;
  451. }
  452. #endif
  453. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  454. {
  455. ASSERT(is_empty_shadow_page(sp->spt));
  456. list_del(&sp->link);
  457. __free_page(virt_to_page(sp->spt));
  458. __free_page(virt_to_page(sp->gfns));
  459. kfree(sp);
  460. ++kvm->n_free_mmu_pages;
  461. }
  462. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  463. {
  464. return gfn;
  465. }
  466. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  467. u64 *parent_pte)
  468. {
  469. struct kvm_mmu_page *sp;
  470. if (!vcpu->kvm->n_free_mmu_pages)
  471. return NULL;
  472. sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp);
  473. sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  474. sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  475. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  476. list_add(&sp->link, &vcpu->kvm->active_mmu_pages);
  477. ASSERT(is_empty_shadow_page(sp->spt));
  478. sp->slot_bitmap = 0;
  479. sp->multimapped = 0;
  480. sp->parent_pte = parent_pte;
  481. --vcpu->kvm->n_free_mmu_pages;
  482. return sp;
  483. }
  484. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  485. struct kvm_mmu_page *sp, u64 *parent_pte)
  486. {
  487. struct kvm_pte_chain *pte_chain;
  488. struct hlist_node *node;
  489. int i;
  490. if (!parent_pte)
  491. return;
  492. if (!sp->multimapped) {
  493. u64 *old = sp->parent_pte;
  494. if (!old) {
  495. sp->parent_pte = parent_pte;
  496. return;
  497. }
  498. sp->multimapped = 1;
  499. pte_chain = mmu_alloc_pte_chain(vcpu);
  500. INIT_HLIST_HEAD(&sp->parent_ptes);
  501. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  502. pte_chain->parent_ptes[0] = old;
  503. }
  504. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  505. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  506. continue;
  507. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  508. if (!pte_chain->parent_ptes[i]) {
  509. pte_chain->parent_ptes[i] = parent_pte;
  510. return;
  511. }
  512. }
  513. pte_chain = mmu_alloc_pte_chain(vcpu);
  514. BUG_ON(!pte_chain);
  515. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  516. pte_chain->parent_ptes[0] = parent_pte;
  517. }
  518. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  519. u64 *parent_pte)
  520. {
  521. struct kvm_pte_chain *pte_chain;
  522. struct hlist_node *node;
  523. int i;
  524. if (!sp->multimapped) {
  525. BUG_ON(sp->parent_pte != parent_pte);
  526. sp->parent_pte = NULL;
  527. return;
  528. }
  529. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  530. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  531. if (!pte_chain->parent_ptes[i])
  532. break;
  533. if (pte_chain->parent_ptes[i] != parent_pte)
  534. continue;
  535. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  536. && pte_chain->parent_ptes[i + 1]) {
  537. pte_chain->parent_ptes[i]
  538. = pte_chain->parent_ptes[i + 1];
  539. ++i;
  540. }
  541. pte_chain->parent_ptes[i] = NULL;
  542. if (i == 0) {
  543. hlist_del(&pte_chain->link);
  544. mmu_free_pte_chain(pte_chain);
  545. if (hlist_empty(&sp->parent_ptes)) {
  546. sp->multimapped = 0;
  547. sp->parent_pte = NULL;
  548. }
  549. }
  550. return;
  551. }
  552. BUG();
  553. }
  554. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  555. {
  556. unsigned index;
  557. struct hlist_head *bucket;
  558. struct kvm_mmu_page *sp;
  559. struct hlist_node *node;
  560. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  561. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  562. bucket = &kvm->mmu_page_hash[index];
  563. hlist_for_each_entry(sp, node, bucket, hash_link)
  564. if (sp->gfn == gfn && !sp->role.metaphysical) {
  565. pgprintk("%s: found role %x\n",
  566. __FUNCTION__, sp->role.word);
  567. return sp;
  568. }
  569. return NULL;
  570. }
  571. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  572. gfn_t gfn,
  573. gva_t gaddr,
  574. unsigned level,
  575. int metaphysical,
  576. unsigned hugepage_access,
  577. u64 *parent_pte)
  578. {
  579. union kvm_mmu_page_role role;
  580. unsigned index;
  581. unsigned quadrant;
  582. struct hlist_head *bucket;
  583. struct kvm_mmu_page *sp;
  584. struct hlist_node *node;
  585. role.word = 0;
  586. role.glevels = vcpu->mmu.root_level;
  587. role.level = level;
  588. role.metaphysical = metaphysical;
  589. role.hugepage_access = hugepage_access;
  590. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  591. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  592. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  593. role.quadrant = quadrant;
  594. }
  595. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  596. gfn, role.word);
  597. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  598. bucket = &vcpu->kvm->mmu_page_hash[index];
  599. hlist_for_each_entry(sp, node, bucket, hash_link)
  600. if (sp->gfn == gfn && sp->role.word == role.word) {
  601. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  602. pgprintk("%s: found\n", __FUNCTION__);
  603. return sp;
  604. }
  605. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  606. if (!sp)
  607. return sp;
  608. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  609. sp->gfn = gfn;
  610. sp->role = role;
  611. hlist_add_head(&sp->hash_link, bucket);
  612. vcpu->mmu.prefetch_page(vcpu, sp);
  613. if (!metaphysical)
  614. rmap_write_protect(vcpu->kvm, gfn);
  615. return sp;
  616. }
  617. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  618. struct kvm_mmu_page *sp)
  619. {
  620. unsigned i;
  621. u64 *pt;
  622. u64 ent;
  623. pt = sp->spt;
  624. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  625. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  626. if (is_shadow_present_pte(pt[i]))
  627. rmap_remove(kvm, &pt[i]);
  628. pt[i] = shadow_trap_nonpresent_pte;
  629. }
  630. kvm_flush_remote_tlbs(kvm);
  631. return;
  632. }
  633. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  634. ent = pt[i];
  635. pt[i] = shadow_trap_nonpresent_pte;
  636. if (!is_shadow_present_pte(ent))
  637. continue;
  638. ent &= PT64_BASE_ADDR_MASK;
  639. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  640. }
  641. kvm_flush_remote_tlbs(kvm);
  642. }
  643. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  644. {
  645. mmu_page_remove_parent_pte(sp, parent_pte);
  646. }
  647. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  648. {
  649. int i;
  650. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  651. if (kvm->vcpus[i])
  652. kvm->vcpus[i]->last_pte_updated = NULL;
  653. }
  654. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  655. {
  656. u64 *parent_pte;
  657. ++kvm->stat.mmu_shadow_zapped;
  658. while (sp->multimapped || sp->parent_pte) {
  659. if (!sp->multimapped)
  660. parent_pte = sp->parent_pte;
  661. else {
  662. struct kvm_pte_chain *chain;
  663. chain = container_of(sp->parent_ptes.first,
  664. struct kvm_pte_chain, link);
  665. parent_pte = chain->parent_ptes[0];
  666. }
  667. BUG_ON(!parent_pte);
  668. kvm_mmu_put_page(sp, parent_pte);
  669. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  670. }
  671. kvm_mmu_page_unlink_children(kvm, sp);
  672. if (!sp->root_count) {
  673. hlist_del(&sp->hash_link);
  674. kvm_mmu_free_page(kvm, sp);
  675. } else
  676. list_move(&sp->link, &kvm->active_mmu_pages);
  677. kvm_mmu_reset_last_pte_updated(kvm);
  678. }
  679. /*
  680. * Changing the number of mmu pages allocated to the vm
  681. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  682. */
  683. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  684. {
  685. /*
  686. * If we set the number of mmu pages to be smaller be than the
  687. * number of actived pages , we must to free some mmu pages before we
  688. * change the value
  689. */
  690. if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
  691. kvm_nr_mmu_pages) {
  692. int n_used_mmu_pages = kvm->n_alloc_mmu_pages
  693. - kvm->n_free_mmu_pages;
  694. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  695. struct kvm_mmu_page *page;
  696. page = container_of(kvm->active_mmu_pages.prev,
  697. struct kvm_mmu_page, link);
  698. kvm_mmu_zap_page(kvm, page);
  699. n_used_mmu_pages--;
  700. }
  701. kvm->n_free_mmu_pages = 0;
  702. }
  703. else
  704. kvm->n_free_mmu_pages += kvm_nr_mmu_pages
  705. - kvm->n_alloc_mmu_pages;
  706. kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
  707. }
  708. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  709. {
  710. unsigned index;
  711. struct hlist_head *bucket;
  712. struct kvm_mmu_page *sp;
  713. struct hlist_node *node, *n;
  714. int r;
  715. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  716. r = 0;
  717. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  718. bucket = &kvm->mmu_page_hash[index];
  719. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  720. if (sp->gfn == gfn && !sp->role.metaphysical) {
  721. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  722. sp->role.word);
  723. kvm_mmu_zap_page(kvm, sp);
  724. r = 1;
  725. }
  726. return r;
  727. }
  728. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  729. {
  730. struct kvm_mmu_page *sp;
  731. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  732. pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
  733. kvm_mmu_zap_page(kvm, sp);
  734. }
  735. }
  736. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  737. {
  738. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  739. struct kvm_mmu_page *sp = page_header(__pa(pte));
  740. __set_bit(slot, &sp->slot_bitmap);
  741. }
  742. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  743. {
  744. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  745. if (gpa == UNMAPPED_GVA)
  746. return NULL;
  747. return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  748. }
  749. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  750. {
  751. }
  752. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, struct page *page)
  753. {
  754. int level = PT32E_ROOT_LEVEL;
  755. hpa_t table_addr = vcpu->mmu.root_hpa;
  756. for (; ; level--) {
  757. u32 index = PT64_INDEX(v, level);
  758. u64 *table;
  759. u64 pte;
  760. ASSERT(VALID_PAGE(table_addr));
  761. table = __va(table_addr);
  762. if (level == 1) {
  763. int was_rmapped;
  764. pte = table[index];
  765. was_rmapped = is_rmap_pte(pte);
  766. if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
  767. kvm_release_page_clean(page);
  768. return 0;
  769. }
  770. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  771. page_header_update_slot(vcpu->kvm, table,
  772. v >> PAGE_SHIFT);
  773. table[index] = page_to_phys(page)
  774. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  775. | PT_USER_MASK;
  776. if (!was_rmapped)
  777. rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
  778. else
  779. kvm_release_page_clean(page);
  780. return 0;
  781. }
  782. if (table[index] == shadow_trap_nonpresent_pte) {
  783. struct kvm_mmu_page *new_table;
  784. gfn_t pseudo_gfn;
  785. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  786. >> PAGE_SHIFT;
  787. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  788. v, level - 1,
  789. 1, 3, &table[index]);
  790. if (!new_table) {
  791. pgprintk("nonpaging_map: ENOMEM\n");
  792. kvm_release_page_clean(page);
  793. return -ENOMEM;
  794. }
  795. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  796. | PT_WRITABLE_MASK | PT_USER_MASK;
  797. }
  798. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  799. }
  800. }
  801. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  802. struct kvm_mmu_page *sp)
  803. {
  804. int i;
  805. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  806. sp->spt[i] = shadow_trap_nonpresent_pte;
  807. }
  808. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  809. {
  810. int i;
  811. struct kvm_mmu_page *sp;
  812. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  813. return;
  814. #ifdef CONFIG_X86_64
  815. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  816. hpa_t root = vcpu->mmu.root_hpa;
  817. sp = page_header(root);
  818. --sp->root_count;
  819. vcpu->mmu.root_hpa = INVALID_PAGE;
  820. return;
  821. }
  822. #endif
  823. for (i = 0; i < 4; ++i) {
  824. hpa_t root = vcpu->mmu.pae_root[i];
  825. if (root) {
  826. root &= PT64_BASE_ADDR_MASK;
  827. sp = page_header(root);
  828. --sp->root_count;
  829. }
  830. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  831. }
  832. vcpu->mmu.root_hpa = INVALID_PAGE;
  833. }
  834. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  835. {
  836. int i;
  837. gfn_t root_gfn;
  838. struct kvm_mmu_page *sp;
  839. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  840. #ifdef CONFIG_X86_64
  841. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  842. hpa_t root = vcpu->mmu.root_hpa;
  843. ASSERT(!VALID_PAGE(root));
  844. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  845. PT64_ROOT_LEVEL, 0, 0, NULL);
  846. root = __pa(sp->spt);
  847. ++sp->root_count;
  848. vcpu->mmu.root_hpa = root;
  849. return;
  850. }
  851. #endif
  852. for (i = 0; i < 4; ++i) {
  853. hpa_t root = vcpu->mmu.pae_root[i];
  854. ASSERT(!VALID_PAGE(root));
  855. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  856. if (!is_present_pte(vcpu->pdptrs[i])) {
  857. vcpu->mmu.pae_root[i] = 0;
  858. continue;
  859. }
  860. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  861. } else if (vcpu->mmu.root_level == 0)
  862. root_gfn = 0;
  863. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  864. PT32_ROOT_LEVEL, !is_paging(vcpu),
  865. 0, NULL);
  866. root = __pa(sp->spt);
  867. ++sp->root_count;
  868. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  869. }
  870. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  871. }
  872. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  873. {
  874. return vaddr;
  875. }
  876. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  877. u32 error_code)
  878. {
  879. struct page *page;
  880. int r;
  881. r = mmu_topup_memory_caches(vcpu);
  882. if (r)
  883. return r;
  884. ASSERT(vcpu);
  885. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  886. page = gfn_to_page(vcpu->kvm, gva >> PAGE_SHIFT);
  887. if (is_error_page(page)) {
  888. kvm_release_page_clean(page);
  889. return 1;
  890. }
  891. return nonpaging_map(vcpu, gva & PAGE_MASK, page);
  892. }
  893. static void nonpaging_free(struct kvm_vcpu *vcpu)
  894. {
  895. mmu_free_roots(vcpu);
  896. }
  897. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  898. {
  899. struct kvm_mmu *context = &vcpu->mmu;
  900. context->new_cr3 = nonpaging_new_cr3;
  901. context->page_fault = nonpaging_page_fault;
  902. context->gva_to_gpa = nonpaging_gva_to_gpa;
  903. context->free = nonpaging_free;
  904. context->prefetch_page = nonpaging_prefetch_page;
  905. context->root_level = 0;
  906. context->shadow_root_level = PT32E_ROOT_LEVEL;
  907. context->root_hpa = INVALID_PAGE;
  908. return 0;
  909. }
  910. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  911. {
  912. ++vcpu->stat.tlb_flush;
  913. kvm_x86_ops->tlb_flush(vcpu);
  914. }
  915. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  916. {
  917. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  918. mmu_free_roots(vcpu);
  919. }
  920. static void inject_page_fault(struct kvm_vcpu *vcpu,
  921. u64 addr,
  922. u32 err_code)
  923. {
  924. kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
  925. }
  926. static void paging_free(struct kvm_vcpu *vcpu)
  927. {
  928. nonpaging_free(vcpu);
  929. }
  930. #define PTTYPE 64
  931. #include "paging_tmpl.h"
  932. #undef PTTYPE
  933. #define PTTYPE 32
  934. #include "paging_tmpl.h"
  935. #undef PTTYPE
  936. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  937. {
  938. struct kvm_mmu *context = &vcpu->mmu;
  939. ASSERT(is_pae(vcpu));
  940. context->new_cr3 = paging_new_cr3;
  941. context->page_fault = paging64_page_fault;
  942. context->gva_to_gpa = paging64_gva_to_gpa;
  943. context->prefetch_page = paging64_prefetch_page;
  944. context->free = paging_free;
  945. context->root_level = level;
  946. context->shadow_root_level = level;
  947. context->root_hpa = INVALID_PAGE;
  948. return 0;
  949. }
  950. static int paging64_init_context(struct kvm_vcpu *vcpu)
  951. {
  952. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  953. }
  954. static int paging32_init_context(struct kvm_vcpu *vcpu)
  955. {
  956. struct kvm_mmu *context = &vcpu->mmu;
  957. context->new_cr3 = paging_new_cr3;
  958. context->page_fault = paging32_page_fault;
  959. context->gva_to_gpa = paging32_gva_to_gpa;
  960. context->free = paging_free;
  961. context->prefetch_page = paging32_prefetch_page;
  962. context->root_level = PT32_ROOT_LEVEL;
  963. context->shadow_root_level = PT32E_ROOT_LEVEL;
  964. context->root_hpa = INVALID_PAGE;
  965. return 0;
  966. }
  967. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  968. {
  969. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  970. }
  971. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  972. {
  973. ASSERT(vcpu);
  974. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  975. if (!is_paging(vcpu))
  976. return nonpaging_init_context(vcpu);
  977. else if (is_long_mode(vcpu))
  978. return paging64_init_context(vcpu);
  979. else if (is_pae(vcpu))
  980. return paging32E_init_context(vcpu);
  981. else
  982. return paging32_init_context(vcpu);
  983. }
  984. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  985. {
  986. ASSERT(vcpu);
  987. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  988. vcpu->mmu.free(vcpu);
  989. vcpu->mmu.root_hpa = INVALID_PAGE;
  990. }
  991. }
  992. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  993. {
  994. destroy_kvm_mmu(vcpu);
  995. return init_kvm_mmu(vcpu);
  996. }
  997. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  998. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  999. {
  1000. int r;
  1001. mutex_lock(&vcpu->kvm->lock);
  1002. r = mmu_topup_memory_caches(vcpu);
  1003. if (r)
  1004. goto out;
  1005. mmu_alloc_roots(vcpu);
  1006. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  1007. kvm_mmu_flush_tlb(vcpu);
  1008. out:
  1009. mutex_unlock(&vcpu->kvm->lock);
  1010. return r;
  1011. }
  1012. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1013. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1014. {
  1015. mmu_free_roots(vcpu);
  1016. }
  1017. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1018. struct kvm_mmu_page *sp,
  1019. u64 *spte)
  1020. {
  1021. u64 pte;
  1022. struct kvm_mmu_page *child;
  1023. pte = *spte;
  1024. if (is_shadow_present_pte(pte)) {
  1025. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1026. rmap_remove(vcpu->kvm, spte);
  1027. else {
  1028. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1029. mmu_page_remove_parent_pte(child, spte);
  1030. }
  1031. }
  1032. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1033. }
  1034. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1035. struct kvm_mmu_page *sp,
  1036. u64 *spte,
  1037. const void *new, int bytes,
  1038. int offset_in_pte)
  1039. {
  1040. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1041. ++vcpu->kvm->stat.mmu_pde_zapped;
  1042. return;
  1043. }
  1044. ++vcpu->kvm->stat.mmu_pte_updated;
  1045. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1046. paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1047. else
  1048. paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1049. }
  1050. static bool need_remote_flush(u64 old, u64 new)
  1051. {
  1052. if (!is_shadow_present_pte(old))
  1053. return false;
  1054. if (!is_shadow_present_pte(new))
  1055. return true;
  1056. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1057. return true;
  1058. old ^= PT64_NX_MASK;
  1059. new ^= PT64_NX_MASK;
  1060. return (old & ~new & PT64_PERM_MASK) != 0;
  1061. }
  1062. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1063. {
  1064. if (need_remote_flush(old, new))
  1065. kvm_flush_remote_tlbs(vcpu->kvm);
  1066. else
  1067. kvm_mmu_flush_tlb(vcpu);
  1068. }
  1069. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1070. {
  1071. u64 *spte = vcpu->last_pte_updated;
  1072. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1073. }
  1074. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1075. const u8 *new, int bytes)
  1076. {
  1077. gfn_t gfn = gpa >> PAGE_SHIFT;
  1078. struct kvm_mmu_page *sp;
  1079. struct hlist_node *node, *n;
  1080. struct hlist_head *bucket;
  1081. unsigned index;
  1082. u64 entry;
  1083. u64 *spte;
  1084. unsigned offset = offset_in_page(gpa);
  1085. unsigned pte_size;
  1086. unsigned page_offset;
  1087. unsigned misaligned;
  1088. unsigned quadrant;
  1089. int level;
  1090. int flooded = 0;
  1091. int npte;
  1092. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1093. ++vcpu->kvm->stat.mmu_pte_write;
  1094. kvm_mmu_audit(vcpu, "pre pte write");
  1095. if (gfn == vcpu->last_pt_write_gfn
  1096. && !last_updated_pte_accessed(vcpu)) {
  1097. ++vcpu->last_pt_write_count;
  1098. if (vcpu->last_pt_write_count >= 3)
  1099. flooded = 1;
  1100. } else {
  1101. vcpu->last_pt_write_gfn = gfn;
  1102. vcpu->last_pt_write_count = 1;
  1103. vcpu->last_pte_updated = NULL;
  1104. }
  1105. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1106. bucket = &vcpu->kvm->mmu_page_hash[index];
  1107. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1108. if (sp->gfn != gfn || sp->role.metaphysical)
  1109. continue;
  1110. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1111. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1112. misaligned |= bytes < 4;
  1113. if (misaligned || flooded) {
  1114. /*
  1115. * Misaligned accesses are too much trouble to fix
  1116. * up; also, they usually indicate a page is not used
  1117. * as a page table.
  1118. *
  1119. * If we're seeing too many writes to a page,
  1120. * it may no longer be a page table, or we may be
  1121. * forking, in which case it is better to unmap the
  1122. * page.
  1123. */
  1124. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1125. gpa, bytes, sp->role.word);
  1126. kvm_mmu_zap_page(vcpu->kvm, sp);
  1127. ++vcpu->kvm->stat.mmu_flooded;
  1128. continue;
  1129. }
  1130. page_offset = offset;
  1131. level = sp->role.level;
  1132. npte = 1;
  1133. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1134. page_offset <<= 1; /* 32->64 */
  1135. /*
  1136. * A 32-bit pde maps 4MB while the shadow pdes map
  1137. * only 2MB. So we need to double the offset again
  1138. * and zap two pdes instead of one.
  1139. */
  1140. if (level == PT32_ROOT_LEVEL) {
  1141. page_offset &= ~7; /* kill rounding error */
  1142. page_offset <<= 1;
  1143. npte = 2;
  1144. }
  1145. quadrant = page_offset >> PAGE_SHIFT;
  1146. page_offset &= ~PAGE_MASK;
  1147. if (quadrant != sp->role.quadrant)
  1148. continue;
  1149. }
  1150. spte = &sp->spt[page_offset / sizeof(*spte)];
  1151. while (npte--) {
  1152. entry = *spte;
  1153. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1154. mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
  1155. page_offset & (pte_size - 1));
  1156. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1157. ++spte;
  1158. }
  1159. }
  1160. kvm_mmu_audit(vcpu, "post pte write");
  1161. }
  1162. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1163. {
  1164. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1165. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1166. }
  1167. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1168. {
  1169. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1170. struct kvm_mmu_page *sp;
  1171. sp = container_of(vcpu->kvm->active_mmu_pages.prev,
  1172. struct kvm_mmu_page, link);
  1173. kvm_mmu_zap_page(vcpu->kvm, sp);
  1174. ++vcpu->kvm->stat.mmu_recycled;
  1175. }
  1176. }
  1177. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1178. {
  1179. int r;
  1180. enum emulation_result er;
  1181. mutex_lock(&vcpu->kvm->lock);
  1182. r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
  1183. if (r < 0)
  1184. goto out;
  1185. if (!r) {
  1186. r = 1;
  1187. goto out;
  1188. }
  1189. r = mmu_topup_memory_caches(vcpu);
  1190. if (r)
  1191. goto out;
  1192. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1193. mutex_unlock(&vcpu->kvm->lock);
  1194. switch (er) {
  1195. case EMULATE_DONE:
  1196. return 1;
  1197. case EMULATE_DO_MMIO:
  1198. ++vcpu->stat.mmio_exits;
  1199. return 0;
  1200. case EMULATE_FAIL:
  1201. kvm_report_emulation_failure(vcpu, "pagetable");
  1202. return 1;
  1203. default:
  1204. BUG();
  1205. }
  1206. out:
  1207. mutex_unlock(&vcpu->kvm->lock);
  1208. return r;
  1209. }
  1210. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1211. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1212. {
  1213. struct kvm_mmu_page *sp;
  1214. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1215. sp = container_of(vcpu->kvm->active_mmu_pages.next,
  1216. struct kvm_mmu_page, link);
  1217. kvm_mmu_zap_page(vcpu->kvm, sp);
  1218. }
  1219. free_page((unsigned long)vcpu->mmu.pae_root);
  1220. }
  1221. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1222. {
  1223. struct page *page;
  1224. int i;
  1225. ASSERT(vcpu);
  1226. if (vcpu->kvm->n_requested_mmu_pages)
  1227. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
  1228. else
  1229. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
  1230. /*
  1231. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1232. * Therefore we need to allocate shadow page tables in the first
  1233. * 4GB of memory, which happens to fit the DMA32 zone.
  1234. */
  1235. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1236. if (!page)
  1237. goto error_1;
  1238. vcpu->mmu.pae_root = page_address(page);
  1239. for (i = 0; i < 4; ++i)
  1240. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1241. return 0;
  1242. error_1:
  1243. free_mmu_pages(vcpu);
  1244. return -ENOMEM;
  1245. }
  1246. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1247. {
  1248. ASSERT(vcpu);
  1249. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1250. return alloc_mmu_pages(vcpu);
  1251. }
  1252. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1253. {
  1254. ASSERT(vcpu);
  1255. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1256. return init_kvm_mmu(vcpu);
  1257. }
  1258. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1259. {
  1260. ASSERT(vcpu);
  1261. destroy_kvm_mmu(vcpu);
  1262. free_mmu_pages(vcpu);
  1263. mmu_free_memory_caches(vcpu);
  1264. }
  1265. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1266. {
  1267. struct kvm_mmu_page *sp;
  1268. list_for_each_entry(sp, &kvm->active_mmu_pages, link) {
  1269. int i;
  1270. u64 *pt;
  1271. if (!test_bit(slot, &sp->slot_bitmap))
  1272. continue;
  1273. pt = sp->spt;
  1274. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1275. /* avoid RMW */
  1276. if (pt[i] & PT_WRITABLE_MASK)
  1277. pt[i] &= ~PT_WRITABLE_MASK;
  1278. }
  1279. }
  1280. void kvm_mmu_zap_all(struct kvm *kvm)
  1281. {
  1282. struct kvm_mmu_page *sp, *node;
  1283. list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link)
  1284. kvm_mmu_zap_page(kvm, sp);
  1285. kvm_flush_remote_tlbs(kvm);
  1286. }
  1287. void kvm_mmu_module_exit(void)
  1288. {
  1289. if (pte_chain_cache)
  1290. kmem_cache_destroy(pte_chain_cache);
  1291. if (rmap_desc_cache)
  1292. kmem_cache_destroy(rmap_desc_cache);
  1293. if (mmu_page_header_cache)
  1294. kmem_cache_destroy(mmu_page_header_cache);
  1295. }
  1296. int kvm_mmu_module_init(void)
  1297. {
  1298. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1299. sizeof(struct kvm_pte_chain),
  1300. 0, 0, NULL);
  1301. if (!pte_chain_cache)
  1302. goto nomem;
  1303. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1304. sizeof(struct kvm_rmap_desc),
  1305. 0, 0, NULL);
  1306. if (!rmap_desc_cache)
  1307. goto nomem;
  1308. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1309. sizeof(struct kvm_mmu_page),
  1310. 0, 0, NULL);
  1311. if (!mmu_page_header_cache)
  1312. goto nomem;
  1313. return 0;
  1314. nomem:
  1315. kvm_mmu_module_exit();
  1316. return -ENOMEM;
  1317. }
  1318. /*
  1319. * Caculate mmu pages needed for kvm.
  1320. */
  1321. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1322. {
  1323. int i;
  1324. unsigned int nr_mmu_pages;
  1325. unsigned int nr_pages = 0;
  1326. for (i = 0; i < kvm->nmemslots; i++)
  1327. nr_pages += kvm->memslots[i].npages;
  1328. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1329. nr_mmu_pages = max(nr_mmu_pages,
  1330. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1331. return nr_mmu_pages;
  1332. }
  1333. #ifdef AUDIT
  1334. static const char *audit_msg;
  1335. static gva_t canonicalize(gva_t gva)
  1336. {
  1337. #ifdef CONFIG_X86_64
  1338. gva = (long long)(gva << 16) >> 16;
  1339. #endif
  1340. return gva;
  1341. }
  1342. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1343. gva_t va, int level)
  1344. {
  1345. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1346. int i;
  1347. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1348. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1349. u64 ent = pt[i];
  1350. if (ent == shadow_trap_nonpresent_pte)
  1351. continue;
  1352. va = canonicalize(va);
  1353. if (level > 1) {
  1354. if (ent == shadow_notrap_nonpresent_pte)
  1355. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1356. " in nonleaf level: levels %d gva %lx"
  1357. " level %d pte %llx\n", audit_msg,
  1358. vcpu->mmu.root_level, va, level, ent);
  1359. audit_mappings_page(vcpu, ent, va, level - 1);
  1360. } else {
  1361. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1362. struct page *page = gpa_to_page(vcpu, gpa);
  1363. hpa_t hpa = page_to_phys(page);
  1364. if (is_shadow_present_pte(ent)
  1365. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1366. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1367. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1368. audit_msg, vcpu->mmu.root_level,
  1369. va, gpa, hpa, ent,
  1370. is_shadow_present_pte(ent));
  1371. else if (ent == shadow_notrap_nonpresent_pte
  1372. && !is_error_hpa(hpa))
  1373. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1374. " valid guest gva %lx\n", audit_msg, va);
  1375. kvm_release_page_clean(page);
  1376. }
  1377. }
  1378. }
  1379. static void audit_mappings(struct kvm_vcpu *vcpu)
  1380. {
  1381. unsigned i;
  1382. if (vcpu->mmu.root_level == 4)
  1383. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1384. else
  1385. for (i = 0; i < 4; ++i)
  1386. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1387. audit_mappings_page(vcpu,
  1388. vcpu->mmu.pae_root[i],
  1389. i << 30,
  1390. 2);
  1391. }
  1392. static int count_rmaps(struct kvm_vcpu *vcpu)
  1393. {
  1394. int nmaps = 0;
  1395. int i, j, k;
  1396. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1397. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1398. struct kvm_rmap_desc *d;
  1399. for (j = 0; j < m->npages; ++j) {
  1400. unsigned long *rmapp = &m->rmap[j];
  1401. if (!*rmapp)
  1402. continue;
  1403. if (!(*rmapp & 1)) {
  1404. ++nmaps;
  1405. continue;
  1406. }
  1407. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1408. while (d) {
  1409. for (k = 0; k < RMAP_EXT; ++k)
  1410. if (d->shadow_ptes[k])
  1411. ++nmaps;
  1412. else
  1413. break;
  1414. d = d->more;
  1415. }
  1416. }
  1417. }
  1418. return nmaps;
  1419. }
  1420. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1421. {
  1422. int nmaps = 0;
  1423. struct kvm_mmu_page *sp;
  1424. int i;
  1425. list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
  1426. u64 *pt = sp->spt;
  1427. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1428. continue;
  1429. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1430. u64 ent = pt[i];
  1431. if (!(ent & PT_PRESENT_MASK))
  1432. continue;
  1433. if (!(ent & PT_WRITABLE_MASK))
  1434. continue;
  1435. ++nmaps;
  1436. }
  1437. }
  1438. return nmaps;
  1439. }
  1440. static void audit_rmap(struct kvm_vcpu *vcpu)
  1441. {
  1442. int n_rmap = count_rmaps(vcpu);
  1443. int n_actual = count_writable_mappings(vcpu);
  1444. if (n_rmap != n_actual)
  1445. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1446. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1447. }
  1448. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1449. {
  1450. struct kvm_mmu_page *sp;
  1451. struct kvm_memory_slot *slot;
  1452. unsigned long *rmapp;
  1453. gfn_t gfn;
  1454. list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
  1455. if (sp->role.metaphysical)
  1456. continue;
  1457. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  1458. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  1459. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1460. if (*rmapp)
  1461. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1462. " mappings: gfn %lx role %x\n",
  1463. __FUNCTION__, audit_msg, sp->gfn,
  1464. sp->role.word);
  1465. }
  1466. }
  1467. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1468. {
  1469. int olddbg = dbg;
  1470. dbg = 0;
  1471. audit_msg = msg;
  1472. audit_rmap(vcpu);
  1473. audit_write_protection(vcpu);
  1474. audit_mappings(vcpu);
  1475. dbg = olddbg;
  1476. }
  1477. #endif