e1000_main.c 130 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. /* Change Log
  23. * 7.0.33 3-Feb-2006
  24. * o Added another fix for the pass false carrier bit
  25. * 7.0.32 24-Jan-2006
  26. * o Need to rebuild with noew version number for the pass false carrier
  27. * fix in e1000_hw.c
  28. * 7.0.30 18-Jan-2006
  29. * o fixup for tso workaround to disable it for pci-x
  30. * o fix mem leak on 82542
  31. * o fixes for 10 Mb/s connections and incorrect stats
  32. * 7.0.28 01/06/2006
  33. * o hardware workaround to only set "speed mode" bit for 1G link.
  34. * 7.0.26 12/23/2005
  35. * o wake on lan support modified for device ID 10B5
  36. * o fix dhcp + vlan issue not making it to the iAMT firmware
  37. * 7.0.24 12/9/2005
  38. * o New hardware support for the Gigabit NIC embedded in the south bridge
  39. * o Fixes to the recycling logic (skb->tail) from IBM LTC
  40. * 6.3.9 12/16/2005
  41. * o incorporate fix for recycled skbs from IBM LTC
  42. * 6.3.7 11/18/2005
  43. * o Honor eeprom setting for enabling/disabling Wake On Lan
  44. * 6.3.5 11/17/2005
  45. * o Fix memory leak in rx ring handling for PCI Express adapters
  46. * 6.3.4 11/8/05
  47. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  48. * 6.3.2 9/20/05
  49. * o Render logic that sets/resets DRV_LOAD as inline functions to
  50. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  51. * network interface is open.
  52. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  53. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  54. * rx_buffer_len
  55. * 6.3.1 9/19/05
  56. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  57. * (e1000_clean_tx_irq)
  58. * o Support for 8086:10B5 device (Quad Port)
  59. */
  60. char e1000_driver_name[] = "e1000";
  61. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  62. #ifndef CONFIG_E1000_NAPI
  63. #define DRIVERNAPI
  64. #else
  65. #define DRIVERNAPI "-NAPI"
  66. #endif
  67. #define DRV_VERSION "7.0.38-k2"DRIVERNAPI
  68. char e1000_driver_version[] = DRV_VERSION;
  69. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  70. /* e1000_pci_tbl - PCI Device ID Table
  71. *
  72. * Last entry must be all 0s
  73. *
  74. * Macro expands to...
  75. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  76. */
  77. static struct pci_device_id e1000_pci_tbl[] = {
  78. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  79. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  80. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  81. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  83. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  84. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  85. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  86. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  90. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  91. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  92. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  93. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  94. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  95. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  96. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  97. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  98. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  99. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  100. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  101. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  102. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  103. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  104. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  105. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  106. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  111. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  112. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  113. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  114. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  115. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  116. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  117. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  118. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  119. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  123. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  124. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  125. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  126. /* required last entry */
  127. {0,}
  128. };
  129. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  130. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  131. struct e1000_tx_ring *txdr);
  132. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  133. struct e1000_rx_ring *rxdr);
  134. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  135. struct e1000_tx_ring *tx_ring);
  136. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  137. struct e1000_rx_ring *rx_ring);
  138. /* Local Function Prototypes */
  139. static int e1000_init_module(void);
  140. static void e1000_exit_module(void);
  141. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  142. static void __devexit e1000_remove(struct pci_dev *pdev);
  143. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  144. static int e1000_sw_init(struct e1000_adapter *adapter);
  145. static int e1000_open(struct net_device *netdev);
  146. static int e1000_close(struct net_device *netdev);
  147. static void e1000_configure_tx(struct e1000_adapter *adapter);
  148. static void e1000_configure_rx(struct e1000_adapter *adapter);
  149. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  150. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  151. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  152. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  153. struct e1000_tx_ring *tx_ring);
  154. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. static void e1000_set_multi(struct net_device *netdev);
  157. static void e1000_update_phy_info(unsigned long data);
  158. static void e1000_watchdog(unsigned long data);
  159. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  160. static void e1000_82547_tx_fifo_stall(unsigned long data);
  161. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  162. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  163. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  164. static int e1000_set_mac(struct net_device *netdev, void *p);
  165. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  166. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  167. struct e1000_tx_ring *tx_ring);
  168. #ifdef CONFIG_E1000_NAPI
  169. static int e1000_clean(struct net_device *poll_dev, int *budget);
  170. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  171. struct e1000_rx_ring *rx_ring,
  172. int *work_done, int work_to_do);
  173. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  174. struct e1000_rx_ring *rx_ring,
  175. int *work_done, int work_to_do);
  176. #else
  177. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  178. struct e1000_rx_ring *rx_ring);
  179. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  180. struct e1000_rx_ring *rx_ring);
  181. #endif
  182. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  183. struct e1000_rx_ring *rx_ring,
  184. int cleaned_count);
  185. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  186. struct e1000_rx_ring *rx_ring,
  187. int cleaned_count);
  188. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  189. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  190. int cmd);
  191. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  192. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  193. static void e1000_tx_timeout(struct net_device *dev);
  194. static void e1000_reset_task(struct net_device *dev);
  195. static void e1000_smartspeed(struct e1000_adapter *adapter);
  196. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  197. struct sk_buff *skb);
  198. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  199. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  200. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  201. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  202. #ifdef CONFIG_PM
  203. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  204. static int e1000_resume(struct pci_dev *pdev);
  205. #endif
  206. static void e1000_shutdown(struct pci_dev *pdev);
  207. #ifdef CONFIG_NET_POLL_CONTROLLER
  208. /* for netdump / net console */
  209. static void e1000_netpoll (struct net_device *netdev);
  210. #endif
  211. static struct pci_driver e1000_driver = {
  212. .name = e1000_driver_name,
  213. .id_table = e1000_pci_tbl,
  214. .probe = e1000_probe,
  215. .remove = __devexit_p(e1000_remove),
  216. /* Power Managment Hooks */
  217. #ifdef CONFIG_PM
  218. .suspend = e1000_suspend,
  219. .resume = e1000_resume,
  220. #endif
  221. .shutdown = e1000_shutdown
  222. };
  223. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  224. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  225. MODULE_LICENSE("GPL");
  226. MODULE_VERSION(DRV_VERSION);
  227. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  228. module_param(debug, int, 0);
  229. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  230. /**
  231. * e1000_init_module - Driver Registration Routine
  232. *
  233. * e1000_init_module is the first routine called when the driver is
  234. * loaded. All it does is register with the PCI subsystem.
  235. **/
  236. static int __init
  237. e1000_init_module(void)
  238. {
  239. int ret;
  240. printk(KERN_INFO "%s - version %s\n",
  241. e1000_driver_string, e1000_driver_version);
  242. printk(KERN_INFO "%s\n", e1000_copyright);
  243. ret = pci_module_init(&e1000_driver);
  244. return ret;
  245. }
  246. module_init(e1000_init_module);
  247. /**
  248. * e1000_exit_module - Driver Exit Cleanup Routine
  249. *
  250. * e1000_exit_module is called just before the driver is removed
  251. * from memory.
  252. **/
  253. static void __exit
  254. e1000_exit_module(void)
  255. {
  256. pci_unregister_driver(&e1000_driver);
  257. }
  258. module_exit(e1000_exit_module);
  259. /**
  260. * e1000_irq_disable - Mask off interrupt generation on the NIC
  261. * @adapter: board private structure
  262. **/
  263. static void
  264. e1000_irq_disable(struct e1000_adapter *adapter)
  265. {
  266. atomic_inc(&adapter->irq_sem);
  267. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  268. E1000_WRITE_FLUSH(&adapter->hw);
  269. synchronize_irq(adapter->pdev->irq);
  270. }
  271. /**
  272. * e1000_irq_enable - Enable default interrupt generation settings
  273. * @adapter: board private structure
  274. **/
  275. static void
  276. e1000_irq_enable(struct e1000_adapter *adapter)
  277. {
  278. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  279. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  280. E1000_WRITE_FLUSH(&adapter->hw);
  281. }
  282. }
  283. static void
  284. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  285. {
  286. struct net_device *netdev = adapter->netdev;
  287. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  288. uint16_t old_vid = adapter->mng_vlan_id;
  289. if (adapter->vlgrp) {
  290. if (!adapter->vlgrp->vlan_devices[vid]) {
  291. if (adapter->hw.mng_cookie.status &
  292. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  293. e1000_vlan_rx_add_vid(netdev, vid);
  294. adapter->mng_vlan_id = vid;
  295. } else
  296. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  297. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  298. (vid != old_vid) &&
  299. !adapter->vlgrp->vlan_devices[old_vid])
  300. e1000_vlan_rx_kill_vid(netdev, old_vid);
  301. } else
  302. adapter->mng_vlan_id = vid;
  303. }
  304. }
  305. /**
  306. * e1000_release_hw_control - release control of the h/w to f/w
  307. * @adapter: address of board private structure
  308. *
  309. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  310. * For ASF and Pass Through versions of f/w this means that the
  311. * driver is no longer loaded. For AMT version (only with 82573) i
  312. * of the f/w this means that the netowrk i/f is closed.
  313. *
  314. **/
  315. static void
  316. e1000_release_hw_control(struct e1000_adapter *adapter)
  317. {
  318. uint32_t ctrl_ext;
  319. uint32_t swsm;
  320. /* Let firmware taken over control of h/w */
  321. switch (adapter->hw.mac_type) {
  322. case e1000_82571:
  323. case e1000_82572:
  324. case e1000_80003es2lan:
  325. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  326. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  327. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  328. break;
  329. case e1000_82573:
  330. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  331. E1000_WRITE_REG(&adapter->hw, SWSM,
  332. swsm & ~E1000_SWSM_DRV_LOAD);
  333. default:
  334. break;
  335. }
  336. }
  337. /**
  338. * e1000_get_hw_control - get control of the h/w from f/w
  339. * @adapter: address of board private structure
  340. *
  341. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  342. * For ASF and Pass Through versions of f/w this means that
  343. * the driver is loaded. For AMT version (only with 82573)
  344. * of the f/w this means that the netowrk i/f is open.
  345. *
  346. **/
  347. static void
  348. e1000_get_hw_control(struct e1000_adapter *adapter)
  349. {
  350. uint32_t ctrl_ext;
  351. uint32_t swsm;
  352. /* Let firmware know the driver has taken over */
  353. switch (adapter->hw.mac_type) {
  354. case e1000_82571:
  355. case e1000_82572:
  356. case e1000_80003es2lan:
  357. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  358. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  359. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  360. break;
  361. case e1000_82573:
  362. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  363. E1000_WRITE_REG(&adapter->hw, SWSM,
  364. swsm | E1000_SWSM_DRV_LOAD);
  365. break;
  366. default:
  367. break;
  368. }
  369. }
  370. int
  371. e1000_up(struct e1000_adapter *adapter)
  372. {
  373. struct net_device *netdev = adapter->netdev;
  374. int i, err;
  375. /* hardware has been reset, we need to reload some things */
  376. /* Reset the PHY if it was previously powered down */
  377. if (adapter->hw.media_type == e1000_media_type_copper) {
  378. uint16_t mii_reg;
  379. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  380. if (mii_reg & MII_CR_POWER_DOWN)
  381. e1000_phy_hw_reset(&adapter->hw);
  382. }
  383. e1000_set_multi(netdev);
  384. e1000_restore_vlan(adapter);
  385. e1000_configure_tx(adapter);
  386. e1000_setup_rctl(adapter);
  387. e1000_configure_rx(adapter);
  388. /* call E1000_DESC_UNUSED which always leaves
  389. * at least 1 descriptor unused to make sure
  390. * next_to_use != next_to_clean */
  391. for (i = 0; i < adapter->num_rx_queues; i++) {
  392. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  393. adapter->alloc_rx_buf(adapter, ring,
  394. E1000_DESC_UNUSED(ring));
  395. }
  396. #ifdef CONFIG_PCI_MSI
  397. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  398. adapter->have_msi = TRUE;
  399. if ((err = pci_enable_msi(adapter->pdev))) {
  400. DPRINTK(PROBE, ERR,
  401. "Unable to allocate MSI interrupt Error: %d\n", err);
  402. adapter->have_msi = FALSE;
  403. }
  404. }
  405. #endif
  406. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  407. SA_SHIRQ | SA_SAMPLE_RANDOM,
  408. netdev->name, netdev))) {
  409. DPRINTK(PROBE, ERR,
  410. "Unable to allocate interrupt Error: %d\n", err);
  411. return err;
  412. }
  413. adapter->tx_queue_len = netdev->tx_queue_len;
  414. mod_timer(&adapter->watchdog_timer, jiffies);
  415. #ifdef CONFIG_E1000_NAPI
  416. netif_poll_enable(netdev);
  417. #endif
  418. e1000_irq_enable(adapter);
  419. return 0;
  420. }
  421. void
  422. e1000_down(struct e1000_adapter *adapter)
  423. {
  424. struct net_device *netdev = adapter->netdev;
  425. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  426. e1000_check_mng_mode(&adapter->hw);
  427. e1000_irq_disable(adapter);
  428. free_irq(adapter->pdev->irq, netdev);
  429. #ifdef CONFIG_PCI_MSI
  430. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  431. adapter->have_msi == TRUE)
  432. pci_disable_msi(adapter->pdev);
  433. #endif
  434. del_timer_sync(&adapter->tx_fifo_stall_timer);
  435. del_timer_sync(&adapter->watchdog_timer);
  436. del_timer_sync(&adapter->phy_info_timer);
  437. #ifdef CONFIG_E1000_NAPI
  438. netif_poll_disable(netdev);
  439. #endif
  440. netdev->tx_queue_len = adapter->tx_queue_len;
  441. adapter->link_speed = 0;
  442. adapter->link_duplex = 0;
  443. netif_carrier_off(netdev);
  444. netif_stop_queue(netdev);
  445. e1000_reset(adapter);
  446. e1000_clean_all_tx_rings(adapter);
  447. e1000_clean_all_rx_rings(adapter);
  448. /* Power down the PHY so no link is implied when interface is down *
  449. * The PHY cannot be powered down if any of the following is TRUE *
  450. * (a) WoL is enabled
  451. * (b) AMT is active
  452. * (c) SoL/IDER session is active */
  453. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  454. adapter->hw.media_type == e1000_media_type_copper &&
  455. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  456. !mng_mode_enabled &&
  457. !e1000_check_phy_reset_block(&adapter->hw)) {
  458. uint16_t mii_reg;
  459. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  460. mii_reg |= MII_CR_POWER_DOWN;
  461. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  462. mdelay(1);
  463. }
  464. }
  465. void
  466. e1000_reset(struct e1000_adapter *adapter)
  467. {
  468. uint32_t pba, manc;
  469. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  470. /* Repartition Pba for greater than 9k mtu
  471. * To take effect CTRL.RST is required.
  472. */
  473. switch (adapter->hw.mac_type) {
  474. case e1000_82547:
  475. case e1000_82547_rev_2:
  476. pba = E1000_PBA_30K;
  477. break;
  478. case e1000_82571:
  479. case e1000_82572:
  480. case e1000_80003es2lan:
  481. pba = E1000_PBA_38K;
  482. break;
  483. case e1000_82573:
  484. pba = E1000_PBA_12K;
  485. break;
  486. default:
  487. pba = E1000_PBA_48K;
  488. break;
  489. }
  490. if ((adapter->hw.mac_type != e1000_82573) &&
  491. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  492. pba -= 8; /* allocate more FIFO for Tx */
  493. if (adapter->hw.mac_type == e1000_82547) {
  494. adapter->tx_fifo_head = 0;
  495. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  496. adapter->tx_fifo_size =
  497. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  498. atomic_set(&adapter->tx_fifo_stall, 0);
  499. }
  500. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  501. /* flow control settings */
  502. /* Set the FC high water mark to 90% of the FIFO size.
  503. * Required to clear last 3 LSB */
  504. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  505. adapter->hw.fc_high_water = fc_high_water_mark;
  506. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  507. if (adapter->hw.mac_type == e1000_80003es2lan)
  508. adapter->hw.fc_pause_time = 0xFFFF;
  509. else
  510. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  511. adapter->hw.fc_send_xon = 1;
  512. adapter->hw.fc = adapter->hw.original_fc;
  513. /* Allow time for pending master requests to run */
  514. e1000_reset_hw(&adapter->hw);
  515. if (adapter->hw.mac_type >= e1000_82544)
  516. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  517. if (e1000_init_hw(&adapter->hw))
  518. DPRINTK(PROBE, ERR, "Hardware Error\n");
  519. e1000_update_mng_vlan(adapter);
  520. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  521. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  522. e1000_reset_adaptive(&adapter->hw);
  523. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  524. if (adapter->en_mng_pt) {
  525. manc = E1000_READ_REG(&adapter->hw, MANC);
  526. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  527. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  528. }
  529. }
  530. /**
  531. * e1000_probe - Device Initialization Routine
  532. * @pdev: PCI device information struct
  533. * @ent: entry in e1000_pci_tbl
  534. *
  535. * Returns 0 on success, negative on failure
  536. *
  537. * e1000_probe initializes an adapter identified by a pci_dev structure.
  538. * The OS initialization, configuring of the adapter private structure,
  539. * and a hardware reset occur.
  540. **/
  541. static int __devinit
  542. e1000_probe(struct pci_dev *pdev,
  543. const struct pci_device_id *ent)
  544. {
  545. struct net_device *netdev;
  546. struct e1000_adapter *adapter;
  547. unsigned long mmio_start, mmio_len;
  548. static int cards_found = 0;
  549. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  550. int i, err, pci_using_dac;
  551. uint16_t eeprom_data;
  552. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  553. if ((err = pci_enable_device(pdev)))
  554. return err;
  555. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  556. pci_using_dac = 1;
  557. } else {
  558. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  559. E1000_ERR("No usable DMA configuration, aborting\n");
  560. return err;
  561. }
  562. pci_using_dac = 0;
  563. }
  564. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  565. return err;
  566. pci_set_master(pdev);
  567. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  568. if (!netdev) {
  569. err = -ENOMEM;
  570. goto err_alloc_etherdev;
  571. }
  572. SET_MODULE_OWNER(netdev);
  573. SET_NETDEV_DEV(netdev, &pdev->dev);
  574. pci_set_drvdata(pdev, netdev);
  575. adapter = netdev_priv(netdev);
  576. adapter->netdev = netdev;
  577. adapter->pdev = pdev;
  578. adapter->hw.back = adapter;
  579. adapter->msg_enable = (1 << debug) - 1;
  580. mmio_start = pci_resource_start(pdev, BAR_0);
  581. mmio_len = pci_resource_len(pdev, BAR_0);
  582. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  583. if (!adapter->hw.hw_addr) {
  584. err = -EIO;
  585. goto err_ioremap;
  586. }
  587. for (i = BAR_1; i <= BAR_5; i++) {
  588. if (pci_resource_len(pdev, i) == 0)
  589. continue;
  590. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  591. adapter->hw.io_base = pci_resource_start(pdev, i);
  592. break;
  593. }
  594. }
  595. netdev->open = &e1000_open;
  596. netdev->stop = &e1000_close;
  597. netdev->hard_start_xmit = &e1000_xmit_frame;
  598. netdev->get_stats = &e1000_get_stats;
  599. netdev->set_multicast_list = &e1000_set_multi;
  600. netdev->set_mac_address = &e1000_set_mac;
  601. netdev->change_mtu = &e1000_change_mtu;
  602. netdev->do_ioctl = &e1000_ioctl;
  603. e1000_set_ethtool_ops(netdev);
  604. netdev->tx_timeout = &e1000_tx_timeout;
  605. netdev->watchdog_timeo = 5 * HZ;
  606. #ifdef CONFIG_E1000_NAPI
  607. netdev->poll = &e1000_clean;
  608. netdev->weight = 64;
  609. #endif
  610. netdev->vlan_rx_register = e1000_vlan_rx_register;
  611. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  612. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  613. #ifdef CONFIG_NET_POLL_CONTROLLER
  614. netdev->poll_controller = e1000_netpoll;
  615. #endif
  616. strcpy(netdev->name, pci_name(pdev));
  617. netdev->mem_start = mmio_start;
  618. netdev->mem_end = mmio_start + mmio_len;
  619. netdev->base_addr = adapter->hw.io_base;
  620. adapter->bd_number = cards_found;
  621. /* setup the private structure */
  622. if ((err = e1000_sw_init(adapter)))
  623. goto err_sw_init;
  624. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  625. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  626. /* if ksp3, indicate if it's port a being setup */
  627. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  628. e1000_ksp3_port_a == 0)
  629. adapter->ksp3_port_a = 1;
  630. e1000_ksp3_port_a++;
  631. /* Reset for multiple KP3 adapters */
  632. if (e1000_ksp3_port_a == 4)
  633. e1000_ksp3_port_a = 0;
  634. if (adapter->hw.mac_type >= e1000_82543) {
  635. netdev->features = NETIF_F_SG |
  636. NETIF_F_HW_CSUM |
  637. NETIF_F_HW_VLAN_TX |
  638. NETIF_F_HW_VLAN_RX |
  639. NETIF_F_HW_VLAN_FILTER;
  640. }
  641. #ifdef NETIF_F_TSO
  642. if ((adapter->hw.mac_type >= e1000_82544) &&
  643. (adapter->hw.mac_type != e1000_82547))
  644. netdev->features |= NETIF_F_TSO;
  645. #ifdef NETIF_F_TSO_IPV6
  646. if (adapter->hw.mac_type > e1000_82547_rev_2)
  647. netdev->features |= NETIF_F_TSO_IPV6;
  648. #endif
  649. #endif
  650. if (pci_using_dac)
  651. netdev->features |= NETIF_F_HIGHDMA;
  652. /* hard_start_xmit is safe against parallel locking */
  653. netdev->features |= NETIF_F_LLTX;
  654. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  655. /* before reading the EEPROM, reset the controller to
  656. * put the device in a known good starting state */
  657. e1000_reset_hw(&adapter->hw);
  658. /* make sure the EEPROM is good */
  659. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  660. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  661. err = -EIO;
  662. goto err_eeprom;
  663. }
  664. /* copy the MAC address out of the EEPROM */
  665. if (e1000_read_mac_addr(&adapter->hw))
  666. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  667. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  668. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  669. if (!is_valid_ether_addr(netdev->perm_addr)) {
  670. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  671. err = -EIO;
  672. goto err_eeprom;
  673. }
  674. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  675. e1000_get_bus_info(&adapter->hw);
  676. init_timer(&adapter->tx_fifo_stall_timer);
  677. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  678. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  679. init_timer(&adapter->watchdog_timer);
  680. adapter->watchdog_timer.function = &e1000_watchdog;
  681. adapter->watchdog_timer.data = (unsigned long) adapter;
  682. INIT_WORK(&adapter->watchdog_task,
  683. (void (*)(void *))e1000_watchdog_task, adapter);
  684. init_timer(&adapter->phy_info_timer);
  685. adapter->phy_info_timer.function = &e1000_update_phy_info;
  686. adapter->phy_info_timer.data = (unsigned long) adapter;
  687. INIT_WORK(&adapter->reset_task,
  688. (void (*)(void *))e1000_reset_task, netdev);
  689. /* we're going to reset, so assume we have no link for now */
  690. netif_carrier_off(netdev);
  691. netif_stop_queue(netdev);
  692. e1000_check_options(adapter);
  693. /* Initial Wake on LAN setting
  694. * If APM wake is enabled in the EEPROM,
  695. * enable the ACPI Magic Packet filter
  696. */
  697. switch (adapter->hw.mac_type) {
  698. case e1000_82542_rev2_0:
  699. case e1000_82542_rev2_1:
  700. case e1000_82543:
  701. break;
  702. case e1000_82544:
  703. e1000_read_eeprom(&adapter->hw,
  704. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  705. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  706. break;
  707. case e1000_82546:
  708. case e1000_82546_rev_3:
  709. case e1000_82571:
  710. case e1000_80003es2lan:
  711. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  712. e1000_read_eeprom(&adapter->hw,
  713. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  714. break;
  715. }
  716. /* Fall Through */
  717. default:
  718. e1000_read_eeprom(&adapter->hw,
  719. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  720. break;
  721. }
  722. if (eeprom_data & eeprom_apme_mask)
  723. adapter->wol |= E1000_WUFC_MAG;
  724. /* print bus type/speed/width info */
  725. {
  726. struct e1000_hw *hw = &adapter->hw;
  727. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  728. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  729. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  730. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  731. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  732. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  733. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  734. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  735. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  736. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  737. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  738. "32-bit"));
  739. }
  740. for (i = 0; i < 6; i++)
  741. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  742. /* reset the hardware with the new settings */
  743. e1000_reset(adapter);
  744. /* If the controller is 82573 and f/w is AMT, do not set
  745. * DRV_LOAD until the interface is up. For all other cases,
  746. * let the f/w know that the h/w is now under the control
  747. * of the driver. */
  748. if (adapter->hw.mac_type != e1000_82573 ||
  749. !e1000_check_mng_mode(&adapter->hw))
  750. e1000_get_hw_control(adapter);
  751. strcpy(netdev->name, "eth%d");
  752. if ((err = register_netdev(netdev)))
  753. goto err_register;
  754. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  755. cards_found++;
  756. return 0;
  757. err_register:
  758. err_sw_init:
  759. err_eeprom:
  760. iounmap(adapter->hw.hw_addr);
  761. err_ioremap:
  762. free_netdev(netdev);
  763. err_alloc_etherdev:
  764. pci_release_regions(pdev);
  765. return err;
  766. }
  767. /**
  768. * e1000_remove - Device Removal Routine
  769. * @pdev: PCI device information struct
  770. *
  771. * e1000_remove is called by the PCI subsystem to alert the driver
  772. * that it should release a PCI device. The could be caused by a
  773. * Hot-Plug event, or because the driver is going to be removed from
  774. * memory.
  775. **/
  776. static void __devexit
  777. e1000_remove(struct pci_dev *pdev)
  778. {
  779. struct net_device *netdev = pci_get_drvdata(pdev);
  780. struct e1000_adapter *adapter = netdev_priv(netdev);
  781. uint32_t manc;
  782. #ifdef CONFIG_E1000_NAPI
  783. int i;
  784. #endif
  785. flush_scheduled_work();
  786. if (adapter->hw.mac_type >= e1000_82540 &&
  787. adapter->hw.media_type == e1000_media_type_copper) {
  788. manc = E1000_READ_REG(&adapter->hw, MANC);
  789. if (manc & E1000_MANC_SMBUS_EN) {
  790. manc |= E1000_MANC_ARP_EN;
  791. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  792. }
  793. }
  794. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  795. * would have already happened in close and is redundant. */
  796. e1000_release_hw_control(adapter);
  797. unregister_netdev(netdev);
  798. #ifdef CONFIG_E1000_NAPI
  799. for (i = 0; i < adapter->num_rx_queues; i++)
  800. dev_put(&adapter->polling_netdev[i]);
  801. #endif
  802. if (!e1000_check_phy_reset_block(&adapter->hw))
  803. e1000_phy_hw_reset(&adapter->hw);
  804. kfree(adapter->tx_ring);
  805. kfree(adapter->rx_ring);
  806. #ifdef CONFIG_E1000_NAPI
  807. kfree(adapter->polling_netdev);
  808. #endif
  809. iounmap(adapter->hw.hw_addr);
  810. pci_release_regions(pdev);
  811. free_netdev(netdev);
  812. pci_disable_device(pdev);
  813. }
  814. /**
  815. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  816. * @adapter: board private structure to initialize
  817. *
  818. * e1000_sw_init initializes the Adapter private data structure.
  819. * Fields are initialized based on PCI device information and
  820. * OS network device settings (MTU size).
  821. **/
  822. static int __devinit
  823. e1000_sw_init(struct e1000_adapter *adapter)
  824. {
  825. struct e1000_hw *hw = &adapter->hw;
  826. struct net_device *netdev = adapter->netdev;
  827. struct pci_dev *pdev = adapter->pdev;
  828. #ifdef CONFIG_E1000_NAPI
  829. int i;
  830. #endif
  831. /* PCI config space info */
  832. hw->vendor_id = pdev->vendor;
  833. hw->device_id = pdev->device;
  834. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  835. hw->subsystem_id = pdev->subsystem_device;
  836. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  837. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  838. adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
  839. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  840. hw->max_frame_size = netdev->mtu +
  841. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  842. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  843. /* identify the MAC */
  844. if (e1000_set_mac_type(hw)) {
  845. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  846. return -EIO;
  847. }
  848. /* initialize eeprom parameters */
  849. if (e1000_init_eeprom_params(hw)) {
  850. E1000_ERR("EEPROM initialization failed\n");
  851. return -EIO;
  852. }
  853. switch (hw->mac_type) {
  854. default:
  855. break;
  856. case e1000_82541:
  857. case e1000_82547:
  858. case e1000_82541_rev_2:
  859. case e1000_82547_rev_2:
  860. hw->phy_init_script = 1;
  861. break;
  862. }
  863. e1000_set_media_type(hw);
  864. hw->wait_autoneg_complete = FALSE;
  865. hw->tbi_compatibility_en = TRUE;
  866. hw->adaptive_ifs = TRUE;
  867. /* Copper options */
  868. if (hw->media_type == e1000_media_type_copper) {
  869. hw->mdix = AUTO_ALL_MODES;
  870. hw->disable_polarity_correction = FALSE;
  871. hw->master_slave = E1000_MASTER_SLAVE;
  872. }
  873. adapter->num_tx_queues = 1;
  874. adapter->num_rx_queues = 1;
  875. if (e1000_alloc_queues(adapter)) {
  876. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  877. return -ENOMEM;
  878. }
  879. #ifdef CONFIG_E1000_NAPI
  880. for (i = 0; i < adapter->num_rx_queues; i++) {
  881. adapter->polling_netdev[i].priv = adapter;
  882. adapter->polling_netdev[i].poll = &e1000_clean;
  883. adapter->polling_netdev[i].weight = 64;
  884. dev_hold(&adapter->polling_netdev[i]);
  885. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  886. }
  887. spin_lock_init(&adapter->tx_queue_lock);
  888. #endif
  889. atomic_set(&adapter->irq_sem, 1);
  890. spin_lock_init(&adapter->stats_lock);
  891. return 0;
  892. }
  893. /**
  894. * e1000_alloc_queues - Allocate memory for all rings
  895. * @adapter: board private structure to initialize
  896. *
  897. * We allocate one ring per queue at run-time since we don't know the
  898. * number of queues at compile-time. The polling_netdev array is
  899. * intended for Multiqueue, but should work fine with a single queue.
  900. **/
  901. static int __devinit
  902. e1000_alloc_queues(struct e1000_adapter *adapter)
  903. {
  904. int size;
  905. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  906. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  907. if (!adapter->tx_ring)
  908. return -ENOMEM;
  909. memset(adapter->tx_ring, 0, size);
  910. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  911. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  912. if (!adapter->rx_ring) {
  913. kfree(adapter->tx_ring);
  914. return -ENOMEM;
  915. }
  916. memset(adapter->rx_ring, 0, size);
  917. #ifdef CONFIG_E1000_NAPI
  918. size = sizeof(struct net_device) * adapter->num_rx_queues;
  919. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  920. if (!adapter->polling_netdev) {
  921. kfree(adapter->tx_ring);
  922. kfree(adapter->rx_ring);
  923. return -ENOMEM;
  924. }
  925. memset(adapter->polling_netdev, 0, size);
  926. #endif
  927. return E1000_SUCCESS;
  928. }
  929. /**
  930. * e1000_open - Called when a network interface is made active
  931. * @netdev: network interface device structure
  932. *
  933. * Returns 0 on success, negative value on failure
  934. *
  935. * The open entry point is called when a network interface is made
  936. * active by the system (IFF_UP). At this point all resources needed
  937. * for transmit and receive operations are allocated, the interrupt
  938. * handler is registered with the OS, the watchdog timer is started,
  939. * and the stack is notified that the interface is ready.
  940. **/
  941. static int
  942. e1000_open(struct net_device *netdev)
  943. {
  944. struct e1000_adapter *adapter = netdev_priv(netdev);
  945. int err;
  946. /* allocate transmit descriptors */
  947. if ((err = e1000_setup_all_tx_resources(adapter)))
  948. goto err_setup_tx;
  949. /* allocate receive descriptors */
  950. if ((err = e1000_setup_all_rx_resources(adapter)))
  951. goto err_setup_rx;
  952. if ((err = e1000_up(adapter)))
  953. goto err_up;
  954. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  955. if ((adapter->hw.mng_cookie.status &
  956. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  957. e1000_update_mng_vlan(adapter);
  958. }
  959. /* If AMT is enabled, let the firmware know that the network
  960. * interface is now open */
  961. if (adapter->hw.mac_type == e1000_82573 &&
  962. e1000_check_mng_mode(&adapter->hw))
  963. e1000_get_hw_control(adapter);
  964. return E1000_SUCCESS;
  965. err_up:
  966. e1000_free_all_rx_resources(adapter);
  967. err_setup_rx:
  968. e1000_free_all_tx_resources(adapter);
  969. err_setup_tx:
  970. e1000_reset(adapter);
  971. return err;
  972. }
  973. /**
  974. * e1000_close - Disables a network interface
  975. * @netdev: network interface device structure
  976. *
  977. * Returns 0, this is not allowed to fail
  978. *
  979. * The close entry point is called when an interface is de-activated
  980. * by the OS. The hardware is still under the drivers control, but
  981. * needs to be disabled. A global MAC reset is issued to stop the
  982. * hardware, and all transmit and receive resources are freed.
  983. **/
  984. static int
  985. e1000_close(struct net_device *netdev)
  986. {
  987. struct e1000_adapter *adapter = netdev_priv(netdev);
  988. e1000_down(adapter);
  989. e1000_free_all_tx_resources(adapter);
  990. e1000_free_all_rx_resources(adapter);
  991. if ((adapter->hw.mng_cookie.status &
  992. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  993. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  994. }
  995. /* If AMT is enabled, let the firmware know that the network
  996. * interface is now closed */
  997. if (adapter->hw.mac_type == e1000_82573 &&
  998. e1000_check_mng_mode(&adapter->hw))
  999. e1000_release_hw_control(adapter);
  1000. return 0;
  1001. }
  1002. /**
  1003. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1004. * @adapter: address of board private structure
  1005. * @start: address of beginning of memory
  1006. * @len: length of memory
  1007. **/
  1008. static boolean_t
  1009. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1010. void *start, unsigned long len)
  1011. {
  1012. unsigned long begin = (unsigned long) start;
  1013. unsigned long end = begin + len;
  1014. /* First rev 82545 and 82546 need to not allow any memory
  1015. * write location to cross 64k boundary due to errata 23 */
  1016. if (adapter->hw.mac_type == e1000_82545 ||
  1017. adapter->hw.mac_type == e1000_82546) {
  1018. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1019. }
  1020. return TRUE;
  1021. }
  1022. /**
  1023. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1024. * @adapter: board private structure
  1025. * @txdr: tx descriptor ring (for a specific queue) to setup
  1026. *
  1027. * Return 0 on success, negative on failure
  1028. **/
  1029. static int
  1030. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1031. struct e1000_tx_ring *txdr)
  1032. {
  1033. struct pci_dev *pdev = adapter->pdev;
  1034. int size;
  1035. size = sizeof(struct e1000_buffer) * txdr->count;
  1036. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1037. if (!txdr->buffer_info) {
  1038. DPRINTK(PROBE, ERR,
  1039. "Unable to allocate memory for the transmit descriptor ring\n");
  1040. return -ENOMEM;
  1041. }
  1042. memset(txdr->buffer_info, 0, size);
  1043. /* round up to nearest 4K */
  1044. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1045. E1000_ROUNDUP(txdr->size, 4096);
  1046. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1047. if (!txdr->desc) {
  1048. setup_tx_desc_die:
  1049. vfree(txdr->buffer_info);
  1050. DPRINTK(PROBE, ERR,
  1051. "Unable to allocate memory for the transmit descriptor ring\n");
  1052. return -ENOMEM;
  1053. }
  1054. /* Fix for errata 23, can't cross 64kB boundary */
  1055. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1056. void *olddesc = txdr->desc;
  1057. dma_addr_t olddma = txdr->dma;
  1058. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1059. "at %p\n", txdr->size, txdr->desc);
  1060. /* Try again, without freeing the previous */
  1061. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1062. /* Failed allocation, critical failure */
  1063. if (!txdr->desc) {
  1064. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1065. goto setup_tx_desc_die;
  1066. }
  1067. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1068. /* give up */
  1069. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1070. txdr->dma);
  1071. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1072. DPRINTK(PROBE, ERR,
  1073. "Unable to allocate aligned memory "
  1074. "for the transmit descriptor ring\n");
  1075. vfree(txdr->buffer_info);
  1076. return -ENOMEM;
  1077. } else {
  1078. /* Free old allocation, new allocation was successful */
  1079. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1080. }
  1081. }
  1082. memset(txdr->desc, 0, txdr->size);
  1083. txdr->next_to_use = 0;
  1084. txdr->next_to_clean = 0;
  1085. spin_lock_init(&txdr->tx_lock);
  1086. return 0;
  1087. }
  1088. /**
  1089. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1090. * (Descriptors) for all queues
  1091. * @adapter: board private structure
  1092. *
  1093. * If this function returns with an error, then it's possible one or
  1094. * more of the rings is populated (while the rest are not). It is the
  1095. * callers duty to clean those orphaned rings.
  1096. *
  1097. * Return 0 on success, negative on failure
  1098. **/
  1099. int
  1100. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1101. {
  1102. int i, err = 0;
  1103. for (i = 0; i < adapter->num_tx_queues; i++) {
  1104. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1105. if (err) {
  1106. DPRINTK(PROBE, ERR,
  1107. "Allocation for Tx Queue %u failed\n", i);
  1108. break;
  1109. }
  1110. }
  1111. return err;
  1112. }
  1113. /**
  1114. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1115. * @adapter: board private structure
  1116. *
  1117. * Configure the Tx unit of the MAC after a reset.
  1118. **/
  1119. static void
  1120. e1000_configure_tx(struct e1000_adapter *adapter)
  1121. {
  1122. uint64_t tdba;
  1123. struct e1000_hw *hw = &adapter->hw;
  1124. uint32_t tdlen, tctl, tipg, tarc;
  1125. uint32_t ipgr1, ipgr2;
  1126. /* Setup the HW Tx Head and Tail descriptor pointers */
  1127. switch (adapter->num_tx_queues) {
  1128. case 1:
  1129. default:
  1130. tdba = adapter->tx_ring[0].dma;
  1131. tdlen = adapter->tx_ring[0].count *
  1132. sizeof(struct e1000_tx_desc);
  1133. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1134. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1135. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1136. E1000_WRITE_REG(hw, TDH, 0);
  1137. E1000_WRITE_REG(hw, TDT, 0);
  1138. adapter->tx_ring[0].tdh = E1000_TDH;
  1139. adapter->tx_ring[0].tdt = E1000_TDT;
  1140. break;
  1141. }
  1142. /* Set the default values for the Tx Inter Packet Gap timer */
  1143. if (hw->media_type == e1000_media_type_fiber ||
  1144. hw->media_type == e1000_media_type_internal_serdes)
  1145. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1146. else
  1147. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1148. switch (hw->mac_type) {
  1149. case e1000_82542_rev2_0:
  1150. case e1000_82542_rev2_1:
  1151. tipg = DEFAULT_82542_TIPG_IPGT;
  1152. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1153. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1154. break;
  1155. case e1000_80003es2lan:
  1156. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1157. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1158. break;
  1159. default:
  1160. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1161. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1162. break;
  1163. }
  1164. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1165. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1166. E1000_WRITE_REG(hw, TIPG, tipg);
  1167. /* Set the Tx Interrupt Delay register */
  1168. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1169. if (hw->mac_type >= e1000_82540)
  1170. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1171. /* Program the Transmit Control Register */
  1172. tctl = E1000_READ_REG(hw, TCTL);
  1173. tctl &= ~E1000_TCTL_CT;
  1174. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1175. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1176. #ifdef DISABLE_MULR
  1177. /* disable Multiple Reads for debugging */
  1178. tctl &= ~E1000_TCTL_MULR;
  1179. #endif
  1180. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1181. tarc = E1000_READ_REG(hw, TARC0);
  1182. tarc |= ((1 << 25) | (1 << 21));
  1183. E1000_WRITE_REG(hw, TARC0, tarc);
  1184. tarc = E1000_READ_REG(hw, TARC1);
  1185. tarc |= (1 << 25);
  1186. if (tctl & E1000_TCTL_MULR)
  1187. tarc &= ~(1 << 28);
  1188. else
  1189. tarc |= (1 << 28);
  1190. E1000_WRITE_REG(hw, TARC1, tarc);
  1191. } else if (hw->mac_type == e1000_80003es2lan) {
  1192. tarc = E1000_READ_REG(hw, TARC0);
  1193. tarc |= 1;
  1194. if (hw->media_type == e1000_media_type_internal_serdes)
  1195. tarc |= (1 << 20);
  1196. E1000_WRITE_REG(hw, TARC0, tarc);
  1197. tarc = E1000_READ_REG(hw, TARC1);
  1198. tarc |= 1;
  1199. E1000_WRITE_REG(hw, TARC1, tarc);
  1200. }
  1201. e1000_config_collision_dist(hw);
  1202. /* Setup Transmit Descriptor Settings for eop descriptor */
  1203. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1204. E1000_TXD_CMD_IFCS;
  1205. if (hw->mac_type < e1000_82543)
  1206. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1207. else
  1208. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1209. /* Cache if we're 82544 running in PCI-X because we'll
  1210. * need this to apply a workaround later in the send path. */
  1211. if (hw->mac_type == e1000_82544 &&
  1212. hw->bus_type == e1000_bus_type_pcix)
  1213. adapter->pcix_82544 = 1;
  1214. E1000_WRITE_REG(hw, TCTL, tctl);
  1215. }
  1216. /**
  1217. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1218. * @adapter: board private structure
  1219. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1220. *
  1221. * Returns 0 on success, negative on failure
  1222. **/
  1223. static int
  1224. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1225. struct e1000_rx_ring *rxdr)
  1226. {
  1227. struct pci_dev *pdev = adapter->pdev;
  1228. int size, desc_len;
  1229. size = sizeof(struct e1000_buffer) * rxdr->count;
  1230. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1231. if (!rxdr->buffer_info) {
  1232. DPRINTK(PROBE, ERR,
  1233. "Unable to allocate memory for the receive descriptor ring\n");
  1234. return -ENOMEM;
  1235. }
  1236. memset(rxdr->buffer_info, 0, size);
  1237. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1238. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1239. if (!rxdr->ps_page) {
  1240. vfree(rxdr->buffer_info);
  1241. DPRINTK(PROBE, ERR,
  1242. "Unable to allocate memory for the receive descriptor ring\n");
  1243. return -ENOMEM;
  1244. }
  1245. memset(rxdr->ps_page, 0, size);
  1246. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1247. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1248. if (!rxdr->ps_page_dma) {
  1249. vfree(rxdr->buffer_info);
  1250. kfree(rxdr->ps_page);
  1251. DPRINTK(PROBE, ERR,
  1252. "Unable to allocate memory for the receive descriptor ring\n");
  1253. return -ENOMEM;
  1254. }
  1255. memset(rxdr->ps_page_dma, 0, size);
  1256. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1257. desc_len = sizeof(struct e1000_rx_desc);
  1258. else
  1259. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1260. /* Round up to nearest 4K */
  1261. rxdr->size = rxdr->count * desc_len;
  1262. E1000_ROUNDUP(rxdr->size, 4096);
  1263. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1264. if (!rxdr->desc) {
  1265. DPRINTK(PROBE, ERR,
  1266. "Unable to allocate memory for the receive descriptor ring\n");
  1267. setup_rx_desc_die:
  1268. vfree(rxdr->buffer_info);
  1269. kfree(rxdr->ps_page);
  1270. kfree(rxdr->ps_page_dma);
  1271. return -ENOMEM;
  1272. }
  1273. /* Fix for errata 23, can't cross 64kB boundary */
  1274. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1275. void *olddesc = rxdr->desc;
  1276. dma_addr_t olddma = rxdr->dma;
  1277. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1278. "at %p\n", rxdr->size, rxdr->desc);
  1279. /* Try again, without freeing the previous */
  1280. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1281. /* Failed allocation, critical failure */
  1282. if (!rxdr->desc) {
  1283. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1284. DPRINTK(PROBE, ERR,
  1285. "Unable to allocate memory "
  1286. "for the receive descriptor ring\n");
  1287. goto setup_rx_desc_die;
  1288. }
  1289. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1290. /* give up */
  1291. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1292. rxdr->dma);
  1293. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1294. DPRINTK(PROBE, ERR,
  1295. "Unable to allocate aligned memory "
  1296. "for the receive descriptor ring\n");
  1297. goto setup_rx_desc_die;
  1298. } else {
  1299. /* Free old allocation, new allocation was successful */
  1300. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1301. }
  1302. }
  1303. memset(rxdr->desc, 0, rxdr->size);
  1304. rxdr->next_to_clean = 0;
  1305. rxdr->next_to_use = 0;
  1306. return 0;
  1307. }
  1308. /**
  1309. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1310. * (Descriptors) for all queues
  1311. * @adapter: board private structure
  1312. *
  1313. * If this function returns with an error, then it's possible one or
  1314. * more of the rings is populated (while the rest are not). It is the
  1315. * callers duty to clean those orphaned rings.
  1316. *
  1317. * Return 0 on success, negative on failure
  1318. **/
  1319. int
  1320. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1321. {
  1322. int i, err = 0;
  1323. for (i = 0; i < adapter->num_rx_queues; i++) {
  1324. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1325. if (err) {
  1326. DPRINTK(PROBE, ERR,
  1327. "Allocation for Rx Queue %u failed\n", i);
  1328. break;
  1329. }
  1330. }
  1331. return err;
  1332. }
  1333. /**
  1334. * e1000_setup_rctl - configure the receive control registers
  1335. * @adapter: Board private structure
  1336. **/
  1337. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1338. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1339. static void
  1340. e1000_setup_rctl(struct e1000_adapter *adapter)
  1341. {
  1342. uint32_t rctl, rfctl;
  1343. uint32_t psrctl = 0;
  1344. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1345. uint32_t pages = 0;
  1346. #endif
  1347. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1348. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1349. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1350. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1351. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1352. if (adapter->hw.mac_type > e1000_82543)
  1353. rctl |= E1000_RCTL_SECRC;
  1354. if (adapter->hw.tbi_compatibility_on == 1)
  1355. rctl |= E1000_RCTL_SBP;
  1356. else
  1357. rctl &= ~E1000_RCTL_SBP;
  1358. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1359. rctl &= ~E1000_RCTL_LPE;
  1360. else
  1361. rctl |= E1000_RCTL_LPE;
  1362. /* Setup buffer sizes */
  1363. rctl &= ~E1000_RCTL_SZ_4096;
  1364. rctl |= E1000_RCTL_BSEX;
  1365. switch (adapter->rx_buffer_len) {
  1366. case E1000_RXBUFFER_256:
  1367. rctl |= E1000_RCTL_SZ_256;
  1368. rctl &= ~E1000_RCTL_BSEX;
  1369. break;
  1370. case E1000_RXBUFFER_512:
  1371. rctl |= E1000_RCTL_SZ_512;
  1372. rctl &= ~E1000_RCTL_BSEX;
  1373. break;
  1374. case E1000_RXBUFFER_1024:
  1375. rctl |= E1000_RCTL_SZ_1024;
  1376. rctl &= ~E1000_RCTL_BSEX;
  1377. break;
  1378. case E1000_RXBUFFER_2048:
  1379. default:
  1380. rctl |= E1000_RCTL_SZ_2048;
  1381. rctl &= ~E1000_RCTL_BSEX;
  1382. break;
  1383. case E1000_RXBUFFER_4096:
  1384. rctl |= E1000_RCTL_SZ_4096;
  1385. break;
  1386. case E1000_RXBUFFER_8192:
  1387. rctl |= E1000_RCTL_SZ_8192;
  1388. break;
  1389. case E1000_RXBUFFER_16384:
  1390. rctl |= E1000_RCTL_SZ_16384;
  1391. break;
  1392. }
  1393. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1394. /* 82571 and greater support packet-split where the protocol
  1395. * header is placed in skb->data and the packet data is
  1396. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1397. * In the case of a non-split, skb->data is linearly filled,
  1398. * followed by the page buffers. Therefore, skb->data is
  1399. * sized to hold the largest protocol header.
  1400. */
  1401. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1402. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1403. PAGE_SIZE <= 16384)
  1404. adapter->rx_ps_pages = pages;
  1405. else
  1406. adapter->rx_ps_pages = 0;
  1407. #endif
  1408. if (adapter->rx_ps_pages) {
  1409. /* Configure extra packet-split registers */
  1410. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1411. rfctl |= E1000_RFCTL_EXTEN;
  1412. /* disable IPv6 packet split support */
  1413. rfctl |= E1000_RFCTL_IPV6_DIS;
  1414. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1415. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1416. psrctl |= adapter->rx_ps_bsize0 >>
  1417. E1000_PSRCTL_BSIZE0_SHIFT;
  1418. switch (adapter->rx_ps_pages) {
  1419. case 3:
  1420. psrctl |= PAGE_SIZE <<
  1421. E1000_PSRCTL_BSIZE3_SHIFT;
  1422. case 2:
  1423. psrctl |= PAGE_SIZE <<
  1424. E1000_PSRCTL_BSIZE2_SHIFT;
  1425. case 1:
  1426. psrctl |= PAGE_SIZE >>
  1427. E1000_PSRCTL_BSIZE1_SHIFT;
  1428. break;
  1429. }
  1430. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1431. }
  1432. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1433. }
  1434. /**
  1435. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1436. * @adapter: board private structure
  1437. *
  1438. * Configure the Rx unit of the MAC after a reset.
  1439. **/
  1440. static void
  1441. e1000_configure_rx(struct e1000_adapter *adapter)
  1442. {
  1443. uint64_t rdba;
  1444. struct e1000_hw *hw = &adapter->hw;
  1445. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1446. if (adapter->rx_ps_pages) {
  1447. /* this is a 32 byte descriptor */
  1448. rdlen = adapter->rx_ring[0].count *
  1449. sizeof(union e1000_rx_desc_packet_split);
  1450. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1451. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1452. } else {
  1453. rdlen = adapter->rx_ring[0].count *
  1454. sizeof(struct e1000_rx_desc);
  1455. adapter->clean_rx = e1000_clean_rx_irq;
  1456. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1457. }
  1458. /* disable receives while setting up the descriptors */
  1459. rctl = E1000_READ_REG(hw, RCTL);
  1460. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1461. /* set the Receive Delay Timer Register */
  1462. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1463. if (hw->mac_type >= e1000_82540) {
  1464. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1465. if (adapter->itr > 1)
  1466. E1000_WRITE_REG(hw, ITR,
  1467. 1000000000 / (adapter->itr * 256));
  1468. }
  1469. if (hw->mac_type >= e1000_82571) {
  1470. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1471. /* Reset delay timers after every interrupt */
  1472. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1473. #ifdef CONFIG_E1000_NAPI
  1474. /* Auto-Mask interrupts upon ICR read. */
  1475. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1476. #endif
  1477. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1478. E1000_WRITE_REG(hw, IAM, ~0);
  1479. E1000_WRITE_FLUSH(hw);
  1480. }
  1481. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1482. * the Base and Length of the Rx Descriptor Ring */
  1483. switch (adapter->num_rx_queues) {
  1484. case 1:
  1485. default:
  1486. rdba = adapter->rx_ring[0].dma;
  1487. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1488. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1489. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1490. E1000_WRITE_REG(hw, RDH, 0);
  1491. E1000_WRITE_REG(hw, RDT, 0);
  1492. adapter->rx_ring[0].rdh = E1000_RDH;
  1493. adapter->rx_ring[0].rdt = E1000_RDT;
  1494. break;
  1495. }
  1496. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1497. if (hw->mac_type >= e1000_82543) {
  1498. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1499. if (adapter->rx_csum == TRUE) {
  1500. rxcsum |= E1000_RXCSUM_TUOFL;
  1501. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1502. * Must be used in conjunction with packet-split. */
  1503. if ((hw->mac_type >= e1000_82571) &&
  1504. (adapter->rx_ps_pages)) {
  1505. rxcsum |= E1000_RXCSUM_IPPCSE;
  1506. }
  1507. } else {
  1508. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1509. /* don't need to clear IPPCSE as it defaults to 0 */
  1510. }
  1511. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1512. }
  1513. if (hw->mac_type == e1000_82573)
  1514. E1000_WRITE_REG(hw, ERT, 0x0100);
  1515. /* Enable Receives */
  1516. E1000_WRITE_REG(hw, RCTL, rctl);
  1517. }
  1518. /**
  1519. * e1000_free_tx_resources - Free Tx Resources per Queue
  1520. * @adapter: board private structure
  1521. * @tx_ring: Tx descriptor ring for a specific queue
  1522. *
  1523. * Free all transmit software resources
  1524. **/
  1525. static void
  1526. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1527. struct e1000_tx_ring *tx_ring)
  1528. {
  1529. struct pci_dev *pdev = adapter->pdev;
  1530. e1000_clean_tx_ring(adapter, tx_ring);
  1531. vfree(tx_ring->buffer_info);
  1532. tx_ring->buffer_info = NULL;
  1533. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1534. tx_ring->desc = NULL;
  1535. }
  1536. /**
  1537. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1538. * @adapter: board private structure
  1539. *
  1540. * Free all transmit software resources
  1541. **/
  1542. void
  1543. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1544. {
  1545. int i;
  1546. for (i = 0; i < adapter->num_tx_queues; i++)
  1547. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1548. }
  1549. static void
  1550. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1551. struct e1000_buffer *buffer_info)
  1552. {
  1553. if (buffer_info->dma) {
  1554. pci_unmap_page(adapter->pdev,
  1555. buffer_info->dma,
  1556. buffer_info->length,
  1557. PCI_DMA_TODEVICE);
  1558. }
  1559. if (buffer_info->skb)
  1560. dev_kfree_skb_any(buffer_info->skb);
  1561. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1562. }
  1563. /**
  1564. * e1000_clean_tx_ring - Free Tx Buffers
  1565. * @adapter: board private structure
  1566. * @tx_ring: ring to be cleaned
  1567. **/
  1568. static void
  1569. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1570. struct e1000_tx_ring *tx_ring)
  1571. {
  1572. struct e1000_buffer *buffer_info;
  1573. unsigned long size;
  1574. unsigned int i;
  1575. /* Free all the Tx ring sk_buffs */
  1576. for (i = 0; i < tx_ring->count; i++) {
  1577. buffer_info = &tx_ring->buffer_info[i];
  1578. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1579. }
  1580. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1581. memset(tx_ring->buffer_info, 0, size);
  1582. /* Zero out the descriptor ring */
  1583. memset(tx_ring->desc, 0, tx_ring->size);
  1584. tx_ring->next_to_use = 0;
  1585. tx_ring->next_to_clean = 0;
  1586. tx_ring->last_tx_tso = 0;
  1587. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1588. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1589. }
  1590. /**
  1591. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1592. * @adapter: board private structure
  1593. **/
  1594. static void
  1595. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1596. {
  1597. int i;
  1598. for (i = 0; i < adapter->num_tx_queues; i++)
  1599. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1600. }
  1601. /**
  1602. * e1000_free_rx_resources - Free Rx Resources
  1603. * @adapter: board private structure
  1604. * @rx_ring: ring to clean the resources from
  1605. *
  1606. * Free all receive software resources
  1607. **/
  1608. static void
  1609. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1610. struct e1000_rx_ring *rx_ring)
  1611. {
  1612. struct pci_dev *pdev = adapter->pdev;
  1613. e1000_clean_rx_ring(adapter, rx_ring);
  1614. vfree(rx_ring->buffer_info);
  1615. rx_ring->buffer_info = NULL;
  1616. kfree(rx_ring->ps_page);
  1617. rx_ring->ps_page = NULL;
  1618. kfree(rx_ring->ps_page_dma);
  1619. rx_ring->ps_page_dma = NULL;
  1620. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1621. rx_ring->desc = NULL;
  1622. }
  1623. /**
  1624. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1625. * @adapter: board private structure
  1626. *
  1627. * Free all receive software resources
  1628. **/
  1629. void
  1630. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1631. {
  1632. int i;
  1633. for (i = 0; i < adapter->num_rx_queues; i++)
  1634. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1635. }
  1636. /**
  1637. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1638. * @adapter: board private structure
  1639. * @rx_ring: ring to free buffers from
  1640. **/
  1641. static void
  1642. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1643. struct e1000_rx_ring *rx_ring)
  1644. {
  1645. struct e1000_buffer *buffer_info;
  1646. struct e1000_ps_page *ps_page;
  1647. struct e1000_ps_page_dma *ps_page_dma;
  1648. struct pci_dev *pdev = adapter->pdev;
  1649. unsigned long size;
  1650. unsigned int i, j;
  1651. /* Free all the Rx ring sk_buffs */
  1652. for (i = 0; i < rx_ring->count; i++) {
  1653. buffer_info = &rx_ring->buffer_info[i];
  1654. if (buffer_info->skb) {
  1655. pci_unmap_single(pdev,
  1656. buffer_info->dma,
  1657. buffer_info->length,
  1658. PCI_DMA_FROMDEVICE);
  1659. dev_kfree_skb(buffer_info->skb);
  1660. buffer_info->skb = NULL;
  1661. }
  1662. ps_page = &rx_ring->ps_page[i];
  1663. ps_page_dma = &rx_ring->ps_page_dma[i];
  1664. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1665. if (!ps_page->ps_page[j]) break;
  1666. pci_unmap_page(pdev,
  1667. ps_page_dma->ps_page_dma[j],
  1668. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1669. ps_page_dma->ps_page_dma[j] = 0;
  1670. put_page(ps_page->ps_page[j]);
  1671. ps_page->ps_page[j] = NULL;
  1672. }
  1673. }
  1674. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1675. memset(rx_ring->buffer_info, 0, size);
  1676. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1677. memset(rx_ring->ps_page, 0, size);
  1678. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1679. memset(rx_ring->ps_page_dma, 0, size);
  1680. /* Zero out the descriptor ring */
  1681. memset(rx_ring->desc, 0, rx_ring->size);
  1682. rx_ring->next_to_clean = 0;
  1683. rx_ring->next_to_use = 0;
  1684. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1685. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1686. }
  1687. /**
  1688. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1689. * @adapter: board private structure
  1690. **/
  1691. static void
  1692. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1693. {
  1694. int i;
  1695. for (i = 0; i < adapter->num_rx_queues; i++)
  1696. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1697. }
  1698. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1699. * and memory write and invalidate disabled for certain operations
  1700. */
  1701. static void
  1702. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1703. {
  1704. struct net_device *netdev = adapter->netdev;
  1705. uint32_t rctl;
  1706. e1000_pci_clear_mwi(&adapter->hw);
  1707. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1708. rctl |= E1000_RCTL_RST;
  1709. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1710. E1000_WRITE_FLUSH(&adapter->hw);
  1711. mdelay(5);
  1712. if (netif_running(netdev))
  1713. e1000_clean_all_rx_rings(adapter);
  1714. }
  1715. static void
  1716. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1717. {
  1718. struct net_device *netdev = adapter->netdev;
  1719. uint32_t rctl;
  1720. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1721. rctl &= ~E1000_RCTL_RST;
  1722. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1723. E1000_WRITE_FLUSH(&adapter->hw);
  1724. mdelay(5);
  1725. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1726. e1000_pci_set_mwi(&adapter->hw);
  1727. if (netif_running(netdev)) {
  1728. /* No need to loop, because 82542 supports only 1 queue */
  1729. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1730. e1000_configure_rx(adapter);
  1731. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1732. }
  1733. }
  1734. /**
  1735. * e1000_set_mac - Change the Ethernet Address of the NIC
  1736. * @netdev: network interface device structure
  1737. * @p: pointer to an address structure
  1738. *
  1739. * Returns 0 on success, negative on failure
  1740. **/
  1741. static int
  1742. e1000_set_mac(struct net_device *netdev, void *p)
  1743. {
  1744. struct e1000_adapter *adapter = netdev_priv(netdev);
  1745. struct sockaddr *addr = p;
  1746. if (!is_valid_ether_addr(addr->sa_data))
  1747. return -EADDRNOTAVAIL;
  1748. /* 82542 2.0 needs to be in reset to write receive address registers */
  1749. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1750. e1000_enter_82542_rst(adapter);
  1751. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1752. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1753. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1754. /* With 82571 controllers, LAA may be overwritten (with the default)
  1755. * due to controller reset from the other port. */
  1756. if (adapter->hw.mac_type == e1000_82571) {
  1757. /* activate the work around */
  1758. adapter->hw.laa_is_present = 1;
  1759. /* Hold a copy of the LAA in RAR[14] This is done so that
  1760. * between the time RAR[0] gets clobbered and the time it
  1761. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1762. * of the RARs and no incoming packets directed to this port
  1763. * are dropped. Eventaully the LAA will be in RAR[0] and
  1764. * RAR[14] */
  1765. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1766. E1000_RAR_ENTRIES - 1);
  1767. }
  1768. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1769. e1000_leave_82542_rst(adapter);
  1770. return 0;
  1771. }
  1772. /**
  1773. * e1000_set_multi - Multicast and Promiscuous mode set
  1774. * @netdev: network interface device structure
  1775. *
  1776. * The set_multi entry point is called whenever the multicast address
  1777. * list or the network interface flags are updated. This routine is
  1778. * responsible for configuring the hardware for proper multicast,
  1779. * promiscuous mode, and all-multi behavior.
  1780. **/
  1781. static void
  1782. e1000_set_multi(struct net_device *netdev)
  1783. {
  1784. struct e1000_adapter *adapter = netdev_priv(netdev);
  1785. struct e1000_hw *hw = &adapter->hw;
  1786. struct dev_mc_list *mc_ptr;
  1787. uint32_t rctl;
  1788. uint32_t hash_value;
  1789. int i, rar_entries = E1000_RAR_ENTRIES;
  1790. /* reserve RAR[14] for LAA over-write work-around */
  1791. if (adapter->hw.mac_type == e1000_82571)
  1792. rar_entries--;
  1793. /* Check for Promiscuous and All Multicast modes */
  1794. rctl = E1000_READ_REG(hw, RCTL);
  1795. if (netdev->flags & IFF_PROMISC) {
  1796. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1797. } else if (netdev->flags & IFF_ALLMULTI) {
  1798. rctl |= E1000_RCTL_MPE;
  1799. rctl &= ~E1000_RCTL_UPE;
  1800. } else {
  1801. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1802. }
  1803. E1000_WRITE_REG(hw, RCTL, rctl);
  1804. /* 82542 2.0 needs to be in reset to write receive address registers */
  1805. if (hw->mac_type == e1000_82542_rev2_0)
  1806. e1000_enter_82542_rst(adapter);
  1807. /* load the first 14 multicast address into the exact filters 1-14
  1808. * RAR 0 is used for the station MAC adddress
  1809. * if there are not 14 addresses, go ahead and clear the filters
  1810. * -- with 82571 controllers only 0-13 entries are filled here
  1811. */
  1812. mc_ptr = netdev->mc_list;
  1813. for (i = 1; i < rar_entries; i++) {
  1814. if (mc_ptr) {
  1815. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1816. mc_ptr = mc_ptr->next;
  1817. } else {
  1818. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1819. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1820. }
  1821. }
  1822. /* clear the old settings from the multicast hash table */
  1823. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1824. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1825. /* load any remaining addresses into the hash table */
  1826. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1827. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1828. e1000_mta_set(hw, hash_value);
  1829. }
  1830. if (hw->mac_type == e1000_82542_rev2_0)
  1831. e1000_leave_82542_rst(adapter);
  1832. }
  1833. /* Need to wait a few seconds after link up to get diagnostic information from
  1834. * the phy */
  1835. static void
  1836. e1000_update_phy_info(unsigned long data)
  1837. {
  1838. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1839. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1840. }
  1841. /**
  1842. * e1000_82547_tx_fifo_stall - Timer Call-back
  1843. * @data: pointer to adapter cast into an unsigned long
  1844. **/
  1845. static void
  1846. e1000_82547_tx_fifo_stall(unsigned long data)
  1847. {
  1848. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1849. struct net_device *netdev = adapter->netdev;
  1850. uint32_t tctl;
  1851. if (atomic_read(&adapter->tx_fifo_stall)) {
  1852. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1853. E1000_READ_REG(&adapter->hw, TDH)) &&
  1854. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1855. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1856. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1857. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1858. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1859. E1000_WRITE_REG(&adapter->hw, TCTL,
  1860. tctl & ~E1000_TCTL_EN);
  1861. E1000_WRITE_REG(&adapter->hw, TDFT,
  1862. adapter->tx_head_addr);
  1863. E1000_WRITE_REG(&adapter->hw, TDFH,
  1864. adapter->tx_head_addr);
  1865. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1866. adapter->tx_head_addr);
  1867. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1868. adapter->tx_head_addr);
  1869. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1870. E1000_WRITE_FLUSH(&adapter->hw);
  1871. adapter->tx_fifo_head = 0;
  1872. atomic_set(&adapter->tx_fifo_stall, 0);
  1873. netif_wake_queue(netdev);
  1874. } else {
  1875. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1876. }
  1877. }
  1878. }
  1879. /**
  1880. * e1000_watchdog - Timer Call-back
  1881. * @data: pointer to adapter cast into an unsigned long
  1882. **/
  1883. static void
  1884. e1000_watchdog(unsigned long data)
  1885. {
  1886. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1887. /* Do the rest outside of interrupt context */
  1888. schedule_work(&adapter->watchdog_task);
  1889. }
  1890. static void
  1891. e1000_watchdog_task(struct e1000_adapter *adapter)
  1892. {
  1893. struct net_device *netdev = adapter->netdev;
  1894. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1895. uint32_t link, tctl;
  1896. e1000_check_for_link(&adapter->hw);
  1897. if (adapter->hw.mac_type == e1000_82573) {
  1898. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1899. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1900. e1000_update_mng_vlan(adapter);
  1901. }
  1902. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1903. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1904. link = !adapter->hw.serdes_link_down;
  1905. else
  1906. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1907. if (link) {
  1908. if (!netif_carrier_ok(netdev)) {
  1909. boolean_t txb2b = 1;
  1910. e1000_get_speed_and_duplex(&adapter->hw,
  1911. &adapter->link_speed,
  1912. &adapter->link_duplex);
  1913. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1914. adapter->link_speed,
  1915. adapter->link_duplex == FULL_DUPLEX ?
  1916. "Full Duplex" : "Half Duplex");
  1917. /* tweak tx_queue_len according to speed/duplex
  1918. * and adjust the timeout factor */
  1919. netdev->tx_queue_len = adapter->tx_queue_len;
  1920. adapter->tx_timeout_factor = 1;
  1921. switch (adapter->link_speed) {
  1922. case SPEED_10:
  1923. txb2b = 0;
  1924. netdev->tx_queue_len = 10;
  1925. adapter->tx_timeout_factor = 8;
  1926. break;
  1927. case SPEED_100:
  1928. txb2b = 0;
  1929. netdev->tx_queue_len = 100;
  1930. /* maybe add some timeout factor ? */
  1931. break;
  1932. }
  1933. if ((adapter->hw.mac_type == e1000_82571 ||
  1934. adapter->hw.mac_type == e1000_82572) &&
  1935. txb2b == 0) {
  1936. #define SPEED_MODE_BIT (1 << 21)
  1937. uint32_t tarc0;
  1938. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1939. tarc0 &= ~SPEED_MODE_BIT;
  1940. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1941. }
  1942. #ifdef NETIF_F_TSO
  1943. /* disable TSO for pcie and 10/100 speeds, to avoid
  1944. * some hardware issues */
  1945. if (!adapter->tso_force &&
  1946. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1947. switch (adapter->link_speed) {
  1948. case SPEED_10:
  1949. case SPEED_100:
  1950. DPRINTK(PROBE,INFO,
  1951. "10/100 speed: disabling TSO\n");
  1952. netdev->features &= ~NETIF_F_TSO;
  1953. break;
  1954. case SPEED_1000:
  1955. netdev->features |= NETIF_F_TSO;
  1956. break;
  1957. default:
  1958. /* oops */
  1959. break;
  1960. }
  1961. }
  1962. #endif
  1963. /* enable transmits in the hardware, need to do this
  1964. * after setting TARC0 */
  1965. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1966. tctl |= E1000_TCTL_EN;
  1967. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1968. netif_carrier_on(netdev);
  1969. netif_wake_queue(netdev);
  1970. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1971. adapter->smartspeed = 0;
  1972. }
  1973. } else {
  1974. if (netif_carrier_ok(netdev)) {
  1975. adapter->link_speed = 0;
  1976. adapter->link_duplex = 0;
  1977. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1978. netif_carrier_off(netdev);
  1979. netif_stop_queue(netdev);
  1980. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1981. /* 80003ES2LAN workaround--
  1982. * For packet buffer work-around on link down event;
  1983. * disable receives in the ISR and
  1984. * reset device here in the watchdog
  1985. */
  1986. if (adapter->hw.mac_type == e1000_80003es2lan) {
  1987. /* reset device */
  1988. schedule_work(&adapter->reset_task);
  1989. }
  1990. }
  1991. e1000_smartspeed(adapter);
  1992. }
  1993. e1000_update_stats(adapter);
  1994. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1995. adapter->tpt_old = adapter->stats.tpt;
  1996. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1997. adapter->colc_old = adapter->stats.colc;
  1998. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1999. adapter->gorcl_old = adapter->stats.gorcl;
  2000. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2001. adapter->gotcl_old = adapter->stats.gotcl;
  2002. e1000_update_adaptive(&adapter->hw);
  2003. if (!netif_carrier_ok(netdev)) {
  2004. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2005. /* We've lost link, so the controller stops DMA,
  2006. * but we've got queued Tx work that's never going
  2007. * to get done, so reset controller to flush Tx.
  2008. * (Do the reset outside of interrupt context). */
  2009. adapter->tx_timeout_count++;
  2010. schedule_work(&adapter->reset_task);
  2011. }
  2012. }
  2013. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2014. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2015. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2016. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2017. * else is between 2000-8000. */
  2018. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2019. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2020. adapter->gotcl - adapter->gorcl :
  2021. adapter->gorcl - adapter->gotcl) / 10000;
  2022. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2023. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2024. }
  2025. /* Cause software interrupt to ensure rx ring is cleaned */
  2026. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2027. /* Force detection of hung controller every watchdog period */
  2028. adapter->detect_tx_hung = TRUE;
  2029. /* With 82571 controllers, LAA may be overwritten due to controller
  2030. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2031. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2032. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2033. /* Reset the timer */
  2034. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2035. }
  2036. #define E1000_TX_FLAGS_CSUM 0x00000001
  2037. #define E1000_TX_FLAGS_VLAN 0x00000002
  2038. #define E1000_TX_FLAGS_TSO 0x00000004
  2039. #define E1000_TX_FLAGS_IPV4 0x00000008
  2040. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2041. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2042. static int
  2043. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2044. struct sk_buff *skb)
  2045. {
  2046. #ifdef NETIF_F_TSO
  2047. struct e1000_context_desc *context_desc;
  2048. struct e1000_buffer *buffer_info;
  2049. unsigned int i;
  2050. uint32_t cmd_length = 0;
  2051. uint16_t ipcse = 0, tucse, mss;
  2052. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2053. int err;
  2054. if (skb_shinfo(skb)->tso_size) {
  2055. if (skb_header_cloned(skb)) {
  2056. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2057. if (err)
  2058. return err;
  2059. }
  2060. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2061. mss = skb_shinfo(skb)->tso_size;
  2062. if (skb->protocol == ntohs(ETH_P_IP)) {
  2063. skb->nh.iph->tot_len = 0;
  2064. skb->nh.iph->check = 0;
  2065. skb->h.th->check =
  2066. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2067. skb->nh.iph->daddr,
  2068. 0,
  2069. IPPROTO_TCP,
  2070. 0);
  2071. cmd_length = E1000_TXD_CMD_IP;
  2072. ipcse = skb->h.raw - skb->data - 1;
  2073. #ifdef NETIF_F_TSO_IPV6
  2074. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2075. skb->nh.ipv6h->payload_len = 0;
  2076. skb->h.th->check =
  2077. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2078. &skb->nh.ipv6h->daddr,
  2079. 0,
  2080. IPPROTO_TCP,
  2081. 0);
  2082. ipcse = 0;
  2083. #endif
  2084. }
  2085. ipcss = skb->nh.raw - skb->data;
  2086. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2087. tucss = skb->h.raw - skb->data;
  2088. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2089. tucse = 0;
  2090. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2091. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2092. i = tx_ring->next_to_use;
  2093. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2094. buffer_info = &tx_ring->buffer_info[i];
  2095. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2096. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2097. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2098. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2099. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2100. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2101. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2102. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2103. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2104. buffer_info->time_stamp = jiffies;
  2105. if (++i == tx_ring->count) i = 0;
  2106. tx_ring->next_to_use = i;
  2107. return TRUE;
  2108. }
  2109. #endif
  2110. return FALSE;
  2111. }
  2112. static boolean_t
  2113. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2114. struct sk_buff *skb)
  2115. {
  2116. struct e1000_context_desc *context_desc;
  2117. struct e1000_buffer *buffer_info;
  2118. unsigned int i;
  2119. uint8_t css;
  2120. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2121. css = skb->h.raw - skb->data;
  2122. i = tx_ring->next_to_use;
  2123. buffer_info = &tx_ring->buffer_info[i];
  2124. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2125. context_desc->upper_setup.tcp_fields.tucss = css;
  2126. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2127. context_desc->upper_setup.tcp_fields.tucse = 0;
  2128. context_desc->tcp_seg_setup.data = 0;
  2129. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2130. buffer_info->time_stamp = jiffies;
  2131. if (unlikely(++i == tx_ring->count)) i = 0;
  2132. tx_ring->next_to_use = i;
  2133. return TRUE;
  2134. }
  2135. return FALSE;
  2136. }
  2137. #define E1000_MAX_TXD_PWR 12
  2138. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2139. static int
  2140. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2141. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2142. unsigned int nr_frags, unsigned int mss)
  2143. {
  2144. struct e1000_buffer *buffer_info;
  2145. unsigned int len = skb->len;
  2146. unsigned int offset = 0, size, count = 0, i;
  2147. unsigned int f;
  2148. len -= skb->data_len;
  2149. i = tx_ring->next_to_use;
  2150. while (len) {
  2151. buffer_info = &tx_ring->buffer_info[i];
  2152. size = min(len, max_per_txd);
  2153. #ifdef NETIF_F_TSO
  2154. /* Workaround for Controller erratum --
  2155. * descriptor for non-tso packet in a linear SKB that follows a
  2156. * tso gets written back prematurely before the data is fully
  2157. * DMA'd to the controller */
  2158. if (!skb->data_len && tx_ring->last_tx_tso &&
  2159. !skb_shinfo(skb)->tso_size) {
  2160. tx_ring->last_tx_tso = 0;
  2161. size -= 4;
  2162. }
  2163. /* Workaround for premature desc write-backs
  2164. * in TSO mode. Append 4-byte sentinel desc */
  2165. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2166. size -= 4;
  2167. #endif
  2168. /* work-around for errata 10 and it applies
  2169. * to all controllers in PCI-X mode
  2170. * The fix is to make sure that the first descriptor of a
  2171. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2172. */
  2173. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2174. (size > 2015) && count == 0))
  2175. size = 2015;
  2176. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2177. * terminating buffers within evenly-aligned dwords. */
  2178. if (unlikely(adapter->pcix_82544 &&
  2179. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2180. size > 4))
  2181. size -= 4;
  2182. buffer_info->length = size;
  2183. buffer_info->dma =
  2184. pci_map_single(adapter->pdev,
  2185. skb->data + offset,
  2186. size,
  2187. PCI_DMA_TODEVICE);
  2188. buffer_info->time_stamp = jiffies;
  2189. len -= size;
  2190. offset += size;
  2191. count++;
  2192. if (unlikely(++i == tx_ring->count)) i = 0;
  2193. }
  2194. for (f = 0; f < nr_frags; f++) {
  2195. struct skb_frag_struct *frag;
  2196. frag = &skb_shinfo(skb)->frags[f];
  2197. len = frag->size;
  2198. offset = frag->page_offset;
  2199. while (len) {
  2200. buffer_info = &tx_ring->buffer_info[i];
  2201. size = min(len, max_per_txd);
  2202. #ifdef NETIF_F_TSO
  2203. /* Workaround for premature desc write-backs
  2204. * in TSO mode. Append 4-byte sentinel desc */
  2205. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2206. size -= 4;
  2207. #endif
  2208. /* Workaround for potential 82544 hang in PCI-X.
  2209. * Avoid terminating buffers within evenly-aligned
  2210. * dwords. */
  2211. if (unlikely(adapter->pcix_82544 &&
  2212. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2213. size > 4))
  2214. size -= 4;
  2215. buffer_info->length = size;
  2216. buffer_info->dma =
  2217. pci_map_page(adapter->pdev,
  2218. frag->page,
  2219. offset,
  2220. size,
  2221. PCI_DMA_TODEVICE);
  2222. buffer_info->time_stamp = jiffies;
  2223. len -= size;
  2224. offset += size;
  2225. count++;
  2226. if (unlikely(++i == tx_ring->count)) i = 0;
  2227. }
  2228. }
  2229. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2230. tx_ring->buffer_info[i].skb = skb;
  2231. tx_ring->buffer_info[first].next_to_watch = i;
  2232. return count;
  2233. }
  2234. static void
  2235. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2236. int tx_flags, int count)
  2237. {
  2238. struct e1000_tx_desc *tx_desc = NULL;
  2239. struct e1000_buffer *buffer_info;
  2240. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2241. unsigned int i;
  2242. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2243. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2244. E1000_TXD_CMD_TSE;
  2245. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2246. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2247. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2248. }
  2249. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2250. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2251. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2252. }
  2253. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2254. txd_lower |= E1000_TXD_CMD_VLE;
  2255. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2256. }
  2257. i = tx_ring->next_to_use;
  2258. while (count--) {
  2259. buffer_info = &tx_ring->buffer_info[i];
  2260. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2261. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2262. tx_desc->lower.data =
  2263. cpu_to_le32(txd_lower | buffer_info->length);
  2264. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2265. if (unlikely(++i == tx_ring->count)) i = 0;
  2266. }
  2267. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2268. /* Force memory writes to complete before letting h/w
  2269. * know there are new descriptors to fetch. (Only
  2270. * applicable for weak-ordered memory model archs,
  2271. * such as IA-64). */
  2272. wmb();
  2273. tx_ring->next_to_use = i;
  2274. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2275. }
  2276. /**
  2277. * 82547 workaround to avoid controller hang in half-duplex environment.
  2278. * The workaround is to avoid queuing a large packet that would span
  2279. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2280. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2281. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2282. * to the beginning of the Tx FIFO.
  2283. **/
  2284. #define E1000_FIFO_HDR 0x10
  2285. #define E1000_82547_PAD_LEN 0x3E0
  2286. static int
  2287. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2288. {
  2289. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2290. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2291. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2292. if (adapter->link_duplex != HALF_DUPLEX)
  2293. goto no_fifo_stall_required;
  2294. if (atomic_read(&adapter->tx_fifo_stall))
  2295. return 1;
  2296. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2297. atomic_set(&adapter->tx_fifo_stall, 1);
  2298. return 1;
  2299. }
  2300. no_fifo_stall_required:
  2301. adapter->tx_fifo_head += skb_fifo_len;
  2302. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2303. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2304. return 0;
  2305. }
  2306. #define MINIMUM_DHCP_PACKET_SIZE 282
  2307. static int
  2308. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2309. {
  2310. struct e1000_hw *hw = &adapter->hw;
  2311. uint16_t length, offset;
  2312. if (vlan_tx_tag_present(skb)) {
  2313. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2314. ( adapter->hw.mng_cookie.status &
  2315. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2316. return 0;
  2317. }
  2318. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2319. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2320. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2321. const struct iphdr *ip =
  2322. (struct iphdr *)((uint8_t *)skb->data+14);
  2323. if (IPPROTO_UDP == ip->protocol) {
  2324. struct udphdr *udp =
  2325. (struct udphdr *)((uint8_t *)ip +
  2326. (ip->ihl << 2));
  2327. if (ntohs(udp->dest) == 67) {
  2328. offset = (uint8_t *)udp + 8 - skb->data;
  2329. length = skb->len - offset;
  2330. return e1000_mng_write_dhcp_info(hw,
  2331. (uint8_t *)udp + 8,
  2332. length);
  2333. }
  2334. }
  2335. }
  2336. }
  2337. return 0;
  2338. }
  2339. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2340. static int
  2341. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2342. {
  2343. struct e1000_adapter *adapter = netdev_priv(netdev);
  2344. struct e1000_tx_ring *tx_ring;
  2345. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2346. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2347. unsigned int tx_flags = 0;
  2348. unsigned int len = skb->len;
  2349. unsigned long flags;
  2350. unsigned int nr_frags = 0;
  2351. unsigned int mss = 0;
  2352. int count = 0;
  2353. int tso;
  2354. unsigned int f;
  2355. len -= skb->data_len;
  2356. tx_ring = adapter->tx_ring;
  2357. if (unlikely(skb->len <= 0)) {
  2358. dev_kfree_skb_any(skb);
  2359. return NETDEV_TX_OK;
  2360. }
  2361. #ifdef NETIF_F_TSO
  2362. mss = skb_shinfo(skb)->tso_size;
  2363. /* The controller does a simple calculation to
  2364. * make sure there is enough room in the FIFO before
  2365. * initiating the DMA for each buffer. The calc is:
  2366. * 4 = ceil(buffer len/mss). To make sure we don't
  2367. * overrun the FIFO, adjust the max buffer len if mss
  2368. * drops. */
  2369. if (mss) {
  2370. uint8_t hdr_len;
  2371. max_per_txd = min(mss << 2, max_per_txd);
  2372. max_txd_pwr = fls(max_per_txd) - 1;
  2373. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2374. * points to just header, pull a few bytes of payload from
  2375. * frags into skb->data */
  2376. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2377. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2378. switch (adapter->hw.mac_type) {
  2379. unsigned int pull_size;
  2380. case e1000_82571:
  2381. case e1000_82572:
  2382. case e1000_82573:
  2383. pull_size = min((unsigned int)4, skb->data_len);
  2384. if (!__pskb_pull_tail(skb, pull_size)) {
  2385. printk(KERN_ERR
  2386. "__pskb_pull_tail failed.\n");
  2387. dev_kfree_skb_any(skb);
  2388. return NETDEV_TX_OK;
  2389. }
  2390. len = skb->len - skb->data_len;
  2391. break;
  2392. default:
  2393. /* do nothing */
  2394. break;
  2395. }
  2396. }
  2397. }
  2398. /* reserve a descriptor for the offload context */
  2399. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2400. count++;
  2401. count++;
  2402. #else
  2403. if (skb->ip_summed == CHECKSUM_HW)
  2404. count++;
  2405. #endif
  2406. #ifdef NETIF_F_TSO
  2407. /* Controller Erratum workaround */
  2408. if (!skb->data_len && tx_ring->last_tx_tso &&
  2409. !skb_shinfo(skb)->tso_size)
  2410. count++;
  2411. #endif
  2412. count += TXD_USE_COUNT(len, max_txd_pwr);
  2413. if (adapter->pcix_82544)
  2414. count++;
  2415. /* work-around for errata 10 and it applies to all controllers
  2416. * in PCI-X mode, so add one more descriptor to the count
  2417. */
  2418. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2419. (len > 2015)))
  2420. count++;
  2421. nr_frags = skb_shinfo(skb)->nr_frags;
  2422. for (f = 0; f < nr_frags; f++)
  2423. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2424. max_txd_pwr);
  2425. if (adapter->pcix_82544)
  2426. count += nr_frags;
  2427. if (adapter->hw.tx_pkt_filtering &&
  2428. (adapter->hw.mac_type == e1000_82573))
  2429. e1000_transfer_dhcp_info(adapter, skb);
  2430. local_irq_save(flags);
  2431. if (!spin_trylock(&tx_ring->tx_lock)) {
  2432. /* Collision - tell upper layer to requeue */
  2433. local_irq_restore(flags);
  2434. return NETDEV_TX_LOCKED;
  2435. }
  2436. /* need: count + 2 desc gap to keep tail from touching
  2437. * head, otherwise try next time */
  2438. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2439. netif_stop_queue(netdev);
  2440. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2441. return NETDEV_TX_BUSY;
  2442. }
  2443. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2444. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2445. netif_stop_queue(netdev);
  2446. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2447. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2448. return NETDEV_TX_BUSY;
  2449. }
  2450. }
  2451. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2452. tx_flags |= E1000_TX_FLAGS_VLAN;
  2453. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2454. }
  2455. first = tx_ring->next_to_use;
  2456. tso = e1000_tso(adapter, tx_ring, skb);
  2457. if (tso < 0) {
  2458. dev_kfree_skb_any(skb);
  2459. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2460. return NETDEV_TX_OK;
  2461. }
  2462. if (likely(tso)) {
  2463. tx_ring->last_tx_tso = 1;
  2464. tx_flags |= E1000_TX_FLAGS_TSO;
  2465. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2466. tx_flags |= E1000_TX_FLAGS_CSUM;
  2467. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2468. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2469. * no longer assume, we must. */
  2470. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2471. tx_flags |= E1000_TX_FLAGS_IPV4;
  2472. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2473. e1000_tx_map(adapter, tx_ring, skb, first,
  2474. max_per_txd, nr_frags, mss));
  2475. netdev->trans_start = jiffies;
  2476. /* Make sure there is space in the ring for the next send. */
  2477. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2478. netif_stop_queue(netdev);
  2479. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2480. return NETDEV_TX_OK;
  2481. }
  2482. /**
  2483. * e1000_tx_timeout - Respond to a Tx Hang
  2484. * @netdev: network interface device structure
  2485. **/
  2486. static void
  2487. e1000_tx_timeout(struct net_device *netdev)
  2488. {
  2489. struct e1000_adapter *adapter = netdev_priv(netdev);
  2490. /* Do the reset outside of interrupt context */
  2491. adapter->tx_timeout_count++;
  2492. schedule_work(&adapter->reset_task);
  2493. }
  2494. static void
  2495. e1000_reset_task(struct net_device *netdev)
  2496. {
  2497. struct e1000_adapter *adapter = netdev_priv(netdev);
  2498. e1000_down(adapter);
  2499. e1000_up(adapter);
  2500. }
  2501. /**
  2502. * e1000_get_stats - Get System Network Statistics
  2503. * @netdev: network interface device structure
  2504. *
  2505. * Returns the address of the device statistics structure.
  2506. * The statistics are actually updated from the timer callback.
  2507. **/
  2508. static struct net_device_stats *
  2509. e1000_get_stats(struct net_device *netdev)
  2510. {
  2511. struct e1000_adapter *adapter = netdev_priv(netdev);
  2512. /* only return the current stats */
  2513. return &adapter->net_stats;
  2514. }
  2515. /**
  2516. * e1000_change_mtu - Change the Maximum Transfer Unit
  2517. * @netdev: network interface device structure
  2518. * @new_mtu: new value for maximum frame size
  2519. *
  2520. * Returns 0 on success, negative on failure
  2521. **/
  2522. static int
  2523. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2524. {
  2525. struct e1000_adapter *adapter = netdev_priv(netdev);
  2526. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2527. uint16_t eeprom_data = 0;
  2528. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2529. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2530. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2531. return -EINVAL;
  2532. }
  2533. /* Adapter-specific max frame size limits. */
  2534. switch (adapter->hw.mac_type) {
  2535. case e1000_undefined ... e1000_82542_rev2_1:
  2536. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2537. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2538. return -EINVAL;
  2539. }
  2540. break;
  2541. case e1000_82573:
  2542. /* only enable jumbo frames if ASPM is disabled completely
  2543. * this means both bits must be zero in 0x1A bits 3:2 */
  2544. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2545. &eeprom_data);
  2546. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2547. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2548. DPRINTK(PROBE, ERR,
  2549. "Jumbo Frames not supported.\n");
  2550. return -EINVAL;
  2551. }
  2552. break;
  2553. }
  2554. /* fall through to get support */
  2555. case e1000_82571:
  2556. case e1000_82572:
  2557. case e1000_80003es2lan:
  2558. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2559. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2560. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2561. return -EINVAL;
  2562. }
  2563. break;
  2564. default:
  2565. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2566. break;
  2567. }
  2568. /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2569. * means we reserve 2 more, this pushes us to allocate from the next
  2570. * larger slab size
  2571. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2572. if (max_frame <= E1000_RXBUFFER_256)
  2573. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2574. else if (max_frame <= E1000_RXBUFFER_512)
  2575. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2576. else if (max_frame <= E1000_RXBUFFER_1024)
  2577. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2578. else if (max_frame <= E1000_RXBUFFER_2048)
  2579. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2580. else if (max_frame <= E1000_RXBUFFER_4096)
  2581. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2582. else if (max_frame <= E1000_RXBUFFER_8192)
  2583. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2584. else if (max_frame <= E1000_RXBUFFER_16384)
  2585. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2586. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2587. #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
  2588. if (!adapter->hw.tbi_compatibility_on &&
  2589. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2590. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2591. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2592. netdev->mtu = new_mtu;
  2593. if (netif_running(netdev)) {
  2594. e1000_down(adapter);
  2595. e1000_up(adapter);
  2596. }
  2597. adapter->hw.max_frame_size = max_frame;
  2598. return 0;
  2599. }
  2600. /**
  2601. * e1000_update_stats - Update the board statistics counters
  2602. * @adapter: board private structure
  2603. **/
  2604. void
  2605. e1000_update_stats(struct e1000_adapter *adapter)
  2606. {
  2607. struct e1000_hw *hw = &adapter->hw;
  2608. unsigned long flags;
  2609. uint16_t phy_tmp;
  2610. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2611. spin_lock_irqsave(&adapter->stats_lock, flags);
  2612. /* these counters are modified from e1000_adjust_tbi_stats,
  2613. * called from the interrupt context, so they must only
  2614. * be written while holding adapter->stats_lock
  2615. */
  2616. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2617. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2618. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2619. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2620. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2621. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2622. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2623. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2624. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2625. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2626. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2627. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2628. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2629. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2630. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2631. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2632. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2633. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2634. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2635. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2636. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2637. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2638. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2639. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2640. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2641. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2642. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2643. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2644. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2645. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2646. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2647. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2648. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2649. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2650. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2651. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2652. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2653. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2654. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2655. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2656. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2657. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2658. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2659. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2660. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2661. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2662. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2663. /* used for adaptive IFS */
  2664. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2665. adapter->stats.tpt += hw->tx_packet_delta;
  2666. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2667. adapter->stats.colc += hw->collision_delta;
  2668. if (hw->mac_type >= e1000_82543) {
  2669. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2670. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2671. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2672. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2673. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2674. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2675. }
  2676. if (hw->mac_type > e1000_82547_rev_2) {
  2677. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2678. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2679. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2680. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2681. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2682. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2683. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2684. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2685. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2686. }
  2687. /* Fill out the OS statistics structure */
  2688. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2689. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2690. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2691. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2692. adapter->net_stats.multicast = adapter->stats.mprc;
  2693. adapter->net_stats.collisions = adapter->stats.colc;
  2694. /* Rx Errors */
  2695. /* RLEC on some newer hardware can be incorrect so build
  2696. * our own version based on RUC and ROC */
  2697. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2698. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2699. adapter->stats.ruc + adapter->stats.roc +
  2700. adapter->stats.cexterr;
  2701. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2702. adapter->stats.roc;
  2703. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2704. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2705. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2706. /* Tx Errors */
  2707. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2708. adapter->stats.latecol;
  2709. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2710. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2711. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2712. /* Tx Dropped needs to be maintained elsewhere */
  2713. /* Phy Stats */
  2714. if (hw->media_type == e1000_media_type_copper) {
  2715. if ((adapter->link_speed == SPEED_1000) &&
  2716. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2717. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2718. adapter->phy_stats.idle_errors += phy_tmp;
  2719. }
  2720. if ((hw->mac_type <= e1000_82546) &&
  2721. (hw->phy_type == e1000_phy_m88) &&
  2722. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2723. adapter->phy_stats.receive_errors += phy_tmp;
  2724. }
  2725. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2726. }
  2727. /**
  2728. * e1000_intr - Interrupt Handler
  2729. * @irq: interrupt number
  2730. * @data: pointer to a network interface device structure
  2731. * @pt_regs: CPU registers structure
  2732. **/
  2733. static irqreturn_t
  2734. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2735. {
  2736. struct net_device *netdev = data;
  2737. struct e1000_adapter *adapter = netdev_priv(netdev);
  2738. struct e1000_hw *hw = &adapter->hw;
  2739. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2740. #ifndef CONFIG_E1000_NAPI
  2741. int i;
  2742. #else
  2743. /* Interrupt Auto-Mask...upon reading ICR,
  2744. * interrupts are masked. No need for the
  2745. * IMC write, but it does mean we should
  2746. * account for it ASAP. */
  2747. if (likely(hw->mac_type >= e1000_82571))
  2748. atomic_inc(&adapter->irq_sem);
  2749. #endif
  2750. if (unlikely(!icr)) {
  2751. #ifdef CONFIG_E1000_NAPI
  2752. if (hw->mac_type >= e1000_82571)
  2753. e1000_irq_enable(adapter);
  2754. #endif
  2755. return IRQ_NONE; /* Not our interrupt */
  2756. }
  2757. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2758. hw->get_link_status = 1;
  2759. /* 80003ES2LAN workaround--
  2760. * For packet buffer work-around on link down event;
  2761. * disable receives here in the ISR and
  2762. * reset adapter in watchdog
  2763. */
  2764. if (netif_carrier_ok(netdev) &&
  2765. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2766. /* disable receives */
  2767. rctl = E1000_READ_REG(hw, RCTL);
  2768. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2769. }
  2770. mod_timer(&adapter->watchdog_timer, jiffies);
  2771. }
  2772. #ifdef CONFIG_E1000_NAPI
  2773. if (unlikely(hw->mac_type < e1000_82571)) {
  2774. atomic_inc(&adapter->irq_sem);
  2775. E1000_WRITE_REG(hw, IMC, ~0);
  2776. E1000_WRITE_FLUSH(hw);
  2777. }
  2778. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2779. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2780. else
  2781. e1000_irq_enable(adapter);
  2782. #else
  2783. /* Writing IMC and IMS is needed for 82547.
  2784. * Due to Hub Link bus being occupied, an interrupt
  2785. * de-assertion message is not able to be sent.
  2786. * When an interrupt assertion message is generated later,
  2787. * two messages are re-ordered and sent out.
  2788. * That causes APIC to think 82547 is in de-assertion
  2789. * state, while 82547 is in assertion state, resulting
  2790. * in dead lock. Writing IMC forces 82547 into
  2791. * de-assertion state.
  2792. */
  2793. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2794. atomic_inc(&adapter->irq_sem);
  2795. E1000_WRITE_REG(hw, IMC, ~0);
  2796. }
  2797. for (i = 0; i < E1000_MAX_INTR; i++)
  2798. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2799. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2800. break;
  2801. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2802. e1000_irq_enable(adapter);
  2803. #endif
  2804. return IRQ_HANDLED;
  2805. }
  2806. #ifdef CONFIG_E1000_NAPI
  2807. /**
  2808. * e1000_clean - NAPI Rx polling callback
  2809. * @adapter: board private structure
  2810. **/
  2811. static int
  2812. e1000_clean(struct net_device *poll_dev, int *budget)
  2813. {
  2814. struct e1000_adapter *adapter;
  2815. int work_to_do = min(*budget, poll_dev->quota);
  2816. int tx_cleaned = 0, i = 0, work_done = 0;
  2817. /* Must NOT use netdev_priv macro here. */
  2818. adapter = poll_dev->priv;
  2819. /* Keep link state information with original netdev */
  2820. if (!netif_carrier_ok(adapter->netdev))
  2821. goto quit_polling;
  2822. while (poll_dev != &adapter->polling_netdev[i]) {
  2823. i++;
  2824. BUG_ON(i == adapter->num_rx_queues);
  2825. }
  2826. if (likely(adapter->num_tx_queues == 1)) {
  2827. /* e1000_clean is called per-cpu. This lock protects
  2828. * tx_ring[0] from being cleaned by multiple cpus
  2829. * simultaneously. A failure obtaining the lock means
  2830. * tx_ring[0] is currently being cleaned anyway. */
  2831. if (spin_trylock(&adapter->tx_queue_lock)) {
  2832. tx_cleaned = e1000_clean_tx_irq(adapter,
  2833. &adapter->tx_ring[0]);
  2834. spin_unlock(&adapter->tx_queue_lock);
  2835. }
  2836. } else
  2837. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2838. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2839. &work_done, work_to_do);
  2840. *budget -= work_done;
  2841. poll_dev->quota -= work_done;
  2842. /* If no Tx and not enough Rx work done, exit the polling mode */
  2843. if ((!tx_cleaned && (work_done == 0)) ||
  2844. !netif_running(adapter->netdev)) {
  2845. quit_polling:
  2846. netif_rx_complete(poll_dev);
  2847. e1000_irq_enable(adapter);
  2848. return 0;
  2849. }
  2850. return 1;
  2851. }
  2852. #endif
  2853. /**
  2854. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2855. * @adapter: board private structure
  2856. **/
  2857. static boolean_t
  2858. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2859. struct e1000_tx_ring *tx_ring)
  2860. {
  2861. struct net_device *netdev = adapter->netdev;
  2862. struct e1000_tx_desc *tx_desc, *eop_desc;
  2863. struct e1000_buffer *buffer_info;
  2864. unsigned int i, eop;
  2865. #ifdef CONFIG_E1000_NAPI
  2866. unsigned int count = 0;
  2867. #endif
  2868. boolean_t cleaned = FALSE;
  2869. i = tx_ring->next_to_clean;
  2870. eop = tx_ring->buffer_info[i].next_to_watch;
  2871. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2872. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2873. for (cleaned = FALSE; !cleaned; ) {
  2874. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2875. buffer_info = &tx_ring->buffer_info[i];
  2876. cleaned = (i == eop);
  2877. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2878. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2879. if (unlikely(++i == tx_ring->count)) i = 0;
  2880. }
  2881. eop = tx_ring->buffer_info[i].next_to_watch;
  2882. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2883. #ifdef CONFIG_E1000_NAPI
  2884. #define E1000_TX_WEIGHT 64
  2885. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2886. if (count++ == E1000_TX_WEIGHT) break;
  2887. #endif
  2888. }
  2889. tx_ring->next_to_clean = i;
  2890. #define TX_WAKE_THRESHOLD 32
  2891. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2892. netif_carrier_ok(netdev))) {
  2893. spin_lock(&tx_ring->tx_lock);
  2894. if (netif_queue_stopped(netdev) &&
  2895. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2896. netif_wake_queue(netdev);
  2897. spin_unlock(&tx_ring->tx_lock);
  2898. }
  2899. if (adapter->detect_tx_hung) {
  2900. /* Detect a transmit hang in hardware, this serializes the
  2901. * check with the clearing of time_stamp and movement of i */
  2902. adapter->detect_tx_hung = FALSE;
  2903. if (tx_ring->buffer_info[eop].dma &&
  2904. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2905. (adapter->tx_timeout_factor * HZ))
  2906. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2907. E1000_STATUS_TXOFF)) {
  2908. /* detected Tx unit hang */
  2909. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2910. " Tx Queue <%lu>\n"
  2911. " TDH <%x>\n"
  2912. " TDT <%x>\n"
  2913. " next_to_use <%x>\n"
  2914. " next_to_clean <%x>\n"
  2915. "buffer_info[next_to_clean]\n"
  2916. " time_stamp <%lx>\n"
  2917. " next_to_watch <%x>\n"
  2918. " jiffies <%lx>\n"
  2919. " next_to_watch.status <%x>\n",
  2920. (unsigned long)((tx_ring - adapter->tx_ring) /
  2921. sizeof(struct e1000_tx_ring)),
  2922. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2923. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2924. tx_ring->next_to_use,
  2925. tx_ring->next_to_clean,
  2926. tx_ring->buffer_info[eop].time_stamp,
  2927. eop,
  2928. jiffies,
  2929. eop_desc->upper.fields.status);
  2930. netif_stop_queue(netdev);
  2931. }
  2932. }
  2933. return cleaned;
  2934. }
  2935. /**
  2936. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2937. * @adapter: board private structure
  2938. * @status_err: receive descriptor status and error fields
  2939. * @csum: receive descriptor csum field
  2940. * @sk_buff: socket buffer with received data
  2941. **/
  2942. static void
  2943. e1000_rx_checksum(struct e1000_adapter *adapter,
  2944. uint32_t status_err, uint32_t csum,
  2945. struct sk_buff *skb)
  2946. {
  2947. uint16_t status = (uint16_t)status_err;
  2948. uint8_t errors = (uint8_t)(status_err >> 24);
  2949. skb->ip_summed = CHECKSUM_NONE;
  2950. /* 82543 or newer only */
  2951. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2952. /* Ignore Checksum bit is set */
  2953. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2954. /* TCP/UDP checksum error bit is set */
  2955. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2956. /* let the stack verify checksum errors */
  2957. adapter->hw_csum_err++;
  2958. return;
  2959. }
  2960. /* TCP/UDP Checksum has not been calculated */
  2961. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2962. if (!(status & E1000_RXD_STAT_TCPCS))
  2963. return;
  2964. } else {
  2965. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2966. return;
  2967. }
  2968. /* It must be a TCP or UDP packet with a valid checksum */
  2969. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2970. /* TCP checksum is good */
  2971. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2972. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2973. /* IP fragment with UDP payload */
  2974. /* Hardware complements the payload checksum, so we undo it
  2975. * and then put the value in host order for further stack use.
  2976. */
  2977. csum = ntohl(csum ^ 0xFFFF);
  2978. skb->csum = csum;
  2979. skb->ip_summed = CHECKSUM_HW;
  2980. }
  2981. adapter->hw_csum_good++;
  2982. }
  2983. /**
  2984. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2985. * @adapter: board private structure
  2986. **/
  2987. static boolean_t
  2988. #ifdef CONFIG_E1000_NAPI
  2989. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2990. struct e1000_rx_ring *rx_ring,
  2991. int *work_done, int work_to_do)
  2992. #else
  2993. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2994. struct e1000_rx_ring *rx_ring)
  2995. #endif
  2996. {
  2997. struct net_device *netdev = adapter->netdev;
  2998. struct pci_dev *pdev = adapter->pdev;
  2999. struct e1000_rx_desc *rx_desc, *next_rxd;
  3000. struct e1000_buffer *buffer_info, *next_buffer;
  3001. unsigned long flags;
  3002. uint32_t length;
  3003. uint8_t last_byte;
  3004. unsigned int i;
  3005. int cleaned_count = 0;
  3006. boolean_t cleaned = FALSE;
  3007. i = rx_ring->next_to_clean;
  3008. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3009. buffer_info = &rx_ring->buffer_info[i];
  3010. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3011. struct sk_buff *skb, *next_skb;
  3012. u8 status;
  3013. #ifdef CONFIG_E1000_NAPI
  3014. if (*work_done >= work_to_do)
  3015. break;
  3016. (*work_done)++;
  3017. #endif
  3018. status = rx_desc->status;
  3019. skb = buffer_info->skb;
  3020. buffer_info->skb = NULL;
  3021. prefetch(skb->data - NET_IP_ALIGN);
  3022. if (++i == rx_ring->count) i = 0;
  3023. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3024. prefetch(next_rxd);
  3025. next_buffer = &rx_ring->buffer_info[i];
  3026. next_skb = next_buffer->skb;
  3027. prefetch(next_skb->data - NET_IP_ALIGN);
  3028. cleaned = TRUE;
  3029. cleaned_count++;
  3030. pci_unmap_single(pdev,
  3031. buffer_info->dma,
  3032. buffer_info->length,
  3033. PCI_DMA_FROMDEVICE);
  3034. length = le16_to_cpu(rx_desc->length);
  3035. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3036. /* All receives must fit into a single buffer */
  3037. E1000_DBG("%s: Receive packet consumed multiple"
  3038. " buffers\n", netdev->name);
  3039. dev_kfree_skb_irq(skb);
  3040. goto next_desc;
  3041. }
  3042. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3043. last_byte = *(skb->data + length - 1);
  3044. if (TBI_ACCEPT(&adapter->hw, status,
  3045. rx_desc->errors, length, last_byte)) {
  3046. spin_lock_irqsave(&adapter->stats_lock, flags);
  3047. e1000_tbi_adjust_stats(&adapter->hw,
  3048. &adapter->stats,
  3049. length, skb->data);
  3050. spin_unlock_irqrestore(&adapter->stats_lock,
  3051. flags);
  3052. length--;
  3053. } else {
  3054. /* recycle */
  3055. buffer_info->skb = skb;
  3056. goto next_desc;
  3057. }
  3058. }
  3059. /* code added for copybreak, this should improve
  3060. * performance for small packets with large amounts
  3061. * of reassembly being done in the stack */
  3062. #define E1000_CB_LENGTH 256
  3063. if (length < E1000_CB_LENGTH) {
  3064. struct sk_buff *new_skb =
  3065. dev_alloc_skb(length + NET_IP_ALIGN);
  3066. if (new_skb) {
  3067. skb_reserve(new_skb, NET_IP_ALIGN);
  3068. new_skb->dev = netdev;
  3069. memcpy(new_skb->data - NET_IP_ALIGN,
  3070. skb->data - NET_IP_ALIGN,
  3071. length + NET_IP_ALIGN);
  3072. /* save the skb in buffer_info as good */
  3073. buffer_info->skb = skb;
  3074. skb = new_skb;
  3075. skb_put(skb, length);
  3076. }
  3077. } else
  3078. skb_put(skb, length);
  3079. /* end copybreak code */
  3080. /* Receive Checksum Offload */
  3081. e1000_rx_checksum(adapter,
  3082. (uint32_t)(status) |
  3083. ((uint32_t)(rx_desc->errors) << 24),
  3084. le16_to_cpu(rx_desc->csum), skb);
  3085. skb->protocol = eth_type_trans(skb, netdev);
  3086. #ifdef CONFIG_E1000_NAPI
  3087. if (unlikely(adapter->vlgrp &&
  3088. (status & E1000_RXD_STAT_VP))) {
  3089. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3090. le16_to_cpu(rx_desc->special) &
  3091. E1000_RXD_SPC_VLAN_MASK);
  3092. } else {
  3093. netif_receive_skb(skb);
  3094. }
  3095. #else /* CONFIG_E1000_NAPI */
  3096. if (unlikely(adapter->vlgrp &&
  3097. (status & E1000_RXD_STAT_VP))) {
  3098. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3099. le16_to_cpu(rx_desc->special) &
  3100. E1000_RXD_SPC_VLAN_MASK);
  3101. } else {
  3102. netif_rx(skb);
  3103. }
  3104. #endif /* CONFIG_E1000_NAPI */
  3105. netdev->last_rx = jiffies;
  3106. next_desc:
  3107. rx_desc->status = 0;
  3108. /* return some buffers to hardware, one at a time is too slow */
  3109. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3110. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3111. cleaned_count = 0;
  3112. }
  3113. /* use prefetched values */
  3114. rx_desc = next_rxd;
  3115. buffer_info = next_buffer;
  3116. }
  3117. rx_ring->next_to_clean = i;
  3118. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3119. if (cleaned_count)
  3120. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3121. return cleaned;
  3122. }
  3123. /**
  3124. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3125. * @adapter: board private structure
  3126. **/
  3127. static boolean_t
  3128. #ifdef CONFIG_E1000_NAPI
  3129. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3130. struct e1000_rx_ring *rx_ring,
  3131. int *work_done, int work_to_do)
  3132. #else
  3133. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3134. struct e1000_rx_ring *rx_ring)
  3135. #endif
  3136. {
  3137. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3138. struct net_device *netdev = adapter->netdev;
  3139. struct pci_dev *pdev = adapter->pdev;
  3140. struct e1000_buffer *buffer_info, *next_buffer;
  3141. struct e1000_ps_page *ps_page;
  3142. struct e1000_ps_page_dma *ps_page_dma;
  3143. struct sk_buff *skb, *next_skb;
  3144. unsigned int i, j;
  3145. uint32_t length, staterr;
  3146. int cleaned_count = 0;
  3147. boolean_t cleaned = FALSE;
  3148. i = rx_ring->next_to_clean;
  3149. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3150. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3151. buffer_info = &rx_ring->buffer_info[i];
  3152. while (staterr & E1000_RXD_STAT_DD) {
  3153. buffer_info = &rx_ring->buffer_info[i];
  3154. ps_page = &rx_ring->ps_page[i];
  3155. ps_page_dma = &rx_ring->ps_page_dma[i];
  3156. #ifdef CONFIG_E1000_NAPI
  3157. if (unlikely(*work_done >= work_to_do))
  3158. break;
  3159. (*work_done)++;
  3160. #endif
  3161. skb = buffer_info->skb;
  3162. /* in the packet split case this is header only */
  3163. prefetch(skb->data - NET_IP_ALIGN);
  3164. if (++i == rx_ring->count) i = 0;
  3165. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3166. prefetch(next_rxd);
  3167. next_buffer = &rx_ring->buffer_info[i];
  3168. next_skb = next_buffer->skb;
  3169. prefetch(next_skb->data - NET_IP_ALIGN);
  3170. cleaned = TRUE;
  3171. cleaned_count++;
  3172. pci_unmap_single(pdev, buffer_info->dma,
  3173. buffer_info->length,
  3174. PCI_DMA_FROMDEVICE);
  3175. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3176. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3177. " the full packet\n", netdev->name);
  3178. dev_kfree_skb_irq(skb);
  3179. goto next_desc;
  3180. }
  3181. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3182. dev_kfree_skb_irq(skb);
  3183. goto next_desc;
  3184. }
  3185. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3186. if (unlikely(!length)) {
  3187. E1000_DBG("%s: Last part of the packet spanning"
  3188. " multiple descriptors\n", netdev->name);
  3189. dev_kfree_skb_irq(skb);
  3190. goto next_desc;
  3191. }
  3192. /* Good Receive */
  3193. skb_put(skb, length);
  3194. {
  3195. /* this looks ugly, but it seems compiler issues make it
  3196. more efficient than reusing j */
  3197. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3198. /* page alloc/put takes too long and effects small packet
  3199. * throughput, so unsplit small packets and save the alloc/put*/
  3200. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3201. u8 *vaddr;
  3202. /* there is no documentation about how to call
  3203. * kmap_atomic, so we can't hold the mapping
  3204. * very long */
  3205. pci_dma_sync_single_for_cpu(pdev,
  3206. ps_page_dma->ps_page_dma[0],
  3207. PAGE_SIZE,
  3208. PCI_DMA_FROMDEVICE);
  3209. vaddr = kmap_atomic(ps_page->ps_page[0],
  3210. KM_SKB_DATA_SOFTIRQ);
  3211. memcpy(skb->tail, vaddr, l1);
  3212. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3213. pci_dma_sync_single_for_device(pdev,
  3214. ps_page_dma->ps_page_dma[0],
  3215. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3216. skb_put(skb, l1);
  3217. length += l1;
  3218. goto copydone;
  3219. } /* if */
  3220. }
  3221. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3222. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3223. break;
  3224. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3225. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3226. ps_page_dma->ps_page_dma[j] = 0;
  3227. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3228. length);
  3229. ps_page->ps_page[j] = NULL;
  3230. skb->len += length;
  3231. skb->data_len += length;
  3232. skb->truesize += length;
  3233. }
  3234. copydone:
  3235. e1000_rx_checksum(adapter, staterr,
  3236. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3237. skb->protocol = eth_type_trans(skb, netdev);
  3238. if (likely(rx_desc->wb.upper.header_status &
  3239. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3240. adapter->rx_hdr_split++;
  3241. #ifdef CONFIG_E1000_NAPI
  3242. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3243. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3244. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3245. E1000_RXD_SPC_VLAN_MASK);
  3246. } else {
  3247. netif_receive_skb(skb);
  3248. }
  3249. #else /* CONFIG_E1000_NAPI */
  3250. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3251. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3252. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3253. E1000_RXD_SPC_VLAN_MASK);
  3254. } else {
  3255. netif_rx(skb);
  3256. }
  3257. #endif /* CONFIG_E1000_NAPI */
  3258. netdev->last_rx = jiffies;
  3259. next_desc:
  3260. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3261. buffer_info->skb = NULL;
  3262. /* return some buffers to hardware, one at a time is too slow */
  3263. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3264. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3265. cleaned_count = 0;
  3266. }
  3267. /* use prefetched values */
  3268. rx_desc = next_rxd;
  3269. buffer_info = next_buffer;
  3270. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3271. }
  3272. rx_ring->next_to_clean = i;
  3273. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3274. if (cleaned_count)
  3275. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3276. return cleaned;
  3277. }
  3278. /**
  3279. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3280. * @adapter: address of board private structure
  3281. **/
  3282. static void
  3283. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3284. struct e1000_rx_ring *rx_ring,
  3285. int cleaned_count)
  3286. {
  3287. struct net_device *netdev = adapter->netdev;
  3288. struct pci_dev *pdev = adapter->pdev;
  3289. struct e1000_rx_desc *rx_desc;
  3290. struct e1000_buffer *buffer_info;
  3291. struct sk_buff *skb;
  3292. unsigned int i;
  3293. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3294. i = rx_ring->next_to_use;
  3295. buffer_info = &rx_ring->buffer_info[i];
  3296. while (cleaned_count--) {
  3297. if (!(skb = buffer_info->skb))
  3298. skb = dev_alloc_skb(bufsz);
  3299. else {
  3300. skb_trim(skb, 0);
  3301. goto map_skb;
  3302. }
  3303. if (unlikely(!skb)) {
  3304. /* Better luck next round */
  3305. adapter->alloc_rx_buff_failed++;
  3306. break;
  3307. }
  3308. /* Fix for errata 23, can't cross 64kB boundary */
  3309. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3310. struct sk_buff *oldskb = skb;
  3311. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3312. "at %p\n", bufsz, skb->data);
  3313. /* Try again, without freeing the previous */
  3314. skb = dev_alloc_skb(bufsz);
  3315. /* Failed allocation, critical failure */
  3316. if (!skb) {
  3317. dev_kfree_skb(oldskb);
  3318. break;
  3319. }
  3320. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3321. /* give up */
  3322. dev_kfree_skb(skb);
  3323. dev_kfree_skb(oldskb);
  3324. break; /* while !buffer_info->skb */
  3325. } else {
  3326. /* Use new allocation */
  3327. dev_kfree_skb(oldskb);
  3328. }
  3329. }
  3330. /* Make buffer alignment 2 beyond a 16 byte boundary
  3331. * this will result in a 16 byte aligned IP header after
  3332. * the 14 byte MAC header is removed
  3333. */
  3334. skb_reserve(skb, NET_IP_ALIGN);
  3335. skb->dev = netdev;
  3336. buffer_info->skb = skb;
  3337. buffer_info->length = adapter->rx_buffer_len;
  3338. map_skb:
  3339. buffer_info->dma = pci_map_single(pdev,
  3340. skb->data,
  3341. adapter->rx_buffer_len,
  3342. PCI_DMA_FROMDEVICE);
  3343. /* Fix for errata 23, can't cross 64kB boundary */
  3344. if (!e1000_check_64k_bound(adapter,
  3345. (void *)(unsigned long)buffer_info->dma,
  3346. adapter->rx_buffer_len)) {
  3347. DPRINTK(RX_ERR, ERR,
  3348. "dma align check failed: %u bytes at %p\n",
  3349. adapter->rx_buffer_len,
  3350. (void *)(unsigned long)buffer_info->dma);
  3351. dev_kfree_skb(skb);
  3352. buffer_info->skb = NULL;
  3353. pci_unmap_single(pdev, buffer_info->dma,
  3354. adapter->rx_buffer_len,
  3355. PCI_DMA_FROMDEVICE);
  3356. break; /* while !buffer_info->skb */
  3357. }
  3358. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3359. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3360. if (unlikely(++i == rx_ring->count))
  3361. i = 0;
  3362. buffer_info = &rx_ring->buffer_info[i];
  3363. }
  3364. if (likely(rx_ring->next_to_use != i)) {
  3365. rx_ring->next_to_use = i;
  3366. if (unlikely(i-- == 0))
  3367. i = (rx_ring->count - 1);
  3368. /* Force memory writes to complete before letting h/w
  3369. * know there are new descriptors to fetch. (Only
  3370. * applicable for weak-ordered memory model archs,
  3371. * such as IA-64). */
  3372. wmb();
  3373. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3374. }
  3375. }
  3376. /**
  3377. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3378. * @adapter: address of board private structure
  3379. **/
  3380. static void
  3381. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3382. struct e1000_rx_ring *rx_ring,
  3383. int cleaned_count)
  3384. {
  3385. struct net_device *netdev = adapter->netdev;
  3386. struct pci_dev *pdev = adapter->pdev;
  3387. union e1000_rx_desc_packet_split *rx_desc;
  3388. struct e1000_buffer *buffer_info;
  3389. struct e1000_ps_page *ps_page;
  3390. struct e1000_ps_page_dma *ps_page_dma;
  3391. struct sk_buff *skb;
  3392. unsigned int i, j;
  3393. i = rx_ring->next_to_use;
  3394. buffer_info = &rx_ring->buffer_info[i];
  3395. ps_page = &rx_ring->ps_page[i];
  3396. ps_page_dma = &rx_ring->ps_page_dma[i];
  3397. while (cleaned_count--) {
  3398. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3399. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3400. if (j < adapter->rx_ps_pages) {
  3401. if (likely(!ps_page->ps_page[j])) {
  3402. ps_page->ps_page[j] =
  3403. alloc_page(GFP_ATOMIC);
  3404. if (unlikely(!ps_page->ps_page[j])) {
  3405. adapter->alloc_rx_buff_failed++;
  3406. goto no_buffers;
  3407. }
  3408. ps_page_dma->ps_page_dma[j] =
  3409. pci_map_page(pdev,
  3410. ps_page->ps_page[j],
  3411. 0, PAGE_SIZE,
  3412. PCI_DMA_FROMDEVICE);
  3413. }
  3414. /* Refresh the desc even if buffer_addrs didn't
  3415. * change because each write-back erases
  3416. * this info.
  3417. */
  3418. rx_desc->read.buffer_addr[j+1] =
  3419. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3420. } else
  3421. rx_desc->read.buffer_addr[j+1] = ~0;
  3422. }
  3423. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3424. if (unlikely(!skb)) {
  3425. adapter->alloc_rx_buff_failed++;
  3426. break;
  3427. }
  3428. /* Make buffer alignment 2 beyond a 16 byte boundary
  3429. * this will result in a 16 byte aligned IP header after
  3430. * the 14 byte MAC header is removed
  3431. */
  3432. skb_reserve(skb, NET_IP_ALIGN);
  3433. skb->dev = netdev;
  3434. buffer_info->skb = skb;
  3435. buffer_info->length = adapter->rx_ps_bsize0;
  3436. buffer_info->dma = pci_map_single(pdev, skb->data,
  3437. adapter->rx_ps_bsize0,
  3438. PCI_DMA_FROMDEVICE);
  3439. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3440. if (unlikely(++i == rx_ring->count)) i = 0;
  3441. buffer_info = &rx_ring->buffer_info[i];
  3442. ps_page = &rx_ring->ps_page[i];
  3443. ps_page_dma = &rx_ring->ps_page_dma[i];
  3444. }
  3445. no_buffers:
  3446. if (likely(rx_ring->next_to_use != i)) {
  3447. rx_ring->next_to_use = i;
  3448. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3449. /* Force memory writes to complete before letting h/w
  3450. * know there are new descriptors to fetch. (Only
  3451. * applicable for weak-ordered memory model archs,
  3452. * such as IA-64). */
  3453. wmb();
  3454. /* Hardware increments by 16 bytes, but packet split
  3455. * descriptors are 32 bytes...so we increment tail
  3456. * twice as much.
  3457. */
  3458. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3459. }
  3460. }
  3461. /**
  3462. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3463. * @adapter:
  3464. **/
  3465. static void
  3466. e1000_smartspeed(struct e1000_adapter *adapter)
  3467. {
  3468. uint16_t phy_status;
  3469. uint16_t phy_ctrl;
  3470. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3471. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3472. return;
  3473. if (adapter->smartspeed == 0) {
  3474. /* If Master/Slave config fault is asserted twice,
  3475. * we assume back-to-back */
  3476. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3477. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3478. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3479. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3480. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3481. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3482. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3483. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3484. phy_ctrl);
  3485. adapter->smartspeed++;
  3486. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3487. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3488. &phy_ctrl)) {
  3489. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3490. MII_CR_RESTART_AUTO_NEG);
  3491. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3492. phy_ctrl);
  3493. }
  3494. }
  3495. return;
  3496. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3497. /* If still no link, perhaps using 2/3 pair cable */
  3498. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3499. phy_ctrl |= CR_1000T_MS_ENABLE;
  3500. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3501. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3502. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3503. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3504. MII_CR_RESTART_AUTO_NEG);
  3505. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3506. }
  3507. }
  3508. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3509. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3510. adapter->smartspeed = 0;
  3511. }
  3512. /**
  3513. * e1000_ioctl -
  3514. * @netdev:
  3515. * @ifreq:
  3516. * @cmd:
  3517. **/
  3518. static int
  3519. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3520. {
  3521. switch (cmd) {
  3522. case SIOCGMIIPHY:
  3523. case SIOCGMIIREG:
  3524. case SIOCSMIIREG:
  3525. return e1000_mii_ioctl(netdev, ifr, cmd);
  3526. default:
  3527. return -EOPNOTSUPP;
  3528. }
  3529. }
  3530. /**
  3531. * e1000_mii_ioctl -
  3532. * @netdev:
  3533. * @ifreq:
  3534. * @cmd:
  3535. **/
  3536. static int
  3537. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3538. {
  3539. struct e1000_adapter *adapter = netdev_priv(netdev);
  3540. struct mii_ioctl_data *data = if_mii(ifr);
  3541. int retval;
  3542. uint16_t mii_reg;
  3543. uint16_t spddplx;
  3544. unsigned long flags;
  3545. if (adapter->hw.media_type != e1000_media_type_copper)
  3546. return -EOPNOTSUPP;
  3547. switch (cmd) {
  3548. case SIOCGMIIPHY:
  3549. data->phy_id = adapter->hw.phy_addr;
  3550. break;
  3551. case SIOCGMIIREG:
  3552. if (!capable(CAP_NET_ADMIN))
  3553. return -EPERM;
  3554. spin_lock_irqsave(&adapter->stats_lock, flags);
  3555. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3556. &data->val_out)) {
  3557. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3558. return -EIO;
  3559. }
  3560. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3561. break;
  3562. case SIOCSMIIREG:
  3563. if (!capable(CAP_NET_ADMIN))
  3564. return -EPERM;
  3565. if (data->reg_num & ~(0x1F))
  3566. return -EFAULT;
  3567. mii_reg = data->val_in;
  3568. spin_lock_irqsave(&adapter->stats_lock, flags);
  3569. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3570. mii_reg)) {
  3571. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3572. return -EIO;
  3573. }
  3574. if (adapter->hw.media_type == e1000_media_type_copper) {
  3575. switch (data->reg_num) {
  3576. case PHY_CTRL:
  3577. if (mii_reg & MII_CR_POWER_DOWN)
  3578. break;
  3579. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3580. adapter->hw.autoneg = 1;
  3581. adapter->hw.autoneg_advertised = 0x2F;
  3582. } else {
  3583. if (mii_reg & 0x40)
  3584. spddplx = SPEED_1000;
  3585. else if (mii_reg & 0x2000)
  3586. spddplx = SPEED_100;
  3587. else
  3588. spddplx = SPEED_10;
  3589. spddplx += (mii_reg & 0x100)
  3590. ? DUPLEX_FULL :
  3591. DUPLEX_HALF;
  3592. retval = e1000_set_spd_dplx(adapter,
  3593. spddplx);
  3594. if (retval) {
  3595. spin_unlock_irqrestore(
  3596. &adapter->stats_lock,
  3597. flags);
  3598. return retval;
  3599. }
  3600. }
  3601. if (netif_running(adapter->netdev)) {
  3602. e1000_down(adapter);
  3603. e1000_up(adapter);
  3604. } else
  3605. e1000_reset(adapter);
  3606. break;
  3607. case M88E1000_PHY_SPEC_CTRL:
  3608. case M88E1000_EXT_PHY_SPEC_CTRL:
  3609. if (e1000_phy_reset(&adapter->hw)) {
  3610. spin_unlock_irqrestore(
  3611. &adapter->stats_lock, flags);
  3612. return -EIO;
  3613. }
  3614. break;
  3615. }
  3616. } else {
  3617. switch (data->reg_num) {
  3618. case PHY_CTRL:
  3619. if (mii_reg & MII_CR_POWER_DOWN)
  3620. break;
  3621. if (netif_running(adapter->netdev)) {
  3622. e1000_down(adapter);
  3623. e1000_up(adapter);
  3624. } else
  3625. e1000_reset(adapter);
  3626. break;
  3627. }
  3628. }
  3629. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3630. break;
  3631. default:
  3632. return -EOPNOTSUPP;
  3633. }
  3634. return E1000_SUCCESS;
  3635. }
  3636. void
  3637. e1000_pci_set_mwi(struct e1000_hw *hw)
  3638. {
  3639. struct e1000_adapter *adapter = hw->back;
  3640. int ret_val = pci_set_mwi(adapter->pdev);
  3641. if (ret_val)
  3642. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3643. }
  3644. void
  3645. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3646. {
  3647. struct e1000_adapter *adapter = hw->back;
  3648. pci_clear_mwi(adapter->pdev);
  3649. }
  3650. void
  3651. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3652. {
  3653. struct e1000_adapter *adapter = hw->back;
  3654. pci_read_config_word(adapter->pdev, reg, value);
  3655. }
  3656. void
  3657. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3658. {
  3659. struct e1000_adapter *adapter = hw->back;
  3660. pci_write_config_word(adapter->pdev, reg, *value);
  3661. }
  3662. uint32_t
  3663. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3664. {
  3665. return inl(port);
  3666. }
  3667. void
  3668. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3669. {
  3670. outl(value, port);
  3671. }
  3672. static void
  3673. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3674. {
  3675. struct e1000_adapter *adapter = netdev_priv(netdev);
  3676. uint32_t ctrl, rctl;
  3677. e1000_irq_disable(adapter);
  3678. adapter->vlgrp = grp;
  3679. if (grp) {
  3680. /* enable VLAN tag insert/strip */
  3681. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3682. ctrl |= E1000_CTRL_VME;
  3683. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3684. /* enable VLAN receive filtering */
  3685. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3686. rctl |= E1000_RCTL_VFE;
  3687. rctl &= ~E1000_RCTL_CFIEN;
  3688. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3689. e1000_update_mng_vlan(adapter);
  3690. } else {
  3691. /* disable VLAN tag insert/strip */
  3692. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3693. ctrl &= ~E1000_CTRL_VME;
  3694. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3695. /* disable VLAN filtering */
  3696. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3697. rctl &= ~E1000_RCTL_VFE;
  3698. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3699. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3700. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3701. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3702. }
  3703. }
  3704. e1000_irq_enable(adapter);
  3705. }
  3706. static void
  3707. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3708. {
  3709. struct e1000_adapter *adapter = netdev_priv(netdev);
  3710. uint32_t vfta, index;
  3711. if ((adapter->hw.mng_cookie.status &
  3712. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3713. (vid == adapter->mng_vlan_id))
  3714. return;
  3715. /* add VID to filter table */
  3716. index = (vid >> 5) & 0x7F;
  3717. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3718. vfta |= (1 << (vid & 0x1F));
  3719. e1000_write_vfta(&adapter->hw, index, vfta);
  3720. }
  3721. static void
  3722. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3723. {
  3724. struct e1000_adapter *adapter = netdev_priv(netdev);
  3725. uint32_t vfta, index;
  3726. e1000_irq_disable(adapter);
  3727. if (adapter->vlgrp)
  3728. adapter->vlgrp->vlan_devices[vid] = NULL;
  3729. e1000_irq_enable(adapter);
  3730. if ((adapter->hw.mng_cookie.status &
  3731. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3732. (vid == adapter->mng_vlan_id)) {
  3733. /* release control to f/w */
  3734. e1000_release_hw_control(adapter);
  3735. return;
  3736. }
  3737. /* remove VID from filter table */
  3738. index = (vid >> 5) & 0x7F;
  3739. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3740. vfta &= ~(1 << (vid & 0x1F));
  3741. e1000_write_vfta(&adapter->hw, index, vfta);
  3742. }
  3743. static void
  3744. e1000_restore_vlan(struct e1000_adapter *adapter)
  3745. {
  3746. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3747. if (adapter->vlgrp) {
  3748. uint16_t vid;
  3749. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3750. if (!adapter->vlgrp->vlan_devices[vid])
  3751. continue;
  3752. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3753. }
  3754. }
  3755. }
  3756. int
  3757. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3758. {
  3759. adapter->hw.autoneg = 0;
  3760. /* Fiber NICs only allow 1000 gbps Full duplex */
  3761. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3762. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3763. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3764. return -EINVAL;
  3765. }
  3766. switch (spddplx) {
  3767. case SPEED_10 + DUPLEX_HALF:
  3768. adapter->hw.forced_speed_duplex = e1000_10_half;
  3769. break;
  3770. case SPEED_10 + DUPLEX_FULL:
  3771. adapter->hw.forced_speed_duplex = e1000_10_full;
  3772. break;
  3773. case SPEED_100 + DUPLEX_HALF:
  3774. adapter->hw.forced_speed_duplex = e1000_100_half;
  3775. break;
  3776. case SPEED_100 + DUPLEX_FULL:
  3777. adapter->hw.forced_speed_duplex = e1000_100_full;
  3778. break;
  3779. case SPEED_1000 + DUPLEX_FULL:
  3780. adapter->hw.autoneg = 1;
  3781. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3782. break;
  3783. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3784. default:
  3785. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3786. return -EINVAL;
  3787. }
  3788. return 0;
  3789. }
  3790. #ifdef CONFIG_PM
  3791. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3792. * bus we're on (PCI(X) vs. PCI-E)
  3793. */
  3794. #define PCIE_CONFIG_SPACE_LEN 256
  3795. #define PCI_CONFIG_SPACE_LEN 64
  3796. static int
  3797. e1000_pci_save_state(struct e1000_adapter *adapter)
  3798. {
  3799. struct pci_dev *dev = adapter->pdev;
  3800. int size;
  3801. int i;
  3802. if (adapter->hw.mac_type >= e1000_82571)
  3803. size = PCIE_CONFIG_SPACE_LEN;
  3804. else
  3805. size = PCI_CONFIG_SPACE_LEN;
  3806. WARN_ON(adapter->config_space != NULL);
  3807. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3808. if (!adapter->config_space) {
  3809. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3810. return -ENOMEM;
  3811. }
  3812. for (i = 0; i < (size / 4); i++)
  3813. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3814. return 0;
  3815. }
  3816. static void
  3817. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3818. {
  3819. struct pci_dev *dev = adapter->pdev;
  3820. int size;
  3821. int i;
  3822. if (adapter->config_space == NULL)
  3823. return;
  3824. if (adapter->hw.mac_type >= e1000_82571)
  3825. size = PCIE_CONFIG_SPACE_LEN;
  3826. else
  3827. size = PCI_CONFIG_SPACE_LEN;
  3828. for (i = 0; i < (size / 4); i++)
  3829. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3830. kfree(adapter->config_space);
  3831. adapter->config_space = NULL;
  3832. return;
  3833. }
  3834. #endif /* CONFIG_PM */
  3835. static int
  3836. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3837. {
  3838. struct net_device *netdev = pci_get_drvdata(pdev);
  3839. struct e1000_adapter *adapter = netdev_priv(netdev);
  3840. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3841. uint32_t wufc = adapter->wol;
  3842. int retval = 0;
  3843. netif_device_detach(netdev);
  3844. if (netif_running(netdev))
  3845. e1000_down(adapter);
  3846. #ifdef CONFIG_PM
  3847. /* Implement our own version of pci_save_state(pdev) because pci-
  3848. * express adapters have 256-byte config spaces. */
  3849. retval = e1000_pci_save_state(adapter);
  3850. if (retval)
  3851. return retval;
  3852. #endif
  3853. status = E1000_READ_REG(&adapter->hw, STATUS);
  3854. if (status & E1000_STATUS_LU)
  3855. wufc &= ~E1000_WUFC_LNKC;
  3856. if (wufc) {
  3857. e1000_setup_rctl(adapter);
  3858. e1000_set_multi(netdev);
  3859. /* turn on all-multi mode if wake on multicast is enabled */
  3860. if (adapter->wol & E1000_WUFC_MC) {
  3861. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3862. rctl |= E1000_RCTL_MPE;
  3863. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3864. }
  3865. if (adapter->hw.mac_type >= e1000_82540) {
  3866. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3867. /* advertise wake from D3Cold */
  3868. #define E1000_CTRL_ADVD3WUC 0x00100000
  3869. /* phy power management enable */
  3870. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3871. ctrl |= E1000_CTRL_ADVD3WUC |
  3872. E1000_CTRL_EN_PHY_PWR_MGMT;
  3873. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3874. }
  3875. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3876. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3877. /* keep the laser running in D3 */
  3878. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3879. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3880. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3881. }
  3882. /* Allow time for pending master requests to run */
  3883. e1000_disable_pciex_master(&adapter->hw);
  3884. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3885. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3886. pci_enable_wake(pdev, PCI_D3hot, 1);
  3887. pci_enable_wake(pdev, PCI_D3cold, 1);
  3888. } else {
  3889. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3890. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3891. pci_enable_wake(pdev, PCI_D3hot, 0);
  3892. pci_enable_wake(pdev, PCI_D3cold, 0);
  3893. }
  3894. if (adapter->hw.mac_type >= e1000_82540 &&
  3895. adapter->hw.media_type == e1000_media_type_copper) {
  3896. manc = E1000_READ_REG(&adapter->hw, MANC);
  3897. if (manc & E1000_MANC_SMBUS_EN) {
  3898. manc |= E1000_MANC_ARP_EN;
  3899. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3900. pci_enable_wake(pdev, PCI_D3hot, 1);
  3901. pci_enable_wake(pdev, PCI_D3cold, 1);
  3902. }
  3903. }
  3904. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3905. * would have already happened in close and is redundant. */
  3906. e1000_release_hw_control(adapter);
  3907. pci_disable_device(pdev);
  3908. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3909. return 0;
  3910. }
  3911. #ifdef CONFIG_PM
  3912. static int
  3913. e1000_resume(struct pci_dev *pdev)
  3914. {
  3915. struct net_device *netdev = pci_get_drvdata(pdev);
  3916. struct e1000_adapter *adapter = netdev_priv(netdev);
  3917. uint32_t manc, ret_val;
  3918. pci_set_power_state(pdev, PCI_D0);
  3919. e1000_pci_restore_state(adapter);
  3920. ret_val = pci_enable_device(pdev);
  3921. pci_set_master(pdev);
  3922. pci_enable_wake(pdev, PCI_D3hot, 0);
  3923. pci_enable_wake(pdev, PCI_D3cold, 0);
  3924. e1000_reset(adapter);
  3925. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3926. if (netif_running(netdev))
  3927. e1000_up(adapter);
  3928. netif_device_attach(netdev);
  3929. if (adapter->hw.mac_type >= e1000_82540 &&
  3930. adapter->hw.media_type == e1000_media_type_copper) {
  3931. manc = E1000_READ_REG(&adapter->hw, MANC);
  3932. manc &= ~(E1000_MANC_ARP_EN);
  3933. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3934. }
  3935. /* If the controller is 82573 and f/w is AMT, do not set
  3936. * DRV_LOAD until the interface is up. For all other cases,
  3937. * let the f/w know that the h/w is now under the control
  3938. * of the driver. */
  3939. if (adapter->hw.mac_type != e1000_82573 ||
  3940. !e1000_check_mng_mode(&adapter->hw))
  3941. e1000_get_hw_control(adapter);
  3942. return 0;
  3943. }
  3944. #endif
  3945. static void e1000_shutdown(struct pci_dev *pdev)
  3946. {
  3947. e1000_suspend(pdev, PMSG_SUSPEND);
  3948. }
  3949. #ifdef CONFIG_NET_POLL_CONTROLLER
  3950. /*
  3951. * Polling 'interrupt' - used by things like netconsole to send skbs
  3952. * without having to re-enable interrupts. It's not called while
  3953. * the interrupt routine is executing.
  3954. */
  3955. static void
  3956. e1000_netpoll(struct net_device *netdev)
  3957. {
  3958. struct e1000_adapter *adapter = netdev_priv(netdev);
  3959. disable_irq(adapter->pdev->irq);
  3960. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3961. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3962. #ifndef CONFIG_E1000_NAPI
  3963. adapter->clean_rx(adapter, adapter->rx_ring);
  3964. #endif
  3965. enable_irq(adapter->pdev->irq);
  3966. }
  3967. #endif
  3968. /* e1000_main.c */