arizona-core.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668
  1. /*
  2. * Arizona core driver
  3. *
  4. * Copyright 2012 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/module.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/mfd/arizona/core.h>
  23. #include <linux/mfd/arizona/registers.h>
  24. #include "arizona.h"
  25. static const char *wm5102_core_supplies[] = {
  26. "AVDD",
  27. "DBVDD1",
  28. };
  29. int arizona_clk32k_enable(struct arizona *arizona)
  30. {
  31. int ret = 0;
  32. mutex_lock(&arizona->clk_lock);
  33. arizona->clk32k_ref++;
  34. if (arizona->clk32k_ref == 1) {
  35. switch (arizona->pdata.clk32k_src) {
  36. case ARIZONA_32KZ_MCLK1:
  37. ret = pm_runtime_get_sync(arizona->dev);
  38. if (ret != 0)
  39. goto out;
  40. break;
  41. }
  42. ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  43. ARIZONA_CLK_32K_ENA,
  44. ARIZONA_CLK_32K_ENA);
  45. }
  46. out:
  47. if (ret != 0)
  48. arizona->clk32k_ref--;
  49. mutex_unlock(&arizona->clk_lock);
  50. return ret;
  51. }
  52. EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
  53. int arizona_clk32k_disable(struct arizona *arizona)
  54. {
  55. int ret = 0;
  56. mutex_lock(&arizona->clk_lock);
  57. BUG_ON(arizona->clk32k_ref <= 0);
  58. arizona->clk32k_ref--;
  59. if (arizona->clk32k_ref == 0) {
  60. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  61. ARIZONA_CLK_32K_ENA, 0);
  62. switch (arizona->pdata.clk32k_src) {
  63. case ARIZONA_32KZ_MCLK1:
  64. pm_runtime_put_sync(arizona->dev);
  65. break;
  66. }
  67. }
  68. mutex_unlock(&arizona->clk_lock);
  69. return ret;
  70. }
  71. EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
  72. static irqreturn_t arizona_clkgen_err(int irq, void *data)
  73. {
  74. struct arizona *arizona = data;
  75. dev_err(arizona->dev, "CLKGEN error\n");
  76. return IRQ_HANDLED;
  77. }
  78. static irqreturn_t arizona_underclocked(int irq, void *data)
  79. {
  80. struct arizona *arizona = data;
  81. unsigned int val;
  82. int ret;
  83. ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
  84. &val);
  85. if (ret != 0) {
  86. dev_err(arizona->dev, "Failed to read underclock status: %d\n",
  87. ret);
  88. return IRQ_NONE;
  89. }
  90. if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
  91. dev_err(arizona->dev, "AIF3 underclocked\n");
  92. if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
  93. dev_err(arizona->dev, "AIF2 underclocked\n");
  94. if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
  95. dev_err(arizona->dev, "AIF1 underclocked\n");
  96. if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
  97. dev_err(arizona->dev, "ISRC2 underclocked\n");
  98. if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
  99. dev_err(arizona->dev, "ISRC1 underclocked\n");
  100. if (val & ARIZONA_FX_UNDERCLOCKED_STS)
  101. dev_err(arizona->dev, "FX underclocked\n");
  102. if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
  103. dev_err(arizona->dev, "ASRC underclocked\n");
  104. if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
  105. dev_err(arizona->dev, "DAC underclocked\n");
  106. if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
  107. dev_err(arizona->dev, "ADC underclocked\n");
  108. if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
  109. dev_err(arizona->dev, "Mixer dropped sample\n");
  110. return IRQ_HANDLED;
  111. }
  112. static irqreturn_t arizona_overclocked(int irq, void *data)
  113. {
  114. struct arizona *arizona = data;
  115. unsigned int val[2];
  116. int ret;
  117. ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
  118. &val[0], 2);
  119. if (ret != 0) {
  120. dev_err(arizona->dev, "Failed to read overclock status: %d\n",
  121. ret);
  122. return IRQ_NONE;
  123. }
  124. if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
  125. dev_err(arizona->dev, "PWM overclocked\n");
  126. if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
  127. dev_err(arizona->dev, "FX core overclocked\n");
  128. if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
  129. dev_err(arizona->dev, "DAC SYS overclocked\n");
  130. if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
  131. dev_err(arizona->dev, "DAC WARP overclocked\n");
  132. if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
  133. dev_err(arizona->dev, "ADC overclocked\n");
  134. if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
  135. dev_err(arizona->dev, "Mixer overclocked\n");
  136. if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
  137. dev_err(arizona->dev, "AIF3 overclocked\n");
  138. if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
  139. dev_err(arizona->dev, "AIF2 overclocked\n");
  140. if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
  141. dev_err(arizona->dev, "AIF1 overclocked\n");
  142. if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
  143. dev_err(arizona->dev, "Pad control overclocked\n");
  144. if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
  145. dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
  146. if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
  147. dev_err(arizona->dev, "Slimbus async overclocked\n");
  148. if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
  149. dev_err(arizona->dev, "Slimbus sync overclocked\n");
  150. if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
  151. dev_err(arizona->dev, "ASRC async system overclocked\n");
  152. if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
  153. dev_err(arizona->dev, "ASRC async WARP overclocked\n");
  154. if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
  155. dev_err(arizona->dev, "ASRC sync system overclocked\n");
  156. if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
  157. dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
  158. if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
  159. dev_err(arizona->dev, "DSP1 overclocked\n");
  160. if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
  161. dev_err(arizona->dev, "ISRC2 overclocked\n");
  162. if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
  163. dev_err(arizona->dev, "ISRC1 overclocked\n");
  164. return IRQ_HANDLED;
  165. }
  166. static int arizona_wait_for_boot(struct arizona *arizona)
  167. {
  168. unsigned int reg;
  169. int ret, i;
  170. /*
  171. * We can't use an interrupt as we need to runtime resume to do so,
  172. * we won't race with the interrupt handler as it'll be blocked on
  173. * runtime resume.
  174. */
  175. for (i = 0; i < 5; i++) {
  176. msleep(1);
  177. ret = regmap_read(arizona->regmap,
  178. ARIZONA_INTERRUPT_RAW_STATUS_5, &reg);
  179. if (ret != 0) {
  180. dev_err(arizona->dev, "Failed to read boot state: %d\n",
  181. ret);
  182. continue;
  183. }
  184. if (reg & ARIZONA_BOOT_DONE_STS)
  185. break;
  186. }
  187. if (reg & ARIZONA_BOOT_DONE_STS) {
  188. regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
  189. ARIZONA_BOOT_DONE_STS);
  190. } else {
  191. dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
  192. return -ETIMEDOUT;
  193. }
  194. pm_runtime_mark_last_busy(arizona->dev);
  195. return 0;
  196. }
  197. #ifdef CONFIG_PM_RUNTIME
  198. static int arizona_runtime_resume(struct device *dev)
  199. {
  200. struct arizona *arizona = dev_get_drvdata(dev);
  201. int ret;
  202. dev_dbg(arizona->dev, "Leaving AoD mode\n");
  203. ret = regulator_enable(arizona->dcvdd);
  204. if (ret != 0) {
  205. dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
  206. return ret;
  207. }
  208. regcache_cache_only(arizona->regmap, false);
  209. ret = arizona_wait_for_boot(arizona);
  210. if (ret != 0) {
  211. goto err;
  212. }
  213. ret = regcache_sync(arizona->regmap);
  214. if (ret != 0) {
  215. dev_err(arizona->dev, "Failed to restore register cache\n");
  216. goto err;
  217. }
  218. return 0;
  219. err:
  220. regcache_cache_only(arizona->regmap, true);
  221. regulator_disable(arizona->dcvdd);
  222. return ret;
  223. }
  224. static int arizona_runtime_suspend(struct device *dev)
  225. {
  226. struct arizona *arizona = dev_get_drvdata(dev);
  227. dev_dbg(arizona->dev, "Entering AoD mode\n");
  228. regulator_disable(arizona->dcvdd);
  229. regcache_cache_only(arizona->regmap, true);
  230. regcache_mark_dirty(arizona->regmap);
  231. return 0;
  232. }
  233. #endif
  234. #ifdef CONFIG_PM_SLEEP
  235. static int arizona_resume_noirq(struct device *dev)
  236. {
  237. struct arizona *arizona = dev_get_drvdata(dev);
  238. dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
  239. disable_irq(arizona->irq);
  240. return 0;
  241. }
  242. static int arizona_resume(struct device *dev)
  243. {
  244. struct arizona *arizona = dev_get_drvdata(dev);
  245. dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
  246. enable_irq(arizona->irq);
  247. return 0;
  248. }
  249. #endif
  250. const struct dev_pm_ops arizona_pm_ops = {
  251. SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
  252. arizona_runtime_resume,
  253. NULL)
  254. SET_SYSTEM_SLEEP_PM_OPS(NULL, arizona_resume)
  255. #ifdef CONFIG_PM_SLEEP
  256. .resume_noirq = arizona_resume_noirq,
  257. #endif
  258. };
  259. EXPORT_SYMBOL_GPL(arizona_pm_ops);
  260. static struct mfd_cell early_devs[] = {
  261. { .name = "arizona-ldo1" },
  262. };
  263. static struct mfd_cell wm5102_devs[] = {
  264. { .name = "arizona-micsupp" },
  265. { .name = "arizona-extcon" },
  266. { .name = "arizona-gpio" },
  267. { .name = "arizona-haptics" },
  268. { .name = "arizona-pwm" },
  269. { .name = "wm5102-codec" },
  270. };
  271. static struct mfd_cell wm5110_devs[] = {
  272. { .name = "arizona-micsupp" },
  273. { .name = "arizona-extcon" },
  274. { .name = "arizona-gpio" },
  275. { .name = "arizona-haptics" },
  276. { .name = "arizona-pwm" },
  277. { .name = "wm5110-codec" },
  278. };
  279. int arizona_dev_init(struct arizona *arizona)
  280. {
  281. struct device *dev = arizona->dev;
  282. const char *type_name;
  283. unsigned int reg, val;
  284. int (*apply_patch)(struct arizona *) = NULL;
  285. int ret, i;
  286. dev_set_drvdata(arizona->dev, arizona);
  287. mutex_init(&arizona->clk_lock);
  288. if (dev_get_platdata(arizona->dev))
  289. memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
  290. sizeof(arizona->pdata));
  291. regcache_cache_only(arizona->regmap, true);
  292. switch (arizona->type) {
  293. case WM5102:
  294. case WM5110:
  295. for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
  296. arizona->core_supplies[i].supply
  297. = wm5102_core_supplies[i];
  298. arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
  299. break;
  300. default:
  301. dev_err(arizona->dev, "Unknown device type %d\n",
  302. arizona->type);
  303. return -EINVAL;
  304. }
  305. ret = mfd_add_devices(arizona->dev, -1, early_devs,
  306. ARRAY_SIZE(early_devs), NULL, 0, NULL);
  307. if (ret != 0) {
  308. dev_err(dev, "Failed to add early children: %d\n", ret);
  309. return ret;
  310. }
  311. ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
  312. arizona->core_supplies);
  313. if (ret != 0) {
  314. dev_err(dev, "Failed to request core supplies: %d\n",
  315. ret);
  316. goto err_early;
  317. }
  318. arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
  319. if (IS_ERR(arizona->dcvdd)) {
  320. ret = PTR_ERR(arizona->dcvdd);
  321. dev_err(dev, "Failed to request DCVDD: %d\n", ret);
  322. goto err_early;
  323. }
  324. ret = regulator_bulk_enable(arizona->num_core_supplies,
  325. arizona->core_supplies);
  326. if (ret != 0) {
  327. dev_err(dev, "Failed to enable core supplies: %d\n",
  328. ret);
  329. goto err_early;
  330. }
  331. ret = regulator_enable(arizona->dcvdd);
  332. if (ret != 0) {
  333. dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
  334. goto err_enable;
  335. }
  336. if (arizona->pdata.reset) {
  337. /* Start out with /RESET low to put the chip into reset */
  338. ret = gpio_request_one(arizona->pdata.reset,
  339. GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  340. "arizona /RESET");
  341. if (ret != 0) {
  342. dev_err(dev, "Failed to request /RESET: %d\n", ret);
  343. goto err_dcvdd;
  344. }
  345. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  346. }
  347. regcache_cache_only(arizona->regmap, false);
  348. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  349. if (ret != 0) {
  350. dev_err(dev, "Failed to read ID register: %d\n", ret);
  351. goto err_reset;
  352. }
  353. ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
  354. &arizona->rev);
  355. if (ret != 0) {
  356. dev_err(dev, "Failed to read revision register: %d\n", ret);
  357. goto err_reset;
  358. }
  359. arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
  360. switch (reg) {
  361. #ifdef CONFIG_MFD_WM5102
  362. case 0x5102:
  363. type_name = "WM5102";
  364. if (arizona->type != WM5102) {
  365. dev_err(arizona->dev, "WM5102 registered as %d\n",
  366. arizona->type);
  367. arizona->type = WM5102;
  368. }
  369. apply_patch = wm5102_patch;
  370. break;
  371. #endif
  372. #ifdef CONFIG_MFD_WM5110
  373. case 0x5110:
  374. type_name = "WM5110";
  375. if (arizona->type != WM5110) {
  376. dev_err(arizona->dev, "WM5110 registered as %d\n",
  377. arizona->type);
  378. arizona->type = WM5110;
  379. }
  380. apply_patch = wm5110_patch;
  381. break;
  382. #endif
  383. default:
  384. dev_err(arizona->dev, "Unknown device ID %x\n", reg);
  385. goto err_reset;
  386. }
  387. dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
  388. /* If we have a /RESET GPIO we'll already be reset */
  389. if (!arizona->pdata.reset) {
  390. regcache_mark_dirty(arizona->regmap);
  391. ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
  392. if (ret != 0) {
  393. dev_err(dev, "Failed to reset device: %d\n", ret);
  394. goto err_reset;
  395. }
  396. ret = regcache_sync(arizona->regmap);
  397. if (ret != 0) {
  398. dev_err(dev, "Failed to sync device: %d\n", ret);
  399. goto err_reset;
  400. }
  401. }
  402. ret = arizona_wait_for_boot(arizona);
  403. if (ret != 0) {
  404. dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
  405. goto err_reset;
  406. }
  407. if (apply_patch) {
  408. ret = apply_patch(arizona);
  409. if (ret != 0) {
  410. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  411. ret);
  412. goto err_reset;
  413. }
  414. }
  415. for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
  416. if (!arizona->pdata.gpio_defaults[i])
  417. continue;
  418. regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
  419. arizona->pdata.gpio_defaults[i]);
  420. }
  421. pm_runtime_set_autosuspend_delay(arizona->dev, 100);
  422. pm_runtime_use_autosuspend(arizona->dev);
  423. pm_runtime_enable(arizona->dev);
  424. /* Chip default */
  425. if (!arizona->pdata.clk32k_src)
  426. arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
  427. switch (arizona->pdata.clk32k_src) {
  428. case ARIZONA_32KZ_MCLK1:
  429. case ARIZONA_32KZ_MCLK2:
  430. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  431. ARIZONA_CLK_32K_SRC_MASK,
  432. arizona->pdata.clk32k_src - 1);
  433. arizona_clk32k_enable(arizona);
  434. break;
  435. case ARIZONA_32KZ_NONE:
  436. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  437. ARIZONA_CLK_32K_SRC_MASK, 2);
  438. break;
  439. default:
  440. dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
  441. arizona->pdata.clk32k_src);
  442. ret = -EINVAL;
  443. goto err_reset;
  444. }
  445. for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
  446. if (!arizona->pdata.micbias[i].mV &&
  447. !arizona->pdata.micbias[i].bypass)
  448. continue;
  449. /* Apply default for bypass mode */
  450. if (!arizona->pdata.micbias[i].mV)
  451. arizona->pdata.micbias[i].mV = 2800;
  452. val = (arizona->pdata.micbias[i].mV - 1500) / 100;
  453. val <<= ARIZONA_MICB1_LVL_SHIFT;
  454. if (arizona->pdata.micbias[i].ext_cap)
  455. val |= ARIZONA_MICB1_EXT_CAP;
  456. if (arizona->pdata.micbias[i].discharge)
  457. val |= ARIZONA_MICB1_DISCH;
  458. if (arizona->pdata.micbias[i].fast_start)
  459. val |= ARIZONA_MICB1_RATE;
  460. if (arizona->pdata.micbias[i].bypass)
  461. val |= ARIZONA_MICB1_BYPASS;
  462. regmap_update_bits(arizona->regmap,
  463. ARIZONA_MIC_BIAS_CTRL_1 + i,
  464. ARIZONA_MICB1_LVL_MASK |
  465. ARIZONA_MICB1_DISCH |
  466. ARIZONA_MICB1_BYPASS |
  467. ARIZONA_MICB1_RATE, val);
  468. }
  469. for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
  470. /* Default for both is 0 so noop with defaults */
  471. val = arizona->pdata.dmic_ref[i]
  472. << ARIZONA_IN1_DMIC_SUP_SHIFT;
  473. val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
  474. regmap_update_bits(arizona->regmap,
  475. ARIZONA_IN1L_CONTROL + (i * 8),
  476. ARIZONA_IN1_DMIC_SUP_MASK |
  477. ARIZONA_IN1_MODE_MASK, val);
  478. }
  479. for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
  480. /* Default is 0 so noop with defaults */
  481. if (arizona->pdata.out_mono[i])
  482. val = ARIZONA_OUT1_MONO;
  483. else
  484. val = 0;
  485. regmap_update_bits(arizona->regmap,
  486. ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
  487. ARIZONA_OUT1_MONO, val);
  488. }
  489. for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
  490. if (arizona->pdata.spk_mute[i])
  491. regmap_update_bits(arizona->regmap,
  492. ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
  493. ARIZONA_SPK1_MUTE_ENDIAN_MASK |
  494. ARIZONA_SPK1_MUTE_SEQ1_MASK,
  495. arizona->pdata.spk_mute[i]);
  496. if (arizona->pdata.spk_fmt[i])
  497. regmap_update_bits(arizona->regmap,
  498. ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
  499. ARIZONA_SPK1_FMT_MASK,
  500. arizona->pdata.spk_fmt[i]);
  501. }
  502. /* Set up for interrupts */
  503. ret = arizona_irq_init(arizona);
  504. if (ret != 0)
  505. goto err_reset;
  506. arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
  507. arizona_clkgen_err, arizona);
  508. arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
  509. arizona_overclocked, arizona);
  510. arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
  511. arizona_underclocked, arizona);
  512. switch (arizona->type) {
  513. case WM5102:
  514. ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
  515. ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
  516. break;
  517. case WM5110:
  518. ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
  519. ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
  520. break;
  521. }
  522. if (ret != 0) {
  523. dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
  524. goto err_irq;
  525. }
  526. #ifdef CONFIG_PM_RUNTIME
  527. regulator_disable(arizona->dcvdd);
  528. #endif
  529. return 0;
  530. err_irq:
  531. arizona_irq_exit(arizona);
  532. err_reset:
  533. if (arizona->pdata.reset) {
  534. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  535. gpio_free(arizona->pdata.reset);
  536. }
  537. err_dcvdd:
  538. regulator_disable(arizona->dcvdd);
  539. err_enable:
  540. regulator_bulk_disable(arizona->num_core_supplies,
  541. arizona->core_supplies);
  542. err_early:
  543. mfd_remove_devices(dev);
  544. return ret;
  545. }
  546. EXPORT_SYMBOL_GPL(arizona_dev_init);
  547. int arizona_dev_exit(struct arizona *arizona)
  548. {
  549. mfd_remove_devices(arizona->dev);
  550. arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
  551. arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
  552. arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
  553. pm_runtime_disable(arizona->dev);
  554. arizona_irq_exit(arizona);
  555. return 0;
  556. }
  557. EXPORT_SYMBOL_GPL(arizona_dev_exit);