fimc-capture.c 48 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "fimc-mdevice.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  33. struct fimc_pipeline *p = &fimc->pipeline;
  34. struct fimc_sensor_info *sensor;
  35. unsigned long flags;
  36. int ret = 0;
  37. if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL)
  38. return -ENXIO;
  39. if (ctx->s_frame.fmt == NULL)
  40. return -EINVAL;
  41. sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]);
  42. spin_lock_irqsave(&fimc->slock, flags);
  43. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  44. fimc_set_yuv_order(ctx);
  45. fimc_hw_set_camera_polarity(fimc, &sensor->pdata);
  46. fimc_hw_set_camera_type(fimc, &sensor->pdata);
  47. fimc_hw_set_camera_source(fimc, &sensor->pdata);
  48. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  49. ret = fimc_set_scaler_info(ctx);
  50. if (!ret) {
  51. fimc_hw_set_input_path(ctx);
  52. fimc_hw_set_prescaler(ctx);
  53. fimc_hw_set_mainscaler(ctx);
  54. fimc_hw_set_target_format(ctx);
  55. fimc_hw_set_rotation(ctx);
  56. fimc_hw_set_effect(ctx);
  57. fimc_hw_set_output_path(ctx);
  58. fimc_hw_set_out_dma(ctx);
  59. if (fimc->drv_data->alpha_color)
  60. fimc_hw_set_rgb_alpha(ctx);
  61. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  62. }
  63. spin_unlock_irqrestore(&fimc->slock, flags);
  64. return ret;
  65. }
  66. /*
  67. * Reinitialize the driver so it is ready to start the streaming again.
  68. * Set fimc->state to indicate stream off and the hardware shut down state.
  69. * If not suspending (@suspend is false), return any buffers to videobuf2.
  70. * Otherwise put any owned buffers onto the pending buffers queue, so they
  71. * can be re-spun when the device is being resumed. Also perform FIMC
  72. * software reset and disable streaming on the whole pipeline if required.
  73. */
  74. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  75. {
  76. struct fimc_vid_cap *cap = &fimc->vid_cap;
  77. struct fimc_vid_buffer *buf;
  78. unsigned long flags;
  79. bool streaming;
  80. spin_lock_irqsave(&fimc->slock, flags);
  81. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  82. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  83. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  84. if (suspend)
  85. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  86. else
  87. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  88. /* Release unused buffers */
  89. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  90. buf = fimc_pending_queue_pop(cap);
  91. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  92. }
  93. /* If suspending put unused buffers onto pending queue */
  94. while (!list_empty(&cap->active_buf_q)) {
  95. buf = fimc_active_queue_pop(cap);
  96. if (suspend)
  97. fimc_pending_queue_add(cap, buf);
  98. else
  99. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  100. }
  101. fimc_hw_reset(fimc);
  102. cap->buf_index = 0;
  103. spin_unlock_irqrestore(&fimc->slock, flags);
  104. if (streaming)
  105. return fimc_pipeline_call(fimc, set_stream,
  106. &fimc->pipeline, 0);
  107. else
  108. return 0;
  109. }
  110. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  111. {
  112. unsigned long flags;
  113. if (!fimc_capture_active(fimc))
  114. return 0;
  115. spin_lock_irqsave(&fimc->slock, flags);
  116. set_bit(ST_CAPT_SHUT, &fimc->state);
  117. fimc_deactivate_capture(fimc);
  118. spin_unlock_irqrestore(&fimc->slock, flags);
  119. wait_event_timeout(fimc->irq_queue,
  120. !test_bit(ST_CAPT_SHUT, &fimc->state),
  121. (2*HZ/10)); /* 200 ms */
  122. return fimc_capture_state_cleanup(fimc, suspend);
  123. }
  124. /**
  125. * fimc_capture_config_update - apply the camera interface configuration
  126. *
  127. * To be called from within the interrupt handler with fimc.slock
  128. * spinlock held. It updates the camera pixel crop, rotation and
  129. * image flip in H/W.
  130. */
  131. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  132. {
  133. struct fimc_dev *fimc = ctx->fimc_dev;
  134. int ret;
  135. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  136. ret = fimc_set_scaler_info(ctx);
  137. if (ret)
  138. return ret;
  139. fimc_hw_set_prescaler(ctx);
  140. fimc_hw_set_mainscaler(ctx);
  141. fimc_hw_set_target_format(ctx);
  142. fimc_hw_set_rotation(ctx);
  143. fimc_hw_set_effect(ctx);
  144. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  145. fimc_hw_set_out_dma(ctx);
  146. if (fimc->drv_data->alpha_color)
  147. fimc_hw_set_rgb_alpha(ctx);
  148. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  149. return ret;
  150. }
  151. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  152. {
  153. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  154. struct fimc_vid_cap *cap = &fimc->vid_cap;
  155. struct fimc_frame *f = &cap->ctx->d_frame;
  156. struct fimc_vid_buffer *v_buf;
  157. struct timeval *tv;
  158. struct timespec ts;
  159. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  160. wake_up(&fimc->irq_queue);
  161. goto done;
  162. }
  163. if (!list_empty(&cap->active_buf_q) &&
  164. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  165. ktime_get_real_ts(&ts);
  166. v_buf = fimc_active_queue_pop(cap);
  167. tv = &v_buf->vb.v4l2_buf.timestamp;
  168. tv->tv_sec = ts.tv_sec;
  169. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  170. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  171. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  172. }
  173. if (!list_empty(&cap->pending_buf_q)) {
  174. v_buf = fimc_pending_queue_pop(cap);
  175. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  176. v_buf->index = cap->buf_index;
  177. /* Move the buffer to the capture active queue */
  178. fimc_active_queue_add(cap, v_buf);
  179. dbg("next frame: %d, done frame: %d",
  180. fimc_hw_get_frame_index(fimc), v_buf->index);
  181. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  182. cap->buf_index = 0;
  183. }
  184. /*
  185. * Set up a buffer at MIPI-CSIS if current image format
  186. * requires the frame embedded data capture.
  187. */
  188. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  189. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  190. unsigned int size = f->payload[plane];
  191. s32 index = fimc_hw_get_frame_index(fimc);
  192. void *vaddr;
  193. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  194. if (v_buf->index != index)
  195. continue;
  196. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  197. v4l2_subdev_call(csis, video, s_rx_buffer,
  198. vaddr, &size);
  199. break;
  200. }
  201. }
  202. if (cap->active_buf_cnt == 0) {
  203. if (deq_buf)
  204. clear_bit(ST_CAPT_RUN, &fimc->state);
  205. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  206. cap->buf_index = 0;
  207. } else {
  208. set_bit(ST_CAPT_RUN, &fimc->state);
  209. }
  210. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  211. fimc_capture_config_update(cap->ctx);
  212. done:
  213. if (cap->active_buf_cnt == 1) {
  214. fimc_deactivate_capture(fimc);
  215. clear_bit(ST_CAPT_STREAM, &fimc->state);
  216. }
  217. dbg("frame: %d, active_buf_cnt: %d",
  218. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  219. }
  220. static int start_streaming(struct vb2_queue *q, unsigned int count)
  221. {
  222. struct fimc_ctx *ctx = q->drv_priv;
  223. struct fimc_dev *fimc = ctx->fimc_dev;
  224. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  225. int min_bufs;
  226. int ret;
  227. vid_cap->frame_count = 0;
  228. ret = fimc_capture_hw_init(fimc);
  229. if (ret) {
  230. fimc_capture_state_cleanup(fimc, false);
  231. return ret;
  232. }
  233. set_bit(ST_CAPT_PEND, &fimc->state);
  234. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  235. if (vid_cap->active_buf_cnt >= min_bufs &&
  236. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  237. fimc_activate_capture(ctx);
  238. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  239. return fimc_pipeline_call(fimc, set_stream,
  240. &fimc->pipeline, 1);
  241. }
  242. return 0;
  243. }
  244. static int stop_streaming(struct vb2_queue *q)
  245. {
  246. struct fimc_ctx *ctx = q->drv_priv;
  247. struct fimc_dev *fimc = ctx->fimc_dev;
  248. if (!fimc_capture_active(fimc))
  249. return -EINVAL;
  250. return fimc_stop_capture(fimc, false);
  251. }
  252. int fimc_capture_suspend(struct fimc_dev *fimc)
  253. {
  254. bool suspend = fimc_capture_busy(fimc);
  255. int ret = fimc_stop_capture(fimc, suspend);
  256. if (ret)
  257. return ret;
  258. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  259. }
  260. static void buffer_queue(struct vb2_buffer *vb);
  261. int fimc_capture_resume(struct fimc_dev *fimc)
  262. {
  263. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  264. struct fimc_vid_buffer *buf;
  265. int i;
  266. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  267. return 0;
  268. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  269. vid_cap->buf_index = 0;
  270. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  271. &vid_cap->vfd.entity, false);
  272. fimc_capture_hw_init(fimc);
  273. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  274. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  275. if (list_empty(&vid_cap->pending_buf_q))
  276. break;
  277. buf = fimc_pending_queue_pop(vid_cap);
  278. buffer_queue(&buf->vb);
  279. }
  280. return 0;
  281. }
  282. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  283. unsigned int *num_buffers, unsigned int *num_planes,
  284. unsigned int sizes[], void *allocators[])
  285. {
  286. const struct v4l2_pix_format_mplane *pixm = NULL;
  287. struct fimc_ctx *ctx = vq->drv_priv;
  288. struct fimc_frame *frame = &ctx->d_frame;
  289. struct fimc_fmt *fmt = frame->fmt;
  290. unsigned long wh;
  291. int i;
  292. if (pfmt) {
  293. pixm = &pfmt->fmt.pix_mp;
  294. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  295. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  296. wh = pixm->width * pixm->height;
  297. } else {
  298. wh = frame->f_width * frame->f_height;
  299. }
  300. if (fmt == NULL)
  301. return -EINVAL;
  302. *num_planes = fmt->memplanes;
  303. for (i = 0; i < fmt->memplanes; i++) {
  304. unsigned int size = (wh * fmt->depth[i]) / 8;
  305. if (pixm)
  306. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  307. else if (fimc_fmt_is_user_defined(fmt->color))
  308. sizes[i] = frame->payload[i];
  309. else
  310. sizes[i] = max_t(u32, size, frame->payload[i]);
  311. allocators[i] = ctx->fimc_dev->alloc_ctx;
  312. }
  313. return 0;
  314. }
  315. static int buffer_prepare(struct vb2_buffer *vb)
  316. {
  317. struct vb2_queue *vq = vb->vb2_queue;
  318. struct fimc_ctx *ctx = vq->drv_priv;
  319. int i;
  320. if (ctx->d_frame.fmt == NULL)
  321. return -EINVAL;
  322. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  323. unsigned long size = ctx->d_frame.payload[i];
  324. if (vb2_plane_size(vb, i) < size) {
  325. v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
  326. "User buffer too small (%ld < %ld)\n",
  327. vb2_plane_size(vb, i), size);
  328. return -EINVAL;
  329. }
  330. vb2_set_plane_payload(vb, i, size);
  331. }
  332. return 0;
  333. }
  334. static void buffer_queue(struct vb2_buffer *vb)
  335. {
  336. struct fimc_vid_buffer *buf
  337. = container_of(vb, struct fimc_vid_buffer, vb);
  338. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  339. struct fimc_dev *fimc = ctx->fimc_dev;
  340. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  341. unsigned long flags;
  342. int min_bufs;
  343. spin_lock_irqsave(&fimc->slock, flags);
  344. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  345. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  346. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  347. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  348. /* Setup the buffer directly for processing. */
  349. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  350. vid_cap->buf_index;
  351. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  352. buf->index = vid_cap->buf_index;
  353. fimc_active_queue_add(vid_cap, buf);
  354. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  355. vid_cap->buf_index = 0;
  356. } else {
  357. fimc_pending_queue_add(vid_cap, buf);
  358. }
  359. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  360. if (vb2_is_streaming(&vid_cap->vbq) &&
  361. vid_cap->active_buf_cnt >= min_bufs &&
  362. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  363. int ret;
  364. fimc_activate_capture(ctx);
  365. spin_unlock_irqrestore(&fimc->slock, flags);
  366. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  367. return;
  368. ret = fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 1);
  369. if (ret < 0)
  370. v4l2_err(&vid_cap->vfd, "stream on failed: %d\n", ret);
  371. return;
  372. }
  373. spin_unlock_irqrestore(&fimc->slock, flags);
  374. }
  375. static struct vb2_ops fimc_capture_qops = {
  376. .queue_setup = queue_setup,
  377. .buf_prepare = buffer_prepare,
  378. .buf_queue = buffer_queue,
  379. .wait_prepare = vb2_ops_wait_prepare,
  380. .wait_finish = vb2_ops_wait_finish,
  381. .start_streaming = start_streaming,
  382. .stop_streaming = stop_streaming,
  383. };
  384. /**
  385. * fimc_capture_ctrls_create - initialize the control handler
  386. * Initialize the capture video node control handler and fill it
  387. * with the FIMC controls. Inherit any sensor's controls if the
  388. * 'user_subdev_api' flag is false (default behaviour).
  389. * This function need to be called with the graph mutex held.
  390. */
  391. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  392. {
  393. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  394. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  395. int ret;
  396. if (WARN_ON(vid_cap->ctx == NULL))
  397. return -ENXIO;
  398. if (vid_cap->ctx->ctrls.ready)
  399. return 0;
  400. ret = fimc_ctrls_create(vid_cap->ctx);
  401. if (ret || vid_cap->user_subdev_api || !sensor ||
  402. !vid_cap->ctx->ctrls.ready)
  403. return ret;
  404. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  405. sensor->ctrl_handler, NULL);
  406. }
  407. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  408. static int fimc_capture_open(struct file *file)
  409. {
  410. struct fimc_dev *fimc = video_drvdata(file);
  411. int ret = -EBUSY;
  412. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  413. fimc_md_graph_lock(fimc);
  414. mutex_lock(&fimc->lock);
  415. if (fimc_m2m_active(fimc))
  416. goto unlock;
  417. set_bit(ST_CAPT_BUSY, &fimc->state);
  418. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  419. if (ret < 0)
  420. goto unlock;
  421. ret = v4l2_fh_open(file);
  422. if (ret) {
  423. pm_runtime_put(&fimc->pdev->dev);
  424. goto unlock;
  425. }
  426. if (v4l2_fh_is_singular_file(file)) {
  427. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  428. &fimc->vid_cap.vfd.entity, true);
  429. if (!ret && !fimc->vid_cap.user_subdev_api)
  430. ret = fimc_capture_set_default_format(fimc);
  431. if (!ret)
  432. ret = fimc_capture_ctrls_create(fimc);
  433. if (ret < 0) {
  434. clear_bit(ST_CAPT_BUSY, &fimc->state);
  435. pm_runtime_put_sync(&fimc->pdev->dev);
  436. v4l2_fh_release(file);
  437. } else {
  438. fimc->vid_cap.refcnt++;
  439. }
  440. }
  441. unlock:
  442. mutex_unlock(&fimc->lock);
  443. fimc_md_graph_unlock(fimc);
  444. return ret;
  445. }
  446. static int fimc_capture_release(struct file *file)
  447. {
  448. struct fimc_dev *fimc = video_drvdata(file);
  449. int ret;
  450. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  451. mutex_lock(&fimc->lock);
  452. if (v4l2_fh_is_singular_file(file)) {
  453. clear_bit(ST_CAPT_BUSY, &fimc->state);
  454. fimc_stop_capture(fimc, false);
  455. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  456. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  457. fimc->vid_cap.refcnt--;
  458. }
  459. pm_runtime_put(&fimc->pdev->dev);
  460. if (v4l2_fh_is_singular_file(file))
  461. fimc_ctrls_delete(fimc->vid_cap.ctx);
  462. ret = vb2_fop_release(file);
  463. mutex_unlock(&fimc->lock);
  464. return ret;
  465. }
  466. static const struct v4l2_file_operations fimc_capture_fops = {
  467. .owner = THIS_MODULE,
  468. .open = fimc_capture_open,
  469. .release = fimc_capture_release,
  470. .poll = vb2_fop_poll,
  471. .unlocked_ioctl = video_ioctl2,
  472. .mmap = vb2_fop_mmap,
  473. };
  474. /*
  475. * Format and crop negotiation helpers
  476. */
  477. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  478. u32 *width, u32 *height,
  479. u32 *code, u32 *fourcc, int pad)
  480. {
  481. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  482. struct fimc_dev *fimc = ctx->fimc_dev;
  483. const struct fimc_variant *var = fimc->variant;
  484. const struct fimc_pix_limit *pl = var->pix_limit;
  485. struct fimc_frame *dst = &ctx->d_frame;
  486. u32 depth, min_w, max_w, min_h, align_h = 3;
  487. u32 mask = FMT_FLAGS_CAM;
  488. struct fimc_fmt *ffmt;
  489. /* Conversion from/to JPEG or User Defined format is not supported */
  490. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  491. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  492. *code = ctx->s_frame.fmt->mbus_code;
  493. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK)
  494. mask |= FMT_FLAGS_M2M;
  495. ffmt = fimc_find_format(fourcc, code, mask, 0);
  496. if (WARN_ON(!ffmt))
  497. return NULL;
  498. if (code)
  499. *code = ffmt->mbus_code;
  500. if (fourcc)
  501. *fourcc = ffmt->fourcc;
  502. if (pad == FIMC_SD_PAD_SINK) {
  503. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  504. pl->scaler_dis_w : pl->scaler_en_w;
  505. /* Apply the camera input interface pixel constraints */
  506. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  507. height, max_t(u32, *height, 32),
  508. FIMC_CAMIF_MAX_HEIGHT,
  509. fimc_fmt_is_user_defined(ffmt->color) ?
  510. 3 : 1,
  511. 0);
  512. return ffmt;
  513. }
  514. /* Can't scale or crop in transparent (JPEG) transfer mode */
  515. if (fimc_fmt_is_user_defined(ffmt->color)) {
  516. *width = ctx->s_frame.f_width;
  517. *height = ctx->s_frame.f_height;
  518. return ffmt;
  519. }
  520. /* Apply the scaler and the output DMA constraints */
  521. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  522. if (ctx->state & FIMC_COMPOSE) {
  523. min_w = dst->offs_h + dst->width;
  524. min_h = dst->offs_v + dst->height;
  525. } else {
  526. min_w = var->min_out_pixsize;
  527. min_h = var->min_out_pixsize;
  528. }
  529. if (var->min_vsize_align == 1 && !rotation)
  530. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  531. depth = fimc_get_format_depth(ffmt);
  532. v4l_bound_align_image(width, min_w, max_w,
  533. ffs(var->min_out_pixsize) - 1,
  534. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  535. align_h,
  536. 64/(ALIGN(depth, 8)));
  537. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  538. pad, code ? *code : 0, *width, *height,
  539. dst->f_width, dst->f_height);
  540. return ffmt;
  541. }
  542. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  543. struct v4l2_rect *r,
  544. int target)
  545. {
  546. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  547. struct fimc_dev *fimc = ctx->fimc_dev;
  548. const struct fimc_variant *var = fimc->variant;
  549. const struct fimc_pix_limit *pl = var->pix_limit;
  550. struct fimc_frame *sink = &ctx->s_frame;
  551. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  552. u32 align_sz = 0, align_h = 4;
  553. u32 max_sc_h, max_sc_v;
  554. /* In JPEG transparent transfer mode cropping is not supported */
  555. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  556. r->width = sink->f_width;
  557. r->height = sink->f_height;
  558. r->left = r->top = 0;
  559. return;
  560. }
  561. if (target == V4L2_SEL_TGT_COMPOSE) {
  562. if (ctx->rotation != 90 && ctx->rotation != 270)
  563. align_h = 1;
  564. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  565. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  566. min_sz = var->min_out_pixsize;
  567. } else {
  568. u32 depth = fimc_get_format_depth(sink->fmt);
  569. align_sz = 64/ALIGN(depth, 8);
  570. min_sz = var->min_inp_pixsize;
  571. min_w = min_h = min_sz;
  572. max_sc_h = max_sc_v = 1;
  573. }
  574. /*
  575. * For the compose rectangle the following constraints must be met:
  576. * - it must fit in the sink pad format rectangle (f_width/f_height);
  577. * - maximum downscaling ratio is 64;
  578. * - maximum crop size depends if the rotator is used or not;
  579. * - the sink pad format width/height must be 4 multiple of the
  580. * prescaler ratios determined by sink pad size and source pad crop,
  581. * the prescaler ratio is returned by fimc_get_scaler_factor().
  582. */
  583. max_w = min_t(u32,
  584. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  585. rotate ? sink->f_height : sink->f_width);
  586. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  587. if (target == V4L2_SEL_TGT_COMPOSE) {
  588. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  589. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  590. if (rotate) {
  591. swap(max_sc_h, max_sc_v);
  592. swap(min_w, min_h);
  593. }
  594. }
  595. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  596. &r->height, min_h, max_h, align_h,
  597. align_sz);
  598. /* Adjust left/top if crop/compose rectangle is out of bounds */
  599. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  600. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  601. r->left = round_down(r->left, var->hor_offs_align);
  602. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  603. target, r->left, r->top, r->width, r->height,
  604. sink->f_width, sink->f_height);
  605. }
  606. /*
  607. * The video node ioctl operations
  608. */
  609. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  610. struct v4l2_capability *cap)
  611. {
  612. struct fimc_dev *fimc = video_drvdata(file);
  613. strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
  614. strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
  615. cap->bus_info[0] = 0;
  616. cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
  617. return 0;
  618. }
  619. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  620. struct v4l2_fmtdesc *f)
  621. {
  622. struct fimc_fmt *fmt;
  623. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  624. f->index);
  625. if (!fmt)
  626. return -EINVAL;
  627. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  628. f->pixelformat = fmt->fourcc;
  629. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  630. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  631. return 0;
  632. }
  633. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  634. {
  635. struct media_pad *pad = &me->pads[0];
  636. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  637. pad = media_entity_remote_source(pad);
  638. if (!pad)
  639. break;
  640. me = pad->entity;
  641. pad = &me->pads[0];
  642. }
  643. return me;
  644. }
  645. /**
  646. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  647. * elements
  648. * @ctx: FIMC capture context
  649. * @tfmt: media bus format to try/set on subdevs
  650. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  651. * @set: true to set format on subdevs, false to try only
  652. */
  653. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  654. struct v4l2_mbus_framefmt *tfmt,
  655. struct fimc_fmt **fmt_id,
  656. bool set)
  657. {
  658. struct fimc_dev *fimc = ctx->fimc_dev;
  659. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  660. struct v4l2_subdev_format sfmt;
  661. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  662. struct media_entity *me;
  663. struct fimc_fmt *ffmt;
  664. struct media_pad *pad;
  665. int ret, i = 1;
  666. u32 fcc;
  667. if (WARN_ON(!sd || !tfmt))
  668. return -EINVAL;
  669. memset(&sfmt, 0, sizeof(sfmt));
  670. sfmt.format = *tfmt;
  671. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  672. me = fimc_pipeline_get_head(&sd->entity);
  673. while (1) {
  674. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  675. FMT_FLAGS_CAM, i++);
  676. if (ffmt == NULL) {
  677. /*
  678. * Notify user-space if common pixel code for
  679. * host and sensor does not exist.
  680. */
  681. return -EINVAL;
  682. }
  683. mf->code = tfmt->code = ffmt->mbus_code;
  684. /* set format on all pipeline subdevs */
  685. while (me != &fimc->vid_cap.subdev.entity) {
  686. sd = media_entity_to_v4l2_subdev(me);
  687. sfmt.pad = 0;
  688. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  689. if (ret)
  690. return ret;
  691. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  692. sfmt.pad = me->num_pads - 1;
  693. mf->code = tfmt->code;
  694. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  695. &sfmt);
  696. if (ret)
  697. return ret;
  698. }
  699. pad = media_entity_remote_source(&me->pads[sfmt.pad]);
  700. if (!pad)
  701. return -EINVAL;
  702. me = pad->entity;
  703. }
  704. if (mf->code != tfmt->code)
  705. continue;
  706. fcc = ffmt->fourcc;
  707. tfmt->width = mf->width;
  708. tfmt->height = mf->height;
  709. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  710. NULL, &fcc, FIMC_SD_PAD_SINK);
  711. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  712. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  713. if (ffmt && ffmt->mbus_code)
  714. mf->code = ffmt->mbus_code;
  715. if (mf->width != tfmt->width || mf->height != tfmt->height)
  716. continue;
  717. tfmt->code = mf->code;
  718. break;
  719. }
  720. if (fmt_id && ffmt)
  721. *fmt_id = ffmt;
  722. *tfmt = *mf;
  723. return 0;
  724. }
  725. /**
  726. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  727. * @sensor: pointer to the sensor subdev
  728. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  729. * @try: true to set the frame parameters, false to query only
  730. *
  731. * This function is used by this driver only for compressed/blob data formats.
  732. */
  733. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  734. struct v4l2_plane_pix_format *plane_fmt,
  735. unsigned int num_planes, bool try)
  736. {
  737. struct v4l2_mbus_frame_desc fd;
  738. int i, ret;
  739. int pad;
  740. for (i = 0; i < num_planes; i++)
  741. fd.entry[i].length = plane_fmt[i].sizeimage;
  742. pad = sensor->entity.num_pads - 1;
  743. if (try)
  744. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  745. else
  746. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  747. if (ret < 0)
  748. return ret;
  749. if (num_planes != fd.num_entries)
  750. return -EINVAL;
  751. for (i = 0; i < num_planes; i++)
  752. plane_fmt[i].sizeimage = fd.entry[i].length;
  753. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  754. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  755. fd.entry[0].length);
  756. return -EINVAL;
  757. }
  758. return 0;
  759. }
  760. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  761. struct v4l2_format *f)
  762. {
  763. struct fimc_dev *fimc = video_drvdata(file);
  764. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  765. return 0;
  766. }
  767. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  768. struct v4l2_format *f)
  769. {
  770. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  771. struct fimc_dev *fimc = video_drvdata(file);
  772. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  773. struct v4l2_mbus_framefmt mf;
  774. struct fimc_fmt *ffmt = NULL;
  775. int ret = 0;
  776. fimc_md_graph_lock(fimc);
  777. mutex_lock(&fimc->lock);
  778. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  779. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  780. NULL, &pix->pixelformat,
  781. FIMC_SD_PAD_SINK);
  782. ctx->s_frame.f_width = pix->width;
  783. ctx->s_frame.f_height = pix->height;
  784. }
  785. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  786. NULL, &pix->pixelformat,
  787. FIMC_SD_PAD_SOURCE);
  788. if (!ffmt) {
  789. ret = -EINVAL;
  790. goto unlock;
  791. }
  792. if (!fimc->vid_cap.user_subdev_api) {
  793. mf.width = pix->width;
  794. mf.height = pix->height;
  795. mf.code = ffmt->mbus_code;
  796. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  797. pix->width = mf.width;
  798. pix->height = mf.height;
  799. if (ffmt)
  800. pix->pixelformat = ffmt->fourcc;
  801. }
  802. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  803. if (ffmt->flags & FMT_FLAGS_COMPRESSED)
  804. fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  805. pix->plane_fmt, ffmt->memplanes, true);
  806. unlock:
  807. mutex_unlock(&fimc->lock);
  808. fimc_md_graph_unlock(fimc);
  809. return ret;
  810. }
  811. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  812. enum fimc_color_fmt color)
  813. {
  814. bool jpeg = fimc_fmt_is_user_defined(color);
  815. ctx->scaler.enabled = !jpeg;
  816. fimc_ctrls_activate(ctx, !jpeg);
  817. if (jpeg)
  818. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  819. else
  820. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  821. }
  822. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  823. struct v4l2_format *f)
  824. {
  825. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  826. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  827. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf;
  828. struct fimc_frame *ff = &ctx->d_frame;
  829. struct fimc_fmt *s_fmt = NULL;
  830. int ret, i;
  831. if (vb2_is_busy(&fimc->vid_cap.vbq))
  832. return -EBUSY;
  833. /* Pre-configure format at camera interface input, for JPEG only */
  834. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  835. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  836. NULL, &pix->pixelformat,
  837. FIMC_SD_PAD_SINK);
  838. ctx->s_frame.f_width = pix->width;
  839. ctx->s_frame.f_height = pix->height;
  840. }
  841. /* Try the format at the scaler and the DMA output */
  842. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  843. NULL, &pix->pixelformat,
  844. FIMC_SD_PAD_SOURCE);
  845. if (!ff->fmt)
  846. return -EINVAL;
  847. /* Update RGB Alpha control state and value range */
  848. fimc_alpha_ctrl_update(ctx);
  849. /* Try to match format at the host and the sensor */
  850. if (!fimc->vid_cap.user_subdev_api) {
  851. mf->code = ff->fmt->mbus_code;
  852. mf->width = pix->width;
  853. mf->height = pix->height;
  854. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  855. if (ret)
  856. return ret;
  857. pix->width = mf->width;
  858. pix->height = mf->height;
  859. }
  860. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  861. if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
  862. ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  863. pix->plane_fmt, ff->fmt->memplanes,
  864. true);
  865. if (ret < 0)
  866. return ret;
  867. }
  868. for (i = 0; i < ff->fmt->memplanes; i++) {
  869. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  870. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  871. }
  872. set_frame_bounds(ff, pix->width, pix->height);
  873. /* Reset the composition rectangle if not yet configured */
  874. if (!(ctx->state & FIMC_COMPOSE))
  875. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  876. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  877. /* Reset cropping and set format at the camera interface input */
  878. if (!fimc->vid_cap.user_subdev_api) {
  879. ctx->s_frame.fmt = s_fmt;
  880. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  881. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  882. }
  883. return ret;
  884. }
  885. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  886. struct v4l2_format *f)
  887. {
  888. struct fimc_dev *fimc = video_drvdata(file);
  889. int ret;
  890. fimc_md_graph_lock(fimc);
  891. mutex_lock(&fimc->lock);
  892. /*
  893. * The graph is walked within __fimc_capture_set_format() to set
  894. * the format at subdevs thus the graph mutex needs to be held at
  895. * this point and acquired before the video mutex, to avoid AB-BA
  896. * deadlock when fimc_md_link_notify() is called by other thread.
  897. * Ideally the graph walking and setting format at the whole pipeline
  898. * should be removed from this driver and handled in userspace only.
  899. */
  900. ret = __fimc_capture_set_format(fimc, f);
  901. mutex_unlock(&fimc->lock);
  902. fimc_md_graph_unlock(fimc);
  903. return ret;
  904. }
  905. static int fimc_cap_enum_input(struct file *file, void *priv,
  906. struct v4l2_input *i)
  907. {
  908. struct fimc_dev *fimc = video_drvdata(file);
  909. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  910. if (i->index != 0)
  911. return -EINVAL;
  912. i->type = V4L2_INPUT_TYPE_CAMERA;
  913. if (sd)
  914. strlcpy(i->name, sd->name, sizeof(i->name));
  915. return 0;
  916. }
  917. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  918. {
  919. return i == 0 ? i : -EINVAL;
  920. }
  921. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  922. {
  923. *i = 0;
  924. return 0;
  925. }
  926. /**
  927. * fimc_pipeline_validate - check for formats inconsistencies
  928. * between source and sink pad of each link
  929. *
  930. * Return 0 if all formats match or -EPIPE otherwise.
  931. */
  932. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  933. {
  934. struct v4l2_subdev_format sink_fmt, src_fmt;
  935. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  936. struct v4l2_subdev *sd;
  937. struct media_pad *pad;
  938. int ret;
  939. /* Start with the video capture node pad */
  940. pad = media_entity_remote_source(&vid_cap->vd_pad);
  941. if (pad == NULL)
  942. return -EPIPE;
  943. /* FIMC.{N} subdevice */
  944. sd = media_entity_to_v4l2_subdev(pad->entity);
  945. while (1) {
  946. /* Retrieve format at the sink pad */
  947. pad = &sd->entity.pads[0];
  948. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  949. break;
  950. /* Don't call FIMC subdev operation to avoid nested locking */
  951. if (sd == &fimc->vid_cap.subdev) {
  952. struct fimc_frame *ff = &vid_cap->ctx->s_frame;
  953. sink_fmt.format.width = ff->f_width;
  954. sink_fmt.format.height = ff->f_height;
  955. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  956. } else {
  957. sink_fmt.pad = pad->index;
  958. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  959. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  960. if (ret < 0 && ret != -ENOIOCTLCMD)
  961. return -EPIPE;
  962. }
  963. /* Retrieve format at the source pad */
  964. pad = media_entity_remote_source(pad);
  965. if (pad == NULL ||
  966. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  967. break;
  968. sd = media_entity_to_v4l2_subdev(pad->entity);
  969. src_fmt.pad = pad->index;
  970. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  971. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  972. if (ret < 0 && ret != -ENOIOCTLCMD)
  973. return -EPIPE;
  974. if (src_fmt.format.width != sink_fmt.format.width ||
  975. src_fmt.format.height != sink_fmt.format.height ||
  976. src_fmt.format.code != sink_fmt.format.code)
  977. return -EPIPE;
  978. if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
  979. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  980. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  981. struct fimc_frame *frame = &vid_cap->ctx->d_frame;
  982. unsigned int i;
  983. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  984. frame->fmt->memplanes,
  985. false);
  986. if (ret < 0)
  987. return -EPIPE;
  988. for (i = 0; i < frame->fmt->memplanes; i++)
  989. if (frame->payload[i] < plane_fmt[i].sizeimage)
  990. return -EPIPE;
  991. }
  992. }
  993. return 0;
  994. }
  995. static int fimc_cap_streamon(struct file *file, void *priv,
  996. enum v4l2_buf_type type)
  997. {
  998. struct fimc_dev *fimc = video_drvdata(file);
  999. struct fimc_pipeline *p = &fimc->pipeline;
  1000. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1001. struct media_entity *entity = &vc->vfd.entity;
  1002. int ret;
  1003. if (fimc_capture_active(fimc))
  1004. return -EBUSY;
  1005. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  1006. if (ret < 0)
  1007. return ret;
  1008. if (vc->user_subdev_api) {
  1009. ret = fimc_pipeline_validate(fimc);
  1010. if (ret < 0)
  1011. goto err_p_stop;
  1012. }
  1013. ret = vb2_ioctl_streamon(file, priv, type);
  1014. if (!ret)
  1015. return ret;
  1016. err_p_stop:
  1017. media_entity_pipeline_stop(entity);
  1018. return ret;
  1019. }
  1020. static int fimc_cap_streamoff(struct file *file, void *priv,
  1021. enum v4l2_buf_type type)
  1022. {
  1023. struct fimc_dev *fimc = video_drvdata(file);
  1024. int ret;
  1025. ret = vb2_ioctl_streamoff(file, priv, type);
  1026. if (ret == 0)
  1027. media_entity_pipeline_stop(&fimc->vid_cap.vfd.entity);
  1028. return ret;
  1029. }
  1030. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1031. struct v4l2_requestbuffers *reqbufs)
  1032. {
  1033. struct fimc_dev *fimc = video_drvdata(file);
  1034. int ret;
  1035. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1036. if (!ret)
  1037. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1038. return ret;
  1039. }
  1040. static int fimc_cap_g_selection(struct file *file, void *fh,
  1041. struct v4l2_selection *s)
  1042. {
  1043. struct fimc_dev *fimc = video_drvdata(file);
  1044. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1045. struct fimc_frame *f = &ctx->s_frame;
  1046. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1047. return -EINVAL;
  1048. switch (s->target) {
  1049. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1050. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1051. f = &ctx->d_frame;
  1052. case V4L2_SEL_TGT_CROP_BOUNDS:
  1053. case V4L2_SEL_TGT_CROP_DEFAULT:
  1054. s->r.left = 0;
  1055. s->r.top = 0;
  1056. s->r.width = f->o_width;
  1057. s->r.height = f->o_height;
  1058. return 0;
  1059. case V4L2_SEL_TGT_COMPOSE:
  1060. f = &ctx->d_frame;
  1061. case V4L2_SEL_TGT_CROP:
  1062. s->r.left = f->offs_h;
  1063. s->r.top = f->offs_v;
  1064. s->r.width = f->width;
  1065. s->r.height = f->height;
  1066. return 0;
  1067. }
  1068. return -EINVAL;
  1069. }
  1070. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1071. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1072. {
  1073. if (a->left < b->left || a->top < b->top)
  1074. return 0;
  1075. if (a->left + a->width > b->left + b->width)
  1076. return 0;
  1077. if (a->top + a->height > b->top + b->height)
  1078. return 0;
  1079. return 1;
  1080. }
  1081. static int fimc_cap_s_selection(struct file *file, void *fh,
  1082. struct v4l2_selection *s)
  1083. {
  1084. struct fimc_dev *fimc = video_drvdata(file);
  1085. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1086. struct v4l2_rect rect = s->r;
  1087. struct fimc_frame *f;
  1088. unsigned long flags;
  1089. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1090. return -EINVAL;
  1091. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1092. f = &ctx->d_frame;
  1093. else if (s->target == V4L2_SEL_TGT_CROP)
  1094. f = &ctx->s_frame;
  1095. else
  1096. return -EINVAL;
  1097. fimc_capture_try_selection(ctx, &rect, s->target);
  1098. if (s->flags & V4L2_SEL_FLAG_LE &&
  1099. !enclosed_rectangle(&rect, &s->r))
  1100. return -ERANGE;
  1101. if (s->flags & V4L2_SEL_FLAG_GE &&
  1102. !enclosed_rectangle(&s->r, &rect))
  1103. return -ERANGE;
  1104. s->r = rect;
  1105. spin_lock_irqsave(&fimc->slock, flags);
  1106. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1107. s->r.height);
  1108. spin_unlock_irqrestore(&fimc->slock, flags);
  1109. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1110. return 0;
  1111. }
  1112. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1113. .vidioc_querycap = fimc_vidioc_querycap_capture,
  1114. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1115. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1116. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1117. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1118. .vidioc_reqbufs = fimc_cap_reqbufs,
  1119. .vidioc_querybuf = vb2_ioctl_querybuf,
  1120. .vidioc_qbuf = vb2_ioctl_qbuf,
  1121. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1122. .vidioc_expbuf = vb2_ioctl_expbuf,
  1123. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1124. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1125. .vidioc_streamon = fimc_cap_streamon,
  1126. .vidioc_streamoff = fimc_cap_streamoff,
  1127. .vidioc_g_selection = fimc_cap_g_selection,
  1128. .vidioc_s_selection = fimc_cap_s_selection,
  1129. .vidioc_enum_input = fimc_cap_enum_input,
  1130. .vidioc_s_input = fimc_cap_s_input,
  1131. .vidioc_g_input = fimc_cap_g_input,
  1132. };
  1133. /* Capture subdev media entity operations */
  1134. static int fimc_link_setup(struct media_entity *entity,
  1135. const struct media_pad *local,
  1136. const struct media_pad *remote, u32 flags)
  1137. {
  1138. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1139. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1140. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1141. return -EINVAL;
  1142. if (WARN_ON(fimc == NULL))
  1143. return 0;
  1144. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1145. local->entity->name, remote->entity->name, flags,
  1146. fimc->vid_cap.input);
  1147. if (flags & MEDIA_LNK_FL_ENABLED) {
  1148. if (fimc->vid_cap.input != 0)
  1149. return -EBUSY;
  1150. fimc->vid_cap.input = sd->grp_id;
  1151. return 0;
  1152. }
  1153. fimc->vid_cap.input = 0;
  1154. return 0;
  1155. }
  1156. static const struct media_entity_operations fimc_sd_media_ops = {
  1157. .link_setup = fimc_link_setup,
  1158. };
  1159. /**
  1160. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1161. * @sd: pointer to a subdev generating the notification
  1162. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1163. * @arg: pointer to an u32 type integer that stores the frame payload value
  1164. *
  1165. * The End Of Frame notification sent by sensor subdev in its still capture
  1166. * mode. If there is only a single VSYNC generated by the sensor at the
  1167. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1168. * (end of frame) interrupt. And this notification is used to complete the
  1169. * frame capture and returning a buffer to user-space. Subdev drivers should
  1170. * call this notification from their last 'End of frame capture' interrupt.
  1171. */
  1172. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1173. void *arg)
  1174. {
  1175. struct fimc_sensor_info *sensor;
  1176. struct fimc_vid_buffer *buf;
  1177. struct fimc_md *fmd;
  1178. struct fimc_dev *fimc;
  1179. unsigned long flags;
  1180. if (sd == NULL)
  1181. return;
  1182. sensor = v4l2_get_subdev_hostdata(sd);
  1183. fmd = entity_to_fimc_mdev(&sd->entity);
  1184. spin_lock_irqsave(&fmd->slock, flags);
  1185. fimc = sensor ? sensor->host : NULL;
  1186. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1187. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1188. unsigned long irq_flags;
  1189. spin_lock_irqsave(&fimc->slock, irq_flags);
  1190. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1191. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1192. struct fimc_vid_buffer, list);
  1193. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1194. }
  1195. fimc_capture_irq_handler(fimc, 1);
  1196. fimc_deactivate_capture(fimc);
  1197. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1198. }
  1199. spin_unlock_irqrestore(&fmd->slock, flags);
  1200. }
  1201. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1202. struct v4l2_subdev_fh *fh,
  1203. struct v4l2_subdev_mbus_code_enum *code)
  1204. {
  1205. struct fimc_fmt *fmt;
  1206. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1207. if (!fmt)
  1208. return -EINVAL;
  1209. code->code = fmt->mbus_code;
  1210. return 0;
  1211. }
  1212. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1213. struct v4l2_subdev_fh *fh,
  1214. struct v4l2_subdev_format *fmt)
  1215. {
  1216. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1217. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1218. struct v4l2_mbus_framefmt *mf;
  1219. struct fimc_frame *ff;
  1220. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1221. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1222. fmt->format = *mf;
  1223. return 0;
  1224. }
  1225. mf = &fmt->format;
  1226. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1227. ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame;
  1228. mutex_lock(&fimc->lock);
  1229. /* The pixel code is same on both input and output pad */
  1230. if (!WARN_ON(ctx->s_frame.fmt == NULL))
  1231. mf->code = ctx->s_frame.fmt->mbus_code;
  1232. mf->width = ff->f_width;
  1233. mf->height = ff->f_height;
  1234. mutex_unlock(&fimc->lock);
  1235. return 0;
  1236. }
  1237. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1238. struct v4l2_subdev_fh *fh,
  1239. struct v4l2_subdev_format *fmt)
  1240. {
  1241. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1242. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1243. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1244. struct fimc_frame *ff;
  1245. struct fimc_fmt *ffmt;
  1246. dbg("pad%d: code: 0x%x, %dx%d",
  1247. fmt->pad, mf->code, mf->width, mf->height);
  1248. if (fmt->pad == FIMC_SD_PAD_SOURCE &&
  1249. vb2_is_busy(&fimc->vid_cap.vbq))
  1250. return -EBUSY;
  1251. mutex_lock(&fimc->lock);
  1252. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1253. &mf->code, NULL, fmt->pad);
  1254. mutex_unlock(&fimc->lock);
  1255. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1256. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1257. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1258. *mf = fmt->format;
  1259. return 0;
  1260. }
  1261. /* There must be a bug in the driver if this happens */
  1262. if (WARN_ON(ffmt == NULL))
  1263. return -EINVAL;
  1264. /* Update RGB Alpha control state and value range */
  1265. fimc_alpha_ctrl_update(ctx);
  1266. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1267. ff = fmt->pad == FIMC_SD_PAD_SINK ?
  1268. &ctx->s_frame : &ctx->d_frame;
  1269. mutex_lock(&fimc->lock);
  1270. set_frame_bounds(ff, mf->width, mf->height);
  1271. fimc->vid_cap.mf = *mf;
  1272. ff->fmt = ffmt;
  1273. /* Reset the crop rectangle if required. */
  1274. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1275. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1276. if (fmt->pad == FIMC_SD_PAD_SINK)
  1277. ctx->state &= ~FIMC_COMPOSE;
  1278. mutex_unlock(&fimc->lock);
  1279. return 0;
  1280. }
  1281. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1282. struct v4l2_subdev_fh *fh,
  1283. struct v4l2_subdev_selection *sel)
  1284. {
  1285. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1286. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1287. struct fimc_frame *f = &ctx->s_frame;
  1288. struct v4l2_rect *r = &sel->r;
  1289. struct v4l2_rect *try_sel;
  1290. if (sel->pad != FIMC_SD_PAD_SINK)
  1291. return -EINVAL;
  1292. mutex_lock(&fimc->lock);
  1293. switch (sel->target) {
  1294. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1295. f = &ctx->d_frame;
  1296. case V4L2_SEL_TGT_CROP_BOUNDS:
  1297. r->width = f->o_width;
  1298. r->height = f->o_height;
  1299. r->left = 0;
  1300. r->top = 0;
  1301. mutex_unlock(&fimc->lock);
  1302. return 0;
  1303. case V4L2_SEL_TGT_CROP:
  1304. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1305. break;
  1306. case V4L2_SEL_TGT_COMPOSE:
  1307. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1308. f = &ctx->d_frame;
  1309. break;
  1310. default:
  1311. mutex_unlock(&fimc->lock);
  1312. return -EINVAL;
  1313. }
  1314. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1315. sel->r = *try_sel;
  1316. } else {
  1317. r->left = f->offs_h;
  1318. r->top = f->offs_v;
  1319. r->width = f->width;
  1320. r->height = f->height;
  1321. }
  1322. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1323. sel->pad, r->left, r->top, r->width, r->height,
  1324. f->f_width, f->f_height);
  1325. mutex_unlock(&fimc->lock);
  1326. return 0;
  1327. }
  1328. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1329. struct v4l2_subdev_fh *fh,
  1330. struct v4l2_subdev_selection *sel)
  1331. {
  1332. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1333. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1334. struct fimc_frame *f = &ctx->s_frame;
  1335. struct v4l2_rect *r = &sel->r;
  1336. struct v4l2_rect *try_sel;
  1337. unsigned long flags;
  1338. if (sel->pad != FIMC_SD_PAD_SINK)
  1339. return -EINVAL;
  1340. mutex_lock(&fimc->lock);
  1341. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1342. switch (sel->target) {
  1343. case V4L2_SEL_TGT_CROP:
  1344. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1345. break;
  1346. case V4L2_SEL_TGT_COMPOSE:
  1347. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1348. f = &ctx->d_frame;
  1349. break;
  1350. default:
  1351. mutex_unlock(&fimc->lock);
  1352. return -EINVAL;
  1353. }
  1354. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1355. *try_sel = sel->r;
  1356. } else {
  1357. spin_lock_irqsave(&fimc->slock, flags);
  1358. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1359. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1360. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1361. ctx->state |= FIMC_COMPOSE;
  1362. spin_unlock_irqrestore(&fimc->slock, flags);
  1363. }
  1364. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1365. r->width, r->height);
  1366. mutex_unlock(&fimc->lock);
  1367. return 0;
  1368. }
  1369. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1370. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1371. .get_selection = fimc_subdev_get_selection,
  1372. .set_selection = fimc_subdev_set_selection,
  1373. .get_fmt = fimc_subdev_get_fmt,
  1374. .set_fmt = fimc_subdev_set_fmt,
  1375. };
  1376. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1377. .pad = &fimc_subdev_pad_ops,
  1378. };
  1379. /* Set default format at the sensor and host interface */
  1380. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1381. {
  1382. struct v4l2_format fmt = {
  1383. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1384. .fmt.pix_mp = {
  1385. .width = 640,
  1386. .height = 480,
  1387. .pixelformat = V4L2_PIX_FMT_YUYV,
  1388. .field = V4L2_FIELD_NONE,
  1389. .colorspace = V4L2_COLORSPACE_JPEG,
  1390. },
  1391. };
  1392. return __fimc_capture_set_format(fimc, &fmt);
  1393. }
  1394. /* fimc->lock must be already initialized */
  1395. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1396. struct v4l2_device *v4l2_dev)
  1397. {
  1398. struct video_device *vfd = &fimc->vid_cap.vfd;
  1399. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1400. struct fimc_ctx *ctx;
  1401. struct fimc_vid_cap *vid_cap;
  1402. int ret = -ENOMEM;
  1403. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1404. if (!ctx)
  1405. return -ENOMEM;
  1406. ctx->fimc_dev = fimc;
  1407. ctx->in_path = FIMC_IO_CAMERA;
  1408. ctx->out_path = FIMC_IO_DMA;
  1409. ctx->state = FIMC_CTX_CAP;
  1410. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1411. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1412. memset(vfd, 0, sizeof(*vfd));
  1413. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1414. vfd->fops = &fimc_capture_fops;
  1415. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1416. vfd->v4l2_dev = v4l2_dev;
  1417. vfd->minor = -1;
  1418. vfd->release = video_device_release_empty;
  1419. vfd->queue = q;
  1420. vfd->lock = &fimc->lock;
  1421. video_set_drvdata(vfd, fimc);
  1422. vid_cap = &fimc->vid_cap;
  1423. vid_cap->active_buf_cnt = 0;
  1424. vid_cap->reqbufs_count = 0;
  1425. vid_cap->ctx = ctx;
  1426. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1427. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1428. memset(q, 0, sizeof(*q));
  1429. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1430. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1431. q->drv_priv = ctx;
  1432. q->ops = &fimc_capture_qops;
  1433. q->mem_ops = &vb2_dma_contig_memops;
  1434. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1435. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1436. q->lock = &fimc->lock;
  1437. ret = vb2_queue_init(q);
  1438. if (ret)
  1439. goto err_ent;
  1440. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1441. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1442. if (ret)
  1443. goto err_ent;
  1444. /*
  1445. * For proper order of acquiring/releasing the video
  1446. * and the graph mutex.
  1447. */
  1448. v4l2_disable_ioctl_locking(vfd, VIDIOC_TRY_FMT);
  1449. v4l2_disable_ioctl_locking(vfd, VIDIOC_S_FMT);
  1450. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1451. if (ret)
  1452. goto err_vd;
  1453. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1454. vfd->name, video_device_node_name(vfd));
  1455. vfd->ctrl_handler = &ctx->ctrls.handler;
  1456. return 0;
  1457. err_vd:
  1458. media_entity_cleanup(&vfd->entity);
  1459. err_ent:
  1460. kfree(ctx);
  1461. return ret;
  1462. }
  1463. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1464. {
  1465. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1466. int ret;
  1467. if (fimc == NULL)
  1468. return -ENXIO;
  1469. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1470. if (ret)
  1471. return ret;
  1472. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1473. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1474. if (ret) {
  1475. fimc_unregister_m2m_device(fimc);
  1476. fimc->pipeline_ops = NULL;
  1477. }
  1478. return ret;
  1479. }
  1480. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1481. {
  1482. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1483. if (fimc == NULL)
  1484. return;
  1485. fimc_unregister_m2m_device(fimc);
  1486. if (video_is_registered(&fimc->vid_cap.vfd)) {
  1487. video_unregister_device(&fimc->vid_cap.vfd);
  1488. media_entity_cleanup(&fimc->vid_cap.vfd.entity);
  1489. fimc->pipeline_ops = NULL;
  1490. }
  1491. kfree(fimc->vid_cap.ctx);
  1492. fimc->vid_cap.ctx = NULL;
  1493. }
  1494. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1495. .registered = fimc_capture_subdev_registered,
  1496. .unregistered = fimc_capture_subdev_unregistered,
  1497. };
  1498. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1499. {
  1500. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1501. int ret;
  1502. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1503. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1504. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1505. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1506. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1507. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1508. fimc->vid_cap.sd_pads, 0);
  1509. if (ret)
  1510. return ret;
  1511. sd->entity.ops = &fimc_sd_media_ops;
  1512. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1513. v4l2_set_subdevdata(sd, fimc);
  1514. return 0;
  1515. }
  1516. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1517. {
  1518. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1519. v4l2_device_unregister_subdev(sd);
  1520. media_entity_cleanup(&sd->entity);
  1521. v4l2_set_subdevdata(sd, NULL);
  1522. }