hpsa.c 123 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  92. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  93. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  94. {0,}
  95. };
  96. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  97. /* board_id = Subsystem Device ID & Vendor ID
  98. * product = Marketing Name for the board
  99. * access = Address of the struct of function pointers
  100. */
  101. static struct board_type products[] = {
  102. {0x3241103C, "Smart Array P212", &SA5_access},
  103. {0x3243103C, "Smart Array P410", &SA5_access},
  104. {0x3245103C, "Smart Array P410i", &SA5_access},
  105. {0x3247103C, "Smart Array P411", &SA5_access},
  106. {0x3249103C, "Smart Array P812", &SA5_access},
  107. {0x324a103C, "Smart Array P712m", &SA5_access},
  108. {0x324b103C, "Smart Array P711m", &SA5_access},
  109. {0x3350103C, "Smart Array", &SA5_access},
  110. {0x3351103C, "Smart Array", &SA5_access},
  111. {0x3352103C, "Smart Array", &SA5_access},
  112. {0x3353103C, "Smart Array", &SA5_access},
  113. {0x3354103C, "Smart Array", &SA5_access},
  114. {0x3355103C, "Smart Array", &SA5_access},
  115. {0x3356103C, "Smart Array", &SA5_access},
  116. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  117. };
  118. static int number_of_controllers;
  119. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  120. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  121. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  122. static void start_io(struct ctlr_info *h);
  123. #ifdef CONFIG_COMPAT
  124. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  125. #endif
  126. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  127. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  128. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  129. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  130. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  131. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  132. int cmd_type);
  133. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static int check_for_unit_attention(struct ctlr_info *h,
  144. struct CommandList *c);
  145. static void check_ioctl_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. /* performant mode helper functions */
  148. static void calc_bucket_map(int *bucket, int num_buckets,
  149. int nsgs, int *bucket_map);
  150. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  151. static inline u32 next_command(struct ctlr_info *h);
  152. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  153. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  154. u64 *cfg_offset);
  155. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  156. unsigned long *memory_bar);
  157. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  158. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  159. void __iomem *vaddr, int wait_for_ready);
  160. #define BOARD_NOT_READY 0
  161. #define BOARD_READY 1
  162. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  163. {
  164. unsigned long *priv = shost_priv(sdev->host);
  165. return (struct ctlr_info *) *priv;
  166. }
  167. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  168. {
  169. unsigned long *priv = shost_priv(sh);
  170. return (struct ctlr_info *) *priv;
  171. }
  172. static int check_for_unit_attention(struct ctlr_info *h,
  173. struct CommandList *c)
  174. {
  175. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  176. return 0;
  177. switch (c->err_info->SenseInfo[12]) {
  178. case STATE_CHANGED:
  179. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  180. "detected, command retried\n", h->ctlr);
  181. break;
  182. case LUN_FAILED:
  183. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  184. "detected, action required\n", h->ctlr);
  185. break;
  186. case REPORT_LUNS_CHANGED:
  187. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  188. "changed, action required\n", h->ctlr);
  189. /*
  190. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  191. */
  192. break;
  193. case POWER_OR_RESET:
  194. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  195. "or device reset detected\n", h->ctlr);
  196. break;
  197. case UNIT_ATTENTION_CLEARED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  199. "cleared by another initiator\n", h->ctlr);
  200. break;
  201. default:
  202. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  203. "unit attention detected\n", h->ctlr);
  204. break;
  205. }
  206. return 1;
  207. }
  208. static ssize_t host_store_rescan(struct device *dev,
  209. struct device_attribute *attr,
  210. const char *buf, size_t count)
  211. {
  212. struct ctlr_info *h;
  213. struct Scsi_Host *shost = class_to_shost(dev);
  214. h = shost_to_hba(shost);
  215. hpsa_scan_start(h->scsi_host);
  216. return count;
  217. }
  218. static ssize_t host_show_firmware_revision(struct device *dev,
  219. struct device_attribute *attr, char *buf)
  220. {
  221. struct ctlr_info *h;
  222. struct Scsi_Host *shost = class_to_shost(dev);
  223. unsigned char *fwrev;
  224. h = shost_to_hba(shost);
  225. if (!h->hba_inquiry_data)
  226. return 0;
  227. fwrev = &h->hba_inquiry_data[32];
  228. return snprintf(buf, 20, "%c%c%c%c\n",
  229. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  230. }
  231. static ssize_t host_show_commands_outstanding(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct Scsi_Host *shost = class_to_shost(dev);
  235. struct ctlr_info *h = shost_to_hba(shost);
  236. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  237. }
  238. static ssize_t host_show_transport_mode(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct ctlr_info *h;
  242. struct Scsi_Host *shost = class_to_shost(dev);
  243. h = shost_to_hba(shost);
  244. return snprintf(buf, 20, "%s\n",
  245. h->transMethod & CFGTBL_Trans_Performant ?
  246. "performant" : "simple");
  247. }
  248. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  249. static u32 unresettable_controller[] = {
  250. 0x324a103C, /* Smart Array P712m */
  251. 0x324b103C, /* SmartArray P711m */
  252. 0x3223103C, /* Smart Array P800 */
  253. 0x3234103C, /* Smart Array P400 */
  254. 0x3235103C, /* Smart Array P400i */
  255. 0x3211103C, /* Smart Array E200i */
  256. 0x3212103C, /* Smart Array E200 */
  257. 0x3213103C, /* Smart Array E200i */
  258. 0x3214103C, /* Smart Array E200i */
  259. 0x3215103C, /* Smart Array E200i */
  260. 0x3237103C, /* Smart Array E500 */
  261. 0x323D103C, /* Smart Array P700m */
  262. 0x409C0E11, /* Smart Array 6400 */
  263. 0x409D0E11, /* Smart Array 6400 EM */
  264. };
  265. /* List of controllers which cannot even be soft reset */
  266. static u32 soft_unresettable_controller[] = {
  267. /* Exclude 640x boards. These are two pci devices in one slot
  268. * which share a battery backed cache module. One controls the
  269. * cache, the other accesses the cache through the one that controls
  270. * it. If we reset the one controlling the cache, the other will
  271. * likely not be happy. Just forbid resetting this conjoined mess.
  272. * The 640x isn't really supported by hpsa anyway.
  273. */
  274. 0x409C0E11, /* Smart Array 6400 */
  275. 0x409D0E11, /* Smart Array 6400 EM */
  276. };
  277. static int ctlr_is_hard_resettable(u32 board_id)
  278. {
  279. int i;
  280. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  281. if (unresettable_controller[i] == board_id)
  282. return 0;
  283. return 1;
  284. }
  285. static int ctlr_is_soft_resettable(u32 board_id)
  286. {
  287. int i;
  288. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  289. if (soft_unresettable_controller[i] == board_id)
  290. return 0;
  291. return 1;
  292. }
  293. static int ctlr_is_resettable(u32 board_id)
  294. {
  295. return ctlr_is_hard_resettable(board_id) ||
  296. ctlr_is_soft_resettable(board_id);
  297. }
  298. static ssize_t host_show_resettable(struct device *dev,
  299. struct device_attribute *attr, char *buf)
  300. {
  301. struct ctlr_info *h;
  302. struct Scsi_Host *shost = class_to_shost(dev);
  303. h = shost_to_hba(shost);
  304. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  305. }
  306. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  307. {
  308. return (scsi3addr[3] & 0xC0) == 0x40;
  309. }
  310. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  311. "UNKNOWN"
  312. };
  313. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  314. static ssize_t raid_level_show(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. ssize_t l = 0;
  318. unsigned char rlevel;
  319. struct ctlr_info *h;
  320. struct scsi_device *sdev;
  321. struct hpsa_scsi_dev_t *hdev;
  322. unsigned long flags;
  323. sdev = to_scsi_device(dev);
  324. h = sdev_to_hba(sdev);
  325. spin_lock_irqsave(&h->lock, flags);
  326. hdev = sdev->hostdata;
  327. if (!hdev) {
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. return -ENODEV;
  330. }
  331. /* Is this even a logical drive? */
  332. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  333. spin_unlock_irqrestore(&h->lock, flags);
  334. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  335. return l;
  336. }
  337. rlevel = hdev->raid_level;
  338. spin_unlock_irqrestore(&h->lock, flags);
  339. if (rlevel > RAID_UNKNOWN)
  340. rlevel = RAID_UNKNOWN;
  341. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  342. return l;
  343. }
  344. static ssize_t lunid_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct ctlr_info *h;
  348. struct scsi_device *sdev;
  349. struct hpsa_scsi_dev_t *hdev;
  350. unsigned long flags;
  351. unsigned char lunid[8];
  352. sdev = to_scsi_device(dev);
  353. h = sdev_to_hba(sdev);
  354. spin_lock_irqsave(&h->lock, flags);
  355. hdev = sdev->hostdata;
  356. if (!hdev) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return -ENODEV;
  359. }
  360. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  363. lunid[0], lunid[1], lunid[2], lunid[3],
  364. lunid[4], lunid[5], lunid[6], lunid[7]);
  365. }
  366. static ssize_t unique_id_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. unsigned char sn[16];
  374. sdev = to_scsi_device(dev);
  375. h = sdev_to_hba(sdev);
  376. spin_lock_irqsave(&h->lock, flags);
  377. hdev = sdev->hostdata;
  378. if (!hdev) {
  379. spin_unlock_irqrestore(&h->lock, flags);
  380. return -ENODEV;
  381. }
  382. memcpy(sn, hdev->device_id, sizeof(sn));
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return snprintf(buf, 16 * 2 + 2,
  385. "%02X%02X%02X%02X%02X%02X%02X%02X"
  386. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  387. sn[0], sn[1], sn[2], sn[3],
  388. sn[4], sn[5], sn[6], sn[7],
  389. sn[8], sn[9], sn[10], sn[11],
  390. sn[12], sn[13], sn[14], sn[15]);
  391. }
  392. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  393. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  394. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  395. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  396. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  397. host_show_firmware_revision, NULL);
  398. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  399. host_show_commands_outstanding, NULL);
  400. static DEVICE_ATTR(transport_mode, S_IRUGO,
  401. host_show_transport_mode, NULL);
  402. static DEVICE_ATTR(resettable, S_IRUGO,
  403. host_show_resettable, NULL);
  404. static struct device_attribute *hpsa_sdev_attrs[] = {
  405. &dev_attr_raid_level,
  406. &dev_attr_lunid,
  407. &dev_attr_unique_id,
  408. NULL,
  409. };
  410. static struct device_attribute *hpsa_shost_attrs[] = {
  411. &dev_attr_rescan,
  412. &dev_attr_firmware_revision,
  413. &dev_attr_commands_outstanding,
  414. &dev_attr_transport_mode,
  415. &dev_attr_resettable,
  416. NULL,
  417. };
  418. static struct scsi_host_template hpsa_driver_template = {
  419. .module = THIS_MODULE,
  420. .name = "hpsa",
  421. .proc_name = "hpsa",
  422. .queuecommand = hpsa_scsi_queue_command,
  423. .scan_start = hpsa_scan_start,
  424. .scan_finished = hpsa_scan_finished,
  425. .change_queue_depth = hpsa_change_queue_depth,
  426. .this_id = -1,
  427. .use_clustering = ENABLE_CLUSTERING,
  428. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  429. .ioctl = hpsa_ioctl,
  430. .slave_alloc = hpsa_slave_alloc,
  431. .slave_destroy = hpsa_slave_destroy,
  432. #ifdef CONFIG_COMPAT
  433. .compat_ioctl = hpsa_compat_ioctl,
  434. #endif
  435. .sdev_attrs = hpsa_sdev_attrs,
  436. .shost_attrs = hpsa_shost_attrs,
  437. };
  438. /* Enqueuing and dequeuing functions for cmdlists. */
  439. static inline void addQ(struct list_head *list, struct CommandList *c)
  440. {
  441. list_add_tail(&c->list, list);
  442. }
  443. static inline u32 next_command(struct ctlr_info *h)
  444. {
  445. u32 a;
  446. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  447. return h->access.command_completed(h);
  448. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  449. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  450. (h->reply_pool_head)++;
  451. h->commands_outstanding--;
  452. } else {
  453. a = FIFO_EMPTY;
  454. }
  455. /* Check for wraparound */
  456. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  457. h->reply_pool_head = h->reply_pool;
  458. h->reply_pool_wraparound ^= 1;
  459. }
  460. return a;
  461. }
  462. /* set_performant_mode: Modify the tag for cciss performant
  463. * set bit 0 for pull model, bits 3-1 for block fetch
  464. * register number
  465. */
  466. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  467. {
  468. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  469. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  470. }
  471. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  472. struct CommandList *c)
  473. {
  474. unsigned long flags;
  475. set_performant_mode(h, c);
  476. spin_lock_irqsave(&h->lock, flags);
  477. addQ(&h->reqQ, c);
  478. h->Qdepth++;
  479. start_io(h);
  480. spin_unlock_irqrestore(&h->lock, flags);
  481. }
  482. static inline void removeQ(struct CommandList *c)
  483. {
  484. if (WARN_ON(list_empty(&c->list)))
  485. return;
  486. list_del_init(&c->list);
  487. }
  488. static inline int is_hba_lunid(unsigned char scsi3addr[])
  489. {
  490. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  491. }
  492. static inline int is_scsi_rev_5(struct ctlr_info *h)
  493. {
  494. if (!h->hba_inquiry_data)
  495. return 0;
  496. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  497. return 1;
  498. return 0;
  499. }
  500. static int hpsa_find_target_lun(struct ctlr_info *h,
  501. unsigned char scsi3addr[], int bus, int *target, int *lun)
  502. {
  503. /* finds an unused bus, target, lun for a new physical device
  504. * assumes h->devlock is held
  505. */
  506. int i, found = 0;
  507. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  508. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  509. for (i = 0; i < h->ndevices; i++) {
  510. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  511. set_bit(h->dev[i]->target, lun_taken);
  512. }
  513. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  514. if (!test_bit(i, lun_taken)) {
  515. /* *bus = 1; */
  516. *target = i;
  517. *lun = 0;
  518. found = 1;
  519. break;
  520. }
  521. }
  522. return !found;
  523. }
  524. /* Add an entry into h->dev[] array. */
  525. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  526. struct hpsa_scsi_dev_t *device,
  527. struct hpsa_scsi_dev_t *added[], int *nadded)
  528. {
  529. /* assumes h->devlock is held */
  530. int n = h->ndevices;
  531. int i;
  532. unsigned char addr1[8], addr2[8];
  533. struct hpsa_scsi_dev_t *sd;
  534. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  535. dev_err(&h->pdev->dev, "too many devices, some will be "
  536. "inaccessible.\n");
  537. return -1;
  538. }
  539. /* physical devices do not have lun or target assigned until now. */
  540. if (device->lun != -1)
  541. /* Logical device, lun is already assigned. */
  542. goto lun_assigned;
  543. /* If this device a non-zero lun of a multi-lun device
  544. * byte 4 of the 8-byte LUN addr will contain the logical
  545. * unit no, zero otherise.
  546. */
  547. if (device->scsi3addr[4] == 0) {
  548. /* This is not a non-zero lun of a multi-lun device */
  549. if (hpsa_find_target_lun(h, device->scsi3addr,
  550. device->bus, &device->target, &device->lun) != 0)
  551. return -1;
  552. goto lun_assigned;
  553. }
  554. /* This is a non-zero lun of a multi-lun device.
  555. * Search through our list and find the device which
  556. * has the same 8 byte LUN address, excepting byte 4.
  557. * Assign the same bus and target for this new LUN.
  558. * Use the logical unit number from the firmware.
  559. */
  560. memcpy(addr1, device->scsi3addr, 8);
  561. addr1[4] = 0;
  562. for (i = 0; i < n; i++) {
  563. sd = h->dev[i];
  564. memcpy(addr2, sd->scsi3addr, 8);
  565. addr2[4] = 0;
  566. /* differ only in byte 4? */
  567. if (memcmp(addr1, addr2, 8) == 0) {
  568. device->bus = sd->bus;
  569. device->target = sd->target;
  570. device->lun = device->scsi3addr[4];
  571. break;
  572. }
  573. }
  574. if (device->lun == -1) {
  575. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  576. " suspect firmware bug or unsupported hardware "
  577. "configuration.\n");
  578. return -1;
  579. }
  580. lun_assigned:
  581. h->dev[n] = device;
  582. h->ndevices++;
  583. added[*nadded] = device;
  584. (*nadded)++;
  585. /* initially, (before registering with scsi layer) we don't
  586. * know our hostno and we don't want to print anything first
  587. * time anyway (the scsi layer's inquiries will show that info)
  588. */
  589. /* if (hostno != -1) */
  590. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  591. scsi_device_type(device->devtype), hostno,
  592. device->bus, device->target, device->lun);
  593. return 0;
  594. }
  595. /* Replace an entry from h->dev[] array. */
  596. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  597. int entry, struct hpsa_scsi_dev_t *new_entry,
  598. struct hpsa_scsi_dev_t *added[], int *nadded,
  599. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  600. {
  601. /* assumes h->devlock is held */
  602. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  603. removed[*nremoved] = h->dev[entry];
  604. (*nremoved)++;
  605. h->dev[entry] = new_entry;
  606. added[*nadded] = new_entry;
  607. (*nadded)++;
  608. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  609. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  610. new_entry->target, new_entry->lun);
  611. }
  612. /* Remove an entry from h->dev[] array. */
  613. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  614. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  615. {
  616. /* assumes h->devlock is held */
  617. int i;
  618. struct hpsa_scsi_dev_t *sd;
  619. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  620. sd = h->dev[entry];
  621. removed[*nremoved] = h->dev[entry];
  622. (*nremoved)++;
  623. for (i = entry; i < h->ndevices-1; i++)
  624. h->dev[i] = h->dev[i+1];
  625. h->ndevices--;
  626. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  627. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  628. sd->lun);
  629. }
  630. #define SCSI3ADDR_EQ(a, b) ( \
  631. (a)[7] == (b)[7] && \
  632. (a)[6] == (b)[6] && \
  633. (a)[5] == (b)[5] && \
  634. (a)[4] == (b)[4] && \
  635. (a)[3] == (b)[3] && \
  636. (a)[2] == (b)[2] && \
  637. (a)[1] == (b)[1] && \
  638. (a)[0] == (b)[0])
  639. static void fixup_botched_add(struct ctlr_info *h,
  640. struct hpsa_scsi_dev_t *added)
  641. {
  642. /* called when scsi_add_device fails in order to re-adjust
  643. * h->dev[] to match the mid layer's view.
  644. */
  645. unsigned long flags;
  646. int i, j;
  647. spin_lock_irqsave(&h->lock, flags);
  648. for (i = 0; i < h->ndevices; i++) {
  649. if (h->dev[i] == added) {
  650. for (j = i; j < h->ndevices-1; j++)
  651. h->dev[j] = h->dev[j+1];
  652. h->ndevices--;
  653. break;
  654. }
  655. }
  656. spin_unlock_irqrestore(&h->lock, flags);
  657. kfree(added);
  658. }
  659. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  660. struct hpsa_scsi_dev_t *dev2)
  661. {
  662. /* we compare everything except lun and target as these
  663. * are not yet assigned. Compare parts likely
  664. * to differ first
  665. */
  666. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  667. sizeof(dev1->scsi3addr)) != 0)
  668. return 0;
  669. if (memcmp(dev1->device_id, dev2->device_id,
  670. sizeof(dev1->device_id)) != 0)
  671. return 0;
  672. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  673. return 0;
  674. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  675. return 0;
  676. if (dev1->devtype != dev2->devtype)
  677. return 0;
  678. if (dev1->bus != dev2->bus)
  679. return 0;
  680. return 1;
  681. }
  682. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  683. * and return needle location in *index. If scsi3addr matches, but not
  684. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  685. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  686. */
  687. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  688. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  689. int *index)
  690. {
  691. int i;
  692. #define DEVICE_NOT_FOUND 0
  693. #define DEVICE_CHANGED 1
  694. #define DEVICE_SAME 2
  695. for (i = 0; i < haystack_size; i++) {
  696. if (haystack[i] == NULL) /* previously removed. */
  697. continue;
  698. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  699. *index = i;
  700. if (device_is_the_same(needle, haystack[i]))
  701. return DEVICE_SAME;
  702. else
  703. return DEVICE_CHANGED;
  704. }
  705. }
  706. *index = -1;
  707. return DEVICE_NOT_FOUND;
  708. }
  709. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  710. struct hpsa_scsi_dev_t *sd[], int nsds)
  711. {
  712. /* sd contains scsi3 addresses and devtypes, and inquiry
  713. * data. This function takes what's in sd to be the current
  714. * reality and updates h->dev[] to reflect that reality.
  715. */
  716. int i, entry, device_change, changes = 0;
  717. struct hpsa_scsi_dev_t *csd;
  718. unsigned long flags;
  719. struct hpsa_scsi_dev_t **added, **removed;
  720. int nadded, nremoved;
  721. struct Scsi_Host *sh = NULL;
  722. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  723. GFP_KERNEL);
  724. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  725. GFP_KERNEL);
  726. if (!added || !removed) {
  727. dev_warn(&h->pdev->dev, "out of memory in "
  728. "adjust_hpsa_scsi_table\n");
  729. goto free_and_out;
  730. }
  731. spin_lock_irqsave(&h->devlock, flags);
  732. /* find any devices in h->dev[] that are not in
  733. * sd[] and remove them from h->dev[], and for any
  734. * devices which have changed, remove the old device
  735. * info and add the new device info.
  736. */
  737. i = 0;
  738. nremoved = 0;
  739. nadded = 0;
  740. while (i < h->ndevices) {
  741. csd = h->dev[i];
  742. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  743. if (device_change == DEVICE_NOT_FOUND) {
  744. changes++;
  745. hpsa_scsi_remove_entry(h, hostno, i,
  746. removed, &nremoved);
  747. continue; /* remove ^^^, hence i not incremented */
  748. } else if (device_change == DEVICE_CHANGED) {
  749. changes++;
  750. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  751. added, &nadded, removed, &nremoved);
  752. /* Set it to NULL to prevent it from being freed
  753. * at the bottom of hpsa_update_scsi_devices()
  754. */
  755. sd[entry] = NULL;
  756. }
  757. i++;
  758. }
  759. /* Now, make sure every device listed in sd[] is also
  760. * listed in h->dev[], adding them if they aren't found
  761. */
  762. for (i = 0; i < nsds; i++) {
  763. if (!sd[i]) /* if already added above. */
  764. continue;
  765. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  766. h->ndevices, &entry);
  767. if (device_change == DEVICE_NOT_FOUND) {
  768. changes++;
  769. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  770. added, &nadded) != 0)
  771. break;
  772. sd[i] = NULL; /* prevent from being freed later. */
  773. } else if (device_change == DEVICE_CHANGED) {
  774. /* should never happen... */
  775. changes++;
  776. dev_warn(&h->pdev->dev,
  777. "device unexpectedly changed.\n");
  778. /* but if it does happen, we just ignore that device */
  779. }
  780. }
  781. spin_unlock_irqrestore(&h->devlock, flags);
  782. /* Don't notify scsi mid layer of any changes the first time through
  783. * (or if there are no changes) scsi_scan_host will do it later the
  784. * first time through.
  785. */
  786. if (hostno == -1 || !changes)
  787. goto free_and_out;
  788. sh = h->scsi_host;
  789. /* Notify scsi mid layer of any removed devices */
  790. for (i = 0; i < nremoved; i++) {
  791. struct scsi_device *sdev =
  792. scsi_device_lookup(sh, removed[i]->bus,
  793. removed[i]->target, removed[i]->lun);
  794. if (sdev != NULL) {
  795. scsi_remove_device(sdev);
  796. scsi_device_put(sdev);
  797. } else {
  798. /* We don't expect to get here.
  799. * future cmds to this device will get selection
  800. * timeout as if the device was gone.
  801. */
  802. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  803. " for removal.", hostno, removed[i]->bus,
  804. removed[i]->target, removed[i]->lun);
  805. }
  806. kfree(removed[i]);
  807. removed[i] = NULL;
  808. }
  809. /* Notify scsi mid layer of any added devices */
  810. for (i = 0; i < nadded; i++) {
  811. if (scsi_add_device(sh, added[i]->bus,
  812. added[i]->target, added[i]->lun) == 0)
  813. continue;
  814. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  815. "device not added.\n", hostno, added[i]->bus,
  816. added[i]->target, added[i]->lun);
  817. /* now we have to remove it from h->dev,
  818. * since it didn't get added to scsi mid layer
  819. */
  820. fixup_botched_add(h, added[i]);
  821. }
  822. free_and_out:
  823. kfree(added);
  824. kfree(removed);
  825. }
  826. /*
  827. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  828. * Assume's h->devlock is held.
  829. */
  830. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  831. int bus, int target, int lun)
  832. {
  833. int i;
  834. struct hpsa_scsi_dev_t *sd;
  835. for (i = 0; i < h->ndevices; i++) {
  836. sd = h->dev[i];
  837. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  838. return sd;
  839. }
  840. return NULL;
  841. }
  842. /* link sdev->hostdata to our per-device structure. */
  843. static int hpsa_slave_alloc(struct scsi_device *sdev)
  844. {
  845. struct hpsa_scsi_dev_t *sd;
  846. unsigned long flags;
  847. struct ctlr_info *h;
  848. h = sdev_to_hba(sdev);
  849. spin_lock_irqsave(&h->devlock, flags);
  850. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  851. sdev_id(sdev), sdev->lun);
  852. if (sd != NULL)
  853. sdev->hostdata = sd;
  854. spin_unlock_irqrestore(&h->devlock, flags);
  855. return 0;
  856. }
  857. static void hpsa_slave_destroy(struct scsi_device *sdev)
  858. {
  859. /* nothing to do. */
  860. }
  861. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  862. {
  863. int i;
  864. if (!h->cmd_sg_list)
  865. return;
  866. for (i = 0; i < h->nr_cmds; i++) {
  867. kfree(h->cmd_sg_list[i]);
  868. h->cmd_sg_list[i] = NULL;
  869. }
  870. kfree(h->cmd_sg_list);
  871. h->cmd_sg_list = NULL;
  872. }
  873. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  874. {
  875. int i;
  876. if (h->chainsize <= 0)
  877. return 0;
  878. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  879. GFP_KERNEL);
  880. if (!h->cmd_sg_list)
  881. return -ENOMEM;
  882. for (i = 0; i < h->nr_cmds; i++) {
  883. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  884. h->chainsize, GFP_KERNEL);
  885. if (!h->cmd_sg_list[i])
  886. goto clean;
  887. }
  888. return 0;
  889. clean:
  890. hpsa_free_sg_chain_blocks(h);
  891. return -ENOMEM;
  892. }
  893. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  894. struct CommandList *c)
  895. {
  896. struct SGDescriptor *chain_sg, *chain_block;
  897. u64 temp64;
  898. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  899. chain_block = h->cmd_sg_list[c->cmdindex];
  900. chain_sg->Ext = HPSA_SG_CHAIN;
  901. chain_sg->Len = sizeof(*chain_sg) *
  902. (c->Header.SGTotal - h->max_cmd_sg_entries);
  903. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  904. PCI_DMA_TODEVICE);
  905. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  906. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  907. }
  908. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  909. struct CommandList *c)
  910. {
  911. struct SGDescriptor *chain_sg;
  912. union u64bit temp64;
  913. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  914. return;
  915. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  916. temp64.val32.lower = chain_sg->Addr.lower;
  917. temp64.val32.upper = chain_sg->Addr.upper;
  918. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  919. }
  920. static void complete_scsi_command(struct CommandList *cp)
  921. {
  922. struct scsi_cmnd *cmd;
  923. struct ctlr_info *h;
  924. struct ErrorInfo *ei;
  925. unsigned char sense_key;
  926. unsigned char asc; /* additional sense code */
  927. unsigned char ascq; /* additional sense code qualifier */
  928. ei = cp->err_info;
  929. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  930. h = cp->h;
  931. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  932. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  933. hpsa_unmap_sg_chain_block(h, cp);
  934. cmd->result = (DID_OK << 16); /* host byte */
  935. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  936. cmd->result |= ei->ScsiStatus;
  937. /* copy the sense data whether we need to or not. */
  938. memcpy(cmd->sense_buffer, ei->SenseInfo,
  939. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  940. SCSI_SENSE_BUFFERSIZE :
  941. ei->SenseLen);
  942. scsi_set_resid(cmd, ei->ResidualCnt);
  943. if (ei->CommandStatus == 0) {
  944. cmd->scsi_done(cmd);
  945. cmd_free(h, cp);
  946. return;
  947. }
  948. /* an error has occurred */
  949. switch (ei->CommandStatus) {
  950. case CMD_TARGET_STATUS:
  951. if (ei->ScsiStatus) {
  952. /* Get sense key */
  953. sense_key = 0xf & ei->SenseInfo[2];
  954. /* Get additional sense code */
  955. asc = ei->SenseInfo[12];
  956. /* Get addition sense code qualifier */
  957. ascq = ei->SenseInfo[13];
  958. }
  959. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  960. if (check_for_unit_attention(h, cp)) {
  961. cmd->result = DID_SOFT_ERROR << 16;
  962. break;
  963. }
  964. if (sense_key == ILLEGAL_REQUEST) {
  965. /*
  966. * SCSI REPORT_LUNS is commonly unsupported on
  967. * Smart Array. Suppress noisy complaint.
  968. */
  969. if (cp->Request.CDB[0] == REPORT_LUNS)
  970. break;
  971. /* If ASC/ASCQ indicate Logical Unit
  972. * Not Supported condition,
  973. */
  974. if ((asc == 0x25) && (ascq == 0x0)) {
  975. dev_warn(&h->pdev->dev, "cp %p "
  976. "has check condition\n", cp);
  977. break;
  978. }
  979. }
  980. if (sense_key == NOT_READY) {
  981. /* If Sense is Not Ready, Logical Unit
  982. * Not ready, Manual Intervention
  983. * required
  984. */
  985. if ((asc == 0x04) && (ascq == 0x03)) {
  986. dev_warn(&h->pdev->dev, "cp %p "
  987. "has check condition: unit "
  988. "not ready, manual "
  989. "intervention required\n", cp);
  990. break;
  991. }
  992. }
  993. if (sense_key == ABORTED_COMMAND) {
  994. /* Aborted command is retryable */
  995. dev_warn(&h->pdev->dev, "cp %p "
  996. "has check condition: aborted command: "
  997. "ASC: 0x%x, ASCQ: 0x%x\n",
  998. cp, asc, ascq);
  999. cmd->result = DID_SOFT_ERROR << 16;
  1000. break;
  1001. }
  1002. /* Must be some other type of check condition */
  1003. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1004. "unknown type: "
  1005. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1006. "Returning result: 0x%x, "
  1007. "cmd=[%02x %02x %02x %02x %02x "
  1008. "%02x %02x %02x %02x %02x %02x "
  1009. "%02x %02x %02x %02x %02x]\n",
  1010. cp, sense_key, asc, ascq,
  1011. cmd->result,
  1012. cmd->cmnd[0], cmd->cmnd[1],
  1013. cmd->cmnd[2], cmd->cmnd[3],
  1014. cmd->cmnd[4], cmd->cmnd[5],
  1015. cmd->cmnd[6], cmd->cmnd[7],
  1016. cmd->cmnd[8], cmd->cmnd[9],
  1017. cmd->cmnd[10], cmd->cmnd[11],
  1018. cmd->cmnd[12], cmd->cmnd[13],
  1019. cmd->cmnd[14], cmd->cmnd[15]);
  1020. break;
  1021. }
  1022. /* Problem was not a check condition
  1023. * Pass it up to the upper layers...
  1024. */
  1025. if (ei->ScsiStatus) {
  1026. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1027. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1028. "Returning result: 0x%x\n",
  1029. cp, ei->ScsiStatus,
  1030. sense_key, asc, ascq,
  1031. cmd->result);
  1032. } else { /* scsi status is zero??? How??? */
  1033. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1034. "Returning no connection.\n", cp),
  1035. /* Ordinarily, this case should never happen,
  1036. * but there is a bug in some released firmware
  1037. * revisions that allows it to happen if, for
  1038. * example, a 4100 backplane loses power and
  1039. * the tape drive is in it. We assume that
  1040. * it's a fatal error of some kind because we
  1041. * can't show that it wasn't. We will make it
  1042. * look like selection timeout since that is
  1043. * the most common reason for this to occur,
  1044. * and it's severe enough.
  1045. */
  1046. cmd->result = DID_NO_CONNECT << 16;
  1047. }
  1048. break;
  1049. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1050. break;
  1051. case CMD_DATA_OVERRUN:
  1052. dev_warn(&h->pdev->dev, "cp %p has"
  1053. " completed with data overrun "
  1054. "reported\n", cp);
  1055. break;
  1056. case CMD_INVALID: {
  1057. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1058. print_cmd(cp); */
  1059. /* We get CMD_INVALID if you address a non-existent device
  1060. * instead of a selection timeout (no response). You will
  1061. * see this if you yank out a drive, then try to access it.
  1062. * This is kind of a shame because it means that any other
  1063. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1064. * missing target. */
  1065. cmd->result = DID_NO_CONNECT << 16;
  1066. }
  1067. break;
  1068. case CMD_PROTOCOL_ERR:
  1069. dev_warn(&h->pdev->dev, "cp %p has "
  1070. "protocol error \n", cp);
  1071. break;
  1072. case CMD_HARDWARE_ERR:
  1073. cmd->result = DID_ERROR << 16;
  1074. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1075. break;
  1076. case CMD_CONNECTION_LOST:
  1077. cmd->result = DID_ERROR << 16;
  1078. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1079. break;
  1080. case CMD_ABORTED:
  1081. cmd->result = DID_ABORT << 16;
  1082. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1083. cp, ei->ScsiStatus);
  1084. break;
  1085. case CMD_ABORT_FAILED:
  1086. cmd->result = DID_ERROR << 16;
  1087. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1088. break;
  1089. case CMD_UNSOLICITED_ABORT:
  1090. cmd->result = DID_RESET << 16;
  1091. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1092. "abort\n", cp);
  1093. break;
  1094. case CMD_TIMEOUT:
  1095. cmd->result = DID_TIME_OUT << 16;
  1096. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1097. break;
  1098. case CMD_UNABORTABLE:
  1099. cmd->result = DID_ERROR << 16;
  1100. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1101. break;
  1102. default:
  1103. cmd->result = DID_ERROR << 16;
  1104. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1105. cp, ei->CommandStatus);
  1106. }
  1107. cmd->scsi_done(cmd);
  1108. cmd_free(h, cp);
  1109. }
  1110. static int hpsa_scsi_detect(struct ctlr_info *h)
  1111. {
  1112. struct Scsi_Host *sh;
  1113. int error;
  1114. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1115. if (sh == NULL)
  1116. goto fail;
  1117. sh->io_port = 0;
  1118. sh->n_io_port = 0;
  1119. sh->this_id = -1;
  1120. sh->max_channel = 3;
  1121. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1122. sh->max_lun = HPSA_MAX_LUN;
  1123. sh->max_id = HPSA_MAX_LUN;
  1124. sh->can_queue = h->nr_cmds;
  1125. sh->cmd_per_lun = h->nr_cmds;
  1126. sh->sg_tablesize = h->maxsgentries;
  1127. h->scsi_host = sh;
  1128. sh->hostdata[0] = (unsigned long) h;
  1129. sh->irq = h->intr[h->intr_mode];
  1130. sh->unique_id = sh->irq;
  1131. error = scsi_add_host(sh, &h->pdev->dev);
  1132. if (error)
  1133. goto fail_host_put;
  1134. scsi_scan_host(sh);
  1135. return 0;
  1136. fail_host_put:
  1137. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1138. " failed for controller %d\n", h->ctlr);
  1139. scsi_host_put(sh);
  1140. return error;
  1141. fail:
  1142. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1143. " failed for controller %d\n", h->ctlr);
  1144. return -ENOMEM;
  1145. }
  1146. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1147. struct CommandList *c, int sg_used, int data_direction)
  1148. {
  1149. int i;
  1150. union u64bit addr64;
  1151. for (i = 0; i < sg_used; i++) {
  1152. addr64.val32.lower = c->SG[i].Addr.lower;
  1153. addr64.val32.upper = c->SG[i].Addr.upper;
  1154. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1155. data_direction);
  1156. }
  1157. }
  1158. static void hpsa_map_one(struct pci_dev *pdev,
  1159. struct CommandList *cp,
  1160. unsigned char *buf,
  1161. size_t buflen,
  1162. int data_direction)
  1163. {
  1164. u64 addr64;
  1165. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1166. cp->Header.SGList = 0;
  1167. cp->Header.SGTotal = 0;
  1168. return;
  1169. }
  1170. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1171. cp->SG[0].Addr.lower =
  1172. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1173. cp->SG[0].Addr.upper =
  1174. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1175. cp->SG[0].Len = buflen;
  1176. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1177. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1178. }
  1179. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1180. struct CommandList *c)
  1181. {
  1182. DECLARE_COMPLETION_ONSTACK(wait);
  1183. c->waiting = &wait;
  1184. enqueue_cmd_and_start_io(h, c);
  1185. wait_for_completion(&wait);
  1186. }
  1187. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1188. struct CommandList *c, int data_direction)
  1189. {
  1190. int retry_count = 0;
  1191. do {
  1192. memset(c->err_info, 0, sizeof(*c->err_info));
  1193. hpsa_scsi_do_simple_cmd_core(h, c);
  1194. retry_count++;
  1195. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1196. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1197. }
  1198. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1199. {
  1200. struct ErrorInfo *ei;
  1201. struct device *d = &cp->h->pdev->dev;
  1202. ei = cp->err_info;
  1203. switch (ei->CommandStatus) {
  1204. case CMD_TARGET_STATUS:
  1205. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1206. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1207. ei->ScsiStatus);
  1208. if (ei->ScsiStatus == 0)
  1209. dev_warn(d, "SCSI status is abnormally zero. "
  1210. "(probably indicates selection timeout "
  1211. "reported incorrectly due to a known "
  1212. "firmware bug, circa July, 2001.)\n");
  1213. break;
  1214. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1215. dev_info(d, "UNDERRUN\n");
  1216. break;
  1217. case CMD_DATA_OVERRUN:
  1218. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1219. break;
  1220. case CMD_INVALID: {
  1221. /* controller unfortunately reports SCSI passthru's
  1222. * to non-existent targets as invalid commands.
  1223. */
  1224. dev_warn(d, "cp %p is reported invalid (probably means "
  1225. "target device no longer present)\n", cp);
  1226. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1227. print_cmd(cp); */
  1228. }
  1229. break;
  1230. case CMD_PROTOCOL_ERR:
  1231. dev_warn(d, "cp %p has protocol error \n", cp);
  1232. break;
  1233. case CMD_HARDWARE_ERR:
  1234. /* cmd->result = DID_ERROR << 16; */
  1235. dev_warn(d, "cp %p had hardware error\n", cp);
  1236. break;
  1237. case CMD_CONNECTION_LOST:
  1238. dev_warn(d, "cp %p had connection lost\n", cp);
  1239. break;
  1240. case CMD_ABORTED:
  1241. dev_warn(d, "cp %p was aborted\n", cp);
  1242. break;
  1243. case CMD_ABORT_FAILED:
  1244. dev_warn(d, "cp %p reports abort failed\n", cp);
  1245. break;
  1246. case CMD_UNSOLICITED_ABORT:
  1247. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1248. break;
  1249. case CMD_TIMEOUT:
  1250. dev_warn(d, "cp %p timed out\n", cp);
  1251. break;
  1252. case CMD_UNABORTABLE:
  1253. dev_warn(d, "Command unabortable\n");
  1254. break;
  1255. default:
  1256. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1257. ei->CommandStatus);
  1258. }
  1259. }
  1260. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1261. unsigned char page, unsigned char *buf,
  1262. unsigned char bufsize)
  1263. {
  1264. int rc = IO_OK;
  1265. struct CommandList *c;
  1266. struct ErrorInfo *ei;
  1267. c = cmd_special_alloc(h);
  1268. if (c == NULL) { /* trouble... */
  1269. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1270. return -ENOMEM;
  1271. }
  1272. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1273. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1274. ei = c->err_info;
  1275. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1276. hpsa_scsi_interpret_error(c);
  1277. rc = -1;
  1278. }
  1279. cmd_special_free(h, c);
  1280. return rc;
  1281. }
  1282. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1283. {
  1284. int rc = IO_OK;
  1285. struct CommandList *c;
  1286. struct ErrorInfo *ei;
  1287. c = cmd_special_alloc(h);
  1288. if (c == NULL) { /* trouble... */
  1289. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1290. return -ENOMEM;
  1291. }
  1292. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1293. hpsa_scsi_do_simple_cmd_core(h, c);
  1294. /* no unmap needed here because no data xfer. */
  1295. ei = c->err_info;
  1296. if (ei->CommandStatus != 0) {
  1297. hpsa_scsi_interpret_error(c);
  1298. rc = -1;
  1299. }
  1300. cmd_special_free(h, c);
  1301. return rc;
  1302. }
  1303. static void hpsa_get_raid_level(struct ctlr_info *h,
  1304. unsigned char *scsi3addr, unsigned char *raid_level)
  1305. {
  1306. int rc;
  1307. unsigned char *buf;
  1308. *raid_level = RAID_UNKNOWN;
  1309. buf = kzalloc(64, GFP_KERNEL);
  1310. if (!buf)
  1311. return;
  1312. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1313. if (rc == 0)
  1314. *raid_level = buf[8];
  1315. if (*raid_level > RAID_UNKNOWN)
  1316. *raid_level = RAID_UNKNOWN;
  1317. kfree(buf);
  1318. return;
  1319. }
  1320. /* Get the device id from inquiry page 0x83 */
  1321. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1322. unsigned char *device_id, int buflen)
  1323. {
  1324. int rc;
  1325. unsigned char *buf;
  1326. if (buflen > 16)
  1327. buflen = 16;
  1328. buf = kzalloc(64, GFP_KERNEL);
  1329. if (!buf)
  1330. return -1;
  1331. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1332. if (rc == 0)
  1333. memcpy(device_id, &buf[8], buflen);
  1334. kfree(buf);
  1335. return rc != 0;
  1336. }
  1337. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1338. struct ReportLUNdata *buf, int bufsize,
  1339. int extended_response)
  1340. {
  1341. int rc = IO_OK;
  1342. struct CommandList *c;
  1343. unsigned char scsi3addr[8];
  1344. struct ErrorInfo *ei;
  1345. c = cmd_special_alloc(h);
  1346. if (c == NULL) { /* trouble... */
  1347. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1348. return -1;
  1349. }
  1350. /* address the controller */
  1351. memset(scsi3addr, 0, sizeof(scsi3addr));
  1352. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1353. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1354. if (extended_response)
  1355. c->Request.CDB[1] = extended_response;
  1356. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1357. ei = c->err_info;
  1358. if (ei->CommandStatus != 0 &&
  1359. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1360. hpsa_scsi_interpret_error(c);
  1361. rc = -1;
  1362. }
  1363. cmd_special_free(h, c);
  1364. return rc;
  1365. }
  1366. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1367. struct ReportLUNdata *buf,
  1368. int bufsize, int extended_response)
  1369. {
  1370. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1371. }
  1372. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1373. struct ReportLUNdata *buf, int bufsize)
  1374. {
  1375. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1376. }
  1377. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1378. int bus, int target, int lun)
  1379. {
  1380. device->bus = bus;
  1381. device->target = target;
  1382. device->lun = lun;
  1383. }
  1384. static int hpsa_update_device_info(struct ctlr_info *h,
  1385. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1386. {
  1387. #define OBDR_TAPE_INQ_SIZE 49
  1388. unsigned char *inq_buff;
  1389. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1390. if (!inq_buff)
  1391. goto bail_out;
  1392. /* Do an inquiry to the device to see what it is. */
  1393. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1394. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1395. /* Inquiry failed (msg printed already) */
  1396. dev_err(&h->pdev->dev,
  1397. "hpsa_update_device_info: inquiry failed\n");
  1398. goto bail_out;
  1399. }
  1400. this_device->devtype = (inq_buff[0] & 0x1f);
  1401. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1402. memcpy(this_device->vendor, &inq_buff[8],
  1403. sizeof(this_device->vendor));
  1404. memcpy(this_device->model, &inq_buff[16],
  1405. sizeof(this_device->model));
  1406. memset(this_device->device_id, 0,
  1407. sizeof(this_device->device_id));
  1408. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1409. sizeof(this_device->device_id));
  1410. if (this_device->devtype == TYPE_DISK &&
  1411. is_logical_dev_addr_mode(scsi3addr))
  1412. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1413. else
  1414. this_device->raid_level = RAID_UNKNOWN;
  1415. kfree(inq_buff);
  1416. return 0;
  1417. bail_out:
  1418. kfree(inq_buff);
  1419. return 1;
  1420. }
  1421. static unsigned char *msa2xxx_model[] = {
  1422. "MSA2012",
  1423. "MSA2024",
  1424. "MSA2312",
  1425. "MSA2324",
  1426. "P2000 G3 SAS",
  1427. NULL,
  1428. };
  1429. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1430. {
  1431. int i;
  1432. for (i = 0; msa2xxx_model[i]; i++)
  1433. if (strncmp(device->model, msa2xxx_model[i],
  1434. strlen(msa2xxx_model[i])) == 0)
  1435. return 1;
  1436. return 0;
  1437. }
  1438. /* Helper function to assign bus, target, lun mapping of devices.
  1439. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1440. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1441. * Logical drive target and lun are assigned at this time, but
  1442. * physical device lun and target assignment are deferred (assigned
  1443. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1444. */
  1445. static void figure_bus_target_lun(struct ctlr_info *h,
  1446. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1447. struct hpsa_scsi_dev_t *device)
  1448. {
  1449. u32 lunid;
  1450. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1451. /* logical device */
  1452. if (unlikely(is_scsi_rev_5(h))) {
  1453. /* p1210m, logical drives lun assignments
  1454. * match SCSI REPORT LUNS data.
  1455. */
  1456. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1457. *bus = 0;
  1458. *target = 0;
  1459. *lun = (lunid & 0x3fff) + 1;
  1460. } else {
  1461. /* not p1210m... */
  1462. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1463. if (is_msa2xxx(h, device)) {
  1464. /* msa2xxx way, put logicals on bus 1
  1465. * and match target/lun numbers box
  1466. * reports.
  1467. */
  1468. *bus = 1;
  1469. *target = (lunid >> 16) & 0x3fff;
  1470. *lun = lunid & 0x00ff;
  1471. } else {
  1472. /* Traditional smart array way. */
  1473. *bus = 0;
  1474. *lun = 0;
  1475. *target = lunid & 0x3fff;
  1476. }
  1477. }
  1478. } else {
  1479. /* physical device */
  1480. if (is_hba_lunid(lunaddrbytes))
  1481. if (unlikely(is_scsi_rev_5(h))) {
  1482. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1483. *target = 0;
  1484. *lun = 0;
  1485. return;
  1486. } else
  1487. *bus = 3; /* traditional smartarray */
  1488. else
  1489. *bus = 2; /* physical disk */
  1490. *target = -1;
  1491. *lun = -1; /* we will fill these in later. */
  1492. }
  1493. }
  1494. /*
  1495. * If there is no lun 0 on a target, linux won't find any devices.
  1496. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1497. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1498. * it for some reason. *tmpdevice is the target we're adding,
  1499. * this_device is a pointer into the current element of currentsd[]
  1500. * that we're building up in update_scsi_devices(), below.
  1501. * lunzerobits is a bitmap that tracks which targets already have a
  1502. * lun 0 assigned.
  1503. * Returns 1 if an enclosure was added, 0 if not.
  1504. */
  1505. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1506. struct hpsa_scsi_dev_t *tmpdevice,
  1507. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1508. int bus, int target, int lun, unsigned long lunzerobits[],
  1509. int *nmsa2xxx_enclosures)
  1510. {
  1511. unsigned char scsi3addr[8];
  1512. if (test_bit(target, lunzerobits))
  1513. return 0; /* There is already a lun 0 on this target. */
  1514. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1515. return 0; /* It's the logical targets that may lack lun 0. */
  1516. if (!is_msa2xxx(h, tmpdevice))
  1517. return 0; /* It's only the MSA2xxx that have this problem. */
  1518. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1519. return 0;
  1520. memset(scsi3addr, 0, 8);
  1521. scsi3addr[3] = target;
  1522. if (is_hba_lunid(scsi3addr))
  1523. return 0; /* Don't add the RAID controller here. */
  1524. if (is_scsi_rev_5(h))
  1525. return 0; /* p1210m doesn't need to do this. */
  1526. #define MAX_MSA2XXX_ENCLOSURES 32
  1527. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1528. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1529. "enclosures exceeded. Check your hardware "
  1530. "configuration.");
  1531. return 0;
  1532. }
  1533. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1534. return 0;
  1535. (*nmsa2xxx_enclosures)++;
  1536. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1537. set_bit(target, lunzerobits);
  1538. return 1;
  1539. }
  1540. /*
  1541. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1542. * logdev. The number of luns in physdev and logdev are returned in
  1543. * *nphysicals and *nlogicals, respectively.
  1544. * Returns 0 on success, -1 otherwise.
  1545. */
  1546. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1547. int reportlunsize,
  1548. struct ReportLUNdata *physdev, u32 *nphysicals,
  1549. struct ReportLUNdata *logdev, u32 *nlogicals)
  1550. {
  1551. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1552. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1553. return -1;
  1554. }
  1555. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1556. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1557. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1558. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1559. *nphysicals - HPSA_MAX_PHYS_LUN);
  1560. *nphysicals = HPSA_MAX_PHYS_LUN;
  1561. }
  1562. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1563. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1564. return -1;
  1565. }
  1566. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1567. /* Reject Logicals in excess of our max capability. */
  1568. if (*nlogicals > HPSA_MAX_LUN) {
  1569. dev_warn(&h->pdev->dev,
  1570. "maximum logical LUNs (%d) exceeded. "
  1571. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1572. *nlogicals - HPSA_MAX_LUN);
  1573. *nlogicals = HPSA_MAX_LUN;
  1574. }
  1575. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1576. dev_warn(&h->pdev->dev,
  1577. "maximum logical + physical LUNs (%d) exceeded. "
  1578. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1579. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1580. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1581. }
  1582. return 0;
  1583. }
  1584. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1585. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1586. struct ReportLUNdata *logdev_list)
  1587. {
  1588. /* Helper function, figure out where the LUN ID info is coming from
  1589. * given index i, lists of physical and logical devices, where in
  1590. * the list the raid controller is supposed to appear (first or last)
  1591. */
  1592. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1593. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1594. if (i == raid_ctlr_position)
  1595. return RAID_CTLR_LUNID;
  1596. if (i < logicals_start)
  1597. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1598. if (i < last_device)
  1599. return &logdev_list->LUN[i - nphysicals -
  1600. (raid_ctlr_position == 0)][0];
  1601. BUG();
  1602. return NULL;
  1603. }
  1604. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1605. {
  1606. /* the idea here is we could get notified
  1607. * that some devices have changed, so we do a report
  1608. * physical luns and report logical luns cmd, and adjust
  1609. * our list of devices accordingly.
  1610. *
  1611. * The scsi3addr's of devices won't change so long as the
  1612. * adapter is not reset. That means we can rescan and
  1613. * tell which devices we already know about, vs. new
  1614. * devices, vs. disappearing devices.
  1615. */
  1616. struct ReportLUNdata *physdev_list = NULL;
  1617. struct ReportLUNdata *logdev_list = NULL;
  1618. unsigned char *inq_buff = NULL;
  1619. u32 nphysicals = 0;
  1620. u32 nlogicals = 0;
  1621. u32 ndev_allocated = 0;
  1622. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1623. int ncurrent = 0;
  1624. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1625. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1626. int bus, target, lun;
  1627. int raid_ctlr_position;
  1628. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1629. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1630. GFP_KERNEL);
  1631. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1632. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1633. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1634. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1635. if (!currentsd || !physdev_list || !logdev_list ||
  1636. !inq_buff || !tmpdevice) {
  1637. dev_err(&h->pdev->dev, "out of memory\n");
  1638. goto out;
  1639. }
  1640. memset(lunzerobits, 0, sizeof(lunzerobits));
  1641. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1642. logdev_list, &nlogicals))
  1643. goto out;
  1644. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1645. * but each of them 4 times through different paths. The plus 1
  1646. * is for the RAID controller.
  1647. */
  1648. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1649. /* Allocate the per device structures */
  1650. for (i = 0; i < ndevs_to_allocate; i++) {
  1651. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1652. if (!currentsd[i]) {
  1653. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1654. __FILE__, __LINE__);
  1655. goto out;
  1656. }
  1657. ndev_allocated++;
  1658. }
  1659. if (unlikely(is_scsi_rev_5(h)))
  1660. raid_ctlr_position = 0;
  1661. else
  1662. raid_ctlr_position = nphysicals + nlogicals;
  1663. /* adjust our table of devices */
  1664. nmsa2xxx_enclosures = 0;
  1665. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1666. u8 *lunaddrbytes;
  1667. /* Figure out where the LUN ID info is coming from */
  1668. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1669. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1670. /* skip masked physical devices. */
  1671. if (lunaddrbytes[3] & 0xC0 &&
  1672. i < nphysicals + (raid_ctlr_position == 0))
  1673. continue;
  1674. /* Get device type, vendor, model, device id */
  1675. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1676. continue; /* skip it if we can't talk to it. */
  1677. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1678. tmpdevice);
  1679. this_device = currentsd[ncurrent];
  1680. /*
  1681. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1682. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1683. * is nonetheless an enclosure device there. We have to
  1684. * present that otherwise linux won't find anything if
  1685. * there is no lun 0.
  1686. */
  1687. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1688. lunaddrbytes, bus, target, lun, lunzerobits,
  1689. &nmsa2xxx_enclosures)) {
  1690. ncurrent++;
  1691. this_device = currentsd[ncurrent];
  1692. }
  1693. *this_device = *tmpdevice;
  1694. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1695. switch (this_device->devtype) {
  1696. case TYPE_ROM: {
  1697. /* We don't *really* support actual CD-ROM devices,
  1698. * just "One Button Disaster Recovery" tape drive
  1699. * which temporarily pretends to be a CD-ROM drive.
  1700. * So we check that the device is really an OBDR tape
  1701. * device by checking for "$DR-10" in bytes 43-48 of
  1702. * the inquiry data.
  1703. */
  1704. char obdr_sig[7];
  1705. #define OBDR_TAPE_SIG "$DR-10"
  1706. strncpy(obdr_sig, &inq_buff[43], 6);
  1707. obdr_sig[6] = '\0';
  1708. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1709. /* Not OBDR device, ignore it. */
  1710. break;
  1711. }
  1712. ncurrent++;
  1713. break;
  1714. case TYPE_DISK:
  1715. if (i < nphysicals)
  1716. break;
  1717. ncurrent++;
  1718. break;
  1719. case TYPE_TAPE:
  1720. case TYPE_MEDIUM_CHANGER:
  1721. ncurrent++;
  1722. break;
  1723. case TYPE_RAID:
  1724. /* Only present the Smartarray HBA as a RAID controller.
  1725. * If it's a RAID controller other than the HBA itself
  1726. * (an external RAID controller, MSA500 or similar)
  1727. * don't present it.
  1728. */
  1729. if (!is_hba_lunid(lunaddrbytes))
  1730. break;
  1731. ncurrent++;
  1732. break;
  1733. default:
  1734. break;
  1735. }
  1736. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1737. break;
  1738. }
  1739. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1740. out:
  1741. kfree(tmpdevice);
  1742. for (i = 0; i < ndev_allocated; i++)
  1743. kfree(currentsd[i]);
  1744. kfree(currentsd);
  1745. kfree(inq_buff);
  1746. kfree(physdev_list);
  1747. kfree(logdev_list);
  1748. }
  1749. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1750. * dma mapping and fills in the scatter gather entries of the
  1751. * hpsa command, cp.
  1752. */
  1753. static int hpsa_scatter_gather(struct ctlr_info *h,
  1754. struct CommandList *cp,
  1755. struct scsi_cmnd *cmd)
  1756. {
  1757. unsigned int len;
  1758. struct scatterlist *sg;
  1759. u64 addr64;
  1760. int use_sg, i, sg_index, chained;
  1761. struct SGDescriptor *curr_sg;
  1762. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1763. use_sg = scsi_dma_map(cmd);
  1764. if (use_sg < 0)
  1765. return use_sg;
  1766. if (!use_sg)
  1767. goto sglist_finished;
  1768. curr_sg = cp->SG;
  1769. chained = 0;
  1770. sg_index = 0;
  1771. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1772. if (i == h->max_cmd_sg_entries - 1 &&
  1773. use_sg > h->max_cmd_sg_entries) {
  1774. chained = 1;
  1775. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1776. sg_index = 0;
  1777. }
  1778. addr64 = (u64) sg_dma_address(sg);
  1779. len = sg_dma_len(sg);
  1780. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1781. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1782. curr_sg->Len = len;
  1783. curr_sg->Ext = 0; /* we are not chaining */
  1784. curr_sg++;
  1785. }
  1786. if (use_sg + chained > h->maxSG)
  1787. h->maxSG = use_sg + chained;
  1788. if (chained) {
  1789. cp->Header.SGList = h->max_cmd_sg_entries;
  1790. cp->Header.SGTotal = (u16) (use_sg + 1);
  1791. hpsa_map_sg_chain_block(h, cp);
  1792. return 0;
  1793. }
  1794. sglist_finished:
  1795. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1796. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1797. return 0;
  1798. }
  1799. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1800. void (*done)(struct scsi_cmnd *))
  1801. {
  1802. struct ctlr_info *h;
  1803. struct hpsa_scsi_dev_t *dev;
  1804. unsigned char scsi3addr[8];
  1805. struct CommandList *c;
  1806. unsigned long flags;
  1807. /* Get the ptr to our adapter structure out of cmd->host. */
  1808. h = sdev_to_hba(cmd->device);
  1809. dev = cmd->device->hostdata;
  1810. if (!dev) {
  1811. cmd->result = DID_NO_CONNECT << 16;
  1812. done(cmd);
  1813. return 0;
  1814. }
  1815. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1816. /* Need a lock as this is being allocated from the pool */
  1817. spin_lock_irqsave(&h->lock, flags);
  1818. c = cmd_alloc(h);
  1819. spin_unlock_irqrestore(&h->lock, flags);
  1820. if (c == NULL) { /* trouble... */
  1821. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1822. return SCSI_MLQUEUE_HOST_BUSY;
  1823. }
  1824. /* Fill in the command list header */
  1825. cmd->scsi_done = done; /* save this for use by completion code */
  1826. /* save c in case we have to abort it */
  1827. cmd->host_scribble = (unsigned char *) c;
  1828. c->cmd_type = CMD_SCSI;
  1829. c->scsi_cmd = cmd;
  1830. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1831. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1832. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1833. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1834. /* Fill in the request block... */
  1835. c->Request.Timeout = 0;
  1836. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1837. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1838. c->Request.CDBLen = cmd->cmd_len;
  1839. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1840. c->Request.Type.Type = TYPE_CMD;
  1841. c->Request.Type.Attribute = ATTR_SIMPLE;
  1842. switch (cmd->sc_data_direction) {
  1843. case DMA_TO_DEVICE:
  1844. c->Request.Type.Direction = XFER_WRITE;
  1845. break;
  1846. case DMA_FROM_DEVICE:
  1847. c->Request.Type.Direction = XFER_READ;
  1848. break;
  1849. case DMA_NONE:
  1850. c->Request.Type.Direction = XFER_NONE;
  1851. break;
  1852. case DMA_BIDIRECTIONAL:
  1853. /* This can happen if a buggy application does a scsi passthru
  1854. * and sets both inlen and outlen to non-zero. ( see
  1855. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1856. */
  1857. c->Request.Type.Direction = XFER_RSVD;
  1858. /* This is technically wrong, and hpsa controllers should
  1859. * reject it with CMD_INVALID, which is the most correct
  1860. * response, but non-fibre backends appear to let it
  1861. * slide by, and give the same results as if this field
  1862. * were set correctly. Either way is acceptable for
  1863. * our purposes here.
  1864. */
  1865. break;
  1866. default:
  1867. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1868. cmd->sc_data_direction);
  1869. BUG();
  1870. break;
  1871. }
  1872. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1873. cmd_free(h, c);
  1874. return SCSI_MLQUEUE_HOST_BUSY;
  1875. }
  1876. enqueue_cmd_and_start_io(h, c);
  1877. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1878. return 0;
  1879. }
  1880. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1881. static void hpsa_scan_start(struct Scsi_Host *sh)
  1882. {
  1883. struct ctlr_info *h = shost_to_hba(sh);
  1884. unsigned long flags;
  1885. /* wait until any scan already in progress is finished. */
  1886. while (1) {
  1887. spin_lock_irqsave(&h->scan_lock, flags);
  1888. if (h->scan_finished)
  1889. break;
  1890. spin_unlock_irqrestore(&h->scan_lock, flags);
  1891. wait_event(h->scan_wait_queue, h->scan_finished);
  1892. /* Note: We don't need to worry about a race between this
  1893. * thread and driver unload because the midlayer will
  1894. * have incremented the reference count, so unload won't
  1895. * happen if we're in here.
  1896. */
  1897. }
  1898. h->scan_finished = 0; /* mark scan as in progress */
  1899. spin_unlock_irqrestore(&h->scan_lock, flags);
  1900. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1901. spin_lock_irqsave(&h->scan_lock, flags);
  1902. h->scan_finished = 1; /* mark scan as finished. */
  1903. wake_up_all(&h->scan_wait_queue);
  1904. spin_unlock_irqrestore(&h->scan_lock, flags);
  1905. }
  1906. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1907. unsigned long elapsed_time)
  1908. {
  1909. struct ctlr_info *h = shost_to_hba(sh);
  1910. unsigned long flags;
  1911. int finished;
  1912. spin_lock_irqsave(&h->scan_lock, flags);
  1913. finished = h->scan_finished;
  1914. spin_unlock_irqrestore(&h->scan_lock, flags);
  1915. return finished;
  1916. }
  1917. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1918. int qdepth, int reason)
  1919. {
  1920. struct ctlr_info *h = sdev_to_hba(sdev);
  1921. if (reason != SCSI_QDEPTH_DEFAULT)
  1922. return -ENOTSUPP;
  1923. if (qdepth < 1)
  1924. qdepth = 1;
  1925. else
  1926. if (qdepth > h->nr_cmds)
  1927. qdepth = h->nr_cmds;
  1928. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1929. return sdev->queue_depth;
  1930. }
  1931. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1932. {
  1933. /* we are being forcibly unloaded, and may not refuse. */
  1934. scsi_remove_host(h->scsi_host);
  1935. scsi_host_put(h->scsi_host);
  1936. h->scsi_host = NULL;
  1937. }
  1938. static int hpsa_register_scsi(struct ctlr_info *h)
  1939. {
  1940. int rc;
  1941. rc = hpsa_scsi_detect(h);
  1942. if (rc != 0)
  1943. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1944. " hpsa_scsi_detect(), rc is %d\n", rc);
  1945. return rc;
  1946. }
  1947. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1948. unsigned char lunaddr[])
  1949. {
  1950. int rc = 0;
  1951. int count = 0;
  1952. int waittime = 1; /* seconds */
  1953. struct CommandList *c;
  1954. c = cmd_special_alloc(h);
  1955. if (!c) {
  1956. dev_warn(&h->pdev->dev, "out of memory in "
  1957. "wait_for_device_to_become_ready.\n");
  1958. return IO_ERROR;
  1959. }
  1960. /* Send test unit ready until device ready, or give up. */
  1961. while (count < HPSA_TUR_RETRY_LIMIT) {
  1962. /* Wait for a bit. do this first, because if we send
  1963. * the TUR right away, the reset will just abort it.
  1964. */
  1965. msleep(1000 * waittime);
  1966. count++;
  1967. /* Increase wait time with each try, up to a point. */
  1968. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1969. waittime = waittime * 2;
  1970. /* Send the Test Unit Ready */
  1971. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1972. hpsa_scsi_do_simple_cmd_core(h, c);
  1973. /* no unmap needed here because no data xfer. */
  1974. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1975. break;
  1976. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1977. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1978. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1979. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1980. break;
  1981. dev_warn(&h->pdev->dev, "waiting %d secs "
  1982. "for device to become ready.\n", waittime);
  1983. rc = 1; /* device not ready. */
  1984. }
  1985. if (rc)
  1986. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1987. else
  1988. dev_warn(&h->pdev->dev, "device is ready.\n");
  1989. cmd_special_free(h, c);
  1990. return rc;
  1991. }
  1992. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1993. * complaining. Doing a host- or bus-reset can't do anything good here.
  1994. */
  1995. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1996. {
  1997. int rc;
  1998. struct ctlr_info *h;
  1999. struct hpsa_scsi_dev_t *dev;
  2000. /* find the controller to which the command to be aborted was sent */
  2001. h = sdev_to_hba(scsicmd->device);
  2002. if (h == NULL) /* paranoia */
  2003. return FAILED;
  2004. dev = scsicmd->device->hostdata;
  2005. if (!dev) {
  2006. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2007. "device lookup failed.\n");
  2008. return FAILED;
  2009. }
  2010. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2011. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2012. /* send a reset to the SCSI LUN which the command was sent to */
  2013. rc = hpsa_send_reset(h, dev->scsi3addr);
  2014. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2015. return SUCCESS;
  2016. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2017. return FAILED;
  2018. }
  2019. /*
  2020. * For operations that cannot sleep, a command block is allocated at init,
  2021. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2022. * which ones are free or in use. Lock must be held when calling this.
  2023. * cmd_free() is the complement.
  2024. */
  2025. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2026. {
  2027. struct CommandList *c;
  2028. int i;
  2029. union u64bit temp64;
  2030. dma_addr_t cmd_dma_handle, err_dma_handle;
  2031. do {
  2032. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2033. if (i == h->nr_cmds)
  2034. return NULL;
  2035. } while (test_and_set_bit
  2036. (i & (BITS_PER_LONG - 1),
  2037. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2038. c = h->cmd_pool + i;
  2039. memset(c, 0, sizeof(*c));
  2040. cmd_dma_handle = h->cmd_pool_dhandle
  2041. + i * sizeof(*c);
  2042. c->err_info = h->errinfo_pool + i;
  2043. memset(c->err_info, 0, sizeof(*c->err_info));
  2044. err_dma_handle = h->errinfo_pool_dhandle
  2045. + i * sizeof(*c->err_info);
  2046. h->nr_allocs++;
  2047. c->cmdindex = i;
  2048. INIT_LIST_HEAD(&c->list);
  2049. c->busaddr = (u32) cmd_dma_handle;
  2050. temp64.val = (u64) err_dma_handle;
  2051. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2052. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2053. c->ErrDesc.Len = sizeof(*c->err_info);
  2054. c->h = h;
  2055. return c;
  2056. }
  2057. /* For operations that can wait for kmalloc to possibly sleep,
  2058. * this routine can be called. Lock need not be held to call
  2059. * cmd_special_alloc. cmd_special_free() is the complement.
  2060. */
  2061. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2062. {
  2063. struct CommandList *c;
  2064. union u64bit temp64;
  2065. dma_addr_t cmd_dma_handle, err_dma_handle;
  2066. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2067. if (c == NULL)
  2068. return NULL;
  2069. memset(c, 0, sizeof(*c));
  2070. c->cmdindex = -1;
  2071. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2072. &err_dma_handle);
  2073. if (c->err_info == NULL) {
  2074. pci_free_consistent(h->pdev,
  2075. sizeof(*c), c, cmd_dma_handle);
  2076. return NULL;
  2077. }
  2078. memset(c->err_info, 0, sizeof(*c->err_info));
  2079. INIT_LIST_HEAD(&c->list);
  2080. c->busaddr = (u32) cmd_dma_handle;
  2081. temp64.val = (u64) err_dma_handle;
  2082. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2083. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2084. c->ErrDesc.Len = sizeof(*c->err_info);
  2085. c->h = h;
  2086. return c;
  2087. }
  2088. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2089. {
  2090. int i;
  2091. i = c - h->cmd_pool;
  2092. clear_bit(i & (BITS_PER_LONG - 1),
  2093. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2094. h->nr_frees++;
  2095. }
  2096. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2097. {
  2098. union u64bit temp64;
  2099. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2100. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2101. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2102. c->err_info, (dma_addr_t) temp64.val);
  2103. pci_free_consistent(h->pdev, sizeof(*c),
  2104. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2105. }
  2106. #ifdef CONFIG_COMPAT
  2107. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2108. {
  2109. IOCTL32_Command_struct __user *arg32 =
  2110. (IOCTL32_Command_struct __user *) arg;
  2111. IOCTL_Command_struct arg64;
  2112. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2113. int err;
  2114. u32 cp;
  2115. memset(&arg64, 0, sizeof(arg64));
  2116. err = 0;
  2117. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2118. sizeof(arg64.LUN_info));
  2119. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2120. sizeof(arg64.Request));
  2121. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2122. sizeof(arg64.error_info));
  2123. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2124. err |= get_user(cp, &arg32->buf);
  2125. arg64.buf = compat_ptr(cp);
  2126. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2127. if (err)
  2128. return -EFAULT;
  2129. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2130. if (err)
  2131. return err;
  2132. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2133. sizeof(arg32->error_info));
  2134. if (err)
  2135. return -EFAULT;
  2136. return err;
  2137. }
  2138. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2139. int cmd, void *arg)
  2140. {
  2141. BIG_IOCTL32_Command_struct __user *arg32 =
  2142. (BIG_IOCTL32_Command_struct __user *) arg;
  2143. BIG_IOCTL_Command_struct arg64;
  2144. BIG_IOCTL_Command_struct __user *p =
  2145. compat_alloc_user_space(sizeof(arg64));
  2146. int err;
  2147. u32 cp;
  2148. memset(&arg64, 0, sizeof(arg64));
  2149. err = 0;
  2150. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2151. sizeof(arg64.LUN_info));
  2152. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2153. sizeof(arg64.Request));
  2154. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2155. sizeof(arg64.error_info));
  2156. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2157. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2158. err |= get_user(cp, &arg32->buf);
  2159. arg64.buf = compat_ptr(cp);
  2160. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2161. if (err)
  2162. return -EFAULT;
  2163. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2164. if (err)
  2165. return err;
  2166. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2167. sizeof(arg32->error_info));
  2168. if (err)
  2169. return -EFAULT;
  2170. return err;
  2171. }
  2172. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2173. {
  2174. switch (cmd) {
  2175. case CCISS_GETPCIINFO:
  2176. case CCISS_GETINTINFO:
  2177. case CCISS_SETINTINFO:
  2178. case CCISS_GETNODENAME:
  2179. case CCISS_SETNODENAME:
  2180. case CCISS_GETHEARTBEAT:
  2181. case CCISS_GETBUSTYPES:
  2182. case CCISS_GETFIRMVER:
  2183. case CCISS_GETDRIVVER:
  2184. case CCISS_REVALIDVOLS:
  2185. case CCISS_DEREGDISK:
  2186. case CCISS_REGNEWDISK:
  2187. case CCISS_REGNEWD:
  2188. case CCISS_RESCANDISK:
  2189. case CCISS_GETLUNINFO:
  2190. return hpsa_ioctl(dev, cmd, arg);
  2191. case CCISS_PASSTHRU32:
  2192. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2193. case CCISS_BIG_PASSTHRU32:
  2194. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2195. default:
  2196. return -ENOIOCTLCMD;
  2197. }
  2198. }
  2199. #endif
  2200. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2201. {
  2202. struct hpsa_pci_info pciinfo;
  2203. if (!argp)
  2204. return -EINVAL;
  2205. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2206. pciinfo.bus = h->pdev->bus->number;
  2207. pciinfo.dev_fn = h->pdev->devfn;
  2208. pciinfo.board_id = h->board_id;
  2209. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2210. return -EFAULT;
  2211. return 0;
  2212. }
  2213. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2214. {
  2215. DriverVer_type DriverVer;
  2216. unsigned char vmaj, vmin, vsubmin;
  2217. int rc;
  2218. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2219. &vmaj, &vmin, &vsubmin);
  2220. if (rc != 3) {
  2221. dev_info(&h->pdev->dev, "driver version string '%s' "
  2222. "unrecognized.", HPSA_DRIVER_VERSION);
  2223. vmaj = 0;
  2224. vmin = 0;
  2225. vsubmin = 0;
  2226. }
  2227. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2228. if (!argp)
  2229. return -EINVAL;
  2230. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2231. return -EFAULT;
  2232. return 0;
  2233. }
  2234. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2235. {
  2236. IOCTL_Command_struct iocommand;
  2237. struct CommandList *c;
  2238. char *buff = NULL;
  2239. union u64bit temp64;
  2240. if (!argp)
  2241. return -EINVAL;
  2242. if (!capable(CAP_SYS_RAWIO))
  2243. return -EPERM;
  2244. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2245. return -EFAULT;
  2246. if ((iocommand.buf_size < 1) &&
  2247. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2248. return -EINVAL;
  2249. }
  2250. if (iocommand.buf_size > 0) {
  2251. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2252. if (buff == NULL)
  2253. return -EFAULT;
  2254. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2255. /* Copy the data into the buffer we created */
  2256. if (copy_from_user(buff, iocommand.buf,
  2257. iocommand.buf_size)) {
  2258. kfree(buff);
  2259. return -EFAULT;
  2260. }
  2261. } else {
  2262. memset(buff, 0, iocommand.buf_size);
  2263. }
  2264. }
  2265. c = cmd_special_alloc(h);
  2266. if (c == NULL) {
  2267. kfree(buff);
  2268. return -ENOMEM;
  2269. }
  2270. /* Fill in the command type */
  2271. c->cmd_type = CMD_IOCTL_PEND;
  2272. /* Fill in Command Header */
  2273. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2274. if (iocommand.buf_size > 0) { /* buffer to fill */
  2275. c->Header.SGList = 1;
  2276. c->Header.SGTotal = 1;
  2277. } else { /* no buffers to fill */
  2278. c->Header.SGList = 0;
  2279. c->Header.SGTotal = 0;
  2280. }
  2281. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2282. /* use the kernel address the cmd block for tag */
  2283. c->Header.Tag.lower = c->busaddr;
  2284. /* Fill in Request block */
  2285. memcpy(&c->Request, &iocommand.Request,
  2286. sizeof(c->Request));
  2287. /* Fill in the scatter gather information */
  2288. if (iocommand.buf_size > 0) {
  2289. temp64.val = pci_map_single(h->pdev, buff,
  2290. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2291. c->SG[0].Addr.lower = temp64.val32.lower;
  2292. c->SG[0].Addr.upper = temp64.val32.upper;
  2293. c->SG[0].Len = iocommand.buf_size;
  2294. c->SG[0].Ext = 0; /* we are not chaining*/
  2295. }
  2296. hpsa_scsi_do_simple_cmd_core(h, c);
  2297. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2298. check_ioctl_unit_attention(h, c);
  2299. /* Copy the error information out */
  2300. memcpy(&iocommand.error_info, c->err_info,
  2301. sizeof(iocommand.error_info));
  2302. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2303. kfree(buff);
  2304. cmd_special_free(h, c);
  2305. return -EFAULT;
  2306. }
  2307. if (iocommand.Request.Type.Direction == XFER_READ &&
  2308. iocommand.buf_size > 0) {
  2309. /* Copy the data out of the buffer we created */
  2310. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2311. kfree(buff);
  2312. cmd_special_free(h, c);
  2313. return -EFAULT;
  2314. }
  2315. }
  2316. kfree(buff);
  2317. cmd_special_free(h, c);
  2318. return 0;
  2319. }
  2320. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2321. {
  2322. BIG_IOCTL_Command_struct *ioc;
  2323. struct CommandList *c;
  2324. unsigned char **buff = NULL;
  2325. int *buff_size = NULL;
  2326. union u64bit temp64;
  2327. BYTE sg_used = 0;
  2328. int status = 0;
  2329. int i;
  2330. u32 left;
  2331. u32 sz;
  2332. BYTE __user *data_ptr;
  2333. if (!argp)
  2334. return -EINVAL;
  2335. if (!capable(CAP_SYS_RAWIO))
  2336. return -EPERM;
  2337. ioc = (BIG_IOCTL_Command_struct *)
  2338. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2339. if (!ioc) {
  2340. status = -ENOMEM;
  2341. goto cleanup1;
  2342. }
  2343. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2344. status = -EFAULT;
  2345. goto cleanup1;
  2346. }
  2347. if ((ioc->buf_size < 1) &&
  2348. (ioc->Request.Type.Direction != XFER_NONE)) {
  2349. status = -EINVAL;
  2350. goto cleanup1;
  2351. }
  2352. /* Check kmalloc limits using all SGs */
  2353. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2354. status = -EINVAL;
  2355. goto cleanup1;
  2356. }
  2357. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2358. status = -EINVAL;
  2359. goto cleanup1;
  2360. }
  2361. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2362. if (!buff) {
  2363. status = -ENOMEM;
  2364. goto cleanup1;
  2365. }
  2366. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2367. if (!buff_size) {
  2368. status = -ENOMEM;
  2369. goto cleanup1;
  2370. }
  2371. left = ioc->buf_size;
  2372. data_ptr = ioc->buf;
  2373. while (left) {
  2374. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2375. buff_size[sg_used] = sz;
  2376. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2377. if (buff[sg_used] == NULL) {
  2378. status = -ENOMEM;
  2379. goto cleanup1;
  2380. }
  2381. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2382. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2383. status = -ENOMEM;
  2384. goto cleanup1;
  2385. }
  2386. } else
  2387. memset(buff[sg_used], 0, sz);
  2388. left -= sz;
  2389. data_ptr += sz;
  2390. sg_used++;
  2391. }
  2392. c = cmd_special_alloc(h);
  2393. if (c == NULL) {
  2394. status = -ENOMEM;
  2395. goto cleanup1;
  2396. }
  2397. c->cmd_type = CMD_IOCTL_PEND;
  2398. c->Header.ReplyQueue = 0;
  2399. c->Header.SGList = c->Header.SGTotal = sg_used;
  2400. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2401. c->Header.Tag.lower = c->busaddr;
  2402. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2403. if (ioc->buf_size > 0) {
  2404. int i;
  2405. for (i = 0; i < sg_used; i++) {
  2406. temp64.val = pci_map_single(h->pdev, buff[i],
  2407. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2408. c->SG[i].Addr.lower = temp64.val32.lower;
  2409. c->SG[i].Addr.upper = temp64.val32.upper;
  2410. c->SG[i].Len = buff_size[i];
  2411. /* we are not chaining */
  2412. c->SG[i].Ext = 0;
  2413. }
  2414. }
  2415. hpsa_scsi_do_simple_cmd_core(h, c);
  2416. if (sg_used)
  2417. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2418. check_ioctl_unit_attention(h, c);
  2419. /* Copy the error information out */
  2420. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2421. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2422. cmd_special_free(h, c);
  2423. status = -EFAULT;
  2424. goto cleanup1;
  2425. }
  2426. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2427. /* Copy the data out of the buffer we created */
  2428. BYTE __user *ptr = ioc->buf;
  2429. for (i = 0; i < sg_used; i++) {
  2430. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2431. cmd_special_free(h, c);
  2432. status = -EFAULT;
  2433. goto cleanup1;
  2434. }
  2435. ptr += buff_size[i];
  2436. }
  2437. }
  2438. cmd_special_free(h, c);
  2439. status = 0;
  2440. cleanup1:
  2441. if (buff) {
  2442. for (i = 0; i < sg_used; i++)
  2443. kfree(buff[i]);
  2444. kfree(buff);
  2445. }
  2446. kfree(buff_size);
  2447. kfree(ioc);
  2448. return status;
  2449. }
  2450. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2451. struct CommandList *c)
  2452. {
  2453. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2454. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2455. (void) check_for_unit_attention(h, c);
  2456. }
  2457. /*
  2458. * ioctl
  2459. */
  2460. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2461. {
  2462. struct ctlr_info *h;
  2463. void __user *argp = (void __user *)arg;
  2464. h = sdev_to_hba(dev);
  2465. switch (cmd) {
  2466. case CCISS_DEREGDISK:
  2467. case CCISS_REGNEWDISK:
  2468. case CCISS_REGNEWD:
  2469. hpsa_scan_start(h->scsi_host);
  2470. return 0;
  2471. case CCISS_GETPCIINFO:
  2472. return hpsa_getpciinfo_ioctl(h, argp);
  2473. case CCISS_GETDRIVVER:
  2474. return hpsa_getdrivver_ioctl(h, argp);
  2475. case CCISS_PASSTHRU:
  2476. return hpsa_passthru_ioctl(h, argp);
  2477. case CCISS_BIG_PASSTHRU:
  2478. return hpsa_big_passthru_ioctl(h, argp);
  2479. default:
  2480. return -ENOTTY;
  2481. }
  2482. }
  2483. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2484. unsigned char *scsi3addr, u8 reset_type)
  2485. {
  2486. struct CommandList *c;
  2487. c = cmd_alloc(h);
  2488. if (!c)
  2489. return -ENOMEM;
  2490. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2491. RAID_CTLR_LUNID, TYPE_MSG);
  2492. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2493. c->waiting = NULL;
  2494. enqueue_cmd_and_start_io(h, c);
  2495. /* Don't wait for completion, the reset won't complete. Don't free
  2496. * the command either. This is the last command we will send before
  2497. * re-initializing everything, so it doesn't matter and won't leak.
  2498. */
  2499. return 0;
  2500. }
  2501. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2502. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2503. int cmd_type)
  2504. {
  2505. int pci_dir = XFER_NONE;
  2506. c->cmd_type = CMD_IOCTL_PEND;
  2507. c->Header.ReplyQueue = 0;
  2508. if (buff != NULL && size > 0) {
  2509. c->Header.SGList = 1;
  2510. c->Header.SGTotal = 1;
  2511. } else {
  2512. c->Header.SGList = 0;
  2513. c->Header.SGTotal = 0;
  2514. }
  2515. c->Header.Tag.lower = c->busaddr;
  2516. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2517. c->Request.Type.Type = cmd_type;
  2518. if (cmd_type == TYPE_CMD) {
  2519. switch (cmd) {
  2520. case HPSA_INQUIRY:
  2521. /* are we trying to read a vital product page */
  2522. if (page_code != 0) {
  2523. c->Request.CDB[1] = 0x01;
  2524. c->Request.CDB[2] = page_code;
  2525. }
  2526. c->Request.CDBLen = 6;
  2527. c->Request.Type.Attribute = ATTR_SIMPLE;
  2528. c->Request.Type.Direction = XFER_READ;
  2529. c->Request.Timeout = 0;
  2530. c->Request.CDB[0] = HPSA_INQUIRY;
  2531. c->Request.CDB[4] = size & 0xFF;
  2532. break;
  2533. case HPSA_REPORT_LOG:
  2534. case HPSA_REPORT_PHYS:
  2535. /* Talking to controller so It's a physical command
  2536. mode = 00 target = 0. Nothing to write.
  2537. */
  2538. c->Request.CDBLen = 12;
  2539. c->Request.Type.Attribute = ATTR_SIMPLE;
  2540. c->Request.Type.Direction = XFER_READ;
  2541. c->Request.Timeout = 0;
  2542. c->Request.CDB[0] = cmd;
  2543. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2544. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2545. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2546. c->Request.CDB[9] = size & 0xFF;
  2547. break;
  2548. case HPSA_CACHE_FLUSH:
  2549. c->Request.CDBLen = 12;
  2550. c->Request.Type.Attribute = ATTR_SIMPLE;
  2551. c->Request.Type.Direction = XFER_WRITE;
  2552. c->Request.Timeout = 0;
  2553. c->Request.CDB[0] = BMIC_WRITE;
  2554. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2555. break;
  2556. case TEST_UNIT_READY:
  2557. c->Request.CDBLen = 6;
  2558. c->Request.Type.Attribute = ATTR_SIMPLE;
  2559. c->Request.Type.Direction = XFER_NONE;
  2560. c->Request.Timeout = 0;
  2561. break;
  2562. default:
  2563. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2564. BUG();
  2565. return;
  2566. }
  2567. } else if (cmd_type == TYPE_MSG) {
  2568. switch (cmd) {
  2569. case HPSA_DEVICE_RESET_MSG:
  2570. c->Request.CDBLen = 16;
  2571. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2572. c->Request.Type.Attribute = ATTR_SIMPLE;
  2573. c->Request.Type.Direction = XFER_NONE;
  2574. c->Request.Timeout = 0; /* Don't time out */
  2575. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2576. c->Request.CDB[0] = cmd;
  2577. c->Request.CDB[1] = 0x03; /* Reset target above */
  2578. /* If bytes 4-7 are zero, it means reset the */
  2579. /* LunID device */
  2580. c->Request.CDB[4] = 0x00;
  2581. c->Request.CDB[5] = 0x00;
  2582. c->Request.CDB[6] = 0x00;
  2583. c->Request.CDB[7] = 0x00;
  2584. break;
  2585. default:
  2586. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2587. cmd);
  2588. BUG();
  2589. }
  2590. } else {
  2591. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2592. BUG();
  2593. }
  2594. switch (c->Request.Type.Direction) {
  2595. case XFER_READ:
  2596. pci_dir = PCI_DMA_FROMDEVICE;
  2597. break;
  2598. case XFER_WRITE:
  2599. pci_dir = PCI_DMA_TODEVICE;
  2600. break;
  2601. case XFER_NONE:
  2602. pci_dir = PCI_DMA_NONE;
  2603. break;
  2604. default:
  2605. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2606. }
  2607. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2608. return;
  2609. }
  2610. /*
  2611. * Map (physical) PCI mem into (virtual) kernel space
  2612. */
  2613. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2614. {
  2615. ulong page_base = ((ulong) base) & PAGE_MASK;
  2616. ulong page_offs = ((ulong) base) - page_base;
  2617. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2618. return page_remapped ? (page_remapped + page_offs) : NULL;
  2619. }
  2620. /* Takes cmds off the submission queue and sends them to the hardware,
  2621. * then puts them on the queue of cmds waiting for completion.
  2622. */
  2623. static void start_io(struct ctlr_info *h)
  2624. {
  2625. struct CommandList *c;
  2626. while (!list_empty(&h->reqQ)) {
  2627. c = list_entry(h->reqQ.next, struct CommandList, list);
  2628. /* can't do anything if fifo is full */
  2629. if ((h->access.fifo_full(h))) {
  2630. dev_warn(&h->pdev->dev, "fifo full\n");
  2631. break;
  2632. }
  2633. /* Get the first entry from the Request Q */
  2634. removeQ(c);
  2635. h->Qdepth--;
  2636. /* Tell the controller execute command */
  2637. h->access.submit_command(h, c);
  2638. /* Put job onto the completed Q */
  2639. addQ(&h->cmpQ, c);
  2640. }
  2641. }
  2642. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2643. {
  2644. return h->access.command_completed(h);
  2645. }
  2646. static inline bool interrupt_pending(struct ctlr_info *h)
  2647. {
  2648. return h->access.intr_pending(h);
  2649. }
  2650. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2651. {
  2652. return (h->access.intr_pending(h) == 0) ||
  2653. (h->interrupts_enabled == 0);
  2654. }
  2655. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2656. u32 raw_tag)
  2657. {
  2658. if (unlikely(tag_index >= h->nr_cmds)) {
  2659. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2660. return 1;
  2661. }
  2662. return 0;
  2663. }
  2664. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2665. {
  2666. removeQ(c);
  2667. if (likely(c->cmd_type == CMD_SCSI))
  2668. complete_scsi_command(c);
  2669. else if (c->cmd_type == CMD_IOCTL_PEND)
  2670. complete(c->waiting);
  2671. }
  2672. static inline u32 hpsa_tag_contains_index(u32 tag)
  2673. {
  2674. return tag & DIRECT_LOOKUP_BIT;
  2675. }
  2676. static inline u32 hpsa_tag_to_index(u32 tag)
  2677. {
  2678. return tag >> DIRECT_LOOKUP_SHIFT;
  2679. }
  2680. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2681. {
  2682. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2683. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2684. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2685. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2686. return tag & ~HPSA_PERF_ERROR_BITS;
  2687. }
  2688. /* process completion of an indexed ("direct lookup") command */
  2689. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2690. u32 raw_tag)
  2691. {
  2692. u32 tag_index;
  2693. struct CommandList *c;
  2694. tag_index = hpsa_tag_to_index(raw_tag);
  2695. if (bad_tag(h, tag_index, raw_tag))
  2696. return next_command(h);
  2697. c = h->cmd_pool + tag_index;
  2698. finish_cmd(c, raw_tag);
  2699. return next_command(h);
  2700. }
  2701. /* process completion of a non-indexed command */
  2702. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2703. u32 raw_tag)
  2704. {
  2705. u32 tag;
  2706. struct CommandList *c = NULL;
  2707. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2708. list_for_each_entry(c, &h->cmpQ, list) {
  2709. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2710. finish_cmd(c, raw_tag);
  2711. return next_command(h);
  2712. }
  2713. }
  2714. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2715. return next_command(h);
  2716. }
  2717. /* Some controllers, like p400, will give us one interrupt
  2718. * after a soft reset, even if we turned interrupts off.
  2719. * Only need to check for this in the hpsa_xxx_discard_completions
  2720. * functions.
  2721. */
  2722. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2723. {
  2724. if (likely(!reset_devices))
  2725. return 0;
  2726. if (likely(h->interrupts_enabled))
  2727. return 0;
  2728. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2729. "(known firmware bug.) Ignoring.\n");
  2730. return 1;
  2731. }
  2732. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2733. {
  2734. struct ctlr_info *h = dev_id;
  2735. unsigned long flags;
  2736. u32 raw_tag;
  2737. if (ignore_bogus_interrupt(h))
  2738. return IRQ_NONE;
  2739. if (interrupt_not_for_us(h))
  2740. return IRQ_NONE;
  2741. spin_lock_irqsave(&h->lock, flags);
  2742. while (interrupt_pending(h)) {
  2743. raw_tag = get_next_completion(h);
  2744. while (raw_tag != FIFO_EMPTY)
  2745. raw_tag = next_command(h);
  2746. }
  2747. spin_unlock_irqrestore(&h->lock, flags);
  2748. return IRQ_HANDLED;
  2749. }
  2750. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2751. {
  2752. struct ctlr_info *h = dev_id;
  2753. unsigned long flags;
  2754. u32 raw_tag;
  2755. if (ignore_bogus_interrupt(h))
  2756. return IRQ_NONE;
  2757. spin_lock_irqsave(&h->lock, flags);
  2758. raw_tag = get_next_completion(h);
  2759. while (raw_tag != FIFO_EMPTY)
  2760. raw_tag = next_command(h);
  2761. spin_unlock_irqrestore(&h->lock, flags);
  2762. return IRQ_HANDLED;
  2763. }
  2764. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2765. {
  2766. struct ctlr_info *h = dev_id;
  2767. unsigned long flags;
  2768. u32 raw_tag;
  2769. if (interrupt_not_for_us(h))
  2770. return IRQ_NONE;
  2771. spin_lock_irqsave(&h->lock, flags);
  2772. while (interrupt_pending(h)) {
  2773. raw_tag = get_next_completion(h);
  2774. while (raw_tag != FIFO_EMPTY) {
  2775. if (hpsa_tag_contains_index(raw_tag))
  2776. raw_tag = process_indexed_cmd(h, raw_tag);
  2777. else
  2778. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2779. }
  2780. }
  2781. spin_unlock_irqrestore(&h->lock, flags);
  2782. return IRQ_HANDLED;
  2783. }
  2784. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2785. {
  2786. struct ctlr_info *h = dev_id;
  2787. unsigned long flags;
  2788. u32 raw_tag;
  2789. spin_lock_irqsave(&h->lock, flags);
  2790. raw_tag = get_next_completion(h);
  2791. while (raw_tag != FIFO_EMPTY) {
  2792. if (hpsa_tag_contains_index(raw_tag))
  2793. raw_tag = process_indexed_cmd(h, raw_tag);
  2794. else
  2795. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2796. }
  2797. spin_unlock_irqrestore(&h->lock, flags);
  2798. return IRQ_HANDLED;
  2799. }
  2800. /* Send a message CDB to the firmware. Careful, this only works
  2801. * in simple mode, not performant mode due to the tag lookup.
  2802. * We only ever use this immediately after a controller reset.
  2803. */
  2804. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2805. unsigned char type)
  2806. {
  2807. struct Command {
  2808. struct CommandListHeader CommandHeader;
  2809. struct RequestBlock Request;
  2810. struct ErrDescriptor ErrorDescriptor;
  2811. };
  2812. struct Command *cmd;
  2813. static const size_t cmd_sz = sizeof(*cmd) +
  2814. sizeof(cmd->ErrorDescriptor);
  2815. dma_addr_t paddr64;
  2816. uint32_t paddr32, tag;
  2817. void __iomem *vaddr;
  2818. int i, err;
  2819. vaddr = pci_ioremap_bar(pdev, 0);
  2820. if (vaddr == NULL)
  2821. return -ENOMEM;
  2822. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2823. * CCISS commands, so they must be allocated from the lower 4GiB of
  2824. * memory.
  2825. */
  2826. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2827. if (err) {
  2828. iounmap(vaddr);
  2829. return -ENOMEM;
  2830. }
  2831. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2832. if (cmd == NULL) {
  2833. iounmap(vaddr);
  2834. return -ENOMEM;
  2835. }
  2836. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2837. * although there's no guarantee, we assume that the address is at
  2838. * least 4-byte aligned (most likely, it's page-aligned).
  2839. */
  2840. paddr32 = paddr64;
  2841. cmd->CommandHeader.ReplyQueue = 0;
  2842. cmd->CommandHeader.SGList = 0;
  2843. cmd->CommandHeader.SGTotal = 0;
  2844. cmd->CommandHeader.Tag.lower = paddr32;
  2845. cmd->CommandHeader.Tag.upper = 0;
  2846. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2847. cmd->Request.CDBLen = 16;
  2848. cmd->Request.Type.Type = TYPE_MSG;
  2849. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2850. cmd->Request.Type.Direction = XFER_NONE;
  2851. cmd->Request.Timeout = 0; /* Don't time out */
  2852. cmd->Request.CDB[0] = opcode;
  2853. cmd->Request.CDB[1] = type;
  2854. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2855. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2856. cmd->ErrorDescriptor.Addr.upper = 0;
  2857. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2858. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2859. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2860. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2861. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2862. break;
  2863. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2864. }
  2865. iounmap(vaddr);
  2866. /* we leak the DMA buffer here ... no choice since the controller could
  2867. * still complete the command.
  2868. */
  2869. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2870. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2871. opcode, type);
  2872. return -ETIMEDOUT;
  2873. }
  2874. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2875. if (tag & HPSA_ERROR_BIT) {
  2876. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2877. opcode, type);
  2878. return -EIO;
  2879. }
  2880. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2881. opcode, type);
  2882. return 0;
  2883. }
  2884. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2885. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2886. void * __iomem vaddr, u32 use_doorbell)
  2887. {
  2888. u16 pmcsr;
  2889. int pos;
  2890. if (use_doorbell) {
  2891. /* For everything after the P600, the PCI power state method
  2892. * of resetting the controller doesn't work, so we have this
  2893. * other way using the doorbell register.
  2894. */
  2895. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2896. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2897. } else { /* Try to do it the PCI power state way */
  2898. /* Quoting from the Open CISS Specification: "The Power
  2899. * Management Control/Status Register (CSR) controls the power
  2900. * state of the device. The normal operating state is D0,
  2901. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2902. * the controller, place the interface device in D3 then to D0,
  2903. * this causes a secondary PCI reset which will reset the
  2904. * controller." */
  2905. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2906. if (pos == 0) {
  2907. dev_err(&pdev->dev,
  2908. "hpsa_reset_controller: "
  2909. "PCI PM not supported\n");
  2910. return -ENODEV;
  2911. }
  2912. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2913. /* enter the D3hot power management state */
  2914. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2915. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2916. pmcsr |= PCI_D3hot;
  2917. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2918. msleep(500);
  2919. /* enter the D0 power management state */
  2920. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2921. pmcsr |= PCI_D0;
  2922. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2923. }
  2924. return 0;
  2925. }
  2926. static __devinit void init_driver_version(char *driver_version, int len)
  2927. {
  2928. memset(driver_version, 0, len);
  2929. strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
  2930. }
  2931. static __devinit int write_driver_ver_to_cfgtable(
  2932. struct CfgTable __iomem *cfgtable)
  2933. {
  2934. char *driver_version;
  2935. int i, size = sizeof(cfgtable->driver_version);
  2936. driver_version = kmalloc(size, GFP_KERNEL);
  2937. if (!driver_version)
  2938. return -ENOMEM;
  2939. init_driver_version(driver_version, size);
  2940. for (i = 0; i < size; i++)
  2941. writeb(driver_version[i], &cfgtable->driver_version[i]);
  2942. kfree(driver_version);
  2943. return 0;
  2944. }
  2945. static __devinit void read_driver_ver_from_cfgtable(
  2946. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  2947. {
  2948. int i;
  2949. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  2950. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  2951. }
  2952. static __devinit int controller_reset_failed(
  2953. struct CfgTable __iomem *cfgtable)
  2954. {
  2955. char *driver_ver, *old_driver_ver;
  2956. int rc, size = sizeof(cfgtable->driver_version);
  2957. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  2958. if (!old_driver_ver)
  2959. return -ENOMEM;
  2960. driver_ver = old_driver_ver + size;
  2961. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  2962. * should have been changed, otherwise we know the reset failed.
  2963. */
  2964. init_driver_version(old_driver_ver, size);
  2965. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  2966. rc = !memcmp(driver_ver, old_driver_ver, size);
  2967. kfree(old_driver_ver);
  2968. return rc;
  2969. }
  2970. /* This does a hard reset of the controller using PCI power management
  2971. * states or the using the doorbell register.
  2972. */
  2973. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2974. {
  2975. u64 cfg_offset;
  2976. u32 cfg_base_addr;
  2977. u64 cfg_base_addr_index;
  2978. void __iomem *vaddr;
  2979. unsigned long paddr;
  2980. u32 misc_fw_support;
  2981. int rc;
  2982. struct CfgTable __iomem *cfgtable;
  2983. u32 use_doorbell;
  2984. u32 board_id;
  2985. u16 command_register;
  2986. /* For controllers as old as the P600, this is very nearly
  2987. * the same thing as
  2988. *
  2989. * pci_save_state(pci_dev);
  2990. * pci_set_power_state(pci_dev, PCI_D3hot);
  2991. * pci_set_power_state(pci_dev, PCI_D0);
  2992. * pci_restore_state(pci_dev);
  2993. *
  2994. * For controllers newer than the P600, the pci power state
  2995. * method of resetting doesn't work so we have another way
  2996. * using the doorbell register.
  2997. */
  2998. rc = hpsa_lookup_board_id(pdev, &board_id);
  2999. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3000. dev_warn(&pdev->dev, "Not resetting device.\n");
  3001. return -ENODEV;
  3002. }
  3003. /* if controller is soft- but not hard resettable... */
  3004. if (!ctlr_is_hard_resettable(board_id))
  3005. return -ENOTSUPP; /* try soft reset later. */
  3006. /* Save the PCI command register */
  3007. pci_read_config_word(pdev, 4, &command_register);
  3008. /* Turn the board off. This is so that later pci_restore_state()
  3009. * won't turn the board on before the rest of config space is ready.
  3010. */
  3011. pci_disable_device(pdev);
  3012. pci_save_state(pdev);
  3013. /* find the first memory BAR, so we can find the cfg table */
  3014. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3015. if (rc)
  3016. return rc;
  3017. vaddr = remap_pci_mem(paddr, 0x250);
  3018. if (!vaddr)
  3019. return -ENOMEM;
  3020. /* find cfgtable in order to check if reset via doorbell is supported */
  3021. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3022. &cfg_base_addr_index, &cfg_offset);
  3023. if (rc)
  3024. goto unmap_vaddr;
  3025. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3026. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3027. if (!cfgtable) {
  3028. rc = -ENOMEM;
  3029. goto unmap_vaddr;
  3030. }
  3031. rc = write_driver_ver_to_cfgtable(cfgtable);
  3032. if (rc)
  3033. goto unmap_vaddr;
  3034. /* If reset via doorbell register is supported, use that.
  3035. * There are two such methods. Favor the newest method.
  3036. */
  3037. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3038. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3039. if (use_doorbell) {
  3040. use_doorbell = DOORBELL_CTLR_RESET2;
  3041. } else {
  3042. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3043. if (use_doorbell) {
  3044. dev_warn(&pdev->dev, "Controller claims that "
  3045. "'Bit 2 doorbell reset' is "
  3046. "supported, but not 'bit 5 doorbell reset'. "
  3047. "Firmware update is recommended.\n");
  3048. rc = -ENOTSUPP; /* try soft reset */
  3049. goto unmap_cfgtable;
  3050. }
  3051. }
  3052. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3053. if (rc)
  3054. goto unmap_cfgtable;
  3055. pci_restore_state(pdev);
  3056. rc = pci_enable_device(pdev);
  3057. if (rc) {
  3058. dev_warn(&pdev->dev, "failed to enable device.\n");
  3059. goto unmap_cfgtable;
  3060. }
  3061. pci_write_config_word(pdev, 4, command_register);
  3062. /* Some devices (notably the HP Smart Array 5i Controller)
  3063. need a little pause here */
  3064. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3065. /* Wait for board to become not ready, then ready. */
  3066. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3067. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3068. if (rc) {
  3069. dev_warn(&pdev->dev,
  3070. "failed waiting for board to reset."
  3071. " Will try soft reset.\n");
  3072. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3073. goto unmap_cfgtable;
  3074. }
  3075. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3076. if (rc) {
  3077. dev_warn(&pdev->dev,
  3078. "failed waiting for board to become ready "
  3079. "after hard reset\n");
  3080. goto unmap_cfgtable;
  3081. }
  3082. rc = controller_reset_failed(vaddr);
  3083. if (rc < 0)
  3084. goto unmap_cfgtable;
  3085. if (rc) {
  3086. dev_warn(&pdev->dev, "Unable to successfully reset "
  3087. "controller. Will try soft reset.\n");
  3088. rc = -ENOTSUPP;
  3089. } else {
  3090. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3091. }
  3092. unmap_cfgtable:
  3093. iounmap(cfgtable);
  3094. unmap_vaddr:
  3095. iounmap(vaddr);
  3096. return rc;
  3097. }
  3098. /*
  3099. * We cannot read the structure directly, for portability we must use
  3100. * the io functions.
  3101. * This is for debug only.
  3102. */
  3103. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3104. {
  3105. #ifdef HPSA_DEBUG
  3106. int i;
  3107. char temp_name[17];
  3108. dev_info(dev, "Controller Configuration information\n");
  3109. dev_info(dev, "------------------------------------\n");
  3110. for (i = 0; i < 4; i++)
  3111. temp_name[i] = readb(&(tb->Signature[i]));
  3112. temp_name[4] = '\0';
  3113. dev_info(dev, " Signature = %s\n", temp_name);
  3114. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3115. dev_info(dev, " Transport methods supported = 0x%x\n",
  3116. readl(&(tb->TransportSupport)));
  3117. dev_info(dev, " Transport methods active = 0x%x\n",
  3118. readl(&(tb->TransportActive)));
  3119. dev_info(dev, " Requested transport Method = 0x%x\n",
  3120. readl(&(tb->HostWrite.TransportRequest)));
  3121. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3122. readl(&(tb->HostWrite.CoalIntDelay)));
  3123. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3124. readl(&(tb->HostWrite.CoalIntCount)));
  3125. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3126. readl(&(tb->CmdsOutMax)));
  3127. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3128. for (i = 0; i < 16; i++)
  3129. temp_name[i] = readb(&(tb->ServerName[i]));
  3130. temp_name[16] = '\0';
  3131. dev_info(dev, " Server Name = %s\n", temp_name);
  3132. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3133. readl(&(tb->HeartBeat)));
  3134. #endif /* HPSA_DEBUG */
  3135. }
  3136. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3137. {
  3138. int i, offset, mem_type, bar_type;
  3139. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3140. return 0;
  3141. offset = 0;
  3142. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3143. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3144. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3145. offset += 4;
  3146. else {
  3147. mem_type = pci_resource_flags(pdev, i) &
  3148. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3149. switch (mem_type) {
  3150. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3151. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3152. offset += 4; /* 32 bit */
  3153. break;
  3154. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3155. offset += 8;
  3156. break;
  3157. default: /* reserved in PCI 2.2 */
  3158. dev_warn(&pdev->dev,
  3159. "base address is invalid\n");
  3160. return -1;
  3161. break;
  3162. }
  3163. }
  3164. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3165. return i + 1;
  3166. }
  3167. return -1;
  3168. }
  3169. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3170. * controllers that are capable. If not, we use IO-APIC mode.
  3171. */
  3172. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3173. {
  3174. #ifdef CONFIG_PCI_MSI
  3175. int err;
  3176. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3177. {0, 2}, {0, 3}
  3178. };
  3179. /* Some boards advertise MSI but don't really support it */
  3180. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3181. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3182. goto default_int_mode;
  3183. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3184. dev_info(&h->pdev->dev, "MSIX\n");
  3185. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3186. if (!err) {
  3187. h->intr[0] = hpsa_msix_entries[0].vector;
  3188. h->intr[1] = hpsa_msix_entries[1].vector;
  3189. h->intr[2] = hpsa_msix_entries[2].vector;
  3190. h->intr[3] = hpsa_msix_entries[3].vector;
  3191. h->msix_vector = 1;
  3192. return;
  3193. }
  3194. if (err > 0) {
  3195. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3196. "available\n", err);
  3197. goto default_int_mode;
  3198. } else {
  3199. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3200. err);
  3201. goto default_int_mode;
  3202. }
  3203. }
  3204. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3205. dev_info(&h->pdev->dev, "MSI\n");
  3206. if (!pci_enable_msi(h->pdev))
  3207. h->msi_vector = 1;
  3208. else
  3209. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3210. }
  3211. default_int_mode:
  3212. #endif /* CONFIG_PCI_MSI */
  3213. /* if we get here we're going to use the default interrupt mode */
  3214. h->intr[h->intr_mode] = h->pdev->irq;
  3215. }
  3216. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3217. {
  3218. int i;
  3219. u32 subsystem_vendor_id, subsystem_device_id;
  3220. subsystem_vendor_id = pdev->subsystem_vendor;
  3221. subsystem_device_id = pdev->subsystem_device;
  3222. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3223. subsystem_vendor_id;
  3224. for (i = 0; i < ARRAY_SIZE(products); i++)
  3225. if (*board_id == products[i].board_id)
  3226. return i;
  3227. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3228. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3229. !hpsa_allow_any) {
  3230. dev_warn(&pdev->dev, "unrecognized board ID: "
  3231. "0x%08x, ignoring.\n", *board_id);
  3232. return -ENODEV;
  3233. }
  3234. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3235. }
  3236. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3237. {
  3238. u16 command;
  3239. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3240. return ((command & PCI_COMMAND_MEMORY) == 0);
  3241. }
  3242. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3243. unsigned long *memory_bar)
  3244. {
  3245. int i;
  3246. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3247. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3248. /* addressing mode bits already removed */
  3249. *memory_bar = pci_resource_start(pdev, i);
  3250. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3251. *memory_bar);
  3252. return 0;
  3253. }
  3254. dev_warn(&pdev->dev, "no memory BAR found\n");
  3255. return -ENODEV;
  3256. }
  3257. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3258. void __iomem *vaddr, int wait_for_ready)
  3259. {
  3260. int i, iterations;
  3261. u32 scratchpad;
  3262. if (wait_for_ready)
  3263. iterations = HPSA_BOARD_READY_ITERATIONS;
  3264. else
  3265. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3266. for (i = 0; i < iterations; i++) {
  3267. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3268. if (wait_for_ready) {
  3269. if (scratchpad == HPSA_FIRMWARE_READY)
  3270. return 0;
  3271. } else {
  3272. if (scratchpad != HPSA_FIRMWARE_READY)
  3273. return 0;
  3274. }
  3275. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3276. }
  3277. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3278. return -ENODEV;
  3279. }
  3280. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3281. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3282. u64 *cfg_offset)
  3283. {
  3284. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3285. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3286. *cfg_base_addr &= (u32) 0x0000ffff;
  3287. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3288. if (*cfg_base_addr_index == -1) {
  3289. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3290. return -ENODEV;
  3291. }
  3292. return 0;
  3293. }
  3294. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3295. {
  3296. u64 cfg_offset;
  3297. u32 cfg_base_addr;
  3298. u64 cfg_base_addr_index;
  3299. u32 trans_offset;
  3300. int rc;
  3301. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3302. &cfg_base_addr_index, &cfg_offset);
  3303. if (rc)
  3304. return rc;
  3305. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3306. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3307. if (!h->cfgtable)
  3308. return -ENOMEM;
  3309. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3310. if (rc)
  3311. return rc;
  3312. /* Find performant mode table. */
  3313. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3314. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3315. cfg_base_addr_index)+cfg_offset+trans_offset,
  3316. sizeof(*h->transtable));
  3317. if (!h->transtable)
  3318. return -ENOMEM;
  3319. return 0;
  3320. }
  3321. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3322. {
  3323. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3324. /* Limit commands in memory limited kdump scenario. */
  3325. if (reset_devices && h->max_commands > 32)
  3326. h->max_commands = 32;
  3327. if (h->max_commands < 16) {
  3328. dev_warn(&h->pdev->dev, "Controller reports "
  3329. "max supported commands of %d, an obvious lie. "
  3330. "Using 16. Ensure that firmware is up to date.\n",
  3331. h->max_commands);
  3332. h->max_commands = 16;
  3333. }
  3334. }
  3335. /* Interrogate the hardware for some limits:
  3336. * max commands, max SG elements without chaining, and with chaining,
  3337. * SG chain block size, etc.
  3338. */
  3339. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3340. {
  3341. hpsa_get_max_perf_mode_cmds(h);
  3342. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3343. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3344. /*
  3345. * Limit in-command s/g elements to 32 save dma'able memory.
  3346. * Howvever spec says if 0, use 31
  3347. */
  3348. h->max_cmd_sg_entries = 31;
  3349. if (h->maxsgentries > 512) {
  3350. h->max_cmd_sg_entries = 32;
  3351. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3352. h->maxsgentries--; /* save one for chain pointer */
  3353. } else {
  3354. h->maxsgentries = 31; /* default to traditional values */
  3355. h->chainsize = 0;
  3356. }
  3357. }
  3358. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3359. {
  3360. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3361. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3362. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3363. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3364. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3365. return false;
  3366. }
  3367. return true;
  3368. }
  3369. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3370. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3371. {
  3372. #ifdef CONFIG_X86
  3373. u32 prefetch;
  3374. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3375. prefetch |= 0x100;
  3376. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3377. #endif
  3378. }
  3379. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3380. * in a prefetch beyond physical memory.
  3381. */
  3382. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3383. {
  3384. u32 dma_prefetch;
  3385. if (h->board_id != 0x3225103C)
  3386. return;
  3387. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3388. dma_prefetch |= 0x8000;
  3389. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3390. }
  3391. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3392. {
  3393. int i;
  3394. u32 doorbell_value;
  3395. unsigned long flags;
  3396. /* under certain very rare conditions, this can take awhile.
  3397. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3398. * as we enter this code.)
  3399. */
  3400. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3401. spin_lock_irqsave(&h->lock, flags);
  3402. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3403. spin_unlock_irqrestore(&h->lock, flags);
  3404. if (!(doorbell_value & CFGTBL_ChangeReq))
  3405. break;
  3406. /* delay and try again */
  3407. usleep_range(10000, 20000);
  3408. }
  3409. }
  3410. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3411. {
  3412. u32 trans_support;
  3413. trans_support = readl(&(h->cfgtable->TransportSupport));
  3414. if (!(trans_support & SIMPLE_MODE))
  3415. return -ENOTSUPP;
  3416. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3417. /* Update the field, and then ring the doorbell */
  3418. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3419. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3420. hpsa_wait_for_mode_change_ack(h);
  3421. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3422. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3423. dev_warn(&h->pdev->dev,
  3424. "unable to get board into simple mode\n");
  3425. return -ENODEV;
  3426. }
  3427. h->transMethod = CFGTBL_Trans_Simple;
  3428. return 0;
  3429. }
  3430. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3431. {
  3432. int prod_index, err;
  3433. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3434. if (prod_index < 0)
  3435. return -ENODEV;
  3436. h->product_name = products[prod_index].product_name;
  3437. h->access = *(products[prod_index].access);
  3438. if (hpsa_board_disabled(h->pdev)) {
  3439. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3440. return -ENODEV;
  3441. }
  3442. err = pci_enable_device(h->pdev);
  3443. if (err) {
  3444. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3445. return err;
  3446. }
  3447. err = pci_request_regions(h->pdev, "hpsa");
  3448. if (err) {
  3449. dev_err(&h->pdev->dev,
  3450. "cannot obtain PCI resources, aborting\n");
  3451. return err;
  3452. }
  3453. hpsa_interrupt_mode(h);
  3454. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3455. if (err)
  3456. goto err_out_free_res;
  3457. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3458. if (!h->vaddr) {
  3459. err = -ENOMEM;
  3460. goto err_out_free_res;
  3461. }
  3462. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3463. if (err)
  3464. goto err_out_free_res;
  3465. err = hpsa_find_cfgtables(h);
  3466. if (err)
  3467. goto err_out_free_res;
  3468. hpsa_find_board_params(h);
  3469. if (!hpsa_CISS_signature_present(h)) {
  3470. err = -ENODEV;
  3471. goto err_out_free_res;
  3472. }
  3473. hpsa_enable_scsi_prefetch(h);
  3474. hpsa_p600_dma_prefetch_quirk(h);
  3475. err = hpsa_enter_simple_mode(h);
  3476. if (err)
  3477. goto err_out_free_res;
  3478. return 0;
  3479. err_out_free_res:
  3480. if (h->transtable)
  3481. iounmap(h->transtable);
  3482. if (h->cfgtable)
  3483. iounmap(h->cfgtable);
  3484. if (h->vaddr)
  3485. iounmap(h->vaddr);
  3486. /*
  3487. * Deliberately omit pci_disable_device(): it does something nasty to
  3488. * Smart Array controllers that pci_enable_device does not undo
  3489. */
  3490. pci_release_regions(h->pdev);
  3491. return err;
  3492. }
  3493. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3494. {
  3495. int rc;
  3496. #define HBA_INQUIRY_BYTE_COUNT 64
  3497. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3498. if (!h->hba_inquiry_data)
  3499. return;
  3500. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3501. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3502. if (rc != 0) {
  3503. kfree(h->hba_inquiry_data);
  3504. h->hba_inquiry_data = NULL;
  3505. }
  3506. }
  3507. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3508. {
  3509. int rc, i;
  3510. if (!reset_devices)
  3511. return 0;
  3512. /* Reset the controller with a PCI power-cycle or via doorbell */
  3513. rc = hpsa_kdump_hard_reset_controller(pdev);
  3514. /* -ENOTSUPP here means we cannot reset the controller
  3515. * but it's already (and still) up and running in
  3516. * "performant mode". Or, it might be 640x, which can't reset
  3517. * due to concerns about shared bbwc between 6402/6404 pair.
  3518. */
  3519. if (rc == -ENOTSUPP)
  3520. return rc; /* just try to do the kdump anyhow. */
  3521. if (rc)
  3522. return -ENODEV;
  3523. /* Now try to get the controller to respond to a no-op */
  3524. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3525. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3526. if (hpsa_noop(pdev) == 0)
  3527. break;
  3528. else
  3529. dev_warn(&pdev->dev, "no-op failed%s\n",
  3530. (i < 11 ? "; re-trying" : ""));
  3531. }
  3532. return 0;
  3533. }
  3534. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3535. {
  3536. h->cmd_pool_bits = kzalloc(
  3537. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3538. sizeof(unsigned long), GFP_KERNEL);
  3539. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3540. h->nr_cmds * sizeof(*h->cmd_pool),
  3541. &(h->cmd_pool_dhandle));
  3542. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3543. h->nr_cmds * sizeof(*h->errinfo_pool),
  3544. &(h->errinfo_pool_dhandle));
  3545. if ((h->cmd_pool_bits == NULL)
  3546. || (h->cmd_pool == NULL)
  3547. || (h->errinfo_pool == NULL)) {
  3548. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3549. return -ENOMEM;
  3550. }
  3551. return 0;
  3552. }
  3553. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3554. {
  3555. kfree(h->cmd_pool_bits);
  3556. if (h->cmd_pool)
  3557. pci_free_consistent(h->pdev,
  3558. h->nr_cmds * sizeof(struct CommandList),
  3559. h->cmd_pool, h->cmd_pool_dhandle);
  3560. if (h->errinfo_pool)
  3561. pci_free_consistent(h->pdev,
  3562. h->nr_cmds * sizeof(struct ErrorInfo),
  3563. h->errinfo_pool,
  3564. h->errinfo_pool_dhandle);
  3565. }
  3566. static int hpsa_request_irq(struct ctlr_info *h,
  3567. irqreturn_t (*msixhandler)(int, void *),
  3568. irqreturn_t (*intxhandler)(int, void *))
  3569. {
  3570. int rc;
  3571. if (h->msix_vector || h->msi_vector)
  3572. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3573. IRQF_DISABLED, h->devname, h);
  3574. else
  3575. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3576. IRQF_DISABLED, h->devname, h);
  3577. if (rc) {
  3578. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3579. h->intr[h->intr_mode], h->devname);
  3580. return -ENODEV;
  3581. }
  3582. return 0;
  3583. }
  3584. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3585. {
  3586. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3587. HPSA_RESET_TYPE_CONTROLLER)) {
  3588. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3589. return -EIO;
  3590. }
  3591. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3592. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3593. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3594. return -1;
  3595. }
  3596. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3597. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3598. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3599. "after soft reset.\n");
  3600. return -1;
  3601. }
  3602. return 0;
  3603. }
  3604. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3605. {
  3606. free_irq(h->intr[h->intr_mode], h);
  3607. #ifdef CONFIG_PCI_MSI
  3608. if (h->msix_vector)
  3609. pci_disable_msix(h->pdev);
  3610. else if (h->msi_vector)
  3611. pci_disable_msi(h->pdev);
  3612. #endif /* CONFIG_PCI_MSI */
  3613. hpsa_free_sg_chain_blocks(h);
  3614. hpsa_free_cmd_pool(h);
  3615. kfree(h->blockFetchTable);
  3616. pci_free_consistent(h->pdev, h->reply_pool_size,
  3617. h->reply_pool, h->reply_pool_dhandle);
  3618. if (h->vaddr)
  3619. iounmap(h->vaddr);
  3620. if (h->transtable)
  3621. iounmap(h->transtable);
  3622. if (h->cfgtable)
  3623. iounmap(h->cfgtable);
  3624. pci_release_regions(h->pdev);
  3625. kfree(h);
  3626. }
  3627. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3628. const struct pci_device_id *ent)
  3629. {
  3630. int dac, rc;
  3631. struct ctlr_info *h;
  3632. int try_soft_reset = 0;
  3633. unsigned long flags;
  3634. if (number_of_controllers == 0)
  3635. printk(KERN_INFO DRIVER_NAME "\n");
  3636. rc = hpsa_init_reset_devices(pdev);
  3637. if (rc) {
  3638. if (rc != -ENOTSUPP)
  3639. return rc;
  3640. /* If the reset fails in a particular way (it has no way to do
  3641. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3642. * a soft reset once we get the controller configured up to the
  3643. * point that it can accept a command.
  3644. */
  3645. try_soft_reset = 1;
  3646. rc = 0;
  3647. }
  3648. reinit_after_soft_reset:
  3649. /* Command structures must be aligned on a 32-byte boundary because
  3650. * the 5 lower bits of the address are used by the hardware. and by
  3651. * the driver. See comments in hpsa.h for more info.
  3652. */
  3653. #define COMMANDLIST_ALIGNMENT 32
  3654. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3655. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3656. if (!h)
  3657. return -ENOMEM;
  3658. h->pdev = pdev;
  3659. h->busy_initializing = 1;
  3660. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3661. INIT_LIST_HEAD(&h->cmpQ);
  3662. INIT_LIST_HEAD(&h->reqQ);
  3663. spin_lock_init(&h->lock);
  3664. spin_lock_init(&h->scan_lock);
  3665. rc = hpsa_pci_init(h);
  3666. if (rc != 0)
  3667. goto clean1;
  3668. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3669. h->ctlr = number_of_controllers;
  3670. number_of_controllers++;
  3671. /* configure PCI DMA stuff */
  3672. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3673. if (rc == 0) {
  3674. dac = 1;
  3675. } else {
  3676. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3677. if (rc == 0) {
  3678. dac = 0;
  3679. } else {
  3680. dev_err(&pdev->dev, "no suitable DMA available\n");
  3681. goto clean1;
  3682. }
  3683. }
  3684. /* make sure the board interrupts are off */
  3685. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3686. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3687. goto clean2;
  3688. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3689. h->devname, pdev->device,
  3690. h->intr[h->intr_mode], dac ? "" : " not");
  3691. if (hpsa_allocate_cmd_pool(h))
  3692. goto clean4;
  3693. if (hpsa_allocate_sg_chain_blocks(h))
  3694. goto clean4;
  3695. init_waitqueue_head(&h->scan_wait_queue);
  3696. h->scan_finished = 1; /* no scan currently in progress */
  3697. pci_set_drvdata(pdev, h);
  3698. h->ndevices = 0;
  3699. h->scsi_host = NULL;
  3700. spin_lock_init(&h->devlock);
  3701. hpsa_put_ctlr_into_performant_mode(h);
  3702. /* At this point, the controller is ready to take commands.
  3703. * Now, if reset_devices and the hard reset didn't work, try
  3704. * the soft reset and see if that works.
  3705. */
  3706. if (try_soft_reset) {
  3707. /* This is kind of gross. We may or may not get a completion
  3708. * from the soft reset command, and if we do, then the value
  3709. * from the fifo may or may not be valid. So, we wait 10 secs
  3710. * after the reset throwing away any completions we get during
  3711. * that time. Unregister the interrupt handler and register
  3712. * fake ones to scoop up any residual completions.
  3713. */
  3714. spin_lock_irqsave(&h->lock, flags);
  3715. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3716. spin_unlock_irqrestore(&h->lock, flags);
  3717. free_irq(h->intr[h->intr_mode], h);
  3718. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3719. hpsa_intx_discard_completions);
  3720. if (rc) {
  3721. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3722. "soft reset.\n");
  3723. goto clean4;
  3724. }
  3725. rc = hpsa_kdump_soft_reset(h);
  3726. if (rc)
  3727. /* Neither hard nor soft reset worked, we're hosed. */
  3728. goto clean4;
  3729. dev_info(&h->pdev->dev, "Board READY.\n");
  3730. dev_info(&h->pdev->dev,
  3731. "Waiting for stale completions to drain.\n");
  3732. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3733. msleep(10000);
  3734. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3735. rc = controller_reset_failed(h->cfgtable);
  3736. if (rc)
  3737. dev_info(&h->pdev->dev,
  3738. "Soft reset appears to have failed.\n");
  3739. /* since the controller's reset, we have to go back and re-init
  3740. * everything. Easiest to just forget what we've done and do it
  3741. * all over again.
  3742. */
  3743. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3744. try_soft_reset = 0;
  3745. if (rc)
  3746. /* don't go to clean4, we already unallocated */
  3747. return -ENODEV;
  3748. goto reinit_after_soft_reset;
  3749. }
  3750. /* Turn the interrupts on so we can service requests */
  3751. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3752. hpsa_hba_inquiry(h);
  3753. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3754. h->busy_initializing = 0;
  3755. return 1;
  3756. clean4:
  3757. hpsa_free_sg_chain_blocks(h);
  3758. hpsa_free_cmd_pool(h);
  3759. free_irq(h->intr[h->intr_mode], h);
  3760. clean2:
  3761. clean1:
  3762. h->busy_initializing = 0;
  3763. kfree(h);
  3764. return rc;
  3765. }
  3766. static void hpsa_flush_cache(struct ctlr_info *h)
  3767. {
  3768. char *flush_buf;
  3769. struct CommandList *c;
  3770. flush_buf = kzalloc(4, GFP_KERNEL);
  3771. if (!flush_buf)
  3772. return;
  3773. c = cmd_special_alloc(h);
  3774. if (!c) {
  3775. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3776. goto out_of_memory;
  3777. }
  3778. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3779. RAID_CTLR_LUNID, TYPE_CMD);
  3780. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3781. if (c->err_info->CommandStatus != 0)
  3782. dev_warn(&h->pdev->dev,
  3783. "error flushing cache on controller\n");
  3784. cmd_special_free(h, c);
  3785. out_of_memory:
  3786. kfree(flush_buf);
  3787. }
  3788. static void hpsa_shutdown(struct pci_dev *pdev)
  3789. {
  3790. struct ctlr_info *h;
  3791. h = pci_get_drvdata(pdev);
  3792. /* Turn board interrupts off and send the flush cache command
  3793. * sendcmd will turn off interrupt, and send the flush...
  3794. * To write all data in the battery backed cache to disks
  3795. */
  3796. hpsa_flush_cache(h);
  3797. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3798. free_irq(h->intr[h->intr_mode], h);
  3799. #ifdef CONFIG_PCI_MSI
  3800. if (h->msix_vector)
  3801. pci_disable_msix(h->pdev);
  3802. else if (h->msi_vector)
  3803. pci_disable_msi(h->pdev);
  3804. #endif /* CONFIG_PCI_MSI */
  3805. }
  3806. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3807. {
  3808. struct ctlr_info *h;
  3809. if (pci_get_drvdata(pdev) == NULL) {
  3810. dev_err(&pdev->dev, "unable to remove device \n");
  3811. return;
  3812. }
  3813. h = pci_get_drvdata(pdev);
  3814. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3815. hpsa_shutdown(pdev);
  3816. iounmap(h->vaddr);
  3817. iounmap(h->transtable);
  3818. iounmap(h->cfgtable);
  3819. hpsa_free_sg_chain_blocks(h);
  3820. pci_free_consistent(h->pdev,
  3821. h->nr_cmds * sizeof(struct CommandList),
  3822. h->cmd_pool, h->cmd_pool_dhandle);
  3823. pci_free_consistent(h->pdev,
  3824. h->nr_cmds * sizeof(struct ErrorInfo),
  3825. h->errinfo_pool, h->errinfo_pool_dhandle);
  3826. pci_free_consistent(h->pdev, h->reply_pool_size,
  3827. h->reply_pool, h->reply_pool_dhandle);
  3828. kfree(h->cmd_pool_bits);
  3829. kfree(h->blockFetchTable);
  3830. kfree(h->hba_inquiry_data);
  3831. /*
  3832. * Deliberately omit pci_disable_device(): it does something nasty to
  3833. * Smart Array controllers that pci_enable_device does not undo
  3834. */
  3835. pci_release_regions(pdev);
  3836. pci_set_drvdata(pdev, NULL);
  3837. kfree(h);
  3838. }
  3839. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3840. __attribute__((unused)) pm_message_t state)
  3841. {
  3842. return -ENOSYS;
  3843. }
  3844. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3845. {
  3846. return -ENOSYS;
  3847. }
  3848. static struct pci_driver hpsa_pci_driver = {
  3849. .name = "hpsa",
  3850. .probe = hpsa_init_one,
  3851. .remove = __devexit_p(hpsa_remove_one),
  3852. .id_table = hpsa_pci_device_id, /* id_table */
  3853. .shutdown = hpsa_shutdown,
  3854. .suspend = hpsa_suspend,
  3855. .resume = hpsa_resume,
  3856. };
  3857. /* Fill in bucket_map[], given nsgs (the max number of
  3858. * scatter gather elements supported) and bucket[],
  3859. * which is an array of 8 integers. The bucket[] array
  3860. * contains 8 different DMA transfer sizes (in 16
  3861. * byte increments) which the controller uses to fetch
  3862. * commands. This function fills in bucket_map[], which
  3863. * maps a given number of scatter gather elements to one of
  3864. * the 8 DMA transfer sizes. The point of it is to allow the
  3865. * controller to only do as much DMA as needed to fetch the
  3866. * command, with the DMA transfer size encoded in the lower
  3867. * bits of the command address.
  3868. */
  3869. static void calc_bucket_map(int bucket[], int num_buckets,
  3870. int nsgs, int *bucket_map)
  3871. {
  3872. int i, j, b, size;
  3873. /* even a command with 0 SGs requires 4 blocks */
  3874. #define MINIMUM_TRANSFER_BLOCKS 4
  3875. #define NUM_BUCKETS 8
  3876. /* Note, bucket_map must have nsgs+1 entries. */
  3877. for (i = 0; i <= nsgs; i++) {
  3878. /* Compute size of a command with i SG entries */
  3879. size = i + MINIMUM_TRANSFER_BLOCKS;
  3880. b = num_buckets; /* Assume the biggest bucket */
  3881. /* Find the bucket that is just big enough */
  3882. for (j = 0; j < 8; j++) {
  3883. if (bucket[j] >= size) {
  3884. b = j;
  3885. break;
  3886. }
  3887. }
  3888. /* for a command with i SG entries, use bucket b. */
  3889. bucket_map[i] = b;
  3890. }
  3891. }
  3892. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3893. u32 use_short_tags)
  3894. {
  3895. int i;
  3896. unsigned long register_value;
  3897. /* This is a bit complicated. There are 8 registers on
  3898. * the controller which we write to to tell it 8 different
  3899. * sizes of commands which there may be. It's a way of
  3900. * reducing the DMA done to fetch each command. Encoded into
  3901. * each command's tag are 3 bits which communicate to the controller
  3902. * which of the eight sizes that command fits within. The size of
  3903. * each command depends on how many scatter gather entries there are.
  3904. * Each SG entry requires 16 bytes. The eight registers are programmed
  3905. * with the number of 16-byte blocks a command of that size requires.
  3906. * The smallest command possible requires 5 such 16 byte blocks.
  3907. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3908. * blocks. Note, this only extends to the SG entries contained
  3909. * within the command block, and does not extend to chained blocks
  3910. * of SG elements. bft[] contains the eight values we write to
  3911. * the registers. They are not evenly distributed, but have more
  3912. * sizes for small commands, and fewer sizes for larger commands.
  3913. */
  3914. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3915. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3916. /* 5 = 1 s/g entry or 4k
  3917. * 6 = 2 s/g entry or 8k
  3918. * 8 = 4 s/g entry or 16k
  3919. * 10 = 6 s/g entry or 24k
  3920. */
  3921. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3922. /* Controller spec: zero out this buffer. */
  3923. memset(h->reply_pool, 0, h->reply_pool_size);
  3924. h->reply_pool_head = h->reply_pool;
  3925. bft[7] = h->max_sg_entries + 4;
  3926. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3927. for (i = 0; i < 8; i++)
  3928. writel(bft[i], &h->transtable->BlockFetch[i]);
  3929. /* size of controller ring buffer */
  3930. writel(h->max_commands, &h->transtable->RepQSize);
  3931. writel(1, &h->transtable->RepQCount);
  3932. writel(0, &h->transtable->RepQCtrAddrLow32);
  3933. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3934. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3935. writel(0, &h->transtable->RepQAddr0High32);
  3936. writel(CFGTBL_Trans_Performant | use_short_tags,
  3937. &(h->cfgtable->HostWrite.TransportRequest));
  3938. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3939. hpsa_wait_for_mode_change_ack(h);
  3940. register_value = readl(&(h->cfgtable->TransportActive));
  3941. if (!(register_value & CFGTBL_Trans_Performant)) {
  3942. dev_warn(&h->pdev->dev, "unable to get board into"
  3943. " performant mode\n");
  3944. return;
  3945. }
  3946. /* Change the access methods to the performant access methods */
  3947. h->access = SA5_performant_access;
  3948. h->transMethod = CFGTBL_Trans_Performant;
  3949. }
  3950. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3951. {
  3952. u32 trans_support;
  3953. if (hpsa_simple_mode)
  3954. return;
  3955. trans_support = readl(&(h->cfgtable->TransportSupport));
  3956. if (!(trans_support & PERFORMANT_MODE))
  3957. return;
  3958. hpsa_get_max_perf_mode_cmds(h);
  3959. h->max_sg_entries = 32;
  3960. /* Performant mode ring buffer and supporting data structures */
  3961. h->reply_pool_size = h->max_commands * sizeof(u64);
  3962. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3963. &(h->reply_pool_dhandle));
  3964. /* Need a block fetch table for performant mode */
  3965. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3966. sizeof(u32)), GFP_KERNEL);
  3967. if ((h->reply_pool == NULL)
  3968. || (h->blockFetchTable == NULL))
  3969. goto clean_up;
  3970. hpsa_enter_performant_mode(h,
  3971. trans_support & CFGTBL_Trans_use_short_tags);
  3972. return;
  3973. clean_up:
  3974. if (h->reply_pool)
  3975. pci_free_consistent(h->pdev, h->reply_pool_size,
  3976. h->reply_pool, h->reply_pool_dhandle);
  3977. kfree(h->blockFetchTable);
  3978. }
  3979. /*
  3980. * This is it. Register the PCI driver information for the cards we control
  3981. * the OS will call our registered routines when it finds one of our cards.
  3982. */
  3983. static int __init hpsa_init(void)
  3984. {
  3985. return pci_register_driver(&hpsa_pci_driver);
  3986. }
  3987. static void __exit hpsa_cleanup(void)
  3988. {
  3989. pci_unregister_driver(&hpsa_pci_driver);
  3990. }
  3991. module_init(hpsa_init);
  3992. module_exit(hpsa_cleanup);