fwio.c 19 KB

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  1. /*
  2. * Firmware I/O code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * Based on:
  9. * - the islsm (softmac prism54) driver, which is:
  10. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  11. * - stlc45xx driver
  12. * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/firmware.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include "p54.h"
  23. #include "eeprom.h"
  24. #include "lmac.h"
  25. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  26. {
  27. struct p54_common *priv = dev->priv;
  28. struct exp_if *exp_if;
  29. struct bootrec *bootrec;
  30. u32 *data = (u32 *)fw->data;
  31. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  32. u8 *fw_version = NULL;
  33. size_t len;
  34. int i;
  35. int maxlen;
  36. if (priv->rx_start)
  37. return 0;
  38. while (data < end_data && *data)
  39. data++;
  40. while (data < end_data && !*data)
  41. data++;
  42. bootrec = (struct bootrec *) data;
  43. while (bootrec->data <= end_data && (bootrec->data +
  44. (len = le32_to_cpu(bootrec->len))) <= end_data) {
  45. u32 code = le32_to_cpu(bootrec->code);
  46. switch (code) {
  47. case BR_CODE_COMPONENT_ID:
  48. priv->fw_interface = be32_to_cpup((__be32 *)
  49. bootrec->data);
  50. switch (priv->fw_interface) {
  51. case FW_LM86:
  52. case FW_LM20:
  53. case FW_LM87: {
  54. char *iftype = (char *)bootrec->data;
  55. printk(KERN_INFO "%s: p54 detected a LM%c%c "
  56. "firmware\n",
  57. wiphy_name(priv->hw->wiphy),
  58. iftype[2], iftype[3]);
  59. break;
  60. }
  61. case FW_FMAC:
  62. default:
  63. printk(KERN_ERR "%s: unsupported firmware\n",
  64. wiphy_name(priv->hw->wiphy));
  65. return -ENODEV;
  66. }
  67. break;
  68. case BR_CODE_COMPONENT_VERSION:
  69. /* 24 bytes should be enough for all firmwares */
  70. if (strnlen((unsigned char *) bootrec->data, 24) < 24)
  71. fw_version = (unsigned char *) bootrec->data;
  72. break;
  73. case BR_CODE_DESCR: {
  74. struct bootrec_desc *desc =
  75. (struct bootrec_desc *)bootrec->data;
  76. priv->rx_start = le32_to_cpu(desc->rx_start);
  77. /* FIXME add sanity checking */
  78. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  79. priv->headroom = desc->headroom;
  80. priv->tailroom = desc->tailroom;
  81. priv->privacy_caps = desc->privacy_caps;
  82. priv->rx_keycache_size = desc->rx_keycache_size;
  83. if (le32_to_cpu(bootrec->len) == 11)
  84. priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
  85. else
  86. priv->rx_mtu = (size_t)
  87. 0x620 - priv->tx_hdr_len;
  88. maxlen = priv->tx_hdr_len + /* USB devices */
  89. sizeof(struct p54_rx_data) +
  90. 4 + /* rx alignment */
  91. IEEE80211_MAX_FRAG_THRESHOLD;
  92. if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
  93. printk(KERN_INFO "p54: rx_mtu reduced from %d "
  94. "to %d\n", priv->rx_mtu, maxlen);
  95. priv->rx_mtu = maxlen;
  96. }
  97. break;
  98. }
  99. case BR_CODE_EXPOSED_IF:
  100. exp_if = (struct exp_if *) bootrec->data;
  101. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  102. if (exp_if[i].if_id == cpu_to_le16(IF_ID_LMAC))
  103. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  104. break;
  105. case BR_CODE_DEPENDENT_IF:
  106. break;
  107. case BR_CODE_END_OF_BRA:
  108. case LEGACY_BR_CODE_END_OF_BRA:
  109. end_data = NULL;
  110. break;
  111. default:
  112. break;
  113. }
  114. bootrec = (struct bootrec *)&bootrec->data[len];
  115. }
  116. if (fw_version)
  117. printk(KERN_INFO "%s: FW rev %s - Softmac protocol %x.%x\n",
  118. wiphy_name(priv->hw->wiphy), fw_version,
  119. priv->fw_var >> 8, priv->fw_var & 0xff);
  120. if (priv->fw_var < 0x500)
  121. printk(KERN_INFO "%s: you are using an obsolete firmware. "
  122. "visit http://wireless.kernel.org/en/users/Drivers/p54 "
  123. "and grab one for \"kernel >= 2.6.28\"!\n",
  124. wiphy_name(priv->hw->wiphy));
  125. if (priv->fw_var >= 0x300) {
  126. /* Firmware supports QoS, use it! */
  127. if (priv->fw_var >= 0x500) {
  128. priv->tx_stats[P54_QUEUE_AC_VO].limit = 16;
  129. priv->tx_stats[P54_QUEUE_AC_VI].limit = 16;
  130. priv->tx_stats[P54_QUEUE_AC_BE].limit = 16;
  131. priv->tx_stats[P54_QUEUE_AC_BK].limit = 16;
  132. } else {
  133. priv->tx_stats[P54_QUEUE_AC_VO].limit = 3;
  134. priv->tx_stats[P54_QUEUE_AC_VI].limit = 4;
  135. priv->tx_stats[P54_QUEUE_AC_BE].limit = 3;
  136. priv->tx_stats[P54_QUEUE_AC_BK].limit = 2;
  137. }
  138. priv->hw->queues = P54_QUEUE_AC_NUM;
  139. }
  140. printk(KERN_INFO "%s: cryptographic accelerator "
  141. "WEP:%s, TKIP:%s, CCMP:%s\n", wiphy_name(priv->hw->wiphy),
  142. (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" :
  143. "no", (priv->privacy_caps & (BR_DESC_PRIV_CAP_TKIP |
  144. BR_DESC_PRIV_CAP_MICHAEL)) ? "YES" : "no",
  145. (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
  146. "YES" : "no");
  147. if (priv->rx_keycache_size) {
  148. /*
  149. * NOTE:
  150. *
  151. * The firmware provides at most 255 (0 - 254) slots
  152. * for keys which are then used to offload decryption.
  153. * As a result the 255 entry (aka 0xff) can be used
  154. * safely by the driver to mark keys that didn't fit
  155. * into the full cache. This trick saves us from
  156. * keeping a extra list for uploaded keys.
  157. */
  158. priv->used_rxkeys = kzalloc(BITS_TO_LONGS(
  159. priv->rx_keycache_size), GFP_KERNEL);
  160. if (!priv->used_rxkeys)
  161. return -ENOMEM;
  162. }
  163. return 0;
  164. }
  165. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  166. static struct sk_buff *p54_alloc_skb(struct p54_common *priv, u16 hdr_flags,
  167. u16 payload_len, u16 type, gfp_t memflags)
  168. {
  169. struct p54_hdr *hdr;
  170. struct sk_buff *skb;
  171. size_t frame_len = sizeof(*hdr) + payload_len;
  172. if (frame_len > P54_MAX_CTRL_FRAME_LEN)
  173. return NULL;
  174. if (unlikely(skb_queue_len(&priv->tx_pending) > 64))
  175. return NULL;
  176. skb = __dev_alloc_skb(priv->tx_hdr_len + frame_len, memflags);
  177. if (!skb)
  178. return NULL;
  179. skb_reserve(skb, priv->tx_hdr_len);
  180. hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
  181. hdr->flags = cpu_to_le16(hdr_flags);
  182. hdr->len = cpu_to_le16(payload_len);
  183. hdr->type = cpu_to_le16(type);
  184. hdr->tries = hdr->rts_tries = 0;
  185. return skb;
  186. }
  187. int p54_download_eeprom(struct p54_common *priv, void *buf,
  188. u16 offset, u16 len)
  189. {
  190. struct p54_eeprom_lm86 *eeprom_hdr;
  191. struct sk_buff *skb;
  192. size_t eeprom_hdr_size;
  193. int ret = 0;
  194. if (priv->fw_var >= 0x509)
  195. eeprom_hdr_size = sizeof(*eeprom_hdr);
  196. else
  197. eeprom_hdr_size = 0x4;
  198. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL, eeprom_hdr_size +
  199. len, P54_CONTROL_TYPE_EEPROM_READBACK,
  200. GFP_KERNEL);
  201. if (unlikely(!skb))
  202. return -ENOMEM;
  203. mutex_lock(&priv->eeprom_mutex);
  204. priv->eeprom = buf;
  205. eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
  206. eeprom_hdr_size + len);
  207. if (priv->fw_var < 0x509) {
  208. eeprom_hdr->v1.offset = cpu_to_le16(offset);
  209. eeprom_hdr->v1.len = cpu_to_le16(len);
  210. } else {
  211. eeprom_hdr->v2.offset = cpu_to_le32(offset);
  212. eeprom_hdr->v2.len = cpu_to_le16(len);
  213. eeprom_hdr->v2.magic2 = 0xf;
  214. memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
  215. }
  216. p54_tx(priv, skb);
  217. if (!wait_for_completion_interruptible_timeout(
  218. &priv->eeprom_comp, HZ)) {
  219. printk(KERN_ERR "%s: device does not respond!\n",
  220. wiphy_name(priv->hw->wiphy));
  221. ret = -EBUSY;
  222. }
  223. priv->eeprom = NULL;
  224. mutex_unlock(&priv->eeprom_mutex);
  225. return ret;
  226. }
  227. int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set)
  228. {
  229. struct sk_buff *skb;
  230. struct p54_tim *tim;
  231. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*tim),
  232. P54_CONTROL_TYPE_TIM, GFP_ATOMIC);
  233. if (unlikely(!skb))
  234. return -ENOMEM;
  235. tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
  236. tim->count = 1;
  237. tim->entry[0] = cpu_to_le16(set ? (aid | 0x8000) : aid);
  238. p54_tx(priv, skb);
  239. return 0;
  240. }
  241. int p54_sta_unlock(struct p54_common *priv, u8 *addr)
  242. {
  243. struct sk_buff *skb;
  244. struct p54_sta_unlock *sta;
  245. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*sta),
  246. P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
  247. if (unlikely(!skb))
  248. return -ENOMEM;
  249. sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
  250. memcpy(sta->addr, addr, ETH_ALEN);
  251. p54_tx(priv, skb);
  252. return 0;
  253. }
  254. int p54_tx_cancel(struct p54_common *priv, __le32 req_id)
  255. {
  256. struct sk_buff *skb;
  257. struct p54_txcancel *cancel;
  258. if (unlikely(req_id < priv->rx_start || req_id > priv->rx_end))
  259. return -EINVAL;
  260. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*cancel),
  261. P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
  262. if (unlikely(!skb))
  263. return -ENOMEM;
  264. cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
  265. cancel->req_id = req_id;
  266. p54_tx(priv, skb);
  267. return 0;
  268. }
  269. int p54_setup_mac(struct p54_common *priv)
  270. {
  271. struct sk_buff *skb;
  272. struct p54_setup_mac *setup;
  273. u16 mode;
  274. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup),
  275. P54_CONTROL_TYPE_SETUP, GFP_ATOMIC);
  276. if (!skb)
  277. return -ENOMEM;
  278. setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
  279. if (priv->hw->conf.radio_enabled) {
  280. switch (priv->mode) {
  281. case NL80211_IFTYPE_STATION:
  282. mode = P54_FILTER_TYPE_STATION;
  283. break;
  284. case NL80211_IFTYPE_AP:
  285. mode = P54_FILTER_TYPE_AP;
  286. break;
  287. case NL80211_IFTYPE_ADHOC:
  288. case NL80211_IFTYPE_MESH_POINT:
  289. mode = P54_FILTER_TYPE_IBSS;
  290. break;
  291. case NL80211_IFTYPE_MONITOR:
  292. mode = P54_FILTER_TYPE_PROMISCUOUS;
  293. break;
  294. default:
  295. mode = P54_FILTER_TYPE_HIBERNATE;
  296. break;
  297. }
  298. /*
  299. * "TRANSPARENT and PROMISCUOUS are mutually exclusive"
  300. * STSW45X0C LMAC API - page 12
  301. */
  302. if (((priv->filter_flags & FIF_PROMISC_IN_BSS) ||
  303. (priv->filter_flags & FIF_OTHER_BSS)) &&
  304. (mode != P54_FILTER_TYPE_PROMISCUOUS))
  305. mode |= P54_FILTER_TYPE_TRANSPARENT;
  306. } else
  307. mode = P54_FILTER_TYPE_HIBERNATE;
  308. setup->mac_mode = cpu_to_le16(mode);
  309. memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
  310. memcpy(setup->bssid, priv->bssid, ETH_ALEN);
  311. setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */
  312. setup->rx_align = 0;
  313. if (priv->fw_var < 0x500) {
  314. setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  315. memset(setup->v1.rts_rates, 0, 8);
  316. setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
  317. setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  318. setup->v1.rxhw = cpu_to_le16(priv->rxhw);
  319. setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
  320. setup->v1.unalloc0 = cpu_to_le16(0);
  321. } else {
  322. setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
  323. setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  324. setup->v2.rxhw = cpu_to_le16(priv->rxhw);
  325. setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
  326. setup->v2.truncate = cpu_to_le16(48896);
  327. setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  328. setup->v2.sbss_offset = 0;
  329. setup->v2.mcast_window = 0;
  330. setup->v2.rx_rssi_threshold = 0;
  331. setup->v2.rx_ed_threshold = 0;
  332. setup->v2.ref_clock = cpu_to_le32(644245094);
  333. setup->v2.lpf_bandwidth = cpu_to_le16(65535);
  334. setup->v2.osc_start_delay = cpu_to_le16(65535);
  335. }
  336. p54_tx(priv, skb);
  337. return 0;
  338. }
  339. int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
  340. {
  341. struct sk_buff *skb;
  342. struct p54_hdr *hdr;
  343. struct p54_scan_head *head;
  344. struct p54_iq_autocal_entry *iq_autocal;
  345. union p54_scan_body_union *body;
  346. struct p54_scan_tail_rate *rate;
  347. struct pda_rssi_cal_entry *rssi;
  348. unsigned int i;
  349. void *entry;
  350. int band = priv->hw->conf.channel->band;
  351. __le16 freq = cpu_to_le16(priv->hw->conf.channel->center_freq);
  352. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) +
  353. 2 + sizeof(*iq_autocal) + sizeof(*body) +
  354. sizeof(*rate) + 2 * sizeof(*rssi),
  355. P54_CONTROL_TYPE_SCAN, GFP_ATOMIC);
  356. if (!skb)
  357. return -ENOMEM;
  358. head = (struct p54_scan_head *) skb_put(skb, sizeof(*head));
  359. memset(head->scan_params, 0, sizeof(head->scan_params));
  360. head->mode = cpu_to_le16(mode);
  361. head->dwell = cpu_to_le16(dwell);
  362. head->freq = freq;
  363. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  364. __le16 *pa_power_points = (__le16 *) skb_put(skb, 2);
  365. *pa_power_points = cpu_to_le16(0x0c);
  366. }
  367. iq_autocal = (void *) skb_put(skb, sizeof(*iq_autocal));
  368. for (i = 0; i < priv->iq_autocal_len; i++) {
  369. if (priv->iq_autocal[i].freq != freq)
  370. continue;
  371. memcpy(iq_autocal, &priv->iq_autocal[i].params,
  372. sizeof(struct p54_iq_autocal_entry));
  373. break;
  374. }
  375. if (i == priv->iq_autocal_len)
  376. goto err;
  377. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW)
  378. body = (void *) skb_put(skb, sizeof(body->longbow));
  379. else
  380. body = (void *) skb_put(skb, sizeof(body->normal));
  381. for (i = 0; i < priv->output_limit->entries; i++) {
  382. __le16 *entry_freq = (void *) (priv->output_limit->data +
  383. priv->output_limit->entry_size * i);
  384. if (*entry_freq != freq)
  385. continue;
  386. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  387. memcpy(&body->longbow.power_limits,
  388. (void *) entry_freq + sizeof(__le16),
  389. priv->output_limit->entry_size);
  390. } else {
  391. struct pda_channel_output_limit *limits =
  392. (void *) entry_freq;
  393. body->normal.val_barker = 0x38;
  394. body->normal.val_bpsk = body->normal.dup_bpsk =
  395. limits->val_bpsk;
  396. body->normal.val_qpsk = body->normal.dup_qpsk =
  397. limits->val_qpsk;
  398. body->normal.val_16qam = body->normal.dup_16qam =
  399. limits->val_16qam;
  400. body->normal.val_64qam = body->normal.dup_64qam =
  401. limits->val_64qam;
  402. }
  403. break;
  404. }
  405. if (i == priv->output_limit->entries)
  406. goto err;
  407. entry = (void *)(priv->curve_data->data + priv->curve_data->offset);
  408. for (i = 0; i < priv->curve_data->entries; i++) {
  409. if (*((__le16 *)entry) != freq) {
  410. entry += priv->curve_data->entry_size;
  411. continue;
  412. }
  413. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  414. memcpy(&body->longbow.curve_data,
  415. (void *) entry + sizeof(__le16),
  416. priv->curve_data->entry_size);
  417. } else {
  418. struct p54_scan_body *chan = &body->normal;
  419. struct pda_pa_curve_data *curve_data =
  420. (void *) priv->curve_data->data;
  421. entry += sizeof(__le16);
  422. chan->pa_points_per_curve = 8;
  423. memset(chan->curve_data, 0, sizeof(*chan->curve_data));
  424. memcpy(chan->curve_data, entry,
  425. sizeof(struct p54_pa_curve_data_sample) *
  426. min((u8)8, curve_data->points_per_channel));
  427. }
  428. break;
  429. }
  430. if (i == priv->curve_data->entries)
  431. goto err;
  432. if ((priv->fw_var >= 0x500) && (priv->fw_var < 0x509)) {
  433. rate = (void *) skb_put(skb, sizeof(*rate));
  434. rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  435. for (i = 0; i < sizeof(rate->rts_rates); i++)
  436. rate->rts_rates[i] = i;
  437. }
  438. rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi));
  439. rssi->mul = cpu_to_le16(priv->rssical_db[band].mul);
  440. rssi->add = cpu_to_le16(priv->rssical_db[band].add);
  441. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  442. /* Longbow frontend needs ever more */
  443. rssi = (void *) skb_put(skb, sizeof(*rssi));
  444. rssi->mul = cpu_to_le16(priv->rssical_db[band].longbow_unkn);
  445. rssi->add = cpu_to_le16(priv->rssical_db[band].longbow_unk2);
  446. }
  447. if (priv->fw_var >= 0x509) {
  448. rate = (void *) skb_put(skb, sizeof(*rate));
  449. rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  450. for (i = 0; i < sizeof(rate->rts_rates); i++)
  451. rate->rts_rates[i] = i;
  452. }
  453. hdr = (struct p54_hdr *) skb->data;
  454. hdr->len = cpu_to_le16(skb->len - sizeof(*hdr));
  455. p54_tx(priv, skb);
  456. return 0;
  457. err:
  458. printk(KERN_ERR "%s: frequency change to channel %d failed.\n",
  459. wiphy_name(priv->hw->wiphy), ieee80211_frequency_to_channel(
  460. priv->hw->conf.channel->center_freq));
  461. dev_kfree_skb_any(skb);
  462. return -EINVAL;
  463. }
  464. int p54_set_leds(struct p54_common *priv)
  465. {
  466. struct sk_buff *skb;
  467. struct p54_led *led;
  468. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led),
  469. P54_CONTROL_TYPE_LED, GFP_ATOMIC);
  470. if (unlikely(!skb))
  471. return -ENOMEM;
  472. led = (struct p54_led *) skb_put(skb, sizeof(*led));
  473. led->flags = cpu_to_le16(0x0003);
  474. led->mask[0] = led->mask[1] = cpu_to_le16(priv->softled_state);
  475. led->delay[0] = cpu_to_le16(1);
  476. led->delay[1] = cpu_to_le16(0);
  477. p54_tx(priv, skb);
  478. return 0;
  479. }
  480. int p54_set_edcf(struct p54_common *priv)
  481. {
  482. struct sk_buff *skb;
  483. struct p54_edcf *edcf;
  484. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf),
  485. P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
  486. if (unlikely(!skb))
  487. return -ENOMEM;
  488. edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
  489. if (priv->use_short_slot) {
  490. edcf->slottime = 9;
  491. edcf->sifs = 0x10;
  492. edcf->eofpad = 0x00;
  493. } else {
  494. edcf->slottime = 20;
  495. edcf->sifs = 0x0a;
  496. edcf->eofpad = 0x06;
  497. }
  498. /* (see prism54/isl_oid.h for further details) */
  499. edcf->frameburst = cpu_to_le16(0);
  500. edcf->round_trip_delay = cpu_to_le16(0);
  501. edcf->flags = 0;
  502. memset(edcf->mapping, 0, sizeof(edcf->mapping));
  503. memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
  504. p54_tx(priv, skb);
  505. return 0;
  506. }
  507. int p54_set_ps(struct p54_common *priv)
  508. {
  509. struct sk_buff *skb;
  510. struct p54_psm *psm;
  511. unsigned int i;
  512. u16 mode;
  513. if (priv->hw->conf.flags & IEEE80211_CONF_PS)
  514. mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM |
  515. P54_PSM_CHECKSUM | P54_PSM_MCBC;
  516. else
  517. mode = P54_PSM_CAM;
  518. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm),
  519. P54_CONTROL_TYPE_PSM, GFP_ATOMIC);
  520. if (!skb)
  521. return -ENOMEM;
  522. psm = (struct p54_psm *)skb_put(skb, sizeof(*psm));
  523. psm->mode = cpu_to_le16(mode);
  524. psm->aid = cpu_to_le16(priv->aid);
  525. for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) {
  526. psm->intervals[i].interval =
  527. cpu_to_le16(priv->hw->conf.listen_interval);
  528. psm->intervals[i].periods = cpu_to_le16(1);
  529. }
  530. psm->beacon_rssi_skip_max = 200;
  531. psm->rssi_delta_threshold = 0;
  532. psm->nr = 10;
  533. psm->exclude[0] = 0;
  534. p54_tx(priv, skb);
  535. return 0;
  536. }
  537. int p54_init_xbow_synth(struct p54_common *priv)
  538. {
  539. struct sk_buff *skb;
  540. struct p54_xbow_synth *xbow;
  541. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow),
  542. P54_CONTROL_TYPE_XBOW_SYNTH_CFG, GFP_KERNEL);
  543. if (unlikely(!skb))
  544. return -ENOMEM;
  545. xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
  546. xbow->magic1 = cpu_to_le16(0x1);
  547. xbow->magic2 = cpu_to_le16(0x2);
  548. xbow->freq = cpu_to_le16(5390);
  549. memset(xbow->padding, 0, sizeof(xbow->padding));
  550. p54_tx(priv, skb);
  551. return 0;
  552. }
  553. int p54_upload_key(struct p54_common *priv, u8 algo, int slot, u8 idx, u8 len,
  554. u8 *addr, u8* key)
  555. {
  556. struct sk_buff *skb;
  557. struct p54_keycache *rxkey;
  558. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey),
  559. P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL);
  560. if (unlikely(!skb))
  561. return -ENOMEM;
  562. rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
  563. rxkey->entry = slot;
  564. rxkey->key_id = idx;
  565. rxkey->key_type = algo;
  566. if (addr)
  567. memcpy(rxkey->mac, addr, ETH_ALEN);
  568. else
  569. memset(rxkey->mac, ~0, ETH_ALEN);
  570. switch (algo) {
  571. case P54_CRYPTO_WEP:
  572. case P54_CRYPTO_AESCCMP:
  573. rxkey->key_len = min_t(u8, 16, len);
  574. memcpy(rxkey->key, key, rxkey->key_len);
  575. break;
  576. case P54_CRYPTO_TKIPMICHAEL:
  577. rxkey->key_len = 24;
  578. memcpy(rxkey->key, key, 16);
  579. memcpy(&(rxkey->key[16]), &(key
  580. [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
  581. break;
  582. case P54_CRYPTO_NONE:
  583. rxkey->key_len = 0;
  584. memset(rxkey->key, 0, sizeof(rxkey->key));
  585. break;
  586. default:
  587. printk(KERN_ERR "%s: invalid cryptographic algorithm: %d\n",
  588. wiphy_name(priv->hw->wiphy), algo);
  589. dev_kfree_skb(skb);
  590. return -EINVAL;
  591. }
  592. p54_tx(priv, skb);
  593. return 0;
  594. }
  595. int p54_fetch_statistics(struct p54_common *priv)
  596. {
  597. struct sk_buff *skb;
  598. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL,
  599. sizeof(struct p54_statistics),
  600. P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
  601. if (!skb)
  602. return -ENOMEM;
  603. p54_tx(priv, skb);
  604. return 0;
  605. }