booke.c 18 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright IBM Corp. 2007
  16. *
  17. * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  18. * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  19. */
  20. #include <linux/errno.h>
  21. #include <linux/err.h>
  22. #include <linux/kvm_host.h>
  23. #include <linux/module.h>
  24. #include <linux/vmalloc.h>
  25. #include <linux/fs.h>
  26. #include <asm/cputable.h>
  27. #include <asm/uaccess.h>
  28. #include <asm/kvm_ppc.h>
  29. #include <asm/cacheflush.h>
  30. #include "booke.h"
  31. #include "44x_tlb.h"
  32. unsigned long kvmppc_booke_handlers;
  33. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  34. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  35. struct kvm_stats_debugfs_item debugfs_entries[] = {
  36. { "exits", VCPU_STAT(sum_exits) },
  37. { "mmio", VCPU_STAT(mmio_exits) },
  38. { "dcr", VCPU_STAT(dcr_exits) },
  39. { "sig", VCPU_STAT(signal_exits) },
  40. { "light", VCPU_STAT(light_exits) },
  41. { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
  42. { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
  43. { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
  44. { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
  45. { "sysc", VCPU_STAT(syscall_exits) },
  46. { "isi", VCPU_STAT(isi_exits) },
  47. { "dsi", VCPU_STAT(dsi_exits) },
  48. { "inst_emu", VCPU_STAT(emulated_inst_exits) },
  49. { "dec", VCPU_STAT(dec_exits) },
  50. { "ext_intr", VCPU_STAT(ext_intr_exits) },
  51. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  52. { NULL }
  53. };
  54. static const u32 interrupt_msr_mask[16] = {
  55. [BOOKE_INTERRUPT_CRITICAL] = MSR_ME,
  56. [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
  57. [BOOKE_INTERRUPT_DATA_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
  58. [BOOKE_INTERRUPT_INST_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
  59. [BOOKE_INTERRUPT_EXTERNAL] = MSR_CE|MSR_ME|MSR_DE,
  60. [BOOKE_INTERRUPT_ALIGNMENT] = MSR_CE|MSR_ME|MSR_DE,
  61. [BOOKE_INTERRUPT_PROGRAM] = MSR_CE|MSR_ME|MSR_DE,
  62. [BOOKE_INTERRUPT_FP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
  63. [BOOKE_INTERRUPT_SYSCALL] = MSR_CE|MSR_ME|MSR_DE,
  64. [BOOKE_INTERRUPT_AP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
  65. [BOOKE_INTERRUPT_DECREMENTER] = MSR_CE|MSR_ME|MSR_DE,
  66. [BOOKE_INTERRUPT_FIT] = MSR_CE|MSR_ME|MSR_DE,
  67. [BOOKE_INTERRUPT_WATCHDOG] = MSR_ME,
  68. [BOOKE_INTERRUPT_DTLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
  69. [BOOKE_INTERRUPT_ITLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
  70. [BOOKE_INTERRUPT_DEBUG] = MSR_ME,
  71. };
  72. const unsigned char exception_priority[] = {
  73. [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
  74. [BOOKE_INTERRUPT_INST_STORAGE] = 1,
  75. [BOOKE_INTERRUPT_ALIGNMENT] = 2,
  76. [BOOKE_INTERRUPT_PROGRAM] = 3,
  77. [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
  78. [BOOKE_INTERRUPT_SYSCALL] = 5,
  79. [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
  80. [BOOKE_INTERRUPT_DTLB_MISS] = 7,
  81. [BOOKE_INTERRUPT_ITLB_MISS] = 8,
  82. [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
  83. [BOOKE_INTERRUPT_DEBUG] = 10,
  84. [BOOKE_INTERRUPT_CRITICAL] = 11,
  85. [BOOKE_INTERRUPT_WATCHDOG] = 12,
  86. [BOOKE_INTERRUPT_EXTERNAL] = 13,
  87. [BOOKE_INTERRUPT_FIT] = 14,
  88. [BOOKE_INTERRUPT_DECREMENTER] = 15,
  89. };
  90. const unsigned char priority_exception[] = {
  91. BOOKE_INTERRUPT_DATA_STORAGE,
  92. BOOKE_INTERRUPT_INST_STORAGE,
  93. BOOKE_INTERRUPT_ALIGNMENT,
  94. BOOKE_INTERRUPT_PROGRAM,
  95. BOOKE_INTERRUPT_FP_UNAVAIL,
  96. BOOKE_INTERRUPT_SYSCALL,
  97. BOOKE_INTERRUPT_AP_UNAVAIL,
  98. BOOKE_INTERRUPT_DTLB_MISS,
  99. BOOKE_INTERRUPT_ITLB_MISS,
  100. BOOKE_INTERRUPT_MACHINE_CHECK,
  101. BOOKE_INTERRUPT_DEBUG,
  102. BOOKE_INTERRUPT_CRITICAL,
  103. BOOKE_INTERRUPT_WATCHDOG,
  104. BOOKE_INTERRUPT_EXTERNAL,
  105. BOOKE_INTERRUPT_FIT,
  106. BOOKE_INTERRUPT_DECREMENTER,
  107. };
  108. /* TODO: use vcpu_printf() */
  109. void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
  110. {
  111. int i;
  112. printk("pc: %08x msr: %08x\n", vcpu->arch.pc, vcpu->arch.msr);
  113. printk("lr: %08x ctr: %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
  114. printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
  115. printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
  116. for (i = 0; i < 32; i += 4) {
  117. printk("gpr%02d: %08x %08x %08x %08x\n", i,
  118. vcpu->arch.gpr[i],
  119. vcpu->arch.gpr[i+1],
  120. vcpu->arch.gpr[i+2],
  121. vcpu->arch.gpr[i+3]);
  122. }
  123. }
  124. static void kvmppc_booke_queue_exception(struct kvm_vcpu *vcpu, int exception)
  125. {
  126. unsigned int priority = exception_priority[exception];
  127. set_bit(priority, &vcpu->arch.pending_exceptions);
  128. }
  129. static void kvmppc_booke_clear_exception(struct kvm_vcpu *vcpu, int exception)
  130. {
  131. unsigned int priority = exception_priority[exception];
  132. clear_bit(priority, &vcpu->arch.pending_exceptions);
  133. }
  134. void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
  135. {
  136. kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
  137. }
  138. void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
  139. {
  140. kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_DECREMENTER);
  141. }
  142. int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
  143. {
  144. unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER];
  145. return test_bit(priority, &vcpu->arch.pending_exceptions);
  146. }
  147. void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
  148. struct kvm_interrupt *irq)
  149. {
  150. kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_EXTERNAL);
  151. }
  152. /* Check if we are ready to deliver the interrupt */
  153. static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
  154. {
  155. int r;
  156. switch (interrupt) {
  157. case BOOKE_INTERRUPT_CRITICAL:
  158. r = vcpu->arch.msr & MSR_CE;
  159. break;
  160. case BOOKE_INTERRUPT_MACHINE_CHECK:
  161. r = vcpu->arch.msr & MSR_ME;
  162. break;
  163. case BOOKE_INTERRUPT_EXTERNAL:
  164. r = vcpu->arch.msr & MSR_EE;
  165. break;
  166. case BOOKE_INTERRUPT_DECREMENTER:
  167. r = vcpu->arch.msr & MSR_EE;
  168. break;
  169. case BOOKE_INTERRUPT_FIT:
  170. r = vcpu->arch.msr & MSR_EE;
  171. break;
  172. case BOOKE_INTERRUPT_WATCHDOG:
  173. r = vcpu->arch.msr & MSR_CE;
  174. break;
  175. case BOOKE_INTERRUPT_DEBUG:
  176. r = vcpu->arch.msr & MSR_DE;
  177. break;
  178. default:
  179. r = 1;
  180. }
  181. return r;
  182. }
  183. static void kvmppc_booke_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
  184. {
  185. switch (interrupt) {
  186. case BOOKE_INTERRUPT_DECREMENTER:
  187. vcpu->arch.tsr |= TSR_DIS;
  188. break;
  189. }
  190. vcpu->arch.srr0 = vcpu->arch.pc;
  191. vcpu->arch.srr1 = vcpu->arch.msr;
  192. vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
  193. kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
  194. }
  195. /* Check pending exceptions and deliver one, if possible. */
  196. void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
  197. {
  198. unsigned long *pending = &vcpu->arch.pending_exceptions;
  199. unsigned int exception;
  200. unsigned int priority;
  201. priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
  202. while (priority <= BOOKE_MAX_INTERRUPT) {
  203. exception = priority_exception[priority];
  204. if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
  205. kvmppc_booke_clear_exception(vcpu, exception);
  206. kvmppc_booke_deliver_interrupt(vcpu, exception);
  207. break;
  208. }
  209. priority = find_next_bit(pending,
  210. BITS_PER_BYTE * sizeof(*pending),
  211. priority + 1);
  212. }
  213. }
  214. /**
  215. * kvmppc_handle_exit
  216. *
  217. * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
  218. */
  219. int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
  220. unsigned int exit_nr)
  221. {
  222. enum emulation_result er;
  223. int r = RESUME_HOST;
  224. local_irq_enable();
  225. run->exit_reason = KVM_EXIT_UNKNOWN;
  226. run->ready_for_interrupt_injection = 1;
  227. switch (exit_nr) {
  228. case BOOKE_INTERRUPT_MACHINE_CHECK:
  229. printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
  230. kvmppc_dump_vcpu(vcpu);
  231. r = RESUME_HOST;
  232. break;
  233. case BOOKE_INTERRUPT_EXTERNAL:
  234. case BOOKE_INTERRUPT_DECREMENTER:
  235. /* Since we switched IVPR back to the host's value, the host
  236. * handled this interrupt the moment we enabled interrupts.
  237. * Now we just offer it a chance to reschedule the guest. */
  238. /* XXX At this point the TLB still holds our shadow TLB, so if
  239. * we do reschedule the host will fault over it. Perhaps we
  240. * should politely restore the host's entries to minimize
  241. * misses before ceding control. */
  242. if (need_resched())
  243. cond_resched();
  244. if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
  245. vcpu->stat.dec_exits++;
  246. else
  247. vcpu->stat.ext_intr_exits++;
  248. r = RESUME_GUEST;
  249. break;
  250. case BOOKE_INTERRUPT_PROGRAM:
  251. if (vcpu->arch.msr & MSR_PR) {
  252. /* Program traps generated by user-level software must be handled
  253. * by the guest kernel. */
  254. vcpu->arch.esr = vcpu->arch.fault_esr;
  255. kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
  256. r = RESUME_GUEST;
  257. break;
  258. }
  259. er = kvmppc_emulate_instruction(run, vcpu);
  260. switch (er) {
  261. case EMULATE_DONE:
  262. /* Future optimization: only reload non-volatiles if
  263. * they were actually modified by emulation. */
  264. vcpu->stat.emulated_inst_exits++;
  265. r = RESUME_GUEST_NV;
  266. break;
  267. case EMULATE_DO_DCR:
  268. run->exit_reason = KVM_EXIT_DCR;
  269. r = RESUME_HOST;
  270. break;
  271. case EMULATE_FAIL:
  272. /* XXX Deliver Program interrupt to guest. */
  273. printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
  274. __func__, vcpu->arch.pc, vcpu->arch.last_inst);
  275. /* For debugging, encode the failing instruction and
  276. * report it to userspace. */
  277. run->hw.hardware_exit_reason = ~0ULL << 32;
  278. run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
  279. r = RESUME_HOST;
  280. break;
  281. default:
  282. BUG();
  283. }
  284. break;
  285. case BOOKE_INTERRUPT_FP_UNAVAIL:
  286. kvmppc_booke_queue_exception(vcpu, exit_nr);
  287. r = RESUME_GUEST;
  288. break;
  289. case BOOKE_INTERRUPT_DATA_STORAGE:
  290. vcpu->arch.dear = vcpu->arch.fault_dear;
  291. vcpu->arch.esr = vcpu->arch.fault_esr;
  292. kvmppc_booke_queue_exception(vcpu, exit_nr);
  293. vcpu->stat.dsi_exits++;
  294. r = RESUME_GUEST;
  295. break;
  296. case BOOKE_INTERRUPT_INST_STORAGE:
  297. vcpu->arch.esr = vcpu->arch.fault_esr;
  298. kvmppc_booke_queue_exception(vcpu, exit_nr);
  299. vcpu->stat.isi_exits++;
  300. r = RESUME_GUEST;
  301. break;
  302. case BOOKE_INTERRUPT_SYSCALL:
  303. kvmppc_booke_queue_exception(vcpu, exit_nr);
  304. vcpu->stat.syscall_exits++;
  305. r = RESUME_GUEST;
  306. break;
  307. case BOOKE_INTERRUPT_DTLB_MISS: {
  308. struct kvmppc_44x_tlbe *gtlbe;
  309. unsigned long eaddr = vcpu->arch.fault_dear;
  310. gfn_t gfn;
  311. /* Check the guest TLB. */
  312. gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
  313. if (!gtlbe) {
  314. /* The guest didn't have a mapping for it. */
  315. kvmppc_booke_queue_exception(vcpu, exit_nr);
  316. vcpu->arch.dear = vcpu->arch.fault_dear;
  317. vcpu->arch.esr = vcpu->arch.fault_esr;
  318. vcpu->stat.dtlb_real_miss_exits++;
  319. r = RESUME_GUEST;
  320. break;
  321. }
  322. vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
  323. gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
  324. if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
  325. /* The guest TLB had a mapping, but the shadow TLB
  326. * didn't, and it is RAM. This could be because:
  327. * a) the entry is mapping the host kernel, or
  328. * b) the guest used a large mapping which we're faking
  329. * Either way, we need to satisfy the fault without
  330. * invoking the guest. */
  331. kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
  332. gtlbe->word2);
  333. vcpu->stat.dtlb_virt_miss_exits++;
  334. r = RESUME_GUEST;
  335. } else {
  336. /* Guest has mapped and accessed a page which is not
  337. * actually RAM. */
  338. r = kvmppc_emulate_mmio(run, vcpu);
  339. }
  340. break;
  341. }
  342. case BOOKE_INTERRUPT_ITLB_MISS: {
  343. struct kvmppc_44x_tlbe *gtlbe;
  344. unsigned long eaddr = vcpu->arch.pc;
  345. gfn_t gfn;
  346. r = RESUME_GUEST;
  347. /* Check the guest TLB. */
  348. gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
  349. if (!gtlbe) {
  350. /* The guest didn't have a mapping for it. */
  351. kvmppc_booke_queue_exception(vcpu, exit_nr);
  352. vcpu->stat.itlb_real_miss_exits++;
  353. break;
  354. }
  355. vcpu->stat.itlb_virt_miss_exits++;
  356. gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
  357. if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
  358. /* The guest TLB had a mapping, but the shadow TLB
  359. * didn't. This could be because:
  360. * a) the entry is mapping the host kernel, or
  361. * b) the guest used a large mapping which we're faking
  362. * Either way, we need to satisfy the fault without
  363. * invoking the guest. */
  364. kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
  365. gtlbe->word2);
  366. } else {
  367. /* Guest mapped and leaped at non-RAM! */
  368. kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_MACHINE_CHECK);
  369. }
  370. break;
  371. }
  372. case BOOKE_INTERRUPT_DEBUG: {
  373. u32 dbsr;
  374. vcpu->arch.pc = mfspr(SPRN_CSRR0);
  375. /* clear IAC events in DBSR register */
  376. dbsr = mfspr(SPRN_DBSR);
  377. dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
  378. mtspr(SPRN_DBSR, dbsr);
  379. run->exit_reason = KVM_EXIT_DEBUG;
  380. r = RESUME_HOST;
  381. break;
  382. }
  383. default:
  384. printk(KERN_EMERG "exit_nr %d\n", exit_nr);
  385. BUG();
  386. }
  387. local_irq_disable();
  388. kvmppc_core_deliver_interrupts(vcpu);
  389. /* Do some exit accounting. */
  390. vcpu->stat.sum_exits++;
  391. if (!(r & RESUME_HOST)) {
  392. /* To avoid clobbering exit_reason, only check for signals if
  393. * we aren't already exiting to userspace for some other
  394. * reason. */
  395. if (signal_pending(current)) {
  396. run->exit_reason = KVM_EXIT_INTR;
  397. r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
  398. vcpu->stat.signal_exits++;
  399. } else {
  400. vcpu->stat.light_exits++;
  401. }
  402. } else {
  403. switch (run->exit_reason) {
  404. case KVM_EXIT_MMIO:
  405. vcpu->stat.mmio_exits++;
  406. break;
  407. case KVM_EXIT_DCR:
  408. vcpu->stat.dcr_exits++;
  409. break;
  410. case KVM_EXIT_INTR:
  411. vcpu->stat.signal_exits++;
  412. break;
  413. }
  414. }
  415. return r;
  416. }
  417. /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
  418. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  419. {
  420. struct kvmppc_44x_tlbe *tlbe = &vcpu->arch.guest_tlb[0];
  421. tlbe->tid = 0;
  422. tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
  423. tlbe->word1 = 0;
  424. tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
  425. tlbe++;
  426. tlbe->tid = 0;
  427. tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
  428. tlbe->word1 = 0xef600000;
  429. tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
  430. | PPC44x_TLB_I | PPC44x_TLB_G;
  431. vcpu->arch.pc = 0;
  432. vcpu->arch.msr = 0;
  433. vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
  434. vcpu->arch.shadow_pid = 1;
  435. /* Eye-catching number so we know if the guest takes an interrupt
  436. * before it's programmed its own IVPR. */
  437. vcpu->arch.ivpr = 0x55550000;
  438. /* Since the guest can directly access the timebase, it must know the
  439. * real timebase frequency. Accordingly, it must see the state of
  440. * CCR1[TCS]. */
  441. vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
  442. return 0;
  443. }
  444. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  445. {
  446. int i;
  447. regs->pc = vcpu->arch.pc;
  448. regs->cr = vcpu->arch.cr;
  449. regs->ctr = vcpu->arch.ctr;
  450. regs->lr = vcpu->arch.lr;
  451. regs->xer = vcpu->arch.xer;
  452. regs->msr = vcpu->arch.msr;
  453. regs->srr0 = vcpu->arch.srr0;
  454. regs->srr1 = vcpu->arch.srr1;
  455. regs->pid = vcpu->arch.pid;
  456. regs->sprg0 = vcpu->arch.sprg0;
  457. regs->sprg1 = vcpu->arch.sprg1;
  458. regs->sprg2 = vcpu->arch.sprg2;
  459. regs->sprg3 = vcpu->arch.sprg3;
  460. regs->sprg5 = vcpu->arch.sprg4;
  461. regs->sprg6 = vcpu->arch.sprg5;
  462. regs->sprg7 = vcpu->arch.sprg6;
  463. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  464. regs->gpr[i] = vcpu->arch.gpr[i];
  465. return 0;
  466. }
  467. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  468. {
  469. int i;
  470. vcpu->arch.pc = regs->pc;
  471. vcpu->arch.cr = regs->cr;
  472. vcpu->arch.ctr = regs->ctr;
  473. vcpu->arch.lr = regs->lr;
  474. vcpu->arch.xer = regs->xer;
  475. vcpu->arch.msr = regs->msr;
  476. vcpu->arch.srr0 = regs->srr0;
  477. vcpu->arch.srr1 = regs->srr1;
  478. vcpu->arch.sprg0 = regs->sprg0;
  479. vcpu->arch.sprg1 = regs->sprg1;
  480. vcpu->arch.sprg2 = regs->sprg2;
  481. vcpu->arch.sprg3 = regs->sprg3;
  482. vcpu->arch.sprg5 = regs->sprg4;
  483. vcpu->arch.sprg6 = regs->sprg5;
  484. vcpu->arch.sprg7 = regs->sprg6;
  485. for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
  486. vcpu->arch.gpr[i] = regs->gpr[i];
  487. return 0;
  488. }
  489. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  490. struct kvm_sregs *sregs)
  491. {
  492. return -ENOTSUPP;
  493. }
  494. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  495. struct kvm_sregs *sregs)
  496. {
  497. return -ENOTSUPP;
  498. }
  499. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  500. {
  501. return -ENOTSUPP;
  502. }
  503. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  504. {
  505. return -ENOTSUPP;
  506. }
  507. /* 'linear_address' is actually an encoding of AS|PID|EADDR . */
  508. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  509. struct kvm_translation *tr)
  510. {
  511. struct kvmppc_44x_tlbe *gtlbe;
  512. int index;
  513. gva_t eaddr;
  514. u8 pid;
  515. u8 as;
  516. eaddr = tr->linear_address;
  517. pid = (tr->linear_address >> 32) & 0xff;
  518. as = (tr->linear_address >> 40) & 0x1;
  519. index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
  520. if (index == -1) {
  521. tr->valid = 0;
  522. return 0;
  523. }
  524. gtlbe = &vcpu->arch.guest_tlb[index];
  525. tr->physical_address = tlb_xlate(gtlbe, eaddr);
  526. /* XXX what does "writeable" and "usermode" even mean? */
  527. tr->valid = 1;
  528. return 0;
  529. }
  530. static int kvmppc_booke_init(void)
  531. {
  532. unsigned long ivor[16];
  533. unsigned long max_ivor = 0;
  534. int i;
  535. /* We install our own exception handlers by hijacking IVPR. IVPR must
  536. * be 16-bit aligned, so we need a 64KB allocation. */
  537. kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
  538. VCPU_SIZE_ORDER);
  539. if (!kvmppc_booke_handlers)
  540. return -ENOMEM;
  541. /* XXX make sure our handlers are smaller than Linux's */
  542. /* Copy our interrupt handlers to match host IVORs. That way we don't
  543. * have to swap the IVORs on every guest/host transition. */
  544. ivor[0] = mfspr(SPRN_IVOR0);
  545. ivor[1] = mfspr(SPRN_IVOR1);
  546. ivor[2] = mfspr(SPRN_IVOR2);
  547. ivor[3] = mfspr(SPRN_IVOR3);
  548. ivor[4] = mfspr(SPRN_IVOR4);
  549. ivor[5] = mfspr(SPRN_IVOR5);
  550. ivor[6] = mfspr(SPRN_IVOR6);
  551. ivor[7] = mfspr(SPRN_IVOR7);
  552. ivor[8] = mfspr(SPRN_IVOR8);
  553. ivor[9] = mfspr(SPRN_IVOR9);
  554. ivor[10] = mfspr(SPRN_IVOR10);
  555. ivor[11] = mfspr(SPRN_IVOR11);
  556. ivor[12] = mfspr(SPRN_IVOR12);
  557. ivor[13] = mfspr(SPRN_IVOR13);
  558. ivor[14] = mfspr(SPRN_IVOR14);
  559. ivor[15] = mfspr(SPRN_IVOR15);
  560. for (i = 0; i < 16; i++) {
  561. if (ivor[i] > max_ivor)
  562. max_ivor = ivor[i];
  563. memcpy((void *)kvmppc_booke_handlers + ivor[i],
  564. kvmppc_handlers_start + i * kvmppc_handler_len,
  565. kvmppc_handler_len);
  566. }
  567. flush_icache_range(kvmppc_booke_handlers,
  568. kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
  569. return kvm_init(NULL, sizeof(struct kvm_vcpu), THIS_MODULE);
  570. }
  571. static void __exit kvmppc_booke_exit(void)
  572. {
  573. free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
  574. kvm_exit();
  575. }
  576. module_init(kvmppc_booke_init)
  577. module_exit(kvmppc_booke_exit)