chip.c 16 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include "internals.h"
  18. /**
  19. * irq_set_chip - set the irq chip for an irq
  20. * @irq: irq number
  21. * @chip: pointer to irq chip description structure
  22. */
  23. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  24. {
  25. unsigned long flags;
  26. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  27. if (!desc)
  28. return -EINVAL;
  29. if (!chip)
  30. chip = &no_irq_chip;
  31. desc->irq_data.chip = chip;
  32. irq_put_desc_unlock(desc, flags);
  33. /*
  34. * For !CONFIG_SPARSE_IRQ make the irq show up in
  35. * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
  36. * already marked, and this call is harmless.
  37. */
  38. irq_reserve_irq(irq);
  39. return 0;
  40. }
  41. EXPORT_SYMBOL(irq_set_chip);
  42. /**
  43. * irq_set_type - set the irq trigger type for an irq
  44. * @irq: irq number
  45. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  46. */
  47. int irq_set_irq_type(unsigned int irq, unsigned int type)
  48. {
  49. unsigned long flags;
  50. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
  51. int ret = 0;
  52. if (!desc)
  53. return -EINVAL;
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. if (type != IRQ_TYPE_NONE)
  56. ret = __irq_set_trigger(desc, irq, type);
  57. irq_put_desc_busunlock(desc, flags);
  58. return ret;
  59. }
  60. EXPORT_SYMBOL(irq_set_irq_type);
  61. /**
  62. * irq_set_handler_data - set irq handler data for an irq
  63. * @irq: Interrupt number
  64. * @data: Pointer to interrupt specific data
  65. *
  66. * Set the hardware irq controller data for an irq
  67. */
  68. int irq_set_handler_data(unsigned int irq, void *data)
  69. {
  70. unsigned long flags;
  71. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  72. if (!desc)
  73. return -EINVAL;
  74. desc->irq_data.handler_data = data;
  75. irq_put_desc_unlock(desc, flags);
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(irq_set_handler_data);
  79. /**
  80. * irq_set_msi_desc - set MSI descriptor data for an irq
  81. * @irq: Interrupt number
  82. * @entry: Pointer to MSI descriptor data
  83. *
  84. * Set the MSI descriptor entry for an irq
  85. */
  86. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  87. {
  88. unsigned long flags;
  89. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  90. if (!desc)
  91. return -EINVAL;
  92. desc->irq_data.msi_desc = entry;
  93. if (entry)
  94. entry->irq = irq;
  95. irq_put_desc_unlock(desc, flags);
  96. return 0;
  97. }
  98. /**
  99. * irq_set_chip_data - set irq chip data for an irq
  100. * @irq: Interrupt number
  101. * @data: Pointer to chip specific data
  102. *
  103. * Set the hardware irq chip data for an irq
  104. */
  105. int irq_set_chip_data(unsigned int irq, void *data)
  106. {
  107. unsigned long flags;
  108. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  109. if (!desc)
  110. return -EINVAL;
  111. desc->irq_data.chip_data = data;
  112. irq_put_desc_unlock(desc, flags);
  113. return 0;
  114. }
  115. EXPORT_SYMBOL(irq_set_chip_data);
  116. struct irq_data *irq_get_irq_data(unsigned int irq)
  117. {
  118. struct irq_desc *desc = irq_to_desc(irq);
  119. return desc ? &desc->irq_data : NULL;
  120. }
  121. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  122. static void irq_state_clr_disabled(struct irq_desc *desc)
  123. {
  124. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  125. }
  126. static void irq_state_set_disabled(struct irq_desc *desc)
  127. {
  128. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  129. }
  130. static void irq_state_clr_masked(struct irq_desc *desc)
  131. {
  132. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  133. }
  134. static void irq_state_set_masked(struct irq_desc *desc)
  135. {
  136. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  137. }
  138. int irq_startup(struct irq_desc *desc)
  139. {
  140. irq_state_clr_disabled(desc);
  141. desc->depth = 0;
  142. if (desc->irq_data.chip->irq_startup) {
  143. int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  144. irq_state_clr_masked(desc);
  145. return ret;
  146. }
  147. irq_enable(desc);
  148. return 0;
  149. }
  150. void irq_shutdown(struct irq_desc *desc)
  151. {
  152. irq_state_set_disabled(desc);
  153. desc->depth = 1;
  154. if (desc->irq_data.chip->irq_shutdown)
  155. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  156. if (desc->irq_data.chip->irq_disable)
  157. desc->irq_data.chip->irq_disable(&desc->irq_data);
  158. else
  159. desc->irq_data.chip->irq_mask(&desc->irq_data);
  160. irq_state_set_masked(desc);
  161. }
  162. void irq_enable(struct irq_desc *desc)
  163. {
  164. irq_state_clr_disabled(desc);
  165. if (desc->irq_data.chip->irq_enable)
  166. desc->irq_data.chip->irq_enable(&desc->irq_data);
  167. else
  168. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  169. irq_state_clr_masked(desc);
  170. }
  171. void irq_disable(struct irq_desc *desc)
  172. {
  173. irq_state_set_disabled(desc);
  174. if (desc->irq_data.chip->irq_disable) {
  175. desc->irq_data.chip->irq_disable(&desc->irq_data);
  176. irq_state_set_masked(desc);
  177. }
  178. }
  179. static inline void mask_ack_irq(struct irq_desc *desc)
  180. {
  181. if (desc->irq_data.chip->irq_mask_ack)
  182. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  183. else {
  184. desc->irq_data.chip->irq_mask(&desc->irq_data);
  185. if (desc->irq_data.chip->irq_ack)
  186. desc->irq_data.chip->irq_ack(&desc->irq_data);
  187. }
  188. irq_state_set_masked(desc);
  189. }
  190. void mask_irq(struct irq_desc *desc)
  191. {
  192. if (desc->irq_data.chip->irq_mask) {
  193. desc->irq_data.chip->irq_mask(&desc->irq_data);
  194. irq_state_set_masked(desc);
  195. }
  196. }
  197. void unmask_irq(struct irq_desc *desc)
  198. {
  199. if (desc->irq_data.chip->irq_unmask) {
  200. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  201. irq_state_clr_masked(desc);
  202. }
  203. }
  204. /*
  205. * handle_nested_irq - Handle a nested irq from a irq thread
  206. * @irq: the interrupt number
  207. *
  208. * Handle interrupts which are nested into a threaded interrupt
  209. * handler. The handler function is called inside the calling
  210. * threads context.
  211. */
  212. void handle_nested_irq(unsigned int irq)
  213. {
  214. struct irq_desc *desc = irq_to_desc(irq);
  215. struct irqaction *action;
  216. irqreturn_t action_ret;
  217. might_sleep();
  218. raw_spin_lock_irq(&desc->lock);
  219. kstat_incr_irqs_this_cpu(irq, desc);
  220. action = desc->action;
  221. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
  222. goto out_unlock;
  223. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  224. raw_spin_unlock_irq(&desc->lock);
  225. action_ret = action->thread_fn(action->irq, action->dev_id);
  226. if (!noirqdebug)
  227. note_interrupt(irq, desc, action_ret);
  228. raw_spin_lock_irq(&desc->lock);
  229. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  230. out_unlock:
  231. raw_spin_unlock_irq(&desc->lock);
  232. }
  233. EXPORT_SYMBOL_GPL(handle_nested_irq);
  234. static bool irq_check_poll(struct irq_desc *desc)
  235. {
  236. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  237. return false;
  238. return irq_wait_for_poll(desc);
  239. }
  240. /**
  241. * handle_simple_irq - Simple and software-decoded IRQs.
  242. * @irq: the interrupt number
  243. * @desc: the interrupt description structure for this irq
  244. *
  245. * Simple interrupts are either sent from a demultiplexing interrupt
  246. * handler or come from hardware, where no interrupt hardware control
  247. * is necessary.
  248. *
  249. * Note: The caller is expected to handle the ack, clear, mask and
  250. * unmask issues if necessary.
  251. */
  252. void
  253. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  254. {
  255. raw_spin_lock(&desc->lock);
  256. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  257. if (!irq_check_poll(desc))
  258. goto out_unlock;
  259. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  260. kstat_incr_irqs_this_cpu(irq, desc);
  261. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
  262. goto out_unlock;
  263. handle_irq_event(desc);
  264. out_unlock:
  265. raw_spin_unlock(&desc->lock);
  266. }
  267. EXPORT_SYMBOL_GPL(handle_simple_irq);
  268. /**
  269. * handle_level_irq - Level type irq handler
  270. * @irq: the interrupt number
  271. * @desc: the interrupt description structure for this irq
  272. *
  273. * Level type interrupts are active as long as the hardware line has
  274. * the active level. This may require to mask the interrupt and unmask
  275. * it after the associated handler has acknowledged the device, so the
  276. * interrupt line is back to inactive.
  277. */
  278. void
  279. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  280. {
  281. raw_spin_lock(&desc->lock);
  282. mask_ack_irq(desc);
  283. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  284. if (!irq_check_poll(desc))
  285. goto out_unlock;
  286. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  287. kstat_incr_irqs_this_cpu(irq, desc);
  288. /*
  289. * If its disabled or no action available
  290. * keep it masked and get out of here
  291. */
  292. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
  293. goto out_unlock;
  294. handle_irq_event(desc);
  295. if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
  296. unmask_irq(desc);
  297. out_unlock:
  298. raw_spin_unlock(&desc->lock);
  299. }
  300. EXPORT_SYMBOL_GPL(handle_level_irq);
  301. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  302. static inline void preflow_handler(struct irq_desc *desc)
  303. {
  304. if (desc->preflow_handler)
  305. desc->preflow_handler(&desc->irq_data);
  306. }
  307. #else
  308. static inline void preflow_handler(struct irq_desc *desc) { }
  309. #endif
  310. /**
  311. * handle_fasteoi_irq - irq handler for transparent controllers
  312. * @irq: the interrupt number
  313. * @desc: the interrupt description structure for this irq
  314. *
  315. * Only a single callback will be issued to the chip: an ->eoi()
  316. * call when the interrupt has been serviced. This enables support
  317. * for modern forms of interrupt handlers, which handle the flow
  318. * details in hardware, transparently.
  319. */
  320. void
  321. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  322. {
  323. raw_spin_lock(&desc->lock);
  324. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  325. if (!irq_check_poll(desc))
  326. goto out;
  327. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  328. kstat_incr_irqs_this_cpu(irq, desc);
  329. /*
  330. * If its disabled or no action available
  331. * then mask it and get out of here:
  332. */
  333. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  334. desc->istate |= IRQS_PENDING;
  335. mask_irq(desc);
  336. goto out;
  337. }
  338. if (desc->istate & IRQS_ONESHOT)
  339. mask_irq(desc);
  340. preflow_handler(desc);
  341. handle_irq_event(desc);
  342. out_eoi:
  343. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  344. out_unlock:
  345. raw_spin_unlock(&desc->lock);
  346. return;
  347. out:
  348. if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
  349. goto out_eoi;
  350. goto out_unlock;
  351. }
  352. /**
  353. * handle_edge_irq - edge type IRQ handler
  354. * @irq: the interrupt number
  355. * @desc: the interrupt description structure for this irq
  356. *
  357. * Interrupt occures on the falling and/or rising edge of a hardware
  358. * signal. The occurrence is latched into the irq controller hardware
  359. * and must be acked in order to be reenabled. After the ack another
  360. * interrupt can happen on the same source even before the first one
  361. * is handled by the associated event handler. If this happens it
  362. * might be necessary to disable (mask) the interrupt depending on the
  363. * controller hardware. This requires to reenable the interrupt inside
  364. * of the loop which handles the interrupts which have arrived while
  365. * the handler was running. If all pending interrupts are handled, the
  366. * loop is left.
  367. */
  368. void
  369. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  370. {
  371. raw_spin_lock(&desc->lock);
  372. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  373. /*
  374. * If we're currently running this IRQ, or its disabled,
  375. * we shouldn't process the IRQ. Mark it pending, handle
  376. * the necessary masking and go out
  377. */
  378. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  379. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  380. if (!irq_check_poll(desc)) {
  381. desc->istate |= IRQS_PENDING;
  382. mask_ack_irq(desc);
  383. goto out_unlock;
  384. }
  385. }
  386. kstat_incr_irqs_this_cpu(irq, desc);
  387. /* Start handling the irq */
  388. desc->irq_data.chip->irq_ack(&desc->irq_data);
  389. do {
  390. if (unlikely(!desc->action)) {
  391. mask_irq(desc);
  392. goto out_unlock;
  393. }
  394. /*
  395. * When another irq arrived while we were handling
  396. * one, we could have masked the irq.
  397. * Renable it, if it was not disabled in meantime.
  398. */
  399. if (unlikely(desc->istate & IRQS_PENDING)) {
  400. if (!irqd_irq_disabled(&desc->irq_data) &&
  401. irqd_irq_masked(&desc->irq_data))
  402. unmask_irq(desc);
  403. }
  404. handle_irq_event(desc);
  405. } while ((desc->istate & IRQS_PENDING) &&
  406. !irqd_irq_disabled(&desc->irq_data));
  407. out_unlock:
  408. raw_spin_unlock(&desc->lock);
  409. }
  410. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  411. /**
  412. * handle_edge_eoi_irq - edge eoi type IRQ handler
  413. * @irq: the interrupt number
  414. * @desc: the interrupt description structure for this irq
  415. *
  416. * Similar as the above handle_edge_irq, but using eoi and w/o the
  417. * mask/unmask logic.
  418. */
  419. void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
  420. {
  421. struct irq_chip *chip = irq_desc_get_chip(desc);
  422. raw_spin_lock(&desc->lock);
  423. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  424. /*
  425. * If we're currently running this IRQ, or its disabled,
  426. * we shouldn't process the IRQ. Mark it pending, handle
  427. * the necessary masking and go out
  428. */
  429. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  430. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  431. if (!irq_check_poll(desc)) {
  432. desc->istate |= IRQS_PENDING;
  433. goto out_eoi;
  434. }
  435. }
  436. kstat_incr_irqs_this_cpu(irq, desc);
  437. do {
  438. if (unlikely(!desc->action))
  439. goto out_eoi;
  440. handle_irq_event(desc);
  441. } while ((desc->istate & IRQS_PENDING) &&
  442. !irqd_irq_disabled(&desc->irq_data));
  443. out_eoi:
  444. chip->irq_eoi(&desc->irq_data);
  445. raw_spin_unlock(&desc->lock);
  446. }
  447. #endif
  448. /**
  449. * handle_percpu_irq - Per CPU local irq handler
  450. * @irq: the interrupt number
  451. * @desc: the interrupt description structure for this irq
  452. *
  453. * Per CPU interrupts on SMP machines without locking requirements
  454. */
  455. void
  456. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  457. {
  458. struct irq_chip *chip = irq_desc_get_chip(desc);
  459. kstat_incr_irqs_this_cpu(irq, desc);
  460. if (chip->irq_ack)
  461. chip->irq_ack(&desc->irq_data);
  462. handle_irq_event_percpu(desc, desc->action);
  463. if (chip->irq_eoi)
  464. chip->irq_eoi(&desc->irq_data);
  465. }
  466. void
  467. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  468. const char *name)
  469. {
  470. unsigned long flags;
  471. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
  472. if (!desc)
  473. return;
  474. if (!handle) {
  475. handle = handle_bad_irq;
  476. } else {
  477. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  478. goto out;
  479. }
  480. /* Uninstall? */
  481. if (handle == handle_bad_irq) {
  482. if (desc->irq_data.chip != &no_irq_chip)
  483. mask_ack_irq(desc);
  484. irq_state_set_disabled(desc);
  485. desc->depth = 1;
  486. }
  487. desc->handle_irq = handle;
  488. desc->name = name;
  489. if (handle != handle_bad_irq && is_chained) {
  490. irq_settings_set_noprobe(desc);
  491. irq_settings_set_norequest(desc);
  492. irq_settings_set_nothread(desc);
  493. irq_startup(desc);
  494. }
  495. out:
  496. irq_put_desc_busunlock(desc, flags);
  497. }
  498. EXPORT_SYMBOL_GPL(__irq_set_handler);
  499. void
  500. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  501. irq_flow_handler_t handle, const char *name)
  502. {
  503. irq_set_chip(irq, chip);
  504. __irq_set_handler(irq, handle, 0, name);
  505. }
  506. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  507. {
  508. unsigned long flags;
  509. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  510. if (!desc)
  511. return;
  512. irq_settings_clr_and_set(desc, clr, set);
  513. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  514. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  515. if (irq_settings_has_no_balance_set(desc))
  516. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  517. if (irq_settings_is_per_cpu(desc))
  518. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  519. if (irq_settings_can_move_pcntxt(desc))
  520. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  521. if (irq_settings_is_level(desc))
  522. irqd_set(&desc->irq_data, IRQD_LEVEL);
  523. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  524. irq_put_desc_unlock(desc, flags);
  525. }
  526. EXPORT_SYMBOL_GPL(irq_modify_status);
  527. /**
  528. * irq_cpu_online - Invoke all irq_cpu_online functions.
  529. *
  530. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  531. * for each.
  532. */
  533. void irq_cpu_online(void)
  534. {
  535. struct irq_desc *desc;
  536. struct irq_chip *chip;
  537. unsigned long flags;
  538. unsigned int irq;
  539. for_each_active_irq(irq) {
  540. desc = irq_to_desc(irq);
  541. if (!desc)
  542. continue;
  543. raw_spin_lock_irqsave(&desc->lock, flags);
  544. chip = irq_data_get_irq_chip(&desc->irq_data);
  545. if (chip && chip->irq_cpu_online &&
  546. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  547. !irqd_irq_disabled(&desc->irq_data)))
  548. chip->irq_cpu_online(&desc->irq_data);
  549. raw_spin_unlock_irqrestore(&desc->lock, flags);
  550. }
  551. }
  552. /**
  553. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  554. *
  555. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  556. * for each.
  557. */
  558. void irq_cpu_offline(void)
  559. {
  560. struct irq_desc *desc;
  561. struct irq_chip *chip;
  562. unsigned long flags;
  563. unsigned int irq;
  564. for_each_active_irq(irq) {
  565. desc = irq_to_desc(irq);
  566. if (!desc)
  567. continue;
  568. raw_spin_lock_irqsave(&desc->lock, flags);
  569. chip = irq_data_get_irq_chip(&desc->irq_data);
  570. if (chip && chip->irq_cpu_offline &&
  571. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  572. !irqd_irq_disabled(&desc->irq_data)))
  573. chip->irq_cpu_offline(&desc->irq_data);
  574. raw_spin_unlock_irqrestore(&desc->lock, flags);
  575. }
  576. }