omapdss.h 17 KB

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  1. /*
  2. * Copyright (C) 2008 Nokia Corporation
  3. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __OMAP_OMAPDSS_H
  18. #define __OMAP_OMAPDSS_H
  19. #include <linux/list.h>
  20. #include <linux/kobject.h>
  21. #include <linux/device.h>
  22. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  23. #define DISPC_IRQ_VSYNC (1 << 1)
  24. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  25. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  26. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  27. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  28. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  29. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  30. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  31. #define DISPC_IRQ_OCP_ERR (1 << 9)
  32. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  33. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  34. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  35. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  36. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  37. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  38. #define DISPC_IRQ_WAKEUP (1 << 16)
  39. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  40. #define DISPC_IRQ_VSYNC2 (1 << 18)
  41. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  42. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  43. struct omap_dss_device;
  44. struct omap_overlay_manager;
  45. enum omap_display_type {
  46. OMAP_DISPLAY_TYPE_NONE = 0,
  47. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  48. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  49. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  50. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  51. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  52. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  53. };
  54. enum omap_plane {
  55. OMAP_DSS_GFX = 0,
  56. OMAP_DSS_VIDEO1 = 1,
  57. OMAP_DSS_VIDEO2 = 2
  58. };
  59. enum omap_channel {
  60. OMAP_DSS_CHANNEL_LCD = 0,
  61. OMAP_DSS_CHANNEL_DIGIT = 1,
  62. OMAP_DSS_CHANNEL_LCD2 = 2,
  63. };
  64. enum omap_color_mode {
  65. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  66. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  67. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  68. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  69. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  70. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  71. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  72. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  73. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  74. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  75. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  76. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  77. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  78. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  79. OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
  80. OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
  81. OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
  82. OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
  83. OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
  84. };
  85. enum omap_lcd_display_type {
  86. OMAP_DSS_LCD_DISPLAY_STN,
  87. OMAP_DSS_LCD_DISPLAY_TFT,
  88. };
  89. enum omap_dss_load_mode {
  90. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  91. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  92. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  93. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  94. };
  95. enum omap_dss_trans_key_type {
  96. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  97. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  98. };
  99. enum omap_rfbi_te_mode {
  100. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  101. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  102. };
  103. enum omap_panel_config {
  104. OMAP_DSS_LCD_IVS = 1<<0,
  105. OMAP_DSS_LCD_IHS = 1<<1,
  106. OMAP_DSS_LCD_IPC = 1<<2,
  107. OMAP_DSS_LCD_IEO = 1<<3,
  108. OMAP_DSS_LCD_RF = 1<<4,
  109. OMAP_DSS_LCD_ONOFF = 1<<5,
  110. OMAP_DSS_LCD_TFT = 1<<20,
  111. };
  112. enum omap_dss_venc_type {
  113. OMAP_DSS_VENC_TYPE_COMPOSITE,
  114. OMAP_DSS_VENC_TYPE_SVIDEO,
  115. };
  116. enum omap_display_caps {
  117. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  118. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  119. };
  120. enum omap_dss_display_state {
  121. OMAP_DSS_DISPLAY_DISABLED = 0,
  122. OMAP_DSS_DISPLAY_ACTIVE,
  123. OMAP_DSS_DISPLAY_SUSPENDED,
  124. };
  125. /* XXX perhaps this should be removed */
  126. enum omap_dss_overlay_managers {
  127. OMAP_DSS_OVL_MGR_LCD,
  128. OMAP_DSS_OVL_MGR_TV,
  129. OMAP_DSS_OVL_MGR_LCD2,
  130. };
  131. enum omap_dss_rotation_type {
  132. OMAP_DSS_ROT_DMA = 0,
  133. OMAP_DSS_ROT_VRFB = 1,
  134. };
  135. /* clockwise rotation angle */
  136. enum omap_dss_rotation_angle {
  137. OMAP_DSS_ROT_0 = 0,
  138. OMAP_DSS_ROT_90 = 1,
  139. OMAP_DSS_ROT_180 = 2,
  140. OMAP_DSS_ROT_270 = 3,
  141. };
  142. enum omap_overlay_caps {
  143. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  144. OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
  145. };
  146. enum omap_overlay_manager_caps {
  147. OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
  148. };
  149. enum omap_dss_clk_source {
  150. OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
  151. * OMAP4: DSS_FCLK */
  152. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
  153. * OMAP4: PLL1_CLK1 */
  154. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
  155. * OMAP4: PLL1_CLK2 */
  156. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
  157. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
  158. };
  159. /* RFBI */
  160. struct rfbi_timings {
  161. int cs_on_time;
  162. int cs_off_time;
  163. int we_on_time;
  164. int we_off_time;
  165. int re_on_time;
  166. int re_off_time;
  167. int we_cycle_time;
  168. int re_cycle_time;
  169. int cs_pulse_width;
  170. int access_time;
  171. int clk_div;
  172. u32 tim[5]; /* set by rfbi_convert_timings() */
  173. int converted;
  174. };
  175. void omap_rfbi_write_command(const void *buf, u32 len);
  176. void omap_rfbi_read_data(void *buf, u32 len);
  177. void omap_rfbi_write_data(const void *buf, u32 len);
  178. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  179. u16 x, u16 y,
  180. u16 w, u16 h);
  181. int omap_rfbi_enable_te(bool enable, unsigned line);
  182. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  183. unsigned hs_pulse_time, unsigned vs_pulse_time,
  184. int hs_pol_inv, int vs_pol_inv, int extif_div);
  185. void rfbi_bus_lock(void);
  186. void rfbi_bus_unlock(void);
  187. /* DSI */
  188. void dsi_bus_lock(struct omap_dss_device *dssdev);
  189. void dsi_bus_unlock(struct omap_dss_device *dssdev);
  190. int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
  191. int len);
  192. int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel,
  193. u8 dcs_cmd);
  194. int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  195. u8 param);
  196. int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
  197. u8 *data, int len);
  198. int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  199. u8 *buf, int buflen);
  200. int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  201. u8 *data);
  202. int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  203. u8 *data1, u8 *data2);
  204. int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
  205. u16 len);
  206. int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
  207. int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
  208. /* Board specific data */
  209. struct omap_dss_board_info {
  210. int (*get_context_loss_count)(struct device *dev);
  211. int num_devices;
  212. struct omap_dss_device **devices;
  213. struct omap_dss_device *default_device;
  214. void (*dsi_mux_pads)(bool enable);
  215. };
  216. #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
  217. /* Init with the board info */
  218. extern int omap_display_init(struct omap_dss_board_info *board_data);
  219. #else
  220. static inline int omap_display_init(struct omap_dss_board_info *board_data)
  221. {
  222. return 0;
  223. }
  224. #endif
  225. struct omap_display_platform_data {
  226. struct omap_dss_board_info *board_data;
  227. /* TODO: Additional members to be added when PM is considered */
  228. };
  229. struct omap_video_timings {
  230. /* Unit: pixels */
  231. u16 x_res;
  232. /* Unit: pixels */
  233. u16 y_res;
  234. /* Unit: KHz */
  235. u32 pixel_clock;
  236. /* Unit: pixel clocks */
  237. u16 hsw; /* Horizontal synchronization pulse width */
  238. /* Unit: pixel clocks */
  239. u16 hfp; /* Horizontal front porch */
  240. /* Unit: pixel clocks */
  241. u16 hbp; /* Horizontal back porch */
  242. /* Unit: line clocks */
  243. u16 vsw; /* Vertical synchronization pulse width */
  244. /* Unit: line clocks */
  245. u16 vfp; /* Vertical front porch */
  246. /* Unit: line clocks */
  247. u16 vbp; /* Vertical back porch */
  248. };
  249. #ifdef CONFIG_OMAP2_DSS_VENC
  250. /* Hardcoded timings for tv modes. Venc only uses these to
  251. * identify the mode, and does not actually use the configs
  252. * itself. However, the configs should be something that
  253. * a normal monitor can also show */
  254. extern const struct omap_video_timings omap_dss_pal_timings;
  255. extern const struct omap_video_timings omap_dss_ntsc_timings;
  256. #endif
  257. struct omap_dss_cpr_coefs {
  258. s16 rr, rg, rb;
  259. s16 gr, gg, gb;
  260. s16 br, bg, bb;
  261. };
  262. struct omap_overlay_info {
  263. bool enabled;
  264. u32 paddr;
  265. void __iomem *vaddr;
  266. u32 p_uv_addr; /* for NV12 format */
  267. u16 screen_width;
  268. u16 width;
  269. u16 height;
  270. enum omap_color_mode color_mode;
  271. u8 rotation;
  272. enum omap_dss_rotation_type rotation_type;
  273. bool mirror;
  274. u16 pos_x;
  275. u16 pos_y;
  276. u16 out_width; /* if 0, out_width == width */
  277. u16 out_height; /* if 0, out_height == height */
  278. u8 global_alpha;
  279. u8 pre_mult_alpha;
  280. };
  281. struct omap_overlay {
  282. struct kobject kobj;
  283. struct list_head list;
  284. /* static fields */
  285. const char *name;
  286. int id;
  287. enum omap_color_mode supported_modes;
  288. enum omap_overlay_caps caps;
  289. /* dynamic fields */
  290. struct omap_overlay_manager *manager;
  291. struct omap_overlay_info info;
  292. /* if true, info has been changed, but not applied() yet */
  293. bool info_dirty;
  294. int (*set_manager)(struct omap_overlay *ovl,
  295. struct omap_overlay_manager *mgr);
  296. int (*unset_manager)(struct omap_overlay *ovl);
  297. int (*set_overlay_info)(struct omap_overlay *ovl,
  298. struct omap_overlay_info *info);
  299. void (*get_overlay_info)(struct omap_overlay *ovl,
  300. struct omap_overlay_info *info);
  301. int (*wait_for_go)(struct omap_overlay *ovl);
  302. };
  303. struct omap_overlay_manager_info {
  304. u32 default_color;
  305. enum omap_dss_trans_key_type trans_key_type;
  306. u32 trans_key;
  307. bool trans_enabled;
  308. bool alpha_enabled;
  309. bool cpr_enable;
  310. struct omap_dss_cpr_coefs cpr_coefs;
  311. };
  312. struct omap_overlay_manager {
  313. struct kobject kobj;
  314. struct list_head list;
  315. /* static fields */
  316. const char *name;
  317. int id;
  318. enum omap_overlay_manager_caps caps;
  319. int num_overlays;
  320. struct omap_overlay **overlays;
  321. enum omap_display_type supported_displays;
  322. /* dynamic fields */
  323. struct omap_dss_device *device;
  324. struct omap_overlay_manager_info info;
  325. bool device_changed;
  326. /* if true, info has been changed but not applied() yet */
  327. bool info_dirty;
  328. int (*set_device)(struct omap_overlay_manager *mgr,
  329. struct omap_dss_device *dssdev);
  330. int (*unset_device)(struct omap_overlay_manager *mgr);
  331. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  332. struct omap_overlay_manager_info *info);
  333. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  334. struct omap_overlay_manager_info *info);
  335. int (*apply)(struct omap_overlay_manager *mgr);
  336. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  337. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  338. int (*enable)(struct omap_overlay_manager *mgr);
  339. int (*disable)(struct omap_overlay_manager *mgr);
  340. };
  341. struct omap_dss_device {
  342. struct device dev;
  343. enum omap_display_type type;
  344. enum omap_channel channel;
  345. union {
  346. struct {
  347. u8 data_lines;
  348. } dpi;
  349. struct {
  350. u8 channel;
  351. u8 data_lines;
  352. } rfbi;
  353. struct {
  354. u8 datapairs;
  355. } sdi;
  356. struct {
  357. u8 clk_lane;
  358. u8 clk_pol;
  359. u8 data1_lane;
  360. u8 data1_pol;
  361. u8 data2_lane;
  362. u8 data2_pol;
  363. u8 data3_lane;
  364. u8 data3_pol;
  365. u8 data4_lane;
  366. u8 data4_pol;
  367. int module;
  368. bool ext_te;
  369. u8 ext_te_gpio;
  370. } dsi;
  371. struct {
  372. enum omap_dss_venc_type type;
  373. bool invert_polarity;
  374. } venc;
  375. } phy;
  376. struct {
  377. struct {
  378. struct {
  379. u16 lck_div;
  380. u16 pck_div;
  381. enum omap_dss_clk_source lcd_clk_src;
  382. } channel;
  383. enum omap_dss_clk_source dispc_fclk_src;
  384. } dispc;
  385. struct {
  386. u16 regn;
  387. u16 regm;
  388. u16 regm_dispc;
  389. u16 regm_dsi;
  390. u16 lp_clk_div;
  391. enum omap_dss_clk_source dsi_fclk_src;
  392. } dsi;
  393. struct {
  394. u16 regn;
  395. u16 regm2;
  396. } hdmi;
  397. } clocks;
  398. struct {
  399. struct omap_video_timings timings;
  400. int acbi; /* ac-bias pin transitions per interrupt */
  401. /* Unit: line clocks */
  402. int acb; /* ac-bias pin frequency */
  403. enum omap_panel_config config;
  404. } panel;
  405. struct {
  406. u8 pixel_size;
  407. struct rfbi_timings rfbi_timings;
  408. } ctrl;
  409. int reset_gpio;
  410. int max_backlight_level;
  411. const char *name;
  412. /* used to match device to driver */
  413. const char *driver_name;
  414. void *data;
  415. struct omap_dss_driver *driver;
  416. /* helper variable for driver suspend/resume */
  417. bool activate_after_resume;
  418. enum omap_display_caps caps;
  419. struct omap_overlay_manager *manager;
  420. enum omap_dss_display_state state;
  421. /* platform specific */
  422. int (*platform_enable)(struct omap_dss_device *dssdev);
  423. void (*platform_disable)(struct omap_dss_device *dssdev);
  424. int (*set_backlight)(struct omap_dss_device *dssdev, int level);
  425. int (*get_backlight)(struct omap_dss_device *dssdev);
  426. };
  427. struct omap_dss_driver {
  428. struct device_driver driver;
  429. int (*probe)(struct omap_dss_device *);
  430. void (*remove)(struct omap_dss_device *);
  431. int (*enable)(struct omap_dss_device *display);
  432. void (*disable)(struct omap_dss_device *display);
  433. int (*suspend)(struct omap_dss_device *display);
  434. int (*resume)(struct omap_dss_device *display);
  435. int (*run_test)(struct omap_dss_device *display, int test);
  436. int (*update)(struct omap_dss_device *dssdev,
  437. u16 x, u16 y, u16 w, u16 h);
  438. int (*sync)(struct omap_dss_device *dssdev);
  439. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  440. int (*get_te)(struct omap_dss_device *dssdev);
  441. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  442. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  443. bool (*get_mirror)(struct omap_dss_device *dssdev);
  444. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  445. int (*memory_read)(struct omap_dss_device *dssdev,
  446. void *buf, size_t size,
  447. u16 x, u16 y, u16 w, u16 h);
  448. void (*get_resolution)(struct omap_dss_device *dssdev,
  449. u16 *xres, u16 *yres);
  450. void (*get_dimensions)(struct omap_dss_device *dssdev,
  451. u32 *width, u32 *height);
  452. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  453. int (*check_timings)(struct omap_dss_device *dssdev,
  454. struct omap_video_timings *timings);
  455. void (*set_timings)(struct omap_dss_device *dssdev,
  456. struct omap_video_timings *timings);
  457. void (*get_timings)(struct omap_dss_device *dssdev,
  458. struct omap_video_timings *timings);
  459. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  460. u32 (*get_wss)(struct omap_dss_device *dssdev);
  461. };
  462. int omap_dss_register_driver(struct omap_dss_driver *);
  463. void omap_dss_unregister_driver(struct omap_dss_driver *);
  464. void omap_dss_get_device(struct omap_dss_device *dssdev);
  465. void omap_dss_put_device(struct omap_dss_device *dssdev);
  466. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  467. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  468. struct omap_dss_device *omap_dss_find_device(void *data,
  469. int (*match)(struct omap_dss_device *dssdev, void *data));
  470. int omap_dss_start_device(struct omap_dss_device *dssdev);
  471. void omap_dss_stop_device(struct omap_dss_device *dssdev);
  472. int omap_dss_get_num_overlay_managers(void);
  473. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  474. int omap_dss_get_num_overlays(void);
  475. struct omap_overlay *omap_dss_get_overlay(int num);
  476. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  477. u16 *xres, u16 *yres);
  478. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  479. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  480. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  481. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  482. int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
  483. int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
  484. unsigned long timeout);
  485. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  486. #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
  487. void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
  488. bool enable);
  489. int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
  490. int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
  491. u16 *x, u16 *y, u16 *w, u16 *h,
  492. bool enlarge_update_area);
  493. int omap_dsi_update(struct omap_dss_device *dssdev,
  494. int channel,
  495. u16 x, u16 y, u16 w, u16 h,
  496. void (*callback)(int, void *), void *data);
  497. int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
  498. int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
  499. void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
  500. int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
  501. void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
  502. bool disconnect_lanes, bool enter_ulps);
  503. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
  504. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
  505. void dpi_set_timings(struct omap_dss_device *dssdev,
  506. struct omap_video_timings *timings);
  507. int dpi_check_timings(struct omap_dss_device *dssdev,
  508. struct omap_video_timings *timings);
  509. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  510. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  511. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  512. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  513. int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
  514. u16 *x, u16 *y, u16 *w, u16 *h);
  515. int omap_rfbi_update(struct omap_dss_device *dssdev,
  516. u16 x, u16 y, u16 w, u16 h,
  517. void (*callback)(void *), void *data);
  518. int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
  519. int data_lines);
  520. #endif