pxa27x_udc.c 68 KB

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  1. /*
  2. * Handles the Intel 27x USB Device Controller (UDC)
  3. *
  4. * Inspired by original driver by Frank Becker, David Brownell, and others.
  5. * Copyright (C) 2008 Robert Jarzmik
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/kernel.h>
  24. #include <linux/types.h>
  25. #include <linux/errno.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/delay.h>
  28. #include <linux/list.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/proc_fs.h>
  31. #include <linux/clk.h>
  32. #include <linux/irq.h>
  33. #include <linux/gpio.h>
  34. #include <linux/slab.h>
  35. #include <linux/prefetch.h>
  36. #include <asm/byteorder.h>
  37. #include <mach/hardware.h>
  38. #include <linux/usb.h>
  39. #include <linux/usb/ch9.h>
  40. #include <linux/usb/gadget.h>
  41. #include <mach/udc.h>
  42. #include "pxa27x_udc.h"
  43. /*
  44. * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
  45. * series processors.
  46. *
  47. * Such controller drivers work with a gadget driver. The gadget driver
  48. * returns descriptors, implements configuration and data protocols used
  49. * by the host to interact with this device, and allocates endpoints to
  50. * the different protocol interfaces. The controller driver virtualizes
  51. * usb hardware so that the gadget drivers will be more portable.
  52. *
  53. * This UDC hardware wants to implement a bit too much USB protocol. The
  54. * biggest issues are: that the endpoints have to be set up before the
  55. * controller can be enabled (minor, and not uncommon); and each endpoint
  56. * can only have one configuration, interface and alternative interface
  57. * number (major, and very unusual). Once set up, these cannot be changed
  58. * without a controller reset.
  59. *
  60. * The workaround is to setup all combinations necessary for the gadgets which
  61. * will work with this driver. This is done in pxa_udc structure, statically.
  62. * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
  63. * (You could modify this if needed. Some drivers have a "fifo_mode" module
  64. * parameter to facilitate such changes.)
  65. *
  66. * The combinations have been tested with these gadgets :
  67. * - zero gadget
  68. * - file storage gadget
  69. * - ether gadget
  70. *
  71. * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
  72. * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
  73. *
  74. * All the requests are handled the same way :
  75. * - the drivers tries to handle the request directly to the IO
  76. * - if the IO fifo is not big enough, the remaining is send/received in
  77. * interrupt handling.
  78. */
  79. #define DRIVER_VERSION "2008-04-18"
  80. #define DRIVER_DESC "PXA 27x USB Device Controller driver"
  81. static const char driver_name[] = "pxa27x_udc";
  82. static struct pxa_udc *the_controller;
  83. static void handle_ep(struct pxa_ep *ep);
  84. /*
  85. * Debug filesystem
  86. */
  87. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  88. #include <linux/debugfs.h>
  89. #include <linux/uaccess.h>
  90. #include <linux/seq_file.h>
  91. static int state_dbg_show(struct seq_file *s, void *p)
  92. {
  93. struct pxa_udc *udc = s->private;
  94. int pos = 0, ret;
  95. u32 tmp;
  96. ret = -ENODEV;
  97. if (!udc->driver)
  98. goto out;
  99. /* basic device status */
  100. pos += seq_printf(s, DRIVER_DESC "\n"
  101. "%s version: %s\nGadget driver: %s\n",
  102. driver_name, DRIVER_VERSION,
  103. udc->driver ? udc->driver->driver.name : "(none)");
  104. tmp = udc_readl(udc, UDCCR);
  105. pos += seq_printf(s,
  106. "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
  107. "con=%d,inter=%d,altinter=%d\n", tmp,
  108. (tmp & UDCCR_OEN) ? " oen":"",
  109. (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
  110. (tmp & UDCCR_AHNP) ? " rem" : "",
  111. (tmp & UDCCR_BHNP) ? " rstir" : "",
  112. (tmp & UDCCR_DWRE) ? " dwre" : "",
  113. (tmp & UDCCR_SMAC) ? " smac" : "",
  114. (tmp & UDCCR_EMCE) ? " emce" : "",
  115. (tmp & UDCCR_UDR) ? " udr" : "",
  116. (tmp & UDCCR_UDA) ? " uda" : "",
  117. (tmp & UDCCR_UDE) ? " ude" : "",
  118. (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
  119. (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
  120. (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
  121. /* registers for device and ep0 */
  122. pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
  123. udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
  124. pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
  125. udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
  126. pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
  127. pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
  128. "reconfig=%lu\n",
  129. udc->stats.irqs_reset, udc->stats.irqs_suspend,
  130. udc->stats.irqs_resume, udc->stats.irqs_reconfig);
  131. ret = 0;
  132. out:
  133. return ret;
  134. }
  135. static int queues_dbg_show(struct seq_file *s, void *p)
  136. {
  137. struct pxa_udc *udc = s->private;
  138. struct pxa_ep *ep;
  139. struct pxa27x_request *req;
  140. int pos = 0, i, maxpkt, ret;
  141. ret = -ENODEV;
  142. if (!udc->driver)
  143. goto out;
  144. /* dump endpoint queues */
  145. for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
  146. ep = &udc->pxa_ep[i];
  147. maxpkt = ep->fifo_size;
  148. pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
  149. EPNAME(ep), maxpkt, "pio");
  150. if (list_empty(&ep->queue)) {
  151. pos += seq_printf(s, "\t(nothing queued)\n");
  152. continue;
  153. }
  154. list_for_each_entry(req, &ep->queue, queue) {
  155. pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
  156. &req->req, req->req.actual,
  157. req->req.length, req->req.buf);
  158. }
  159. }
  160. ret = 0;
  161. out:
  162. return ret;
  163. }
  164. static int eps_dbg_show(struct seq_file *s, void *p)
  165. {
  166. struct pxa_udc *udc = s->private;
  167. struct pxa_ep *ep;
  168. int pos = 0, i, ret;
  169. u32 tmp;
  170. ret = -ENODEV;
  171. if (!udc->driver)
  172. goto out;
  173. ep = &udc->pxa_ep[0];
  174. tmp = udc_ep_readl(ep, UDCCSR);
  175. pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
  176. (tmp & UDCCSR0_SA) ? " sa" : "",
  177. (tmp & UDCCSR0_RNE) ? " rne" : "",
  178. (tmp & UDCCSR0_FST) ? " fst" : "",
  179. (tmp & UDCCSR0_SST) ? " sst" : "",
  180. (tmp & UDCCSR0_DME) ? " dme" : "",
  181. (tmp & UDCCSR0_IPR) ? " ipr" : "",
  182. (tmp & UDCCSR0_OPC) ? " opc" : "");
  183. for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
  184. ep = &udc->pxa_ep[i];
  185. tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
  186. pos += seq_printf(s, "%-12s: "
  187. "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
  188. "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
  189. "udcbcr=%d\n",
  190. EPNAME(ep),
  191. ep->stats.in_bytes, ep->stats.in_ops,
  192. ep->stats.out_bytes, ep->stats.out_ops,
  193. ep->stats.irqs,
  194. tmp, udc_ep_readl(ep, UDCCSR),
  195. udc_ep_readl(ep, UDCBCR));
  196. }
  197. ret = 0;
  198. out:
  199. return ret;
  200. }
  201. static int eps_dbg_open(struct inode *inode, struct file *file)
  202. {
  203. return single_open(file, eps_dbg_show, inode->i_private);
  204. }
  205. static int queues_dbg_open(struct inode *inode, struct file *file)
  206. {
  207. return single_open(file, queues_dbg_show, inode->i_private);
  208. }
  209. static int state_dbg_open(struct inode *inode, struct file *file)
  210. {
  211. return single_open(file, state_dbg_show, inode->i_private);
  212. }
  213. static const struct file_operations state_dbg_fops = {
  214. .owner = THIS_MODULE,
  215. .open = state_dbg_open,
  216. .llseek = seq_lseek,
  217. .read = seq_read,
  218. .release = single_release,
  219. };
  220. static const struct file_operations queues_dbg_fops = {
  221. .owner = THIS_MODULE,
  222. .open = queues_dbg_open,
  223. .llseek = seq_lseek,
  224. .read = seq_read,
  225. .release = single_release,
  226. };
  227. static const struct file_operations eps_dbg_fops = {
  228. .owner = THIS_MODULE,
  229. .open = eps_dbg_open,
  230. .llseek = seq_lseek,
  231. .read = seq_read,
  232. .release = single_release,
  233. };
  234. static void pxa_init_debugfs(struct pxa_udc *udc)
  235. {
  236. struct dentry *root, *state, *queues, *eps;
  237. root = debugfs_create_dir(udc->gadget.name, NULL);
  238. if (IS_ERR(root) || !root)
  239. goto err_root;
  240. state = debugfs_create_file("udcstate", 0400, root, udc,
  241. &state_dbg_fops);
  242. if (!state)
  243. goto err_state;
  244. queues = debugfs_create_file("queues", 0400, root, udc,
  245. &queues_dbg_fops);
  246. if (!queues)
  247. goto err_queues;
  248. eps = debugfs_create_file("epstate", 0400, root, udc,
  249. &eps_dbg_fops);
  250. if (!eps)
  251. goto err_eps;
  252. udc->debugfs_root = root;
  253. udc->debugfs_state = state;
  254. udc->debugfs_queues = queues;
  255. udc->debugfs_eps = eps;
  256. return;
  257. err_eps:
  258. debugfs_remove(eps);
  259. err_queues:
  260. debugfs_remove(queues);
  261. err_state:
  262. debugfs_remove(root);
  263. err_root:
  264. dev_err(udc->dev, "debugfs is not available\n");
  265. }
  266. static void pxa_cleanup_debugfs(struct pxa_udc *udc)
  267. {
  268. debugfs_remove(udc->debugfs_eps);
  269. debugfs_remove(udc->debugfs_queues);
  270. debugfs_remove(udc->debugfs_state);
  271. debugfs_remove(udc->debugfs_root);
  272. udc->debugfs_eps = NULL;
  273. udc->debugfs_queues = NULL;
  274. udc->debugfs_state = NULL;
  275. udc->debugfs_root = NULL;
  276. }
  277. #else
  278. static inline void pxa_init_debugfs(struct pxa_udc *udc)
  279. {
  280. }
  281. static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
  282. {
  283. }
  284. #endif
  285. /**
  286. * is_match_usb_pxa - check if usb_ep and pxa_ep match
  287. * @udc_usb_ep: usb endpoint
  288. * @ep: pxa endpoint
  289. * @config: configuration required in pxa_ep
  290. * @interface: interface required in pxa_ep
  291. * @altsetting: altsetting required in pxa_ep
  292. *
  293. * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
  294. */
  295. static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
  296. int config, int interface, int altsetting)
  297. {
  298. if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
  299. return 0;
  300. if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
  301. return 0;
  302. if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
  303. return 0;
  304. if ((ep->config != config) || (ep->interface != interface)
  305. || (ep->alternate != altsetting))
  306. return 0;
  307. return 1;
  308. }
  309. /**
  310. * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
  311. * @udc: pxa udc
  312. * @udc_usb_ep: udc_usb_ep structure
  313. *
  314. * Match udc_usb_ep and all pxa_ep available, to see if one matches.
  315. * This is necessary because of the strong pxa hardware restriction requiring
  316. * that once pxa endpoints are initialized, their configuration is freezed, and
  317. * no change can be made to their address, direction, or in which configuration,
  318. * interface or altsetting they are active ... which differs from more usual
  319. * models which have endpoints be roughly just addressable fifos, and leave
  320. * configuration events up to gadget drivers (like all control messages).
  321. *
  322. * Note that there is still a blurred point here :
  323. * - we rely on UDCCR register "active interface" and "active altsetting".
  324. * This is a nonsense in regard of USB spec, where multiple interfaces are
  325. * active at the same time.
  326. * - if we knew for sure that the pxa can handle multiple interface at the
  327. * same time, assuming Intel's Developer Guide is wrong, this function
  328. * should be reviewed, and a cache of couples (iface, altsetting) should
  329. * be kept in the pxa_udc structure. In this case this function would match
  330. * against the cache of couples instead of the "last altsetting" set up.
  331. *
  332. * Returns the matched pxa_ep structure or NULL if none found
  333. */
  334. static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
  335. struct udc_usb_ep *udc_usb_ep)
  336. {
  337. int i;
  338. struct pxa_ep *ep;
  339. int cfg = udc->config;
  340. int iface = udc->last_interface;
  341. int alt = udc->last_alternate;
  342. if (udc_usb_ep == &udc->udc_usb_ep[0])
  343. return &udc->pxa_ep[0];
  344. for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
  345. ep = &udc->pxa_ep[i];
  346. if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
  347. return ep;
  348. }
  349. return NULL;
  350. }
  351. /**
  352. * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
  353. * @udc: pxa udc
  354. *
  355. * Context: in_interrupt()
  356. *
  357. * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
  358. * previously set up (and is not NULL). The update is necessary is a
  359. * configuration change or altsetting change was issued by the USB host.
  360. */
  361. static void update_pxa_ep_matches(struct pxa_udc *udc)
  362. {
  363. int i;
  364. struct udc_usb_ep *udc_usb_ep;
  365. for (i = 1; i < NR_USB_ENDPOINTS; i++) {
  366. udc_usb_ep = &udc->udc_usb_ep[i];
  367. if (udc_usb_ep->pxa_ep)
  368. udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
  369. }
  370. }
  371. /**
  372. * pio_irq_enable - Enables irq generation for one endpoint
  373. * @ep: udc endpoint
  374. */
  375. static void pio_irq_enable(struct pxa_ep *ep)
  376. {
  377. struct pxa_udc *udc = ep->dev;
  378. int index = EPIDX(ep);
  379. u32 udcicr0 = udc_readl(udc, UDCICR0);
  380. u32 udcicr1 = udc_readl(udc, UDCICR1);
  381. if (index < 16)
  382. udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
  383. else
  384. udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
  385. }
  386. /**
  387. * pio_irq_disable - Disables irq generation for one endpoint
  388. * @ep: udc endpoint
  389. */
  390. static void pio_irq_disable(struct pxa_ep *ep)
  391. {
  392. struct pxa_udc *udc = ep->dev;
  393. int index = EPIDX(ep);
  394. u32 udcicr0 = udc_readl(udc, UDCICR0);
  395. u32 udcicr1 = udc_readl(udc, UDCICR1);
  396. if (index < 16)
  397. udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
  398. else
  399. udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
  400. }
  401. /**
  402. * udc_set_mask_UDCCR - set bits in UDCCR
  403. * @udc: udc device
  404. * @mask: bits to set in UDCCR
  405. *
  406. * Sets bits in UDCCR, leaving DME and FST bits as they were.
  407. */
  408. static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
  409. {
  410. u32 udccr = udc_readl(udc, UDCCR);
  411. udc_writel(udc, UDCCR,
  412. (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
  413. }
  414. /**
  415. * udc_clear_mask_UDCCR - clears bits in UDCCR
  416. * @udc: udc device
  417. * @mask: bit to clear in UDCCR
  418. *
  419. * Clears bits in UDCCR, leaving DME and FST bits as they were.
  420. */
  421. static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
  422. {
  423. u32 udccr = udc_readl(udc, UDCCR);
  424. udc_writel(udc, UDCCR,
  425. (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
  426. }
  427. /**
  428. * ep_write_UDCCSR - set bits in UDCCSR
  429. * @udc: udc device
  430. * @mask: bits to set in UDCCR
  431. *
  432. * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
  433. *
  434. * A specific case is applied to ep0 : the ACM bit is always set to 1, for
  435. * SET_INTERFACE and SET_CONFIGURATION.
  436. */
  437. static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
  438. {
  439. if (is_ep0(ep))
  440. mask |= UDCCSR0_ACM;
  441. udc_ep_writel(ep, UDCCSR, mask);
  442. }
  443. /**
  444. * ep_count_bytes_remain - get how many bytes in udc endpoint
  445. * @ep: udc endpoint
  446. *
  447. * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
  448. */
  449. static int ep_count_bytes_remain(struct pxa_ep *ep)
  450. {
  451. if (ep->dir_in)
  452. return -EOPNOTSUPP;
  453. return udc_ep_readl(ep, UDCBCR) & 0x3ff;
  454. }
  455. /**
  456. * ep_is_empty - checks if ep has byte ready for reading
  457. * @ep: udc endpoint
  458. *
  459. * If endpoint is the control endpoint, checks if there are bytes in the
  460. * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
  461. * are ready for reading on OUT endpoint.
  462. *
  463. * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
  464. */
  465. static int ep_is_empty(struct pxa_ep *ep)
  466. {
  467. int ret;
  468. if (!is_ep0(ep) && ep->dir_in)
  469. return -EOPNOTSUPP;
  470. if (is_ep0(ep))
  471. ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
  472. else
  473. ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
  474. return ret;
  475. }
  476. /**
  477. * ep_is_full - checks if ep has place to write bytes
  478. * @ep: udc endpoint
  479. *
  480. * If endpoint is not the control endpoint and is an IN endpoint, checks if
  481. * there is place to write bytes into the endpoint.
  482. *
  483. * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
  484. */
  485. static int ep_is_full(struct pxa_ep *ep)
  486. {
  487. if (is_ep0(ep))
  488. return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
  489. if (!ep->dir_in)
  490. return -EOPNOTSUPP;
  491. return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
  492. }
  493. /**
  494. * epout_has_pkt - checks if OUT endpoint fifo has a packet available
  495. * @ep: pxa endpoint
  496. *
  497. * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
  498. */
  499. static int epout_has_pkt(struct pxa_ep *ep)
  500. {
  501. if (!is_ep0(ep) && ep->dir_in)
  502. return -EOPNOTSUPP;
  503. if (is_ep0(ep))
  504. return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
  505. return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
  506. }
  507. /**
  508. * set_ep0state - Set ep0 automata state
  509. * @dev: udc device
  510. * @state: state
  511. */
  512. static void set_ep0state(struct pxa_udc *udc, int state)
  513. {
  514. struct pxa_ep *ep = &udc->pxa_ep[0];
  515. char *old_stname = EP0_STNAME(udc);
  516. udc->ep0state = state;
  517. ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
  518. EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
  519. udc_ep_readl(ep, UDCBCR));
  520. }
  521. /**
  522. * ep0_idle - Put control endpoint into idle state
  523. * @dev: udc device
  524. */
  525. static void ep0_idle(struct pxa_udc *dev)
  526. {
  527. set_ep0state(dev, WAIT_FOR_SETUP);
  528. }
  529. /**
  530. * inc_ep_stats_reqs - Update ep stats counts
  531. * @ep: physical endpoint
  532. * @req: usb request
  533. * @is_in: ep direction (USB_DIR_IN or 0)
  534. *
  535. */
  536. static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
  537. {
  538. if (is_in)
  539. ep->stats.in_ops++;
  540. else
  541. ep->stats.out_ops++;
  542. }
  543. /**
  544. * inc_ep_stats_bytes - Update ep stats counts
  545. * @ep: physical endpoint
  546. * @count: bytes transferred on endpoint
  547. * @is_in: ep direction (USB_DIR_IN or 0)
  548. */
  549. static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
  550. {
  551. if (is_in)
  552. ep->stats.in_bytes += count;
  553. else
  554. ep->stats.out_bytes += count;
  555. }
  556. /**
  557. * pxa_ep_setup - Sets up an usb physical endpoint
  558. * @ep: pxa27x physical endpoint
  559. *
  560. * Find the physical pxa27x ep, and setup its UDCCR
  561. */
  562. static __init void pxa_ep_setup(struct pxa_ep *ep)
  563. {
  564. u32 new_udccr;
  565. new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
  566. | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
  567. | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
  568. | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
  569. | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
  570. | ((ep->dir_in) ? UDCCONR_ED : 0)
  571. | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
  572. | UDCCONR_EE;
  573. udc_ep_writel(ep, UDCCR, new_udccr);
  574. }
  575. /**
  576. * pxa_eps_setup - Sets up all usb physical endpoints
  577. * @dev: udc device
  578. *
  579. * Setup all pxa physical endpoints, except ep0
  580. */
  581. static __init void pxa_eps_setup(struct pxa_udc *dev)
  582. {
  583. unsigned int i;
  584. dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
  585. for (i = 1; i < NR_PXA_ENDPOINTS; i++)
  586. pxa_ep_setup(&dev->pxa_ep[i]);
  587. }
  588. /**
  589. * pxa_ep_alloc_request - Allocate usb request
  590. * @_ep: usb endpoint
  591. * @gfp_flags:
  592. *
  593. * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
  594. * must still pass correctly initialized endpoints, since other controller
  595. * drivers may care about how it's currently set up (dma issues etc).
  596. */
  597. static struct usb_request *
  598. pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  599. {
  600. struct pxa27x_request *req;
  601. req = kzalloc(sizeof *req, gfp_flags);
  602. if (!req)
  603. return NULL;
  604. INIT_LIST_HEAD(&req->queue);
  605. req->in_use = 0;
  606. req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  607. return &req->req;
  608. }
  609. /**
  610. * pxa_ep_free_request - Free usb request
  611. * @_ep: usb endpoint
  612. * @_req: usb request
  613. *
  614. * Wrapper around kfree to free _req
  615. */
  616. static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
  617. {
  618. struct pxa27x_request *req;
  619. req = container_of(_req, struct pxa27x_request, req);
  620. WARN_ON(!list_empty(&req->queue));
  621. kfree(req);
  622. }
  623. /**
  624. * ep_add_request - add a request to the endpoint's queue
  625. * @ep: usb endpoint
  626. * @req: usb request
  627. *
  628. * Context: ep->lock held
  629. *
  630. * Queues the request in the endpoint's queue, and enables the interrupts
  631. * on the endpoint.
  632. */
  633. static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
  634. {
  635. if (unlikely(!req))
  636. return;
  637. ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
  638. req->req.length, udc_ep_readl(ep, UDCCSR));
  639. req->in_use = 1;
  640. list_add_tail(&req->queue, &ep->queue);
  641. pio_irq_enable(ep);
  642. }
  643. /**
  644. * ep_del_request - removes a request from the endpoint's queue
  645. * @ep: usb endpoint
  646. * @req: usb request
  647. *
  648. * Context: ep->lock held
  649. *
  650. * Unqueue the request from the endpoint's queue. If there are no more requests
  651. * on the endpoint, and if it's not the control endpoint, interrupts are
  652. * disabled on the endpoint.
  653. */
  654. static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
  655. {
  656. if (unlikely(!req))
  657. return;
  658. ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
  659. req->req.length, udc_ep_readl(ep, UDCCSR));
  660. list_del_init(&req->queue);
  661. req->in_use = 0;
  662. if (!is_ep0(ep) && list_empty(&ep->queue))
  663. pio_irq_disable(ep);
  664. }
  665. /**
  666. * req_done - Complete an usb request
  667. * @ep: pxa physical endpoint
  668. * @req: pxa request
  669. * @status: usb request status sent to gadget API
  670. * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
  671. *
  672. * Context: ep->lock held if flags not NULL, else ep->lock released
  673. *
  674. * Retire a pxa27x usb request. Endpoint must be locked.
  675. */
  676. static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
  677. unsigned long *pflags)
  678. {
  679. unsigned long flags;
  680. ep_del_request(ep, req);
  681. if (likely(req->req.status == -EINPROGRESS))
  682. req->req.status = status;
  683. else
  684. status = req->req.status;
  685. if (status && status != -ESHUTDOWN)
  686. ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
  687. &req->req, status,
  688. req->req.actual, req->req.length);
  689. if (pflags)
  690. spin_unlock_irqrestore(&ep->lock, *pflags);
  691. local_irq_save(flags);
  692. req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
  693. local_irq_restore(flags);
  694. if (pflags)
  695. spin_lock_irqsave(&ep->lock, *pflags);
  696. }
  697. /**
  698. * ep_end_out_req - Ends endpoint OUT request
  699. * @ep: physical endpoint
  700. * @req: pxa request
  701. * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
  702. *
  703. * Context: ep->lock held or released (see req_done())
  704. *
  705. * Ends endpoint OUT request (completes usb request).
  706. */
  707. static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
  708. unsigned long *pflags)
  709. {
  710. inc_ep_stats_reqs(ep, !USB_DIR_IN);
  711. req_done(ep, req, 0, pflags);
  712. }
  713. /**
  714. * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
  715. * @ep: physical endpoint
  716. * @req: pxa request
  717. * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
  718. *
  719. * Context: ep->lock held or released (see req_done())
  720. *
  721. * Ends control endpoint OUT request (completes usb request), and puts
  722. * control endpoint into idle state
  723. */
  724. static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
  725. unsigned long *pflags)
  726. {
  727. set_ep0state(ep->dev, OUT_STATUS_STAGE);
  728. ep_end_out_req(ep, req, pflags);
  729. ep0_idle(ep->dev);
  730. }
  731. /**
  732. * ep_end_in_req - Ends endpoint IN request
  733. * @ep: physical endpoint
  734. * @req: pxa request
  735. * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
  736. *
  737. * Context: ep->lock held or released (see req_done())
  738. *
  739. * Ends endpoint IN request (completes usb request).
  740. */
  741. static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
  742. unsigned long *pflags)
  743. {
  744. inc_ep_stats_reqs(ep, USB_DIR_IN);
  745. req_done(ep, req, 0, pflags);
  746. }
  747. /**
  748. * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
  749. * @ep: physical endpoint
  750. * @req: pxa request
  751. * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
  752. *
  753. * Context: ep->lock held or released (see req_done())
  754. *
  755. * Ends control endpoint IN request (completes usb request), and puts
  756. * control endpoint into status state
  757. */
  758. static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
  759. unsigned long *pflags)
  760. {
  761. set_ep0state(ep->dev, IN_STATUS_STAGE);
  762. ep_end_in_req(ep, req, pflags);
  763. }
  764. /**
  765. * nuke - Dequeue all requests
  766. * @ep: pxa endpoint
  767. * @status: usb request status
  768. *
  769. * Context: ep->lock released
  770. *
  771. * Dequeues all requests on an endpoint. As a side effect, interrupts will be
  772. * disabled on that endpoint (because no more requests).
  773. */
  774. static void nuke(struct pxa_ep *ep, int status)
  775. {
  776. struct pxa27x_request *req;
  777. unsigned long flags;
  778. spin_lock_irqsave(&ep->lock, flags);
  779. while (!list_empty(&ep->queue)) {
  780. req = list_entry(ep->queue.next, struct pxa27x_request, queue);
  781. req_done(ep, req, status, &flags);
  782. }
  783. spin_unlock_irqrestore(&ep->lock, flags);
  784. }
  785. /**
  786. * read_packet - transfer 1 packet from an OUT endpoint into request
  787. * @ep: pxa physical endpoint
  788. * @req: usb request
  789. *
  790. * Takes bytes from OUT endpoint and transfers them info the usb request.
  791. * If there is less space in request than bytes received in OUT endpoint,
  792. * bytes are left in the OUT endpoint.
  793. *
  794. * Returns how many bytes were actually transferred
  795. */
  796. static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
  797. {
  798. u32 *buf;
  799. int bytes_ep, bufferspace, count, i;
  800. bytes_ep = ep_count_bytes_remain(ep);
  801. bufferspace = req->req.length - req->req.actual;
  802. buf = (u32 *)(req->req.buf + req->req.actual);
  803. prefetchw(buf);
  804. if (likely(!ep_is_empty(ep)))
  805. count = min(bytes_ep, bufferspace);
  806. else /* zlp */
  807. count = 0;
  808. for (i = count; i > 0; i -= 4)
  809. *buf++ = udc_ep_readl(ep, UDCDR);
  810. req->req.actual += count;
  811. ep_write_UDCCSR(ep, UDCCSR_PC);
  812. return count;
  813. }
  814. /**
  815. * write_packet - transfer 1 packet from request into an IN endpoint
  816. * @ep: pxa physical endpoint
  817. * @req: usb request
  818. * @max: max bytes that fit into endpoint
  819. *
  820. * Takes bytes from usb request, and transfers them into the physical
  821. * endpoint. If there are no bytes to transfer, doesn't write anything
  822. * to physical endpoint.
  823. *
  824. * Returns how many bytes were actually transferred.
  825. */
  826. static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
  827. unsigned int max)
  828. {
  829. int length, count, remain, i;
  830. u32 *buf;
  831. u8 *buf_8;
  832. buf = (u32 *)(req->req.buf + req->req.actual);
  833. prefetch(buf);
  834. length = min(req->req.length - req->req.actual, max);
  835. req->req.actual += length;
  836. remain = length & 0x3;
  837. count = length & ~(0x3);
  838. for (i = count; i > 0 ; i -= 4)
  839. udc_ep_writel(ep, UDCDR, *buf++);
  840. buf_8 = (u8 *)buf;
  841. for (i = remain; i > 0; i--)
  842. udc_ep_writeb(ep, UDCDR, *buf_8++);
  843. ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
  844. udc_ep_readl(ep, UDCCSR));
  845. return length;
  846. }
  847. /**
  848. * read_fifo - Transfer packets from OUT endpoint into usb request
  849. * @ep: pxa physical endpoint
  850. * @req: usb request
  851. *
  852. * Context: callable when in_interrupt()
  853. *
  854. * Unload as many packets as possible from the fifo we use for usb OUT
  855. * transfers and put them into the request. Caller should have made sure
  856. * there's at least one packet ready.
  857. * Doesn't complete the request, that's the caller's job
  858. *
  859. * Returns 1 if the request completed, 0 otherwise
  860. */
  861. static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
  862. {
  863. int count, is_short, completed = 0;
  864. while (epout_has_pkt(ep)) {
  865. count = read_packet(ep, req);
  866. inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
  867. is_short = (count < ep->fifo_size);
  868. ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
  869. udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
  870. &req->req, req->req.actual, req->req.length);
  871. /* completion */
  872. if (is_short || req->req.actual == req->req.length) {
  873. completed = 1;
  874. break;
  875. }
  876. /* finished that packet. the next one may be waiting... */
  877. }
  878. return completed;
  879. }
  880. /**
  881. * write_fifo - transfer packets from usb request into an IN endpoint
  882. * @ep: pxa physical endpoint
  883. * @req: pxa usb request
  884. *
  885. * Write to an IN endpoint fifo, as many packets as possible.
  886. * irqs will use this to write the rest later.
  887. * caller guarantees at least one packet buffer is ready (or a zlp).
  888. * Doesn't complete the request, that's the caller's job
  889. *
  890. * Returns 1 if request fully transferred, 0 if partial transfer
  891. */
  892. static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
  893. {
  894. unsigned max;
  895. int count, is_short, is_last = 0, completed = 0, totcount = 0;
  896. u32 udccsr;
  897. max = ep->fifo_size;
  898. do {
  899. is_short = 0;
  900. udccsr = udc_ep_readl(ep, UDCCSR);
  901. if (udccsr & UDCCSR_PC) {
  902. ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
  903. udccsr);
  904. ep_write_UDCCSR(ep, UDCCSR_PC);
  905. }
  906. if (udccsr & UDCCSR_TRN) {
  907. ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
  908. udccsr);
  909. ep_write_UDCCSR(ep, UDCCSR_TRN);
  910. }
  911. count = write_packet(ep, req, max);
  912. inc_ep_stats_bytes(ep, count, USB_DIR_IN);
  913. totcount += count;
  914. /* last packet is usually short (or a zlp) */
  915. if (unlikely(count < max)) {
  916. is_last = 1;
  917. is_short = 1;
  918. } else {
  919. if (likely(req->req.length > req->req.actual)
  920. || req->req.zero)
  921. is_last = 0;
  922. else
  923. is_last = 1;
  924. /* interrupt/iso maxpacket may not fill the fifo */
  925. is_short = unlikely(max < ep->fifo_size);
  926. }
  927. if (is_short)
  928. ep_write_UDCCSR(ep, UDCCSR_SP);
  929. /* requests complete when all IN data is in the FIFO */
  930. if (is_last) {
  931. completed = 1;
  932. break;
  933. }
  934. } while (!ep_is_full(ep));
  935. ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
  936. totcount, is_last ? "/L" : "", is_short ? "/S" : "",
  937. req->req.length - req->req.actual, &req->req);
  938. return completed;
  939. }
  940. /**
  941. * read_ep0_fifo - Transfer packets from control endpoint into usb request
  942. * @ep: control endpoint
  943. * @req: pxa usb request
  944. *
  945. * Special ep0 version of the above read_fifo. Reads as many bytes from control
  946. * endpoint as can be read, and stores them into usb request (limited by request
  947. * maximum length).
  948. *
  949. * Returns 0 if usb request only partially filled, 1 if fully filled
  950. */
  951. static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
  952. {
  953. int count, is_short, completed = 0;
  954. while (epout_has_pkt(ep)) {
  955. count = read_packet(ep, req);
  956. ep_write_UDCCSR(ep, UDCCSR0_OPC);
  957. inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
  958. is_short = (count < ep->fifo_size);
  959. ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
  960. udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
  961. &req->req, req->req.actual, req->req.length);
  962. if (is_short || req->req.actual >= req->req.length) {
  963. completed = 1;
  964. break;
  965. }
  966. }
  967. return completed;
  968. }
  969. /**
  970. * write_ep0_fifo - Send a request to control endpoint (ep0 in)
  971. * @ep: control endpoint
  972. * @req: request
  973. *
  974. * Context: callable when in_interrupt()
  975. *
  976. * Sends a request (or a part of the request) to the control endpoint (ep0 in).
  977. * If the request doesn't fit, the remaining part will be sent from irq.
  978. * The request is considered fully written only if either :
  979. * - last write transferred all remaining bytes, but fifo was not fully filled
  980. * - last write was a 0 length write
  981. *
  982. * Returns 1 if request fully written, 0 if request only partially sent
  983. */
  984. static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
  985. {
  986. unsigned count;
  987. int is_last, is_short;
  988. count = write_packet(ep, req, EP0_FIFO_SIZE);
  989. inc_ep_stats_bytes(ep, count, USB_DIR_IN);
  990. is_short = (count < EP0_FIFO_SIZE);
  991. is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
  992. /* Sends either a short packet or a 0 length packet */
  993. if (unlikely(is_short))
  994. ep_write_UDCCSR(ep, UDCCSR0_IPR);
  995. ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
  996. count, is_short ? "/S" : "", is_last ? "/L" : "",
  997. req->req.length - req->req.actual,
  998. &req->req, udc_ep_readl(ep, UDCCSR));
  999. return is_last;
  1000. }
  1001. /**
  1002. * pxa_ep_queue - Queue a request into an IN endpoint
  1003. * @_ep: usb endpoint
  1004. * @_req: usb request
  1005. * @gfp_flags: flags
  1006. *
  1007. * Context: normally called when !in_interrupt, but callable when in_interrupt()
  1008. * in the special case of ep0 setup :
  1009. * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
  1010. *
  1011. * Returns 0 if succedeed, error otherwise
  1012. */
  1013. static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1014. gfp_t gfp_flags)
  1015. {
  1016. struct udc_usb_ep *udc_usb_ep;
  1017. struct pxa_ep *ep;
  1018. struct pxa27x_request *req;
  1019. struct pxa_udc *dev;
  1020. unsigned long flags;
  1021. int rc = 0;
  1022. int is_first_req;
  1023. unsigned length;
  1024. int recursion_detected;
  1025. req = container_of(_req, struct pxa27x_request, req);
  1026. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1027. if (unlikely(!_req || !_req->complete || !_req->buf))
  1028. return -EINVAL;
  1029. if (unlikely(!_ep))
  1030. return -EINVAL;
  1031. dev = udc_usb_ep->dev;
  1032. ep = udc_usb_ep->pxa_ep;
  1033. if (unlikely(!ep))
  1034. return -EINVAL;
  1035. dev = ep->dev;
  1036. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  1037. ep_dbg(ep, "bogus device state\n");
  1038. return -ESHUTDOWN;
  1039. }
  1040. /* iso is always one packet per request, that's the only way
  1041. * we can report per-packet status. that also helps with dma.
  1042. */
  1043. if (unlikely(EPXFERTYPE_is_ISO(ep)
  1044. && req->req.length > ep->fifo_size))
  1045. return -EMSGSIZE;
  1046. spin_lock_irqsave(&ep->lock, flags);
  1047. recursion_detected = ep->in_handle_ep;
  1048. is_first_req = list_empty(&ep->queue);
  1049. ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
  1050. _req, is_first_req ? "yes" : "no",
  1051. _req->length, _req->buf);
  1052. if (!ep->enabled) {
  1053. _req->status = -ESHUTDOWN;
  1054. rc = -ESHUTDOWN;
  1055. goto out_locked;
  1056. }
  1057. if (req->in_use) {
  1058. ep_err(ep, "refusing to queue req %p (already queued)\n", req);
  1059. goto out_locked;
  1060. }
  1061. length = _req->length;
  1062. _req->status = -EINPROGRESS;
  1063. _req->actual = 0;
  1064. ep_add_request(ep, req);
  1065. spin_unlock_irqrestore(&ep->lock, flags);
  1066. if (is_ep0(ep)) {
  1067. switch (dev->ep0state) {
  1068. case WAIT_ACK_SET_CONF_INTERF:
  1069. if (length == 0) {
  1070. ep_end_in_req(ep, req, NULL);
  1071. } else {
  1072. ep_err(ep, "got a request of %d bytes while"
  1073. "in state WAIT_ACK_SET_CONF_INTERF\n",
  1074. length);
  1075. ep_del_request(ep, req);
  1076. rc = -EL2HLT;
  1077. }
  1078. ep0_idle(ep->dev);
  1079. break;
  1080. case IN_DATA_STAGE:
  1081. if (!ep_is_full(ep))
  1082. if (write_ep0_fifo(ep, req))
  1083. ep0_end_in_req(ep, req, NULL);
  1084. break;
  1085. case OUT_DATA_STAGE:
  1086. if ((length == 0) || !epout_has_pkt(ep))
  1087. if (read_ep0_fifo(ep, req))
  1088. ep0_end_out_req(ep, req, NULL);
  1089. break;
  1090. default:
  1091. ep_err(ep, "odd state %s to send me a request\n",
  1092. EP0_STNAME(ep->dev));
  1093. ep_del_request(ep, req);
  1094. rc = -EL2HLT;
  1095. break;
  1096. }
  1097. } else {
  1098. if (!recursion_detected)
  1099. handle_ep(ep);
  1100. }
  1101. out:
  1102. return rc;
  1103. out_locked:
  1104. spin_unlock_irqrestore(&ep->lock, flags);
  1105. goto out;
  1106. }
  1107. /**
  1108. * pxa_ep_dequeue - Dequeue one request
  1109. * @_ep: usb endpoint
  1110. * @_req: usb request
  1111. *
  1112. * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
  1113. */
  1114. static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1115. {
  1116. struct pxa_ep *ep;
  1117. struct udc_usb_ep *udc_usb_ep;
  1118. struct pxa27x_request *req;
  1119. unsigned long flags;
  1120. int rc = -EINVAL;
  1121. if (!_ep)
  1122. return rc;
  1123. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1124. ep = udc_usb_ep->pxa_ep;
  1125. if (!ep || is_ep0(ep))
  1126. return rc;
  1127. spin_lock_irqsave(&ep->lock, flags);
  1128. /* make sure it's actually queued on this endpoint */
  1129. list_for_each_entry(req, &ep->queue, queue) {
  1130. if (&req->req == _req) {
  1131. rc = 0;
  1132. break;
  1133. }
  1134. }
  1135. spin_unlock_irqrestore(&ep->lock, flags);
  1136. if (!rc)
  1137. req_done(ep, req, -ECONNRESET, NULL);
  1138. return rc;
  1139. }
  1140. /**
  1141. * pxa_ep_set_halt - Halts operations on one endpoint
  1142. * @_ep: usb endpoint
  1143. * @value:
  1144. *
  1145. * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
  1146. */
  1147. static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
  1148. {
  1149. struct pxa_ep *ep;
  1150. struct udc_usb_ep *udc_usb_ep;
  1151. unsigned long flags;
  1152. int rc;
  1153. if (!_ep)
  1154. return -EINVAL;
  1155. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1156. ep = udc_usb_ep->pxa_ep;
  1157. if (!ep || is_ep0(ep))
  1158. return -EINVAL;
  1159. if (value == 0) {
  1160. /*
  1161. * This path (reset toggle+halt) is needed to implement
  1162. * SET_INTERFACE on normal hardware. but it can't be
  1163. * done from software on the PXA UDC, and the hardware
  1164. * forgets to do it as part of SET_INTERFACE automagic.
  1165. */
  1166. ep_dbg(ep, "only host can clear halt\n");
  1167. return -EROFS;
  1168. }
  1169. spin_lock_irqsave(&ep->lock, flags);
  1170. rc = -EAGAIN;
  1171. if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
  1172. goto out;
  1173. /* FST, FEF bits are the same for control and non control endpoints */
  1174. rc = 0;
  1175. ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
  1176. if (is_ep0(ep))
  1177. set_ep0state(ep->dev, STALL);
  1178. out:
  1179. spin_unlock_irqrestore(&ep->lock, flags);
  1180. return rc;
  1181. }
  1182. /**
  1183. * pxa_ep_fifo_status - Get how many bytes in physical endpoint
  1184. * @_ep: usb endpoint
  1185. *
  1186. * Returns number of bytes in OUT fifos. Broken for IN fifos.
  1187. */
  1188. static int pxa_ep_fifo_status(struct usb_ep *_ep)
  1189. {
  1190. struct pxa_ep *ep;
  1191. struct udc_usb_ep *udc_usb_ep;
  1192. if (!_ep)
  1193. return -ENODEV;
  1194. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1195. ep = udc_usb_ep->pxa_ep;
  1196. if (!ep || is_ep0(ep))
  1197. return -ENODEV;
  1198. if (ep->dir_in)
  1199. return -EOPNOTSUPP;
  1200. if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
  1201. return 0;
  1202. else
  1203. return ep_count_bytes_remain(ep) + 1;
  1204. }
  1205. /**
  1206. * pxa_ep_fifo_flush - Flushes one endpoint
  1207. * @_ep: usb endpoint
  1208. *
  1209. * Discards all data in one endpoint(IN or OUT), except control endpoint.
  1210. */
  1211. static void pxa_ep_fifo_flush(struct usb_ep *_ep)
  1212. {
  1213. struct pxa_ep *ep;
  1214. struct udc_usb_ep *udc_usb_ep;
  1215. unsigned long flags;
  1216. if (!_ep)
  1217. return;
  1218. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1219. ep = udc_usb_ep->pxa_ep;
  1220. if (!ep || is_ep0(ep))
  1221. return;
  1222. spin_lock_irqsave(&ep->lock, flags);
  1223. if (unlikely(!list_empty(&ep->queue)))
  1224. ep_dbg(ep, "called while queue list not empty\n");
  1225. ep_dbg(ep, "called\n");
  1226. /* for OUT, just read and discard the FIFO contents. */
  1227. if (!ep->dir_in) {
  1228. while (!ep_is_empty(ep))
  1229. udc_ep_readl(ep, UDCDR);
  1230. } else {
  1231. /* most IN status is the same, but ISO can't stall */
  1232. ep_write_UDCCSR(ep,
  1233. UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
  1234. | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
  1235. }
  1236. spin_unlock_irqrestore(&ep->lock, flags);
  1237. }
  1238. /**
  1239. * pxa_ep_enable - Enables usb endpoint
  1240. * @_ep: usb endpoint
  1241. * @desc: usb endpoint descriptor
  1242. *
  1243. * Nothing much to do here, as ep configuration is done once and for all
  1244. * before udc is enabled. After udc enable, no physical endpoint configuration
  1245. * can be changed.
  1246. * Function makes sanity checks and flushes the endpoint.
  1247. */
  1248. static int pxa_ep_enable(struct usb_ep *_ep,
  1249. const struct usb_endpoint_descriptor *desc)
  1250. {
  1251. struct pxa_ep *ep;
  1252. struct udc_usb_ep *udc_usb_ep;
  1253. struct pxa_udc *udc;
  1254. if (!_ep || !desc)
  1255. return -EINVAL;
  1256. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1257. if (udc_usb_ep->pxa_ep) {
  1258. ep = udc_usb_ep->pxa_ep;
  1259. ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
  1260. _ep->name);
  1261. } else {
  1262. ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
  1263. }
  1264. if (!ep || is_ep0(ep)) {
  1265. dev_err(udc_usb_ep->dev->dev,
  1266. "unable to match pxa_ep for ep %s\n",
  1267. _ep->name);
  1268. return -EINVAL;
  1269. }
  1270. if ((desc->bDescriptorType != USB_DT_ENDPOINT)
  1271. || (ep->type != usb_endpoint_type(desc))) {
  1272. ep_err(ep, "type mismatch\n");
  1273. return -EINVAL;
  1274. }
  1275. if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
  1276. ep_err(ep, "bad maxpacket\n");
  1277. return -ERANGE;
  1278. }
  1279. udc_usb_ep->pxa_ep = ep;
  1280. udc = ep->dev;
  1281. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
  1282. ep_err(ep, "bogus device state\n");
  1283. return -ESHUTDOWN;
  1284. }
  1285. ep->enabled = 1;
  1286. /* flush fifo (mostly for OUT buffers) */
  1287. pxa_ep_fifo_flush(_ep);
  1288. ep_dbg(ep, "enabled\n");
  1289. return 0;
  1290. }
  1291. /**
  1292. * pxa_ep_disable - Disable usb endpoint
  1293. * @_ep: usb endpoint
  1294. *
  1295. * Same as for pxa_ep_enable, no physical endpoint configuration can be
  1296. * changed.
  1297. * Function flushes the endpoint and related requests.
  1298. */
  1299. static int pxa_ep_disable(struct usb_ep *_ep)
  1300. {
  1301. struct pxa_ep *ep;
  1302. struct udc_usb_ep *udc_usb_ep;
  1303. if (!_ep)
  1304. return -EINVAL;
  1305. udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
  1306. ep = udc_usb_ep->pxa_ep;
  1307. if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
  1308. return -EINVAL;
  1309. ep->enabled = 0;
  1310. nuke(ep, -ESHUTDOWN);
  1311. pxa_ep_fifo_flush(_ep);
  1312. udc_usb_ep->pxa_ep = NULL;
  1313. ep_dbg(ep, "disabled\n");
  1314. return 0;
  1315. }
  1316. static struct usb_ep_ops pxa_ep_ops = {
  1317. .enable = pxa_ep_enable,
  1318. .disable = pxa_ep_disable,
  1319. .alloc_request = pxa_ep_alloc_request,
  1320. .free_request = pxa_ep_free_request,
  1321. .queue = pxa_ep_queue,
  1322. .dequeue = pxa_ep_dequeue,
  1323. .set_halt = pxa_ep_set_halt,
  1324. .fifo_status = pxa_ep_fifo_status,
  1325. .fifo_flush = pxa_ep_fifo_flush,
  1326. };
  1327. /**
  1328. * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
  1329. * @udc: udc device
  1330. * @on: 0 if disconnect pullup resistor, 1 otherwise
  1331. * Context: any
  1332. *
  1333. * Handle D+ pullup resistor, make the device visible to the usb bus, and
  1334. * declare it as a full speed usb device
  1335. */
  1336. static void dplus_pullup(struct pxa_udc *udc, int on)
  1337. {
  1338. if (on) {
  1339. if (gpio_is_valid(udc->mach->gpio_pullup))
  1340. gpio_set_value(udc->mach->gpio_pullup,
  1341. !udc->mach->gpio_pullup_inverted);
  1342. if (udc->mach->udc_command)
  1343. udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
  1344. } else {
  1345. if (gpio_is_valid(udc->mach->gpio_pullup))
  1346. gpio_set_value(udc->mach->gpio_pullup,
  1347. udc->mach->gpio_pullup_inverted);
  1348. if (udc->mach->udc_command)
  1349. udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
  1350. }
  1351. udc->pullup_on = on;
  1352. }
  1353. /**
  1354. * pxa_udc_get_frame - Returns usb frame number
  1355. * @_gadget: usb gadget
  1356. */
  1357. static int pxa_udc_get_frame(struct usb_gadget *_gadget)
  1358. {
  1359. struct pxa_udc *udc = to_gadget_udc(_gadget);
  1360. return (udc_readl(udc, UDCFNR) & 0x7ff);
  1361. }
  1362. /**
  1363. * pxa_udc_wakeup - Force udc device out of suspend
  1364. * @_gadget: usb gadget
  1365. *
  1366. * Returns 0 if successful, error code otherwise
  1367. */
  1368. static int pxa_udc_wakeup(struct usb_gadget *_gadget)
  1369. {
  1370. struct pxa_udc *udc = to_gadget_udc(_gadget);
  1371. /* host may not have enabled remote wakeup */
  1372. if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
  1373. return -EHOSTUNREACH;
  1374. udc_set_mask_UDCCR(udc, UDCCR_UDR);
  1375. return 0;
  1376. }
  1377. static void udc_enable(struct pxa_udc *udc);
  1378. static void udc_disable(struct pxa_udc *udc);
  1379. /**
  1380. * should_enable_udc - Tells if UDC should be enabled
  1381. * @udc: udc device
  1382. * Context: any
  1383. *
  1384. * The UDC should be enabled if :
  1385. * - the pullup resistor is connected
  1386. * - and a gadget driver is bound
  1387. * - and vbus is sensed (or no vbus sense is available)
  1388. *
  1389. * Returns 1 if UDC should be enabled, 0 otherwise
  1390. */
  1391. static int should_enable_udc(struct pxa_udc *udc)
  1392. {
  1393. int put_on;
  1394. put_on = ((udc->pullup_on) && (udc->driver));
  1395. put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
  1396. return put_on;
  1397. }
  1398. /**
  1399. * should_disable_udc - Tells if UDC should be disabled
  1400. * @udc: udc device
  1401. * Context: any
  1402. *
  1403. * The UDC should be disabled if :
  1404. * - the pullup resistor is not connected
  1405. * - or no gadget driver is bound
  1406. * - or no vbus is sensed (when vbus sesing is available)
  1407. *
  1408. * Returns 1 if UDC should be disabled
  1409. */
  1410. static int should_disable_udc(struct pxa_udc *udc)
  1411. {
  1412. int put_off;
  1413. put_off = ((!udc->pullup_on) || (!udc->driver));
  1414. put_off |= ((!udc->vbus_sensed) && (udc->transceiver));
  1415. return put_off;
  1416. }
  1417. /**
  1418. * pxa_udc_pullup - Offer manual D+ pullup control
  1419. * @_gadget: usb gadget using the control
  1420. * @is_active: 0 if disconnect, else connect D+ pullup resistor
  1421. * Context: !in_interrupt()
  1422. *
  1423. * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
  1424. */
  1425. static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
  1426. {
  1427. struct pxa_udc *udc = to_gadget_udc(_gadget);
  1428. if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
  1429. return -EOPNOTSUPP;
  1430. dplus_pullup(udc, is_active);
  1431. if (should_enable_udc(udc))
  1432. udc_enable(udc);
  1433. if (should_disable_udc(udc))
  1434. udc_disable(udc);
  1435. return 0;
  1436. }
  1437. static void udc_enable(struct pxa_udc *udc);
  1438. static void udc_disable(struct pxa_udc *udc);
  1439. /**
  1440. * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
  1441. * @_gadget: usb gadget
  1442. * @is_active: 0 if should disable the udc, 1 if should enable
  1443. *
  1444. * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
  1445. * udc, and deactivates D+ pullup resistor.
  1446. *
  1447. * Returns 0
  1448. */
  1449. static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1450. {
  1451. struct pxa_udc *udc = to_gadget_udc(_gadget);
  1452. udc->vbus_sensed = is_active;
  1453. if (should_enable_udc(udc))
  1454. udc_enable(udc);
  1455. if (should_disable_udc(udc))
  1456. udc_disable(udc);
  1457. return 0;
  1458. }
  1459. /**
  1460. * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
  1461. * @_gadget: usb gadget
  1462. * @mA: current drawn
  1463. *
  1464. * Context: !in_interrupt()
  1465. *
  1466. * Called after a configuration was chosen by a USB host, to inform how much
  1467. * current can be drawn by the device from VBus line.
  1468. *
  1469. * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
  1470. */
  1471. static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
  1472. {
  1473. struct pxa_udc *udc;
  1474. udc = to_gadget_udc(_gadget);
  1475. if (udc->transceiver)
  1476. return otg_set_power(udc->transceiver, mA);
  1477. return -EOPNOTSUPP;
  1478. }
  1479. static int pxa27x_udc_start(struct usb_gadget_driver *driver,
  1480. int (*bind)(struct usb_gadget *));
  1481. static int pxa27x_udc_stop(struct usb_gadget_driver *driver);
  1482. static const struct usb_gadget_ops pxa_udc_ops = {
  1483. .get_frame = pxa_udc_get_frame,
  1484. .wakeup = pxa_udc_wakeup,
  1485. .pullup = pxa_udc_pullup,
  1486. .vbus_session = pxa_udc_vbus_session,
  1487. .vbus_draw = pxa_udc_vbus_draw,
  1488. .start = pxa27x_udc_start,
  1489. .stop = pxa27x_udc_stop,
  1490. };
  1491. /**
  1492. * udc_disable - disable udc device controller
  1493. * @udc: udc device
  1494. * Context: any
  1495. *
  1496. * Disables the udc device : disables clocks, udc interrupts, control endpoint
  1497. * interrupts.
  1498. */
  1499. static void udc_disable(struct pxa_udc *udc)
  1500. {
  1501. if (!udc->enabled)
  1502. return;
  1503. udc_writel(udc, UDCICR0, 0);
  1504. udc_writel(udc, UDCICR1, 0);
  1505. udc_clear_mask_UDCCR(udc, UDCCR_UDE);
  1506. clk_disable(udc->clk);
  1507. ep0_idle(udc);
  1508. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1509. udc->enabled = 0;
  1510. }
  1511. /**
  1512. * udc_init_data - Initialize udc device data structures
  1513. * @dev: udc device
  1514. *
  1515. * Initializes gadget endpoint list, endpoints locks. No action is taken
  1516. * on the hardware.
  1517. */
  1518. static __init void udc_init_data(struct pxa_udc *dev)
  1519. {
  1520. int i;
  1521. struct pxa_ep *ep;
  1522. /* device/ep0 records init */
  1523. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1524. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1525. dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
  1526. ep0_idle(dev);
  1527. /* PXA endpoints init */
  1528. for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
  1529. ep = &dev->pxa_ep[i];
  1530. ep->enabled = is_ep0(ep);
  1531. INIT_LIST_HEAD(&ep->queue);
  1532. spin_lock_init(&ep->lock);
  1533. }
  1534. /* USB endpoints init */
  1535. for (i = 1; i < NR_USB_ENDPOINTS; i++)
  1536. list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
  1537. &dev->gadget.ep_list);
  1538. }
  1539. /**
  1540. * udc_enable - Enables the udc device
  1541. * @dev: udc device
  1542. *
  1543. * Enables the udc device : enables clocks, udc interrupts, control endpoint
  1544. * interrupts, sets usb as UDC client and setups endpoints.
  1545. */
  1546. static void udc_enable(struct pxa_udc *udc)
  1547. {
  1548. if (udc->enabled)
  1549. return;
  1550. udc_writel(udc, UDCICR0, 0);
  1551. udc_writel(udc, UDCICR1, 0);
  1552. udc_clear_mask_UDCCR(udc, UDCCR_UDE);
  1553. clk_enable(udc->clk);
  1554. ep0_idle(udc);
  1555. udc->gadget.speed = USB_SPEED_FULL;
  1556. memset(&udc->stats, 0, sizeof(udc->stats));
  1557. udc_set_mask_UDCCR(udc, UDCCR_UDE);
  1558. ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
  1559. udelay(2);
  1560. if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
  1561. dev_err(udc->dev, "Configuration errors, udc disabled\n");
  1562. /*
  1563. * Caller must be able to sleep in order to cope with startup transients
  1564. */
  1565. msleep(100);
  1566. /* enable suspend/resume and reset irqs */
  1567. udc_writel(udc, UDCICR1,
  1568. UDCICR1_IECC | UDCICR1_IERU
  1569. | UDCICR1_IESU | UDCICR1_IERS);
  1570. /* enable ep0 irqs */
  1571. pio_irq_enable(&udc->pxa_ep[0]);
  1572. udc->enabled = 1;
  1573. }
  1574. /**
  1575. * pxa27x_start - Register gadget driver
  1576. * @driver: gadget driver
  1577. * @bind: bind function
  1578. *
  1579. * When a driver is successfully registered, it will receive control requests
  1580. * including set_configuration(), which enables non-control requests. Then
  1581. * usb traffic follows until a disconnect is reported. Then a host may connect
  1582. * again, or the driver might get unbound.
  1583. *
  1584. * Note that the udc is not automatically enabled. Check function
  1585. * should_enable_udc().
  1586. *
  1587. * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
  1588. */
  1589. static int pxa27x_udc_start(struct usb_gadget_driver *driver,
  1590. int (*bind)(struct usb_gadget *))
  1591. {
  1592. struct pxa_udc *udc = the_controller;
  1593. int retval;
  1594. if (!driver || driver->speed < USB_SPEED_FULL || !bind
  1595. || !driver->disconnect || !driver->setup)
  1596. return -EINVAL;
  1597. if (!udc)
  1598. return -ENODEV;
  1599. if (udc->driver)
  1600. return -EBUSY;
  1601. /* first hook up the driver ... */
  1602. udc->driver = driver;
  1603. udc->gadget.dev.driver = &driver->driver;
  1604. dplus_pullup(udc, 1);
  1605. retval = device_add(&udc->gadget.dev);
  1606. if (retval) {
  1607. dev_err(udc->dev, "device_add error %d\n", retval);
  1608. goto add_fail;
  1609. }
  1610. retval = bind(&udc->gadget);
  1611. if (retval) {
  1612. dev_err(udc->dev, "bind to driver %s --> error %d\n",
  1613. driver->driver.name, retval);
  1614. goto bind_fail;
  1615. }
  1616. dev_dbg(udc->dev, "registered gadget driver '%s'\n",
  1617. driver->driver.name);
  1618. if (udc->transceiver) {
  1619. retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
  1620. if (retval) {
  1621. dev_err(udc->dev, "can't bind to transceiver\n");
  1622. goto transceiver_fail;
  1623. }
  1624. }
  1625. if (should_enable_udc(udc))
  1626. udc_enable(udc);
  1627. return 0;
  1628. transceiver_fail:
  1629. if (driver->unbind)
  1630. driver->unbind(&udc->gadget);
  1631. bind_fail:
  1632. device_del(&udc->gadget.dev);
  1633. add_fail:
  1634. udc->driver = NULL;
  1635. udc->gadget.dev.driver = NULL;
  1636. return retval;
  1637. }
  1638. /**
  1639. * stop_activity - Stops udc endpoints
  1640. * @udc: udc device
  1641. * @driver: gadget driver
  1642. *
  1643. * Disables all udc endpoints (even control endpoint), report disconnect to
  1644. * the gadget user.
  1645. */
  1646. static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
  1647. {
  1648. int i;
  1649. /* don't disconnect drivers more than once */
  1650. if (udc->gadget.speed == USB_SPEED_UNKNOWN)
  1651. driver = NULL;
  1652. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1653. for (i = 0; i < NR_USB_ENDPOINTS; i++)
  1654. pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
  1655. if (driver)
  1656. driver->disconnect(&udc->gadget);
  1657. }
  1658. /**
  1659. * pxa27x_udc_stop - Unregister the gadget driver
  1660. * @driver: gadget driver
  1661. *
  1662. * Returns 0 if no error, -ENODEV, -EINVAL otherwise
  1663. */
  1664. static int pxa27x_udc_stop(struct usb_gadget_driver *driver)
  1665. {
  1666. struct pxa_udc *udc = the_controller;
  1667. if (!udc)
  1668. return -ENODEV;
  1669. if (!driver || driver != udc->driver || !driver->unbind)
  1670. return -EINVAL;
  1671. stop_activity(udc, driver);
  1672. udc_disable(udc);
  1673. dplus_pullup(udc, 0);
  1674. driver->unbind(&udc->gadget);
  1675. udc->driver = NULL;
  1676. device_del(&udc->gadget.dev);
  1677. dev_info(udc->dev, "unregistered gadget driver '%s'\n",
  1678. driver->driver.name);
  1679. if (udc->transceiver)
  1680. return otg_set_peripheral(udc->transceiver, NULL);
  1681. return 0;
  1682. }
  1683. /**
  1684. * handle_ep0_ctrl_req - handle control endpoint control request
  1685. * @udc: udc device
  1686. * @req: control request
  1687. */
  1688. static void handle_ep0_ctrl_req(struct pxa_udc *udc,
  1689. struct pxa27x_request *req)
  1690. {
  1691. struct pxa_ep *ep = &udc->pxa_ep[0];
  1692. union {
  1693. struct usb_ctrlrequest r;
  1694. u32 word[2];
  1695. } u;
  1696. int i;
  1697. int have_extrabytes = 0;
  1698. unsigned long flags;
  1699. nuke(ep, -EPROTO);
  1700. spin_lock_irqsave(&ep->lock, flags);
  1701. /*
  1702. * In the PXA320 manual, in the section about Back-to-Back setup
  1703. * packets, it describes this situation. The solution is to set OPC to
  1704. * get rid of the status packet, and then continue with the setup
  1705. * packet. Generalize to pxa27x CPUs.
  1706. */
  1707. if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
  1708. ep_write_UDCCSR(ep, UDCCSR0_OPC);
  1709. /* read SETUP packet */
  1710. for (i = 0; i < 2; i++) {
  1711. if (unlikely(ep_is_empty(ep)))
  1712. goto stall;
  1713. u.word[i] = udc_ep_readl(ep, UDCDR);
  1714. }
  1715. have_extrabytes = !ep_is_empty(ep);
  1716. while (!ep_is_empty(ep)) {
  1717. i = udc_ep_readl(ep, UDCDR);
  1718. ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
  1719. }
  1720. ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
  1721. u.r.bRequestType, u.r.bRequest,
  1722. le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
  1723. le16_to_cpu(u.r.wLength));
  1724. if (unlikely(have_extrabytes))
  1725. goto stall;
  1726. if (u.r.bRequestType & USB_DIR_IN)
  1727. set_ep0state(udc, IN_DATA_STAGE);
  1728. else
  1729. set_ep0state(udc, OUT_DATA_STAGE);
  1730. /* Tell UDC to enter Data Stage */
  1731. ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
  1732. spin_unlock_irqrestore(&ep->lock, flags);
  1733. i = udc->driver->setup(&udc->gadget, &u.r);
  1734. spin_lock_irqsave(&ep->lock, flags);
  1735. if (i < 0)
  1736. goto stall;
  1737. out:
  1738. spin_unlock_irqrestore(&ep->lock, flags);
  1739. return;
  1740. stall:
  1741. ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
  1742. udc_ep_readl(ep, UDCCSR), i);
  1743. ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
  1744. set_ep0state(udc, STALL);
  1745. goto out;
  1746. }
  1747. /**
  1748. * handle_ep0 - Handle control endpoint data transfers
  1749. * @udc: udc device
  1750. * @fifo_irq: 1 if triggered by fifo service type irq
  1751. * @opc_irq: 1 if triggered by output packet complete type irq
  1752. *
  1753. * Context : when in_interrupt() or with ep->lock held
  1754. *
  1755. * Tries to transfer all pending request data into the endpoint and/or
  1756. * transfer all pending data in the endpoint into usb requests.
  1757. * Handles states of ep0 automata.
  1758. *
  1759. * PXA27x hardware handles several standard usb control requests without
  1760. * driver notification. The requests fully handled by hardware are :
  1761. * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
  1762. * GET_STATUS
  1763. * The requests handled by hardware, but with irq notification are :
  1764. * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
  1765. * The remaining standard requests really handled by handle_ep0 are :
  1766. * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
  1767. * Requests standardized outside of USB 2.0 chapter 9 are handled more
  1768. * uniformly, by gadget drivers.
  1769. *
  1770. * The control endpoint state machine is _not_ USB spec compliant, it's even
  1771. * hardly compliant with Intel PXA270 developers guide.
  1772. * The key points which inferred this state machine are :
  1773. * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
  1774. * software.
  1775. * - on every OUT packet received, UDCCSR0_OPC is raised and held until
  1776. * cleared by software.
  1777. * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
  1778. * before reading ep0.
  1779. * This is true only for PXA27x. This is not true anymore for PXA3xx family
  1780. * (check Back-to-Back setup packet in developers guide).
  1781. * - irq can be called on a "packet complete" event (opc_irq=1), while
  1782. * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
  1783. * from experimentation).
  1784. * - as UDCCSR0_SA can be activated while in irq handling, and clearing
  1785. * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
  1786. * => we never actually read the "status stage" packet of an IN data stage
  1787. * => this is not documented in Intel documentation
  1788. * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
  1789. * STAGE. The driver add STATUS STAGE to send last zero length packet in
  1790. * OUT_STATUS_STAGE.
  1791. * - special attention was needed for IN_STATUS_STAGE. If a packet complete
  1792. * event is detected, we terminate the status stage without ackowledging the
  1793. * packet (not to risk to loose a potential SETUP packet)
  1794. */
  1795. static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
  1796. {
  1797. u32 udccsr0;
  1798. struct pxa_ep *ep = &udc->pxa_ep[0];
  1799. struct pxa27x_request *req = NULL;
  1800. int completed = 0;
  1801. if (!list_empty(&ep->queue))
  1802. req = list_entry(ep->queue.next, struct pxa27x_request, queue);
  1803. udccsr0 = udc_ep_readl(ep, UDCCSR);
  1804. ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
  1805. EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
  1806. (fifo_irq << 1 | opc_irq));
  1807. if (udccsr0 & UDCCSR0_SST) {
  1808. ep_dbg(ep, "clearing stall status\n");
  1809. nuke(ep, -EPIPE);
  1810. ep_write_UDCCSR(ep, UDCCSR0_SST);
  1811. ep0_idle(udc);
  1812. }
  1813. if (udccsr0 & UDCCSR0_SA) {
  1814. nuke(ep, 0);
  1815. set_ep0state(udc, SETUP_STAGE);
  1816. }
  1817. switch (udc->ep0state) {
  1818. case WAIT_FOR_SETUP:
  1819. /*
  1820. * Hardware bug : beware, we cannot clear OPC, since we would
  1821. * miss a potential OPC irq for a setup packet.
  1822. * So, we only do ... nothing, and hope for a next irq with
  1823. * UDCCSR0_SA set.
  1824. */
  1825. break;
  1826. case SETUP_STAGE:
  1827. udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
  1828. if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
  1829. handle_ep0_ctrl_req(udc, req);
  1830. break;
  1831. case IN_DATA_STAGE: /* GET_DESCRIPTOR */
  1832. if (epout_has_pkt(ep))
  1833. ep_write_UDCCSR(ep, UDCCSR0_OPC);
  1834. if (req && !ep_is_full(ep))
  1835. completed = write_ep0_fifo(ep, req);
  1836. if (completed)
  1837. ep0_end_in_req(ep, req, NULL);
  1838. break;
  1839. case OUT_DATA_STAGE: /* SET_DESCRIPTOR */
  1840. if (epout_has_pkt(ep) && req)
  1841. completed = read_ep0_fifo(ep, req);
  1842. if (completed)
  1843. ep0_end_out_req(ep, req, NULL);
  1844. break;
  1845. case STALL:
  1846. ep_write_UDCCSR(ep, UDCCSR0_FST);
  1847. break;
  1848. case IN_STATUS_STAGE:
  1849. /*
  1850. * Hardware bug : beware, we cannot clear OPC, since we would
  1851. * miss a potential PC irq for a setup packet.
  1852. * So, we only put the ep0 into WAIT_FOR_SETUP state.
  1853. */
  1854. if (opc_irq)
  1855. ep0_idle(udc);
  1856. break;
  1857. case OUT_STATUS_STAGE:
  1858. case WAIT_ACK_SET_CONF_INTERF:
  1859. ep_warn(ep, "should never get in %s state here!!!\n",
  1860. EP0_STNAME(ep->dev));
  1861. ep0_idle(udc);
  1862. break;
  1863. }
  1864. }
  1865. /**
  1866. * handle_ep - Handle endpoint data tranfers
  1867. * @ep: pxa physical endpoint
  1868. *
  1869. * Tries to transfer all pending request data into the endpoint and/or
  1870. * transfer all pending data in the endpoint into usb requests.
  1871. *
  1872. * Is always called when in_interrupt() and with ep->lock released.
  1873. */
  1874. static void handle_ep(struct pxa_ep *ep)
  1875. {
  1876. struct pxa27x_request *req;
  1877. int completed;
  1878. u32 udccsr;
  1879. int is_in = ep->dir_in;
  1880. int loop = 0;
  1881. unsigned long flags;
  1882. spin_lock_irqsave(&ep->lock, flags);
  1883. if (ep->in_handle_ep)
  1884. goto recursion_detected;
  1885. ep->in_handle_ep = 1;
  1886. do {
  1887. completed = 0;
  1888. udccsr = udc_ep_readl(ep, UDCCSR);
  1889. if (likely(!list_empty(&ep->queue)))
  1890. req = list_entry(ep->queue.next,
  1891. struct pxa27x_request, queue);
  1892. else
  1893. req = NULL;
  1894. ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
  1895. req, udccsr, loop++);
  1896. if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
  1897. udc_ep_writel(ep, UDCCSR,
  1898. udccsr & (UDCCSR_SST | UDCCSR_TRN));
  1899. if (!req)
  1900. break;
  1901. if (unlikely(is_in)) {
  1902. if (likely(!ep_is_full(ep)))
  1903. completed = write_fifo(ep, req);
  1904. } else {
  1905. if (likely(epout_has_pkt(ep)))
  1906. completed = read_fifo(ep, req);
  1907. }
  1908. if (completed) {
  1909. if (is_in)
  1910. ep_end_in_req(ep, req, &flags);
  1911. else
  1912. ep_end_out_req(ep, req, &flags);
  1913. }
  1914. } while (completed);
  1915. ep->in_handle_ep = 0;
  1916. recursion_detected:
  1917. spin_unlock_irqrestore(&ep->lock, flags);
  1918. }
  1919. /**
  1920. * pxa27x_change_configuration - Handle SET_CONF usb request notification
  1921. * @udc: udc device
  1922. * @config: usb configuration
  1923. *
  1924. * Post the request to upper level.
  1925. * Don't use any pxa specific harware configuration capabilities
  1926. */
  1927. static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
  1928. {
  1929. struct usb_ctrlrequest req ;
  1930. dev_dbg(udc->dev, "config=%d\n", config);
  1931. udc->config = config;
  1932. udc->last_interface = 0;
  1933. udc->last_alternate = 0;
  1934. req.bRequestType = 0;
  1935. req.bRequest = USB_REQ_SET_CONFIGURATION;
  1936. req.wValue = config;
  1937. req.wIndex = 0;
  1938. req.wLength = 0;
  1939. set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
  1940. udc->driver->setup(&udc->gadget, &req);
  1941. ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
  1942. }
  1943. /**
  1944. * pxa27x_change_interface - Handle SET_INTERF usb request notification
  1945. * @udc: udc device
  1946. * @iface: interface number
  1947. * @alt: alternate setting number
  1948. *
  1949. * Post the request to upper level.
  1950. * Don't use any pxa specific harware configuration capabilities
  1951. */
  1952. static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
  1953. {
  1954. struct usb_ctrlrequest req;
  1955. dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
  1956. udc->last_interface = iface;
  1957. udc->last_alternate = alt;
  1958. req.bRequestType = USB_RECIP_INTERFACE;
  1959. req.bRequest = USB_REQ_SET_INTERFACE;
  1960. req.wValue = alt;
  1961. req.wIndex = iface;
  1962. req.wLength = 0;
  1963. set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
  1964. udc->driver->setup(&udc->gadget, &req);
  1965. ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
  1966. }
  1967. /*
  1968. * irq_handle_data - Handle data transfer
  1969. * @irq: irq IRQ number
  1970. * @udc: dev pxa_udc device structure
  1971. *
  1972. * Called from irq handler, transferts data to or from endpoint to queue
  1973. */
  1974. static void irq_handle_data(int irq, struct pxa_udc *udc)
  1975. {
  1976. int i;
  1977. struct pxa_ep *ep;
  1978. u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
  1979. u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
  1980. if (udcisr0 & UDCISR_INT_MASK) {
  1981. udc->pxa_ep[0].stats.irqs++;
  1982. udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
  1983. handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
  1984. !!(udcisr0 & UDCICR_PKTCOMPL));
  1985. }
  1986. udcisr0 >>= 2;
  1987. for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
  1988. if (!(udcisr0 & UDCISR_INT_MASK))
  1989. continue;
  1990. udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
  1991. WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
  1992. if (i < ARRAY_SIZE(udc->pxa_ep)) {
  1993. ep = &udc->pxa_ep[i];
  1994. ep->stats.irqs++;
  1995. handle_ep(ep);
  1996. }
  1997. }
  1998. for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
  1999. udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
  2000. if (!(udcisr1 & UDCISR_INT_MASK))
  2001. continue;
  2002. WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
  2003. if (i < ARRAY_SIZE(udc->pxa_ep)) {
  2004. ep = &udc->pxa_ep[i];
  2005. ep->stats.irqs++;
  2006. handle_ep(ep);
  2007. }
  2008. }
  2009. }
  2010. /**
  2011. * irq_udc_suspend - Handle IRQ "UDC Suspend"
  2012. * @udc: udc device
  2013. */
  2014. static void irq_udc_suspend(struct pxa_udc *udc)
  2015. {
  2016. udc_writel(udc, UDCISR1, UDCISR1_IRSU);
  2017. udc->stats.irqs_suspend++;
  2018. if (udc->gadget.speed != USB_SPEED_UNKNOWN
  2019. && udc->driver && udc->driver->suspend)
  2020. udc->driver->suspend(&udc->gadget);
  2021. ep0_idle(udc);
  2022. }
  2023. /**
  2024. * irq_udc_resume - Handle IRQ "UDC Resume"
  2025. * @udc: udc device
  2026. */
  2027. static void irq_udc_resume(struct pxa_udc *udc)
  2028. {
  2029. udc_writel(udc, UDCISR1, UDCISR1_IRRU);
  2030. udc->stats.irqs_resume++;
  2031. if (udc->gadget.speed != USB_SPEED_UNKNOWN
  2032. && udc->driver && udc->driver->resume)
  2033. udc->driver->resume(&udc->gadget);
  2034. }
  2035. /**
  2036. * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
  2037. * @udc: udc device
  2038. */
  2039. static void irq_udc_reconfig(struct pxa_udc *udc)
  2040. {
  2041. unsigned config, interface, alternate, config_change;
  2042. u32 udccr = udc_readl(udc, UDCCR);
  2043. udc_writel(udc, UDCISR1, UDCISR1_IRCC);
  2044. udc->stats.irqs_reconfig++;
  2045. config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
  2046. config_change = (config != udc->config);
  2047. pxa27x_change_configuration(udc, config);
  2048. interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
  2049. alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
  2050. pxa27x_change_interface(udc, interface, alternate);
  2051. if (config_change)
  2052. update_pxa_ep_matches(udc);
  2053. udc_set_mask_UDCCR(udc, UDCCR_SMAC);
  2054. }
  2055. /**
  2056. * irq_udc_reset - Handle IRQ "UDC Reset"
  2057. * @udc: udc device
  2058. */
  2059. static void irq_udc_reset(struct pxa_udc *udc)
  2060. {
  2061. u32 udccr = udc_readl(udc, UDCCR);
  2062. struct pxa_ep *ep = &udc->pxa_ep[0];
  2063. dev_info(udc->dev, "USB reset\n");
  2064. udc_writel(udc, UDCISR1, UDCISR1_IRRS);
  2065. udc->stats.irqs_reset++;
  2066. if ((udccr & UDCCR_UDA) == 0) {
  2067. dev_dbg(udc->dev, "USB reset start\n");
  2068. stop_activity(udc, udc->driver);
  2069. }
  2070. udc->gadget.speed = USB_SPEED_FULL;
  2071. memset(&udc->stats, 0, sizeof udc->stats);
  2072. nuke(ep, -EPROTO);
  2073. ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
  2074. ep0_idle(udc);
  2075. }
  2076. /**
  2077. * pxa_udc_irq - Main irq handler
  2078. * @irq: irq number
  2079. * @_dev: udc device
  2080. *
  2081. * Handles all udc interrupts
  2082. */
  2083. static irqreturn_t pxa_udc_irq(int irq, void *_dev)
  2084. {
  2085. struct pxa_udc *udc = _dev;
  2086. u32 udcisr0 = udc_readl(udc, UDCISR0);
  2087. u32 udcisr1 = udc_readl(udc, UDCISR1);
  2088. u32 udccr = udc_readl(udc, UDCCR);
  2089. u32 udcisr1_spec;
  2090. dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
  2091. "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
  2092. udcisr1_spec = udcisr1 & 0xf8000000;
  2093. if (unlikely(udcisr1_spec & UDCISR1_IRSU))
  2094. irq_udc_suspend(udc);
  2095. if (unlikely(udcisr1_spec & UDCISR1_IRRU))
  2096. irq_udc_resume(udc);
  2097. if (unlikely(udcisr1_spec & UDCISR1_IRCC))
  2098. irq_udc_reconfig(udc);
  2099. if (unlikely(udcisr1_spec & UDCISR1_IRRS))
  2100. irq_udc_reset(udc);
  2101. if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
  2102. irq_handle_data(irq, udc);
  2103. return IRQ_HANDLED;
  2104. }
  2105. static struct pxa_udc memory = {
  2106. .gadget = {
  2107. .ops = &pxa_udc_ops,
  2108. .ep0 = &memory.udc_usb_ep[0].usb_ep,
  2109. .name = driver_name,
  2110. .dev = {
  2111. .init_name = "gadget",
  2112. },
  2113. },
  2114. .udc_usb_ep = {
  2115. USB_EP_CTRL,
  2116. USB_EP_OUT_BULK(1),
  2117. USB_EP_IN_BULK(2),
  2118. USB_EP_IN_ISO(3),
  2119. USB_EP_OUT_ISO(4),
  2120. USB_EP_IN_INT(5),
  2121. },
  2122. .pxa_ep = {
  2123. PXA_EP_CTRL,
  2124. /* Endpoints for gadget zero */
  2125. PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
  2126. PXA_EP_IN_BULK(2, 2, 3, 0, 0),
  2127. /* Endpoints for ether gadget, file storage gadget */
  2128. PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
  2129. PXA_EP_IN_BULK(4, 2, 1, 0, 0),
  2130. PXA_EP_IN_ISO(5, 3, 1, 0, 0),
  2131. PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
  2132. PXA_EP_IN_INT(7, 5, 1, 0, 0),
  2133. /* Endpoints for RNDIS, serial */
  2134. PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
  2135. PXA_EP_IN_BULK(9, 2, 2, 0, 0),
  2136. PXA_EP_IN_INT(10, 5, 2, 0, 0),
  2137. /*
  2138. * All the following endpoints are only for completion. They
  2139. * won't never work, as multiple interfaces are really broken on
  2140. * the pxa.
  2141. */
  2142. PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
  2143. PXA_EP_IN_BULK(12, 2, 2, 1, 0),
  2144. /* Endpoint for CDC Ether */
  2145. PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
  2146. PXA_EP_IN_BULK(14, 2, 1, 1, 1),
  2147. }
  2148. };
  2149. /**
  2150. * pxa_udc_probe - probes the udc device
  2151. * @_dev: platform device
  2152. *
  2153. * Perform basic init : allocates udc clock, creates sysfs files, requests
  2154. * irq.
  2155. */
  2156. static int __init pxa_udc_probe(struct platform_device *pdev)
  2157. {
  2158. struct resource *regs;
  2159. struct pxa_udc *udc = &memory;
  2160. int retval = 0, gpio;
  2161. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  2162. if (!regs)
  2163. return -ENXIO;
  2164. udc->irq = platform_get_irq(pdev, 0);
  2165. if (udc->irq < 0)
  2166. return udc->irq;
  2167. udc->dev = &pdev->dev;
  2168. udc->mach = pdev->dev.platform_data;
  2169. udc->transceiver = otg_get_transceiver();
  2170. gpio = udc->mach->gpio_pullup;
  2171. if (gpio_is_valid(gpio)) {
  2172. retval = gpio_request(gpio, "USB D+ pullup");
  2173. if (retval == 0)
  2174. gpio_direction_output(gpio,
  2175. udc->mach->gpio_pullup_inverted);
  2176. }
  2177. if (retval) {
  2178. dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
  2179. gpio, retval);
  2180. return retval;
  2181. }
  2182. udc->clk = clk_get(&pdev->dev, NULL);
  2183. if (IS_ERR(udc->clk)) {
  2184. retval = PTR_ERR(udc->clk);
  2185. goto err_clk;
  2186. }
  2187. retval = -ENOMEM;
  2188. udc->regs = ioremap(regs->start, resource_size(regs));
  2189. if (!udc->regs) {
  2190. dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
  2191. goto err_map;
  2192. }
  2193. device_initialize(&udc->gadget.dev);
  2194. udc->gadget.dev.parent = &pdev->dev;
  2195. udc->gadget.dev.dma_mask = NULL;
  2196. udc->vbus_sensed = 0;
  2197. the_controller = udc;
  2198. platform_set_drvdata(pdev, udc);
  2199. udc_init_data(udc);
  2200. pxa_eps_setup(udc);
  2201. /* irq setup after old hardware state is cleaned up */
  2202. retval = request_irq(udc->irq, pxa_udc_irq,
  2203. IRQF_SHARED, driver_name, udc);
  2204. if (retval != 0) {
  2205. dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
  2206. driver_name, IRQ_USB, retval);
  2207. goto err_irq;
  2208. }
  2209. retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
  2210. if (retval)
  2211. goto err_add_udc;
  2212. pxa_init_debugfs(udc);
  2213. return 0;
  2214. err_add_udc:
  2215. free_irq(udc->irq, udc);
  2216. err_irq:
  2217. iounmap(udc->regs);
  2218. err_map:
  2219. clk_put(udc->clk);
  2220. udc->clk = NULL;
  2221. err_clk:
  2222. return retval;
  2223. }
  2224. /**
  2225. * pxa_udc_remove - removes the udc device driver
  2226. * @_dev: platform device
  2227. */
  2228. static int __exit pxa_udc_remove(struct platform_device *_dev)
  2229. {
  2230. struct pxa_udc *udc = platform_get_drvdata(_dev);
  2231. int gpio = udc->mach->gpio_pullup;
  2232. usb_del_gadget_udc(&udc->gadget);
  2233. usb_gadget_unregister_driver(udc->driver);
  2234. free_irq(udc->irq, udc);
  2235. pxa_cleanup_debugfs(udc);
  2236. if (gpio_is_valid(gpio))
  2237. gpio_free(gpio);
  2238. otg_put_transceiver(udc->transceiver);
  2239. udc->transceiver = NULL;
  2240. platform_set_drvdata(_dev, NULL);
  2241. the_controller = NULL;
  2242. clk_put(udc->clk);
  2243. iounmap(udc->regs);
  2244. return 0;
  2245. }
  2246. static void pxa_udc_shutdown(struct platform_device *_dev)
  2247. {
  2248. struct pxa_udc *udc = platform_get_drvdata(_dev);
  2249. if (udc_readl(udc, UDCCR) & UDCCR_UDE)
  2250. udc_disable(udc);
  2251. }
  2252. #ifdef CONFIG_PXA27x
  2253. extern void pxa27x_clear_otgph(void);
  2254. #else
  2255. #define pxa27x_clear_otgph() do {} while (0)
  2256. #endif
  2257. #ifdef CONFIG_PM
  2258. /**
  2259. * pxa_udc_suspend - Suspend udc device
  2260. * @_dev: platform device
  2261. * @state: suspend state
  2262. *
  2263. * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
  2264. * device.
  2265. */
  2266. static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
  2267. {
  2268. int i;
  2269. struct pxa_udc *udc = platform_get_drvdata(_dev);
  2270. struct pxa_ep *ep;
  2271. ep = &udc->pxa_ep[0];
  2272. udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
  2273. for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
  2274. ep = &udc->pxa_ep[i];
  2275. ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
  2276. ep->udccr_value = udc_ep_readl(ep, UDCCR);
  2277. ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
  2278. ep->udccsr_value, ep->udccr_value);
  2279. }
  2280. udc_disable(udc);
  2281. udc->pullup_resume = udc->pullup_on;
  2282. dplus_pullup(udc, 0);
  2283. return 0;
  2284. }
  2285. /**
  2286. * pxa_udc_resume - Resume udc device
  2287. * @_dev: platform device
  2288. *
  2289. * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
  2290. * device.
  2291. */
  2292. static int pxa_udc_resume(struct platform_device *_dev)
  2293. {
  2294. int i;
  2295. struct pxa_udc *udc = platform_get_drvdata(_dev);
  2296. struct pxa_ep *ep;
  2297. ep = &udc->pxa_ep[0];
  2298. udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
  2299. for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
  2300. ep = &udc->pxa_ep[i];
  2301. udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
  2302. udc_ep_writel(ep, UDCCR, ep->udccr_value);
  2303. ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
  2304. ep->udccsr_value, ep->udccr_value);
  2305. }
  2306. dplus_pullup(udc, udc->pullup_resume);
  2307. if (should_enable_udc(udc))
  2308. udc_enable(udc);
  2309. /*
  2310. * We do not handle OTG yet.
  2311. *
  2312. * OTGPH bit is set when sleep mode is entered.
  2313. * it indicates that OTG pad is retaining its state.
  2314. * Upon exit from sleep mode and before clearing OTGPH,
  2315. * Software must configure the USB OTG pad, UDC, and UHC
  2316. * to the state they were in before entering sleep mode.
  2317. */
  2318. pxa27x_clear_otgph();
  2319. return 0;
  2320. }
  2321. #endif
  2322. /* work with hotplug and coldplug */
  2323. MODULE_ALIAS("platform:pxa27x-udc");
  2324. static struct platform_driver udc_driver = {
  2325. .driver = {
  2326. .name = "pxa27x-udc",
  2327. .owner = THIS_MODULE,
  2328. },
  2329. .remove = __exit_p(pxa_udc_remove),
  2330. .shutdown = pxa_udc_shutdown,
  2331. #ifdef CONFIG_PM
  2332. .suspend = pxa_udc_suspend,
  2333. .resume = pxa_udc_resume
  2334. #endif
  2335. };
  2336. static int __init udc_init(void)
  2337. {
  2338. if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
  2339. return -ENODEV;
  2340. printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
  2341. return platform_driver_probe(&udc_driver, pxa_udc_probe);
  2342. }
  2343. module_init(udc_init);
  2344. static void __exit udc_exit(void)
  2345. {
  2346. platform_driver_unregister(&udc_driver);
  2347. }
  2348. module_exit(udc_exit);
  2349. MODULE_DESCRIPTION(DRIVER_DESC);
  2350. MODULE_AUTHOR("Robert Jarzmik");
  2351. MODULE_LICENSE("GPL");