mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/time.h>
  33. #include <linux/videodev2.h>
  34. #include <media/soc_camera.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-dev.h>
  37. #include <media/videobuf-dma-contig.h>
  38. #include <media/soc_mediabus.h>
  39. #include <asm/dma.h>
  40. #include <asm/fiq.h>
  41. #include <mach/dma-mx1-mx2.h>
  42. #include <mach/hardware.h>
  43. #include <mach/mx1_camera.h>
  44. /*
  45. * CSI registers
  46. */
  47. #define CSICR1 0x00 /* CSI Control Register 1 */
  48. #define CSISR 0x08 /* CSI Status Register */
  49. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  50. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  51. #define CSICR1_SOF_POL (1 << 17)
  52. #define CSICR1_SOF_INTEN (1 << 16)
  53. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  54. #define CSICR1_MCLKEN (1 << 9)
  55. #define CSICR1_FCC (1 << 8)
  56. #define CSICR1_BIG_ENDIAN (1 << 7)
  57. #define CSICR1_CLR_RXFIFO (1 << 5)
  58. #define CSICR1_GCLK_MODE (1 << 4)
  59. #define CSICR1_DATA_POL (1 << 2)
  60. #define CSICR1_REDGE (1 << 1)
  61. #define CSICR1_EN (1 << 0)
  62. #define CSISR_SFF_OR_INT (1 << 25)
  63. #define CSISR_RFF_OR_INT (1 << 24)
  64. #define CSISR_STATFF_INT (1 << 21)
  65. #define CSISR_RXFF_INT (1 << 18)
  66. #define CSISR_SOF_INT (1 << 16)
  67. #define CSISR_DRDY (1 << 0)
  68. #define DRIVER_VERSION "0.0.2"
  69. #define DRIVER_NAME "mx1-camera"
  70. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  71. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  72. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  73. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  74. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  75. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  76. SOCAM_DATAWIDTH_8)
  77. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  78. /*
  79. * Structures
  80. */
  81. /* buffer for one video frame */
  82. struct mx1_buffer {
  83. /* common v4l buffer stuff -- must be first */
  84. struct videobuf_buffer vb;
  85. enum v4l2_mbus_pixelcode code;
  86. int inwork;
  87. };
  88. /*
  89. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  90. * Interface. If anyone ever builds hardware to enable more than
  91. * one camera, they will have to modify this driver too
  92. */
  93. struct mx1_camera_dev {
  94. struct soc_camera_host soc_host;
  95. struct soc_camera_device *icd;
  96. struct mx1_camera_pdata *pdata;
  97. struct mx1_buffer *active;
  98. struct resource *res;
  99. struct clk *clk;
  100. struct list_head capture;
  101. void __iomem *base;
  102. int dma_chan;
  103. unsigned int irq;
  104. unsigned long mclk;
  105. spinlock_t lock;
  106. };
  107. /*
  108. * Videobuf operations
  109. */
  110. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  111. unsigned int *size)
  112. {
  113. struct soc_camera_device *icd = vq->priv_data;
  114. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  115. icd->current_fmt->host_fmt);
  116. if (bytes_per_line < 0)
  117. return bytes_per_line;
  118. *size = bytes_per_line * icd->user_height;
  119. if (!*count)
  120. *count = 32;
  121. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  122. *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
  123. dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size);
  124. return 0;
  125. }
  126. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  127. {
  128. struct soc_camera_device *icd = vq->priv_data;
  129. struct videobuf_buffer *vb = &buf->vb;
  130. BUG_ON(in_interrupt());
  131. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  132. vb, vb->baddr, vb->bsize);
  133. /*
  134. * This waits until this buffer is out of danger, i.e., until it is no
  135. * longer in STATE_QUEUED or STATE_ACTIVE
  136. */
  137. videobuf_waiton(vq, vb, 0, 0);
  138. videobuf_dma_contig_free(vq, vb);
  139. vb->state = VIDEOBUF_NEEDS_INIT;
  140. }
  141. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  142. struct videobuf_buffer *vb, enum v4l2_field field)
  143. {
  144. struct soc_camera_device *icd = vq->priv_data;
  145. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  146. int ret;
  147. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  148. icd->current_fmt->host_fmt);
  149. if (bytes_per_line < 0)
  150. return bytes_per_line;
  151. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  152. vb, vb->baddr, vb->bsize);
  153. /* Added list head initialization on alloc */
  154. WARN_ON(!list_empty(&vb->queue));
  155. BUG_ON(NULL == icd->current_fmt);
  156. /*
  157. * I think, in buf_prepare you only have to protect global data,
  158. * the actual buffer is yours
  159. */
  160. buf->inwork = 1;
  161. if (buf->code != icd->current_fmt->code ||
  162. vb->width != icd->user_width ||
  163. vb->height != icd->user_height ||
  164. vb->field != field) {
  165. buf->code = icd->current_fmt->code;
  166. vb->width = icd->user_width;
  167. vb->height = icd->user_height;
  168. vb->field = field;
  169. vb->state = VIDEOBUF_NEEDS_INIT;
  170. }
  171. vb->size = bytes_per_line * vb->height;
  172. if (0 != vb->baddr && vb->bsize < vb->size) {
  173. ret = -EINVAL;
  174. goto out;
  175. }
  176. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  177. ret = videobuf_iolock(vq, vb, NULL);
  178. if (ret)
  179. goto fail;
  180. vb->state = VIDEOBUF_PREPARED;
  181. }
  182. buf->inwork = 0;
  183. return 0;
  184. fail:
  185. free_buffer(vq, buf);
  186. out:
  187. buf->inwork = 0;
  188. return ret;
  189. }
  190. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  191. {
  192. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  193. struct device *dev = pcdev->icd->parent;
  194. int ret;
  195. if (unlikely(!pcdev->active)) {
  196. dev_err(dev, "DMA End IRQ with no active buffer\n");
  197. return -EFAULT;
  198. }
  199. /* setup sg list for future DMA */
  200. ret = imx_dma_setup_single(pcdev->dma_chan,
  201. videobuf_to_dma_contig(vbuf),
  202. vbuf->size, pcdev->res->start +
  203. CSIRXR, DMA_MODE_READ);
  204. if (unlikely(ret))
  205. dev_err(dev, "Failed to setup DMA sg list\n");
  206. return ret;
  207. }
  208. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  209. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  210. struct videobuf_buffer *vb)
  211. {
  212. struct soc_camera_device *icd = vq->priv_data;
  213. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  214. struct mx1_camera_dev *pcdev = ici->priv;
  215. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  216. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  217. vb, vb->baddr, vb->bsize);
  218. list_add_tail(&vb->queue, &pcdev->capture);
  219. vb->state = VIDEOBUF_ACTIVE;
  220. if (!pcdev->active) {
  221. pcdev->active = buf;
  222. /* setup sg list for future DMA */
  223. if (!mx1_camera_setup_dma(pcdev)) {
  224. unsigned int temp;
  225. /* enable SOF irq */
  226. temp = __raw_readl(pcdev->base + CSICR1) |
  227. CSICR1_SOF_INTEN;
  228. __raw_writel(temp, pcdev->base + CSICR1);
  229. }
  230. }
  231. }
  232. static void mx1_videobuf_release(struct videobuf_queue *vq,
  233. struct videobuf_buffer *vb)
  234. {
  235. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  236. #ifdef DEBUG
  237. struct soc_camera_device *icd = vq->priv_data;
  238. struct device *dev = icd->parent;
  239. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  240. vb, vb->baddr, vb->bsize);
  241. switch (vb->state) {
  242. case VIDEOBUF_ACTIVE:
  243. dev_dbg(dev, "%s (active)\n", __func__);
  244. break;
  245. case VIDEOBUF_QUEUED:
  246. dev_dbg(dev, "%s (queued)\n", __func__);
  247. break;
  248. case VIDEOBUF_PREPARED:
  249. dev_dbg(dev, "%s (prepared)\n", __func__);
  250. break;
  251. default:
  252. dev_dbg(dev, "%s (unknown)\n", __func__);
  253. break;
  254. }
  255. #endif
  256. free_buffer(vq, buf);
  257. }
  258. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  259. struct videobuf_buffer *vb,
  260. struct mx1_buffer *buf)
  261. {
  262. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  263. list_del_init(&vb->queue);
  264. vb->state = VIDEOBUF_DONE;
  265. do_gettimeofday(&vb->ts);
  266. vb->field_count++;
  267. wake_up(&vb->done);
  268. if (list_empty(&pcdev->capture)) {
  269. pcdev->active = NULL;
  270. return;
  271. }
  272. pcdev->active = list_entry(pcdev->capture.next,
  273. struct mx1_buffer, vb.queue);
  274. /* setup sg list for future DMA */
  275. if (likely(!mx1_camera_setup_dma(pcdev))) {
  276. unsigned int temp;
  277. /* enable SOF irq */
  278. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  279. __raw_writel(temp, pcdev->base + CSICR1);
  280. }
  281. }
  282. static void mx1_camera_dma_irq(int channel, void *data)
  283. {
  284. struct mx1_camera_dev *pcdev = data;
  285. struct device *dev = pcdev->icd->parent;
  286. struct mx1_buffer *buf;
  287. struct videobuf_buffer *vb;
  288. unsigned long flags;
  289. spin_lock_irqsave(&pcdev->lock, flags);
  290. imx_dma_disable(channel);
  291. if (unlikely(!pcdev->active)) {
  292. dev_err(dev, "DMA End IRQ with no active buffer\n");
  293. goto out;
  294. }
  295. vb = &pcdev->active->vb;
  296. buf = container_of(vb, struct mx1_buffer, vb);
  297. WARN_ON(buf->inwork || list_empty(&vb->queue));
  298. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  299. vb, vb->baddr, vb->bsize);
  300. mx1_camera_wakeup(pcdev, vb, buf);
  301. out:
  302. spin_unlock_irqrestore(&pcdev->lock, flags);
  303. }
  304. static struct videobuf_queue_ops mx1_videobuf_ops = {
  305. .buf_setup = mx1_videobuf_setup,
  306. .buf_prepare = mx1_videobuf_prepare,
  307. .buf_queue = mx1_videobuf_queue,
  308. .buf_release = mx1_videobuf_release,
  309. };
  310. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  311. struct soc_camera_device *icd)
  312. {
  313. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  314. struct mx1_camera_dev *pcdev = ici->priv;
  315. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent,
  316. &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  317. V4L2_FIELD_NONE,
  318. sizeof(struct mx1_buffer), icd, &icd->video_lock);
  319. }
  320. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  321. {
  322. unsigned int mclk = pcdev->mclk;
  323. unsigned long div;
  324. unsigned long lcdclk;
  325. lcdclk = clk_get_rate(pcdev->clk);
  326. /*
  327. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  328. * they get a nice Oops
  329. */
  330. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  331. dev_dbg(pcdev->icd->parent,
  332. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  333. lcdclk / 1000, mclk / 1000, div);
  334. return div;
  335. }
  336. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  337. {
  338. unsigned int csicr1 = CSICR1_EN;
  339. dev_dbg(pcdev->icd->parent, "Activate device\n");
  340. clk_enable(pcdev->clk);
  341. /* enable CSI before doing anything else */
  342. __raw_writel(csicr1, pcdev->base + CSICR1);
  343. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  344. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  345. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  346. __raw_writel(csicr1, pcdev->base + CSICR1);
  347. }
  348. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  349. {
  350. dev_dbg(pcdev->icd->parent, "Deactivate device\n");
  351. /* Disable all CSI interface */
  352. __raw_writel(0x00, pcdev->base + CSICR1);
  353. clk_disable(pcdev->clk);
  354. }
  355. /*
  356. * The following two functions absolutely depend on the fact, that
  357. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  358. */
  359. static int mx1_camera_add_device(struct soc_camera_device *icd)
  360. {
  361. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  362. struct mx1_camera_dev *pcdev = ici->priv;
  363. if (pcdev->icd)
  364. return -EBUSY;
  365. dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
  366. icd->devnum);
  367. mx1_camera_activate(pcdev);
  368. pcdev->icd = icd;
  369. return 0;
  370. }
  371. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  372. {
  373. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  374. struct mx1_camera_dev *pcdev = ici->priv;
  375. unsigned int csicr1;
  376. BUG_ON(icd != pcdev->icd);
  377. /* disable interrupts */
  378. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  379. __raw_writel(csicr1, pcdev->base + CSICR1);
  380. /* Stop DMA engine */
  381. imx_dma_disable(pcdev->dma_chan);
  382. dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n",
  383. icd->devnum);
  384. mx1_camera_deactivate(pcdev);
  385. pcdev->icd = NULL;
  386. }
  387. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  388. struct v4l2_crop *a)
  389. {
  390. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  391. return v4l2_subdev_call(sd, video, s_crop, a);
  392. }
  393. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  394. {
  395. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  396. struct mx1_camera_dev *pcdev = ici->priv;
  397. unsigned long camera_flags, common_flags;
  398. unsigned int csicr1;
  399. int ret;
  400. camera_flags = icd->ops->query_bus_param(icd);
  401. /* MX1 supports only 8bit buswidth */
  402. common_flags = soc_camera_bus_param_compatible(camera_flags,
  403. CSI_BUS_FLAGS);
  404. if (!common_flags)
  405. return -EINVAL;
  406. /* Make choises, based on platform choice */
  407. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  408. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  409. if (!pcdev->pdata ||
  410. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  411. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  412. else
  413. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  414. }
  415. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  416. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  417. if (!pcdev->pdata ||
  418. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  419. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  420. else
  421. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  422. }
  423. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  424. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  425. if (!pcdev->pdata ||
  426. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  427. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  428. else
  429. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  430. }
  431. ret = icd->ops->set_bus_param(icd, common_flags);
  432. if (ret < 0)
  433. return ret;
  434. csicr1 = __raw_readl(pcdev->base + CSICR1);
  435. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  436. csicr1 |= CSICR1_REDGE;
  437. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  438. csicr1 |= CSICR1_SOF_POL;
  439. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  440. csicr1 |= CSICR1_DATA_POL;
  441. __raw_writel(csicr1, pcdev->base + CSICR1);
  442. return 0;
  443. }
  444. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  445. struct v4l2_format *f)
  446. {
  447. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  448. const struct soc_camera_format_xlate *xlate;
  449. struct v4l2_pix_format *pix = &f->fmt.pix;
  450. struct v4l2_mbus_framefmt mf;
  451. int ret, buswidth;
  452. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  453. if (!xlate) {
  454. dev_warn(icd->parent, "Format %x not found\n",
  455. pix->pixelformat);
  456. return -EINVAL;
  457. }
  458. buswidth = xlate->host_fmt->bits_per_sample;
  459. if (buswidth > 8) {
  460. dev_warn(icd->parent,
  461. "bits-per-sample %d for format %x unsupported\n",
  462. buswidth, pix->pixelformat);
  463. return -EINVAL;
  464. }
  465. mf.width = pix->width;
  466. mf.height = pix->height;
  467. mf.field = pix->field;
  468. mf.colorspace = pix->colorspace;
  469. mf.code = xlate->code;
  470. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  471. if (ret < 0)
  472. return ret;
  473. if (mf.code != xlate->code)
  474. return -EINVAL;
  475. pix->width = mf.width;
  476. pix->height = mf.height;
  477. pix->field = mf.field;
  478. pix->colorspace = mf.colorspace;
  479. icd->current_fmt = xlate;
  480. return ret;
  481. }
  482. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  483. struct v4l2_format *f)
  484. {
  485. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  486. const struct soc_camera_format_xlate *xlate;
  487. struct v4l2_pix_format *pix = &f->fmt.pix;
  488. struct v4l2_mbus_framefmt mf;
  489. int ret;
  490. /* TODO: limit to mx1 hardware capabilities */
  491. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  492. if (!xlate) {
  493. dev_warn(icd->parent, "Format %x not found\n",
  494. pix->pixelformat);
  495. return -EINVAL;
  496. }
  497. mf.width = pix->width;
  498. mf.height = pix->height;
  499. mf.field = pix->field;
  500. mf.colorspace = pix->colorspace;
  501. mf.code = xlate->code;
  502. /* limit to sensor capabilities */
  503. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  504. if (ret < 0)
  505. return ret;
  506. pix->width = mf.width;
  507. pix->height = mf.height;
  508. pix->field = mf.field;
  509. pix->colorspace = mf.colorspace;
  510. return 0;
  511. }
  512. static int mx1_camera_reqbufs(struct soc_camera_device *icd,
  513. struct v4l2_requestbuffers *p)
  514. {
  515. int i;
  516. /*
  517. * This is for locking debugging only. I removed spinlocks and now I
  518. * check whether .prepare is ever called on a linked buffer, or whether
  519. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  520. * it hadn't triggered
  521. */
  522. for (i = 0; i < p->count; i++) {
  523. struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
  524. struct mx1_buffer, vb);
  525. buf->inwork = 0;
  526. INIT_LIST_HEAD(&buf->vb.queue);
  527. }
  528. return 0;
  529. }
  530. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  531. {
  532. struct soc_camera_device *icd = file->private_data;
  533. struct mx1_buffer *buf;
  534. buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
  535. vb.stream);
  536. poll_wait(file, &buf->vb.done, pt);
  537. if (buf->vb.state == VIDEOBUF_DONE ||
  538. buf->vb.state == VIDEOBUF_ERROR)
  539. return POLLIN | POLLRDNORM;
  540. return 0;
  541. }
  542. static int mx1_camera_querycap(struct soc_camera_host *ici,
  543. struct v4l2_capability *cap)
  544. {
  545. /* cap->name is set by the friendly caller:-> */
  546. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  547. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  548. return 0;
  549. }
  550. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  551. .owner = THIS_MODULE,
  552. .add = mx1_camera_add_device,
  553. .remove = mx1_camera_remove_device,
  554. .set_bus_param = mx1_camera_set_bus_param,
  555. .set_crop = mx1_camera_set_crop,
  556. .set_fmt = mx1_camera_set_fmt,
  557. .try_fmt = mx1_camera_try_fmt,
  558. .init_videobuf = mx1_camera_init_videobuf,
  559. .reqbufs = mx1_camera_reqbufs,
  560. .poll = mx1_camera_poll,
  561. .querycap = mx1_camera_querycap,
  562. };
  563. static struct fiq_handler fh = {
  564. .name = "csi_sof"
  565. };
  566. static int __init mx1_camera_probe(struct platform_device *pdev)
  567. {
  568. struct mx1_camera_dev *pcdev;
  569. struct resource *res;
  570. struct pt_regs regs;
  571. struct clk *clk;
  572. void __iomem *base;
  573. unsigned int irq;
  574. int err = 0;
  575. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  576. irq = platform_get_irq(pdev, 0);
  577. if (!res || (int)irq <= 0) {
  578. err = -ENODEV;
  579. goto exit;
  580. }
  581. clk = clk_get(&pdev->dev, "csi_clk");
  582. if (IS_ERR(clk)) {
  583. err = PTR_ERR(clk);
  584. goto exit;
  585. }
  586. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  587. if (!pcdev) {
  588. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  589. err = -ENOMEM;
  590. goto exit_put_clk;
  591. }
  592. pcdev->res = res;
  593. pcdev->clk = clk;
  594. pcdev->pdata = pdev->dev.platform_data;
  595. if (pcdev->pdata)
  596. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  597. if (!pcdev->mclk) {
  598. dev_warn(&pdev->dev,
  599. "mclk_10khz == 0! Please, fix your platform data. "
  600. "Using default 20MHz\n");
  601. pcdev->mclk = 20000000;
  602. }
  603. INIT_LIST_HEAD(&pcdev->capture);
  604. spin_lock_init(&pcdev->lock);
  605. /*
  606. * Request the regions.
  607. */
  608. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  609. err = -EBUSY;
  610. goto exit_kfree;
  611. }
  612. base = ioremap(res->start, resource_size(res));
  613. if (!base) {
  614. err = -ENOMEM;
  615. goto exit_release;
  616. }
  617. pcdev->irq = irq;
  618. pcdev->base = base;
  619. /* request dma */
  620. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  621. if (pcdev->dma_chan < 0) {
  622. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  623. err = -EBUSY;
  624. goto exit_iounmap;
  625. }
  626. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  627. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  628. pcdev);
  629. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  630. IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
  631. /* burst length : 16 words = 64 bytes */
  632. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  633. /* request irq */
  634. err = claim_fiq(&fh);
  635. if (err) {
  636. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  637. goto exit_free_dma;
  638. }
  639. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  640. &mx1_camera_sof_fiq_start);
  641. regs.ARM_r8 = (long)MX1_DMA_DIMR;
  642. regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
  643. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  644. regs.ARM_fp = (long)pcdev->base + CSISR;
  645. regs.ARM_sp = 1 << pcdev->dma_chan;
  646. set_fiq_regs(&regs);
  647. mxc_set_irq_fiq(irq, 1);
  648. enable_fiq(irq);
  649. pcdev->soc_host.drv_name = DRIVER_NAME;
  650. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  651. pcdev->soc_host.priv = pcdev;
  652. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  653. pcdev->soc_host.nr = pdev->id;
  654. err = soc_camera_host_register(&pcdev->soc_host);
  655. if (err)
  656. goto exit_free_irq;
  657. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  658. return 0;
  659. exit_free_irq:
  660. disable_fiq(irq);
  661. mxc_set_irq_fiq(irq, 0);
  662. release_fiq(&fh);
  663. exit_free_dma:
  664. imx_dma_free(pcdev->dma_chan);
  665. exit_iounmap:
  666. iounmap(base);
  667. exit_release:
  668. release_mem_region(res->start, resource_size(res));
  669. exit_kfree:
  670. kfree(pcdev);
  671. exit_put_clk:
  672. clk_put(clk);
  673. exit:
  674. return err;
  675. }
  676. static int __exit mx1_camera_remove(struct platform_device *pdev)
  677. {
  678. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  679. struct mx1_camera_dev *pcdev = container_of(soc_host,
  680. struct mx1_camera_dev, soc_host);
  681. struct resource *res;
  682. imx_dma_free(pcdev->dma_chan);
  683. disable_fiq(pcdev->irq);
  684. mxc_set_irq_fiq(pcdev->irq, 0);
  685. release_fiq(&fh);
  686. clk_put(pcdev->clk);
  687. soc_camera_host_unregister(soc_host);
  688. iounmap(pcdev->base);
  689. res = pcdev->res;
  690. release_mem_region(res->start, resource_size(res));
  691. kfree(pcdev);
  692. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  693. return 0;
  694. }
  695. static struct platform_driver mx1_camera_driver = {
  696. .driver = {
  697. .name = DRIVER_NAME,
  698. },
  699. .remove = __exit_p(mx1_camera_remove),
  700. };
  701. static int __init mx1_camera_init(void)
  702. {
  703. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  704. }
  705. static void __exit mx1_camera_exit(void)
  706. {
  707. return platform_driver_unregister(&mx1_camera_driver);
  708. }
  709. module_init(mx1_camera_init);
  710. module_exit(mx1_camera_exit);
  711. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  712. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  713. MODULE_LICENSE("GPL v2");
  714. MODULE_VERSION(DRIVER_VERSION);
  715. MODULE_ALIAS("platform:" DRIVER_NAME);