mt9m111.c 29 KB

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  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <media/v4l2-common.h>
  17. #include <media/v4l2-chip-ident.h>
  18. #include <media/soc_camera.h>
  19. /*
  20. * MT9M111, MT9M112 and MT9M131:
  21. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  22. * The platform has to define i2c_board_info and call i2c_register_board_info()
  23. */
  24. /*
  25. * Sensor core register addresses (0x000..0x0ff)
  26. */
  27. #define MT9M111_CHIP_VERSION 0x000
  28. #define MT9M111_ROW_START 0x001
  29. #define MT9M111_COLUMN_START 0x002
  30. #define MT9M111_WINDOW_HEIGHT 0x003
  31. #define MT9M111_WINDOW_WIDTH 0x004
  32. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  33. #define MT9M111_VERTICAL_BLANKING_B 0x006
  34. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  35. #define MT9M111_VERTICAL_BLANKING_A 0x008
  36. #define MT9M111_SHUTTER_WIDTH 0x009
  37. #define MT9M111_ROW_SPEED 0x00a
  38. #define MT9M111_EXTRA_DELAY 0x00b
  39. #define MT9M111_SHUTTER_DELAY 0x00c
  40. #define MT9M111_RESET 0x00d
  41. #define MT9M111_READ_MODE_B 0x020
  42. #define MT9M111_READ_MODE_A 0x021
  43. #define MT9M111_FLASH_CONTROL 0x023
  44. #define MT9M111_GREEN1_GAIN 0x02b
  45. #define MT9M111_BLUE_GAIN 0x02c
  46. #define MT9M111_RED_GAIN 0x02d
  47. #define MT9M111_GREEN2_GAIN 0x02e
  48. #define MT9M111_GLOBAL_GAIN 0x02f
  49. #define MT9M111_CONTEXT_CONTROL 0x0c8
  50. #define MT9M111_PAGE_MAP 0x0f0
  51. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  52. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  53. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  54. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  55. #define MT9M111_RESET_RESET_SOC (1 << 5)
  56. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  57. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  58. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  59. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  60. #define MT9M111_RESET_RESET_MODE (1 << 0)
  61. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  62. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  63. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  64. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  65. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  66. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  67. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  68. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  69. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  70. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  71. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  72. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  73. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  74. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  75. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  76. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  77. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  78. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  79. /*
  80. * Colorpipe register addresses (0x100..0x1ff)
  81. */
  82. #define MT9M111_OPER_MODE_CTRL 0x106
  83. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  84. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  85. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  86. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  87. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  88. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  89. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  90. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  91. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  92. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  93. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  94. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  95. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  96. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  97. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  98. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  99. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  100. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  101. #define MT9M111_OUTFMT_RGB (1 << 8)
  102. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  103. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  104. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  105. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  106. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  107. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  108. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  109. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  110. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  111. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  112. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  113. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  114. /*
  115. * Camera control register addresses (0x200..0x2ff not implemented)
  116. */
  117. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  118. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  119. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  120. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  121. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  122. (val), (mask))
  123. #define MT9M111_MIN_DARK_ROWS 8
  124. #define MT9M111_MIN_DARK_COLS 26
  125. #define MT9M111_MAX_HEIGHT 1024
  126. #define MT9M111_MAX_WIDTH 1280
  127. /* MT9M111 has only one fixed colorspace per pixelcode */
  128. struct mt9m111_datafmt {
  129. enum v4l2_mbus_pixelcode code;
  130. enum v4l2_colorspace colorspace;
  131. };
  132. /* Find a data format by a pixel code in an array */
  133. static const struct mt9m111_datafmt *mt9m111_find_datafmt(
  134. enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
  135. int n)
  136. {
  137. int i;
  138. for (i = 0; i < n; i++)
  139. if (fmt[i].code == code)
  140. return fmt + i;
  141. return NULL;
  142. }
  143. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  144. {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  145. {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  146. {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  147. {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  148. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  149. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  150. {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  151. {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  152. {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  153. {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  154. {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  155. {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  156. };
  157. enum mt9m111_context {
  158. HIGHPOWER = 0,
  159. LOWPOWER,
  160. };
  161. struct mt9m111 {
  162. struct v4l2_subdev subdev;
  163. int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
  164. * from v4l2-chip-ident.h */
  165. enum mt9m111_context context;
  166. struct v4l2_rect rect;
  167. struct mutex power_lock; /* lock to protect power_count */
  168. int power_count;
  169. const struct mt9m111_datafmt *fmt;
  170. unsigned int gain;
  171. unsigned char autoexposure;
  172. unsigned char datawidth;
  173. unsigned int powered:1;
  174. unsigned int hflip:1;
  175. unsigned int vflip:1;
  176. unsigned int autowhitebalance:1;
  177. };
  178. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  179. {
  180. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  181. }
  182. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  183. {
  184. int ret;
  185. u16 page;
  186. static int lastpage = -1; /* PageMap cache value */
  187. page = (reg >> 8);
  188. if (page == lastpage)
  189. return 0;
  190. if (page > 2)
  191. return -EINVAL;
  192. ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
  193. if (!ret)
  194. lastpage = page;
  195. return ret;
  196. }
  197. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  198. {
  199. int ret;
  200. ret = reg_page_map_set(client, reg);
  201. if (!ret)
  202. ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
  203. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  204. return ret;
  205. }
  206. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  207. const u16 data)
  208. {
  209. int ret;
  210. ret = reg_page_map_set(client, reg);
  211. if (!ret)
  212. ret = i2c_smbus_write_word_data(client, reg & 0xff,
  213. swab16(data));
  214. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  215. return ret;
  216. }
  217. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  218. const u16 data)
  219. {
  220. int ret;
  221. ret = mt9m111_reg_read(client, reg);
  222. if (ret >= 0)
  223. ret = mt9m111_reg_write(client, reg, ret | data);
  224. return ret;
  225. }
  226. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  227. const u16 data)
  228. {
  229. int ret;
  230. ret = mt9m111_reg_read(client, reg);
  231. if (ret >= 0)
  232. ret = mt9m111_reg_write(client, reg, ret & ~data);
  233. return ret;
  234. }
  235. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  236. const u16 data, const u16 mask)
  237. {
  238. int ret;
  239. ret = mt9m111_reg_read(client, reg);
  240. if (ret >= 0)
  241. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  242. return ret;
  243. }
  244. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  245. enum mt9m111_context ctxt)
  246. {
  247. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  248. int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
  249. | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
  250. | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
  251. | MT9M111_CTXT_CTRL_VBLANK_SEL_B
  252. | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
  253. int valA = MT9M111_CTXT_CTRL_RESTART;
  254. if (ctxt == HIGHPOWER)
  255. return reg_write(CONTEXT_CONTROL, valB);
  256. else
  257. return reg_write(CONTEXT_CONTROL, valA);
  258. }
  259. static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
  260. struct v4l2_rect *rect)
  261. {
  262. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  263. int ret, is_raw_format;
  264. int width = rect->width;
  265. int height = rect->height;
  266. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  267. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
  268. is_raw_format = 1;
  269. else
  270. is_raw_format = 0;
  271. ret = reg_write(COLUMN_START, rect->left);
  272. if (!ret)
  273. ret = reg_write(ROW_START, rect->top);
  274. if (is_raw_format) {
  275. if (!ret)
  276. ret = reg_write(WINDOW_WIDTH, width);
  277. if (!ret)
  278. ret = reg_write(WINDOW_HEIGHT, height);
  279. } else {
  280. if (!ret)
  281. ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
  282. if (!ret)
  283. ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
  284. if (!ret)
  285. ret = reg_write(REDUCER_XSIZE_B, width);
  286. if (!ret)
  287. ret = reg_write(REDUCER_YSIZE_B, height);
  288. if (!ret)
  289. ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
  290. if (!ret)
  291. ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
  292. if (!ret)
  293. ret = reg_write(REDUCER_XSIZE_A, width);
  294. if (!ret)
  295. ret = reg_write(REDUCER_YSIZE_A, height);
  296. }
  297. return ret;
  298. }
  299. static int mt9m111_enable(struct mt9m111 *mt9m111)
  300. {
  301. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  302. int ret;
  303. ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
  304. if (!ret)
  305. mt9m111->powered = 1;
  306. return ret;
  307. }
  308. static int mt9m111_reset(struct mt9m111 *mt9m111)
  309. {
  310. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  311. int ret;
  312. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  313. if (!ret)
  314. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  315. if (!ret)
  316. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  317. | MT9M111_RESET_RESET_SOC);
  318. return ret;
  319. }
  320. static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd)
  321. {
  322. struct soc_camera_link *icl = to_soc_camera_link(icd);
  323. unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |
  324. SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
  325. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
  326. return soc_camera_apply_sensor_flags(icl, flags);
  327. }
  328. static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f)
  329. {
  330. return 0;
  331. }
  332. static int mt9m111_make_rect(struct mt9m111 *mt9m111,
  333. struct v4l2_rect *rect)
  334. {
  335. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  336. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  337. /* Bayer format - even size lengths */
  338. rect->width = ALIGN(rect->width, 2);
  339. rect->height = ALIGN(rect->height, 2);
  340. /* Let the user play with the starting pixel */
  341. }
  342. /* FIXME: the datasheet doesn't specify minimum sizes */
  343. soc_camera_limit_side(&rect->left, &rect->width,
  344. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  345. soc_camera_limit_side(&rect->top, &rect->height,
  346. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  347. return mt9m111_setup_rect(mt9m111, rect);
  348. }
  349. static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  350. {
  351. struct v4l2_rect rect = a->c;
  352. struct i2c_client *client = v4l2_get_subdevdata(sd);
  353. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  354. int ret;
  355. dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
  356. __func__, rect.left, rect.top, rect.width, rect.height);
  357. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  358. return -EINVAL;
  359. ret = mt9m111_make_rect(mt9m111, &rect);
  360. if (!ret)
  361. mt9m111->rect = rect;
  362. return ret;
  363. }
  364. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  365. {
  366. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  367. a->c = mt9m111->rect;
  368. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  369. return 0;
  370. }
  371. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  372. {
  373. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  374. return -EINVAL;
  375. a->bounds.left = MT9M111_MIN_DARK_COLS;
  376. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  377. a->bounds.width = MT9M111_MAX_WIDTH;
  378. a->bounds.height = MT9M111_MAX_HEIGHT;
  379. a->defrect = a->bounds;
  380. a->pixelaspect.numerator = 1;
  381. a->pixelaspect.denominator = 1;
  382. return 0;
  383. }
  384. static int mt9m111_g_fmt(struct v4l2_subdev *sd,
  385. struct v4l2_mbus_framefmt *mf)
  386. {
  387. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  388. mf->width = mt9m111->rect.width;
  389. mf->height = mt9m111->rect.height;
  390. mf->code = mt9m111->fmt->code;
  391. mf->colorspace = mt9m111->fmt->colorspace;
  392. mf->field = V4L2_FIELD_NONE;
  393. return 0;
  394. }
  395. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  396. enum v4l2_mbus_pixelcode code)
  397. {
  398. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  399. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  400. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  401. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  402. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  403. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  404. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  405. int ret;
  406. switch (code) {
  407. case V4L2_MBUS_FMT_SBGGR8_1X8:
  408. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  409. MT9M111_OUTFMT_RGB;
  410. break;
  411. case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
  412. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  413. break;
  414. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
  415. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  416. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  417. break;
  418. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
  419. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  420. break;
  421. case V4L2_MBUS_FMT_RGB565_2X8_LE:
  422. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  423. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  424. break;
  425. case V4L2_MBUS_FMT_RGB565_2X8_BE:
  426. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  427. break;
  428. case V4L2_MBUS_FMT_BGR565_2X8_BE:
  429. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  430. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  431. break;
  432. case V4L2_MBUS_FMT_BGR565_2X8_LE:
  433. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  434. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  435. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  436. break;
  437. case V4L2_MBUS_FMT_UYVY8_2X8:
  438. data_outfmt2 = 0;
  439. break;
  440. case V4L2_MBUS_FMT_VYUY8_2X8:
  441. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  442. break;
  443. case V4L2_MBUS_FMT_YUYV8_2X8:
  444. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  445. break;
  446. case V4L2_MBUS_FMT_YVYU8_2X8:
  447. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  448. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  449. break;
  450. default:
  451. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  452. return -EINVAL;
  453. }
  454. ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2,
  455. mask_outfmt2);
  456. if (!ret)
  457. ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2,
  458. mask_outfmt2);
  459. return ret;
  460. }
  461. static int mt9m111_s_fmt(struct v4l2_subdev *sd,
  462. struct v4l2_mbus_framefmt *mf)
  463. {
  464. struct i2c_client *client = v4l2_get_subdevdata(sd);
  465. const struct mt9m111_datafmt *fmt;
  466. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  467. struct v4l2_rect rect = {
  468. .left = mt9m111->rect.left,
  469. .top = mt9m111->rect.top,
  470. .width = mf->width,
  471. .height = mf->height,
  472. };
  473. int ret;
  474. fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
  475. ARRAY_SIZE(mt9m111_colour_fmts));
  476. if (!fmt)
  477. return -EINVAL;
  478. dev_dbg(&client->dev,
  479. "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
  480. mf->code, rect.left, rect.top, rect.width, rect.height);
  481. ret = mt9m111_make_rect(mt9m111, &rect);
  482. if (!ret)
  483. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  484. if (!ret) {
  485. mt9m111->rect = rect;
  486. mt9m111->fmt = fmt;
  487. mf->colorspace = fmt->colorspace;
  488. }
  489. return ret;
  490. }
  491. static int mt9m111_try_fmt(struct v4l2_subdev *sd,
  492. struct v4l2_mbus_framefmt *mf)
  493. {
  494. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  495. const struct mt9m111_datafmt *fmt;
  496. bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  497. mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  498. fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
  499. ARRAY_SIZE(mt9m111_colour_fmts));
  500. if (!fmt) {
  501. fmt = mt9m111->fmt;
  502. mf->code = fmt->code;
  503. }
  504. /*
  505. * With Bayer format enforce even side lengths, but let the user play
  506. * with the starting pixel
  507. */
  508. if (mf->height > MT9M111_MAX_HEIGHT)
  509. mf->height = MT9M111_MAX_HEIGHT;
  510. else if (mf->height < 2)
  511. mf->height = 2;
  512. else if (bayer)
  513. mf->height = ALIGN(mf->height, 2);
  514. if (mf->width > MT9M111_MAX_WIDTH)
  515. mf->width = MT9M111_MAX_WIDTH;
  516. else if (mf->width < 2)
  517. mf->width = 2;
  518. else if (bayer)
  519. mf->width = ALIGN(mf->width, 2);
  520. mf->colorspace = fmt->colorspace;
  521. return 0;
  522. }
  523. static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
  524. struct v4l2_dbg_chip_ident *id)
  525. {
  526. struct i2c_client *client = v4l2_get_subdevdata(sd);
  527. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  528. if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
  529. return -EINVAL;
  530. if (id->match.addr != client->addr)
  531. return -ENODEV;
  532. id->ident = mt9m111->model;
  533. id->revision = 0;
  534. return 0;
  535. }
  536. #ifdef CONFIG_VIDEO_ADV_DEBUG
  537. static int mt9m111_g_register(struct v4l2_subdev *sd,
  538. struct v4l2_dbg_register *reg)
  539. {
  540. struct i2c_client *client = v4l2_get_subdevdata(sd);
  541. int val;
  542. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  543. return -EINVAL;
  544. if (reg->match.addr != client->addr)
  545. return -ENODEV;
  546. val = mt9m111_reg_read(client, reg->reg);
  547. reg->size = 2;
  548. reg->val = (u64)val;
  549. if (reg->val > 0xffff)
  550. return -EIO;
  551. return 0;
  552. }
  553. static int mt9m111_s_register(struct v4l2_subdev *sd,
  554. struct v4l2_dbg_register *reg)
  555. {
  556. struct i2c_client *client = v4l2_get_subdevdata(sd);
  557. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  558. return -EINVAL;
  559. if (reg->match.addr != client->addr)
  560. return -ENODEV;
  561. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  562. return -EIO;
  563. return 0;
  564. }
  565. #endif
  566. static const struct v4l2_queryctrl mt9m111_controls[] = {
  567. {
  568. .id = V4L2_CID_VFLIP,
  569. .type = V4L2_CTRL_TYPE_BOOLEAN,
  570. .name = "Flip Verticaly",
  571. .minimum = 0,
  572. .maximum = 1,
  573. .step = 1,
  574. .default_value = 0,
  575. }, {
  576. .id = V4L2_CID_HFLIP,
  577. .type = V4L2_CTRL_TYPE_BOOLEAN,
  578. .name = "Flip Horizontaly",
  579. .minimum = 0,
  580. .maximum = 1,
  581. .step = 1,
  582. .default_value = 0,
  583. }, { /* gain = 1/32*val (=>gain=1 if val==32) */
  584. .id = V4L2_CID_GAIN,
  585. .type = V4L2_CTRL_TYPE_INTEGER,
  586. .name = "Gain",
  587. .minimum = 0,
  588. .maximum = 63 * 2 * 2,
  589. .step = 1,
  590. .default_value = 32,
  591. .flags = V4L2_CTRL_FLAG_SLIDER,
  592. }, {
  593. .id = V4L2_CID_EXPOSURE_AUTO,
  594. .type = V4L2_CTRL_TYPE_BOOLEAN,
  595. .name = "Auto Exposure",
  596. .minimum = 0,
  597. .maximum = 1,
  598. .step = 1,
  599. .default_value = 1,
  600. }
  601. };
  602. static struct soc_camera_ops mt9m111_ops = {
  603. .query_bus_param = mt9m111_query_bus_param,
  604. .set_bus_param = mt9m111_set_bus_param,
  605. .controls = mt9m111_controls,
  606. .num_controls = ARRAY_SIZE(mt9m111_controls),
  607. };
  608. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  609. {
  610. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  611. int ret;
  612. if (mt9m111->context == HIGHPOWER) {
  613. if (flip)
  614. ret = reg_set(READ_MODE_B, mask);
  615. else
  616. ret = reg_clear(READ_MODE_B, mask);
  617. } else {
  618. if (flip)
  619. ret = reg_set(READ_MODE_A, mask);
  620. else
  621. ret = reg_clear(READ_MODE_A, mask);
  622. }
  623. return ret;
  624. }
  625. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  626. {
  627. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  628. int data;
  629. data = reg_read(GLOBAL_GAIN);
  630. if (data >= 0)
  631. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  632. (1 << ((data >> 9) & 1));
  633. return data;
  634. }
  635. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  636. {
  637. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  638. u16 val;
  639. if (gain > 63 * 2 * 2)
  640. return -EINVAL;
  641. mt9m111->gain = gain;
  642. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  643. val = (1 << 10) | (1 << 9) | (gain / 4);
  644. else if ((gain >= 64) && (gain < 64 * 2))
  645. val = (1 << 9) | (gain / 2);
  646. else
  647. val = gain;
  648. return reg_write(GLOBAL_GAIN, val);
  649. }
  650. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
  651. {
  652. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  653. int ret;
  654. if (on)
  655. ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  656. else
  657. ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  658. if (!ret)
  659. mt9m111->autoexposure = on;
  660. return ret;
  661. }
  662. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  663. {
  664. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  665. int ret;
  666. if (on)
  667. ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  668. else
  669. ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  670. if (!ret)
  671. mt9m111->autowhitebalance = on;
  672. return ret;
  673. }
  674. static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  675. {
  676. struct i2c_client *client = v4l2_get_subdevdata(sd);
  677. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  678. int data;
  679. switch (ctrl->id) {
  680. case V4L2_CID_VFLIP:
  681. if (mt9m111->context == HIGHPOWER)
  682. data = reg_read(READ_MODE_B);
  683. else
  684. data = reg_read(READ_MODE_A);
  685. if (data < 0)
  686. return -EIO;
  687. ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS);
  688. break;
  689. case V4L2_CID_HFLIP:
  690. if (mt9m111->context == HIGHPOWER)
  691. data = reg_read(READ_MODE_B);
  692. else
  693. data = reg_read(READ_MODE_A);
  694. if (data < 0)
  695. return -EIO;
  696. ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS);
  697. break;
  698. case V4L2_CID_GAIN:
  699. data = mt9m111_get_global_gain(mt9m111);
  700. if (data < 0)
  701. return data;
  702. ctrl->value = data;
  703. break;
  704. case V4L2_CID_EXPOSURE_AUTO:
  705. ctrl->value = mt9m111->autoexposure;
  706. break;
  707. case V4L2_CID_AUTO_WHITE_BALANCE:
  708. ctrl->value = mt9m111->autowhitebalance;
  709. break;
  710. }
  711. return 0;
  712. }
  713. static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  714. {
  715. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  716. const struct v4l2_queryctrl *qctrl;
  717. int ret;
  718. qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id);
  719. if (!qctrl)
  720. return -EINVAL;
  721. switch (ctrl->id) {
  722. case V4L2_CID_VFLIP:
  723. mt9m111->vflip = ctrl->value;
  724. ret = mt9m111_set_flip(mt9m111, ctrl->value,
  725. MT9M111_RMB_MIRROR_ROWS);
  726. break;
  727. case V4L2_CID_HFLIP:
  728. mt9m111->hflip = ctrl->value;
  729. ret = mt9m111_set_flip(mt9m111, ctrl->value,
  730. MT9M111_RMB_MIRROR_COLS);
  731. break;
  732. case V4L2_CID_GAIN:
  733. ret = mt9m111_set_global_gain(mt9m111, ctrl->value);
  734. break;
  735. case V4L2_CID_EXPOSURE_AUTO:
  736. ret = mt9m111_set_autoexposure(mt9m111, ctrl->value);
  737. break;
  738. case V4L2_CID_AUTO_WHITE_BALANCE:
  739. ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value);
  740. break;
  741. default:
  742. ret = -EINVAL;
  743. }
  744. return ret;
  745. }
  746. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  747. {
  748. mt9m111->gain = mt9m111_get_global_gain(mt9m111);
  749. return 0;
  750. }
  751. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  752. {
  753. mt9m111_set_context(mt9m111, mt9m111->context);
  754. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  755. mt9m111_setup_rect(mt9m111, &mt9m111->rect);
  756. mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
  757. mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
  758. mt9m111_set_global_gain(mt9m111, mt9m111->gain);
  759. mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
  760. mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance);
  761. }
  762. static int mt9m111_resume(struct mt9m111 *mt9m111)
  763. {
  764. int ret = 0;
  765. if (mt9m111->powered) {
  766. ret = mt9m111_enable(mt9m111);
  767. if (!ret)
  768. ret = mt9m111_reset(mt9m111);
  769. if (!ret)
  770. mt9m111_restore_state(mt9m111);
  771. }
  772. return ret;
  773. }
  774. static int mt9m111_init(struct mt9m111 *mt9m111)
  775. {
  776. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  777. int ret;
  778. mt9m111->context = HIGHPOWER;
  779. ret = mt9m111_enable(mt9m111);
  780. if (!ret)
  781. ret = mt9m111_reset(mt9m111);
  782. if (!ret)
  783. ret = mt9m111_set_context(mt9m111, mt9m111->context);
  784. if (!ret)
  785. ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
  786. if (ret)
  787. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  788. return ret;
  789. }
  790. /*
  791. * Interface active, can use i2c. If it fails, it can indeed mean, that
  792. * this wasn't our capture interface, so, we wait for the right one
  793. */
  794. static int mt9m111_video_probe(struct soc_camera_device *icd,
  795. struct i2c_client *client)
  796. {
  797. struct mt9m111 *mt9m111 = to_mt9m111(client);
  798. s32 data;
  799. int ret;
  800. /* We must have a parent by now. And it cannot be a wrong one. */
  801. BUG_ON(!icd->parent ||
  802. to_soc_camera_host(icd->parent)->nr != icd->iface);
  803. mt9m111->autoexposure = 1;
  804. mt9m111->autowhitebalance = 1;
  805. data = reg_read(CHIP_VERSION);
  806. switch (data) {
  807. case 0x143a: /* MT9M111 or MT9M131 */
  808. mt9m111->model = V4L2_IDENT_MT9M111;
  809. dev_info(&client->dev,
  810. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  811. break;
  812. case 0x148c: /* MT9M112 */
  813. mt9m111->model = V4L2_IDENT_MT9M112;
  814. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  815. break;
  816. default:
  817. ret = -ENODEV;
  818. dev_err(&client->dev,
  819. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  820. data);
  821. goto ei2c;
  822. }
  823. ret = mt9m111_init(mt9m111);
  824. ei2c:
  825. return ret;
  826. }
  827. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  828. {
  829. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  830. struct i2c_client *client = v4l2_get_subdevdata(sd);
  831. int ret = 0;
  832. mutex_lock(&mt9m111->power_lock);
  833. /*
  834. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  835. * update the power state.
  836. */
  837. if (mt9m111->power_count == !on) {
  838. if (on) {
  839. ret = mt9m111_resume(mt9m111);
  840. if (ret) {
  841. dev_err(&client->dev,
  842. "Failed to resume the sensor: %d\n", ret);
  843. goto out;
  844. }
  845. } else {
  846. mt9m111_suspend(mt9m111);
  847. }
  848. }
  849. /* Update the power count. */
  850. mt9m111->power_count += on ? 1 : -1;
  851. WARN_ON(mt9m111->power_count < 0);
  852. out:
  853. mutex_unlock(&mt9m111->power_lock);
  854. return ret;
  855. }
  856. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  857. .g_ctrl = mt9m111_g_ctrl,
  858. .s_ctrl = mt9m111_s_ctrl,
  859. .g_chip_ident = mt9m111_g_chip_ident,
  860. .s_power = mt9m111_s_power,
  861. #ifdef CONFIG_VIDEO_ADV_DEBUG
  862. .g_register = mt9m111_g_register,
  863. .s_register = mt9m111_s_register,
  864. #endif
  865. };
  866. static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  867. enum v4l2_mbus_pixelcode *code)
  868. {
  869. if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
  870. return -EINVAL;
  871. *code = mt9m111_colour_fmts[index].code;
  872. return 0;
  873. }
  874. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  875. .s_mbus_fmt = mt9m111_s_fmt,
  876. .g_mbus_fmt = mt9m111_g_fmt,
  877. .try_mbus_fmt = mt9m111_try_fmt,
  878. .s_crop = mt9m111_s_crop,
  879. .g_crop = mt9m111_g_crop,
  880. .cropcap = mt9m111_cropcap,
  881. .enum_mbus_fmt = mt9m111_enum_fmt,
  882. };
  883. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  884. .core = &mt9m111_subdev_core_ops,
  885. .video = &mt9m111_subdev_video_ops,
  886. };
  887. static int mt9m111_probe(struct i2c_client *client,
  888. const struct i2c_device_id *did)
  889. {
  890. struct mt9m111 *mt9m111;
  891. struct soc_camera_device *icd = client->dev.platform_data;
  892. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  893. struct soc_camera_link *icl;
  894. int ret;
  895. if (!icd) {
  896. dev_err(&client->dev, "mt9m111: soc-camera data missing!\n");
  897. return -EINVAL;
  898. }
  899. icl = to_soc_camera_link(icd);
  900. if (!icl) {
  901. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  902. return -EINVAL;
  903. }
  904. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  905. dev_warn(&adapter->dev,
  906. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  907. return -EIO;
  908. }
  909. mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
  910. if (!mt9m111)
  911. return -ENOMEM;
  912. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  913. /* Second stage probe - when a capture adapter is there */
  914. icd->ops = &mt9m111_ops;
  915. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  916. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  917. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  918. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  919. mt9m111->fmt = &mt9m111_colour_fmts[0];
  920. ret = mt9m111_video_probe(icd, client);
  921. if (ret) {
  922. icd->ops = NULL;
  923. kfree(mt9m111);
  924. }
  925. return ret;
  926. }
  927. static int mt9m111_remove(struct i2c_client *client)
  928. {
  929. struct mt9m111 *mt9m111 = to_mt9m111(client);
  930. struct soc_camera_device *icd = client->dev.platform_data;
  931. icd->ops = NULL;
  932. kfree(mt9m111);
  933. return 0;
  934. }
  935. static const struct i2c_device_id mt9m111_id[] = {
  936. { "mt9m111", 0 },
  937. { }
  938. };
  939. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  940. static struct i2c_driver mt9m111_i2c_driver = {
  941. .driver = {
  942. .name = "mt9m111",
  943. },
  944. .probe = mt9m111_probe,
  945. .remove = mt9m111_remove,
  946. .id_table = mt9m111_id,
  947. };
  948. static int __init mt9m111_mod_init(void)
  949. {
  950. return i2c_add_driver(&mt9m111_i2c_driver);
  951. }
  952. static void __exit mt9m111_mod_exit(void)
  953. {
  954. i2c_del_driver(&mt9m111_i2c_driver);
  955. }
  956. module_init(mt9m111_mod_init);
  957. module_exit(mt9m111_mod_exit);
  958. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  959. MODULE_AUTHOR("Robert Jarzmik");
  960. MODULE_LICENSE("GPL");