setup-common.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720
  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/paca.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/vdso_datapage.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/firmware.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/system.h>
  53. #include <asm/rtas.h>
  54. #include <asm/iommu.h>
  55. #include <asm/serial.h>
  56. #include <asm/cache.h>
  57. #include <asm/page.h>
  58. #include <asm/mmu.h>
  59. #include <asm/xmon.h>
  60. #include <asm/cputhreads.h>
  61. #include <mm/mmu_decl.h>
  62. #include "setup.h"
  63. #ifdef DEBUG
  64. #include <asm/udbg.h>
  65. #define DBG(fmt...) udbg_printf(fmt)
  66. #else
  67. #define DBG(fmt...)
  68. #endif
  69. /* The main machine-dep calls structure
  70. */
  71. struct machdep_calls ppc_md;
  72. EXPORT_SYMBOL(ppc_md);
  73. struct machdep_calls *machine_id;
  74. EXPORT_SYMBOL(machine_id);
  75. unsigned long klimit = (unsigned long) _end;
  76. char cmd_line[COMMAND_LINE_SIZE];
  77. /*
  78. * This still seems to be needed... -- paulus
  79. */
  80. struct screen_info screen_info = {
  81. .orig_x = 0,
  82. .orig_y = 25,
  83. .orig_video_cols = 80,
  84. .orig_video_lines = 25,
  85. .orig_video_isVGA = 1,
  86. .orig_video_points = 16
  87. };
  88. /* Variables required to store legacy IO irq routing */
  89. int of_i8042_kbd_irq;
  90. EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
  91. int of_i8042_aux_irq;
  92. EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
  93. #ifdef __DO_IRQ_CANON
  94. /* XXX should go elsewhere eventually */
  95. int ppc_do_canonicalize_irqs;
  96. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  97. #endif
  98. /* also used by kexec */
  99. void machine_shutdown(void)
  100. {
  101. if (ppc_md.machine_shutdown)
  102. ppc_md.machine_shutdown();
  103. }
  104. void machine_restart(char *cmd)
  105. {
  106. machine_shutdown();
  107. if (ppc_md.restart)
  108. ppc_md.restart(cmd);
  109. #ifdef CONFIG_SMP
  110. smp_send_stop();
  111. #endif
  112. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  113. local_irq_disable();
  114. while (1) ;
  115. }
  116. void machine_power_off(void)
  117. {
  118. machine_shutdown();
  119. if (ppc_md.power_off)
  120. ppc_md.power_off();
  121. #ifdef CONFIG_SMP
  122. smp_send_stop();
  123. #endif
  124. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  125. local_irq_disable();
  126. while (1) ;
  127. }
  128. /* Used by the G5 thermal driver */
  129. EXPORT_SYMBOL_GPL(machine_power_off);
  130. void (*pm_power_off)(void) = machine_power_off;
  131. EXPORT_SYMBOL_GPL(pm_power_off);
  132. void machine_halt(void)
  133. {
  134. machine_shutdown();
  135. if (ppc_md.halt)
  136. ppc_md.halt();
  137. #ifdef CONFIG_SMP
  138. smp_send_stop();
  139. #endif
  140. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  141. local_irq_disable();
  142. while (1) ;
  143. }
  144. #ifdef CONFIG_TAU
  145. extern u32 cpu_temp(unsigned long cpu);
  146. extern u32 cpu_temp_both(unsigned long cpu);
  147. #endif /* CONFIG_TAU */
  148. #ifdef CONFIG_SMP
  149. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  150. #endif
  151. static void show_cpuinfo_summary(struct seq_file *m)
  152. {
  153. struct device_node *root;
  154. const char *model = NULL;
  155. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  156. unsigned long bogosum = 0;
  157. int i;
  158. for_each_online_cpu(i)
  159. bogosum += loops_per_jiffy;
  160. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  161. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  162. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  163. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  164. if (ppc_md.name)
  165. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  166. root = of_find_node_by_path("/");
  167. if (root)
  168. model = of_get_property(root, "model", NULL);
  169. if (model)
  170. seq_printf(m, "model\t\t: %s\n", model);
  171. of_node_put(root);
  172. if (ppc_md.show_cpuinfo != NULL)
  173. ppc_md.show_cpuinfo(m);
  174. #ifdef CONFIG_PPC32
  175. /* Display the amount of memory */
  176. seq_printf(m, "Memory\t\t: %d MB\n",
  177. (unsigned int)(total_memory / (1024 * 1024)));
  178. #endif
  179. }
  180. static int show_cpuinfo(struct seq_file *m, void *v)
  181. {
  182. unsigned long cpu_id = (unsigned long)v - 1;
  183. unsigned int pvr;
  184. unsigned short maj;
  185. unsigned short min;
  186. /* We only show online cpus: disable preempt (overzealous, I
  187. * knew) to prevent cpu going down. */
  188. preempt_disable();
  189. if (!cpu_online(cpu_id)) {
  190. preempt_enable();
  191. return 0;
  192. }
  193. #ifdef CONFIG_SMP
  194. pvr = per_cpu(cpu_pvr, cpu_id);
  195. #else
  196. pvr = mfspr(SPRN_PVR);
  197. #endif
  198. maj = (pvr >> 8) & 0xFF;
  199. min = pvr & 0xFF;
  200. seq_printf(m, "processor\t: %lu\n", cpu_id);
  201. seq_printf(m, "cpu\t\t: ");
  202. if (cur_cpu_spec->pvr_mask)
  203. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  204. else
  205. seq_printf(m, "unknown (%08x)", pvr);
  206. #ifdef CONFIG_ALTIVEC
  207. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  208. seq_printf(m, ", altivec supported");
  209. #endif /* CONFIG_ALTIVEC */
  210. seq_printf(m, "\n");
  211. #ifdef CONFIG_TAU
  212. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  213. #ifdef CONFIG_TAU_AVERAGE
  214. /* more straightforward, but potentially misleading */
  215. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  216. cpu_temp(cpu_id));
  217. #else
  218. /* show the actual temp sensor range */
  219. u32 temp;
  220. temp = cpu_temp_both(cpu_id);
  221. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  222. temp & 0xff, temp >> 16);
  223. #endif
  224. }
  225. #endif /* CONFIG_TAU */
  226. /*
  227. * Assume here that all clock rates are the same in a
  228. * smp system. -- Cort
  229. */
  230. if (ppc_proc_freq)
  231. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  232. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  233. if (ppc_md.show_percpuinfo != NULL)
  234. ppc_md.show_percpuinfo(m, cpu_id);
  235. /* If we are a Freescale core do a simple check so
  236. * we dont have to keep adding cases in the future */
  237. if (PVR_VER(pvr) & 0x8000) {
  238. switch (PVR_VER(pvr)) {
  239. case 0x8000: /* 7441/7450/7451, Voyager */
  240. case 0x8001: /* 7445/7455, Apollo 6 */
  241. case 0x8002: /* 7447/7457, Apollo 7 */
  242. case 0x8003: /* 7447A, Apollo 7 PM */
  243. case 0x8004: /* 7448, Apollo 8 */
  244. case 0x800c: /* 7410, Nitro */
  245. maj = ((pvr >> 8) & 0xF);
  246. min = PVR_MIN(pvr);
  247. break;
  248. default: /* e500/book-e */
  249. maj = PVR_MAJ(pvr);
  250. min = PVR_MIN(pvr);
  251. break;
  252. }
  253. } else {
  254. switch (PVR_VER(pvr)) {
  255. case 0x0020: /* 403 family */
  256. maj = PVR_MAJ(pvr) + 1;
  257. min = PVR_MIN(pvr);
  258. break;
  259. case 0x1008: /* 740P/750P ?? */
  260. maj = ((pvr >> 8) & 0xFF) - 1;
  261. min = pvr & 0xFF;
  262. break;
  263. default:
  264. maj = (pvr >> 8) & 0xFF;
  265. min = pvr & 0xFF;
  266. break;
  267. }
  268. }
  269. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  270. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  271. #ifdef CONFIG_PPC32
  272. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  273. loops_per_jiffy / (500000/HZ),
  274. (loops_per_jiffy / (5000/HZ)) % 100);
  275. #endif
  276. #ifdef CONFIG_SMP
  277. seq_printf(m, "\n");
  278. #endif
  279. preempt_enable();
  280. /* If this is the last cpu, print the summary */
  281. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  282. show_cpuinfo_summary(m);
  283. return 0;
  284. }
  285. static void *c_start(struct seq_file *m, loff_t *pos)
  286. {
  287. if (*pos == 0) /* just in case, cpu 0 is not the first */
  288. *pos = cpumask_first(cpu_online_mask);
  289. else
  290. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  291. if ((*pos) < nr_cpu_ids)
  292. return (void *)(unsigned long)(*pos + 1);
  293. return NULL;
  294. }
  295. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  296. {
  297. (*pos)++;
  298. return c_start(m, pos);
  299. }
  300. static void c_stop(struct seq_file *m, void *v)
  301. {
  302. }
  303. const struct seq_operations cpuinfo_op = {
  304. .start =c_start,
  305. .next = c_next,
  306. .stop = c_stop,
  307. .show = show_cpuinfo,
  308. };
  309. void __init check_for_initrd(void)
  310. {
  311. #ifdef CONFIG_BLK_DEV_INITRD
  312. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  313. initrd_start, initrd_end);
  314. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  315. * look sensible. If not, clear initrd reference.
  316. */
  317. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  318. initrd_end > initrd_start)
  319. ROOT_DEV = Root_RAM0;
  320. else
  321. initrd_start = initrd_end = 0;
  322. if (initrd_start)
  323. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  324. DBG(" <- check_for_initrd()\n");
  325. #endif /* CONFIG_BLK_DEV_INITRD */
  326. }
  327. #ifdef CONFIG_SMP
  328. int threads_per_core, threads_shift;
  329. cpumask_t threads_core_mask;
  330. EXPORT_SYMBOL_GPL(threads_per_core);
  331. EXPORT_SYMBOL_GPL(threads_shift);
  332. EXPORT_SYMBOL_GPL(threads_core_mask);
  333. static void __init cpu_init_thread_core_maps(int tpc)
  334. {
  335. int i;
  336. threads_per_core = tpc;
  337. cpumask_clear(&threads_core_mask);
  338. /* This implementation only supports power of 2 number of threads
  339. * for simplicity and performance
  340. */
  341. threads_shift = ilog2(tpc);
  342. BUG_ON(tpc != (1 << threads_shift));
  343. for (i = 0; i < tpc; i++)
  344. cpumask_set_cpu(i, &threads_core_mask);
  345. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  346. tpc, tpc > 1 ? "s" : "");
  347. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  348. }
  349. /**
  350. * setup_cpu_maps - initialize the following cpu maps:
  351. * cpu_possible_mask
  352. * cpu_present_mask
  353. *
  354. * Having the possible map set up early allows us to restrict allocations
  355. * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
  356. *
  357. * We do not initialize the online map here; cpus set their own bits in
  358. * cpu_online_mask as they come up.
  359. *
  360. * This function is valid only for Open Firmware systems. finish_device_tree
  361. * must be called before using this.
  362. *
  363. * While we're here, we may as well set the "physical" cpu ids in the paca.
  364. *
  365. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  366. */
  367. void __init smp_setup_cpu_maps(void)
  368. {
  369. struct device_node *dn = NULL;
  370. int cpu = 0;
  371. int nthreads = 1;
  372. DBG("smp_setup_cpu_maps()\n");
  373. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
  374. const int *intserv;
  375. int j, len;
  376. DBG(" * %s...\n", dn->full_name);
  377. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  378. &len);
  379. if (intserv) {
  380. nthreads = len / sizeof(int);
  381. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  382. nthreads);
  383. } else {
  384. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  385. intserv = of_get_property(dn, "reg", NULL);
  386. if (!intserv)
  387. intserv = &cpu; /* assume logical == phys */
  388. }
  389. for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
  390. DBG(" thread %d -> cpu %d (hard id %d)\n",
  391. j, cpu, intserv[j]);
  392. set_cpu_present(cpu, true);
  393. set_hard_smp_processor_id(cpu, intserv[j]);
  394. set_cpu_possible(cpu, true);
  395. cpu++;
  396. }
  397. }
  398. /* If no SMT supported, nthreads is forced to 1 */
  399. if (!cpu_has_feature(CPU_FTR_SMT)) {
  400. DBG(" SMT disabled ! nthreads forced to 1\n");
  401. nthreads = 1;
  402. }
  403. #ifdef CONFIG_PPC64
  404. /*
  405. * On pSeries LPAR, we need to know how many cpus
  406. * could possibly be added to this partition.
  407. */
  408. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  409. (dn = of_find_node_by_path("/rtas"))) {
  410. int num_addr_cell, num_size_cell, maxcpus;
  411. const unsigned int *ireg;
  412. num_addr_cell = of_n_addr_cells(dn);
  413. num_size_cell = of_n_size_cells(dn);
  414. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  415. if (!ireg)
  416. goto out;
  417. maxcpus = ireg[num_addr_cell + num_size_cell];
  418. /* Double maxcpus for processors which have SMT capability */
  419. if (cpu_has_feature(CPU_FTR_SMT))
  420. maxcpus *= nthreads;
  421. if (maxcpus > nr_cpu_ids) {
  422. printk(KERN_WARNING
  423. "Partition configured for %d cpus, "
  424. "operating system maximum is %d.\n",
  425. maxcpus, nr_cpu_ids);
  426. maxcpus = nr_cpu_ids;
  427. } else
  428. printk(KERN_INFO "Partition configured for %d cpus.\n",
  429. maxcpus);
  430. for (cpu = 0; cpu < maxcpus; cpu++)
  431. set_cpu_possible(cpu, true);
  432. out:
  433. of_node_put(dn);
  434. }
  435. vdso_data->processorCount = num_present_cpus();
  436. #endif /* CONFIG_PPC64 */
  437. /* Initialize CPU <=> thread mapping/
  438. *
  439. * WARNING: We assume that the number of threads is the same for
  440. * every CPU in the system. If that is not the case, then some code
  441. * here will have to be reworked
  442. */
  443. cpu_init_thread_core_maps(nthreads);
  444. /* Now that possible cpus are set, set nr_cpu_ids for later use */
  445. setup_nr_cpu_ids();
  446. free_unused_pacas();
  447. }
  448. #endif /* CONFIG_SMP */
  449. #ifdef CONFIG_PCSPKR_PLATFORM
  450. static __init int add_pcspkr(void)
  451. {
  452. struct device_node *np;
  453. struct platform_device *pd;
  454. int ret;
  455. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  456. of_node_put(np);
  457. if (!np)
  458. return -ENODEV;
  459. pd = platform_device_alloc("pcspkr", -1);
  460. if (!pd)
  461. return -ENOMEM;
  462. ret = platform_device_add(pd);
  463. if (ret)
  464. platform_device_put(pd);
  465. return ret;
  466. }
  467. device_initcall(add_pcspkr);
  468. #endif /* CONFIG_PCSPKR_PLATFORM */
  469. void probe_machine(void)
  470. {
  471. extern struct machdep_calls __machine_desc_start;
  472. extern struct machdep_calls __machine_desc_end;
  473. /*
  474. * Iterate all ppc_md structures until we find the proper
  475. * one for the current machine type
  476. */
  477. DBG("Probing machine type ...\n");
  478. for (machine_id = &__machine_desc_start;
  479. machine_id < &__machine_desc_end;
  480. machine_id++) {
  481. DBG(" %s ...", machine_id->name);
  482. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  483. if (ppc_md.probe()) {
  484. DBG(" match !\n");
  485. break;
  486. }
  487. DBG("\n");
  488. }
  489. /* What can we do if we didn't find ? */
  490. if (machine_id >= &__machine_desc_end) {
  491. DBG("No suitable machine found !\n");
  492. for (;;);
  493. }
  494. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  495. }
  496. /* Match a class of boards, not a specific device configuration. */
  497. int check_legacy_ioport(unsigned long base_port)
  498. {
  499. struct device_node *parent, *np = NULL;
  500. int ret = -ENODEV;
  501. switch(base_port) {
  502. case I8042_DATA_REG:
  503. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  504. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  505. if (np) {
  506. parent = of_get_parent(np);
  507. of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
  508. if (!of_i8042_kbd_irq)
  509. of_i8042_kbd_irq = 1;
  510. of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
  511. if (!of_i8042_aux_irq)
  512. of_i8042_aux_irq = 12;
  513. of_node_put(np);
  514. np = parent;
  515. break;
  516. }
  517. np = of_find_node_by_type(NULL, "8042");
  518. /* Pegasos has no device_type on its 8042 node, look for the
  519. * name instead */
  520. if (!np)
  521. np = of_find_node_by_name(NULL, "8042");
  522. if (np) {
  523. of_i8042_kbd_irq = 1;
  524. of_i8042_aux_irq = 12;
  525. }
  526. break;
  527. case FDC_BASE: /* FDC1 */
  528. np = of_find_node_by_type(NULL, "fdc");
  529. break;
  530. #ifdef CONFIG_PPC_PREP
  531. case _PIDXR:
  532. case _PNPWRP:
  533. case PNPBIOS_BASE:
  534. /* implement me */
  535. #endif
  536. default:
  537. /* ipmi is supposed to fail here */
  538. break;
  539. }
  540. if (!np)
  541. return ret;
  542. parent = of_get_parent(np);
  543. if (parent) {
  544. if (strcmp(parent->type, "isa") == 0)
  545. ret = 0;
  546. of_node_put(parent);
  547. }
  548. of_node_put(np);
  549. return ret;
  550. }
  551. EXPORT_SYMBOL(check_legacy_ioport);
  552. static int ppc_panic_event(struct notifier_block *this,
  553. unsigned long event, void *ptr)
  554. {
  555. ppc_md.panic(ptr); /* May not return */
  556. return NOTIFY_DONE;
  557. }
  558. static struct notifier_block ppc_panic_block = {
  559. .notifier_call = ppc_panic_event,
  560. .priority = INT_MIN /* may not return; must be done last */
  561. };
  562. void __init setup_panic(void)
  563. {
  564. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  565. }
  566. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  567. /*
  568. * For platforms that have configurable cache-coherency. This function
  569. * checks that the cache coherency setting of the kernel matches the setting
  570. * left by the firmware, as indicated in the device tree. Since a mismatch
  571. * will eventually result in DMA failures, we print * and error and call
  572. * BUG() in that case.
  573. */
  574. #ifdef CONFIG_NOT_COHERENT_CACHE
  575. #define KERNEL_COHERENCY 0
  576. #else
  577. #define KERNEL_COHERENCY 1
  578. #endif
  579. static int __init check_cache_coherency(void)
  580. {
  581. struct device_node *np;
  582. const void *prop;
  583. int devtree_coherency;
  584. np = of_find_node_by_path("/");
  585. prop = of_get_property(np, "coherency-off", NULL);
  586. of_node_put(np);
  587. devtree_coherency = prop ? 0 : 1;
  588. if (devtree_coherency != KERNEL_COHERENCY) {
  589. printk(KERN_ERR
  590. "kernel coherency:%s != device tree_coherency:%s\n",
  591. KERNEL_COHERENCY ? "on" : "off",
  592. devtree_coherency ? "on" : "off");
  593. BUG();
  594. }
  595. return 0;
  596. }
  597. late_initcall(check_cache_coherency);
  598. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  599. #ifdef CONFIG_DEBUG_FS
  600. struct dentry *powerpc_debugfs_root;
  601. EXPORT_SYMBOL(powerpc_debugfs_root);
  602. static int powerpc_debugfs_init(void)
  603. {
  604. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  605. return powerpc_debugfs_root == NULL;
  606. }
  607. arch_initcall(powerpc_debugfs_init);
  608. #endif
  609. void ppc_printk_progress(char *s, unsigned short hex)
  610. {
  611. pr_info("%s\n", s);
  612. }
  613. void arch_setup_pdev_archdata(struct platform_device *pdev)
  614. {
  615. pdev->archdata.dma_mask = DMA_BIT_MASK(32);
  616. pdev->dev.dma_mask = &pdev->archdata.dma_mask;
  617. set_dma_ops(&pdev->dev, &dma_direct_ops);
  618. }