setup.c 10 KB

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  1. /*
  2. * OpenRISC setup.c
  3. *
  4. * Linux architectural port borrowing liberally from similar works of
  5. * others. All original copyrights apply as per the original source
  6. * declaration.
  7. *
  8. * Modifications for the OpenRISC architecture:
  9. * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
  10. * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * as published by the Free Software Foundation; either version
  15. * 2 of the License, or (at your option) any later version.
  16. *
  17. * This file handles the architecture-dependent parts of initialization
  18. */
  19. #include <linux/errno.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/stddef.h>
  24. #include <linux/unistd.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/slab.h>
  27. #include <linux/tty.h>
  28. #include <linux/ioport.h>
  29. #include <linux/delay.h>
  30. #include <linux/console.h>
  31. #include <linux/init.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/seq_file.h>
  34. #include <linux/serial.h>
  35. #include <linux/initrd.h>
  36. #include <linux/of_fdt.h>
  37. #include <linux/of.h>
  38. #include <linux/memblock.h>
  39. #include <linux/device.h>
  40. #include <linux/of_platform.h>
  41. #include <asm/segment.h>
  42. #include <asm/system.h>
  43. #include <asm/pgtable.h>
  44. #include <asm/types.h>
  45. #include <asm/setup.h>
  46. #include <asm/io.h>
  47. #include <asm/cpuinfo.h>
  48. #include <asm/delay.h>
  49. #include "vmlinux.h"
  50. char __initdata cmd_line[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
  51. static unsigned long __init setup_memory(void)
  52. {
  53. unsigned long bootmap_size;
  54. unsigned long ram_start_pfn;
  55. unsigned long free_ram_start_pfn;
  56. unsigned long ram_end_pfn;
  57. phys_addr_t memory_start, memory_end;
  58. struct memblock_region *region;
  59. memory_end = memory_start = 0;
  60. /* Find main memory where is the kernel */
  61. for_each_memblock(memory, region) {
  62. memory_start = region->base;
  63. memory_end = region->base + region->size;
  64. printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
  65. memory_start, memory_end);
  66. }
  67. if (!memory_end) {
  68. panic("No memory!");
  69. }
  70. ram_start_pfn = PFN_UP(memory_start);
  71. /* free_ram_start_pfn is first page after kernel */
  72. free_ram_start_pfn = PFN_UP(__pa(&_end));
  73. ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
  74. max_pfn = ram_end_pfn;
  75. /*
  76. * initialize the boot-time allocator (with low memory only).
  77. *
  78. * This makes the memory from the end of the kernel to the end of
  79. * RAM usable.
  80. * init_bootmem sets the global values min_low_pfn, max_low_pfn.
  81. */
  82. bootmap_size = init_bootmem(free_ram_start_pfn,
  83. ram_end_pfn - ram_start_pfn);
  84. free_bootmem(PFN_PHYS(free_ram_start_pfn),
  85. (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
  86. reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
  87. BOOTMEM_DEFAULT);
  88. for_each_memblock(reserved, region) {
  89. printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
  90. (u32) region->base, (u32) region->size);
  91. reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
  92. }
  93. return ram_end_pfn;
  94. }
  95. struct cpuinfo cpuinfo;
  96. static void print_cpuinfo(void)
  97. {
  98. unsigned long upr = mfspr(SPR_UPR);
  99. unsigned long vr = mfspr(SPR_VR);
  100. unsigned int version;
  101. unsigned int revision;
  102. version = (vr & SPR_VR_VER) >> 24;
  103. revision = (vr & SPR_VR_REV);
  104. printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
  105. version, revision, cpuinfo.clock_frequency / 1000000);
  106. if (!(upr & SPR_UPR_UP)) {
  107. printk(KERN_INFO
  108. "-- no UPR register... unable to detect configuration\n");
  109. return;
  110. }
  111. if (upr & SPR_UPR_DCP)
  112. printk(KERN_INFO
  113. "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
  114. cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
  115. else
  116. printk(KERN_INFO "-- dcache disabled\n");
  117. if (upr & SPR_UPR_ICP)
  118. printk(KERN_INFO
  119. "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
  120. cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
  121. else
  122. printk(KERN_INFO "-- icache disabled\n");
  123. if (upr & SPR_UPR_DMP)
  124. printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
  125. 1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
  126. 1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
  127. if (upr & SPR_UPR_IMP)
  128. printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
  129. 1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
  130. 1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
  131. printk(KERN_INFO "-- additional features:\n");
  132. if (upr & SPR_UPR_DUP)
  133. printk(KERN_INFO "-- debug unit\n");
  134. if (upr & SPR_UPR_PCUP)
  135. printk(KERN_INFO "-- performance counters\n");
  136. if (upr & SPR_UPR_PMP)
  137. printk(KERN_INFO "-- power management\n");
  138. if (upr & SPR_UPR_PICP)
  139. printk(KERN_INFO "-- PIC\n");
  140. if (upr & SPR_UPR_TTP)
  141. printk(KERN_INFO "-- timer\n");
  142. if (upr & SPR_UPR_CUP)
  143. printk(KERN_INFO "-- custom unit(s)\n");
  144. }
  145. void __init setup_cpuinfo(void)
  146. {
  147. struct device_node *cpu;
  148. unsigned long iccfgr, dccfgr;
  149. unsigned long cache_set_size, cache_ways;
  150. cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
  151. if (!cpu)
  152. panic("No compatible CPU found in device tree...\n");
  153. iccfgr = mfspr(SPR_ICCFGR);
  154. cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
  155. cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
  156. cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
  157. cpuinfo.icache_size =
  158. cache_set_size * cache_ways * cpuinfo.icache_block_size;
  159. dccfgr = mfspr(SPR_DCCFGR);
  160. cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
  161. cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
  162. cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
  163. cpuinfo.dcache_size =
  164. cache_set_size * cache_ways * cpuinfo.dcache_block_size;
  165. if (of_property_read_u32(cpu, "clock-frequency",
  166. &cpuinfo.clock_frequency)) {
  167. printk(KERN_WARNING
  168. "Device tree missing CPU 'clock-frequency' parameter."
  169. "Assuming frequency 25MHZ"
  170. "This is probably not what you want.");
  171. }
  172. of_node_put(cpu);
  173. print_cpuinfo();
  174. }
  175. /**
  176. * or32_early_setup
  177. *
  178. * Handles the pointer to the device tree that this kernel is to use
  179. * for establishing the available platform devices.
  180. *
  181. * For now, this is limited to using the built-in device tree. In the future,
  182. * it is intended that this function will take a pointer to the device tree
  183. * that is potentially built-in, but potentially also passed in by the
  184. * bootloader, or discovered by some equally clever means...
  185. */
  186. void __init or32_early_setup(void)
  187. {
  188. early_init_devtree(__dtb_start);
  189. printk(KERN_INFO "Compiled-in FDT at 0x%p\n", __dtb_start);
  190. }
  191. static int __init openrisc_device_probe(void)
  192. {
  193. of_platform_populate(NULL, NULL, NULL, NULL);
  194. return 0;
  195. }
  196. device_initcall(openrisc_device_probe);
  197. static inline unsigned long extract_value_bits(unsigned long reg,
  198. short bit_nr, short width)
  199. {
  200. return (reg >> bit_nr) & (0 << width);
  201. }
  202. static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
  203. {
  204. while (!(mask & 0x1)) {
  205. reg = reg >> 1;
  206. mask = mask >> 1;
  207. }
  208. return mask & reg;
  209. }
  210. void __init detect_unit_config(unsigned long upr, unsigned long mask,
  211. char *text, void (*func) (void))
  212. {
  213. if (text != NULL)
  214. printk("%s", text);
  215. if (upr & mask) {
  216. if (func != NULL)
  217. func();
  218. else
  219. printk("present\n");
  220. } else
  221. printk("not present\n");
  222. }
  223. /*
  224. * calibrate_delay
  225. *
  226. * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
  227. * from the clock frequency passed in via the device tree
  228. *
  229. */
  230. void __cpuinit calibrate_delay(void)
  231. {
  232. const int *val;
  233. struct device_node *cpu = NULL;
  234. cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
  235. val = of_get_property(cpu, "clock-frequency", NULL);
  236. if (!val)
  237. panic("no cpu 'clock-frequency' parameter in device tree");
  238. loops_per_jiffy = *val / HZ;
  239. pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
  240. loops_per_jiffy / (500000 / HZ),
  241. (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
  242. }
  243. void __init setup_arch(char **cmdline_p)
  244. {
  245. unsigned long max_low_pfn;
  246. unflatten_device_tree();
  247. setup_cpuinfo();
  248. /* process 1's initial memory region is the kernel code/data */
  249. init_mm.start_code = (unsigned long)&_stext;
  250. init_mm.end_code = (unsigned long)&_etext;
  251. init_mm.end_data = (unsigned long)&_edata;
  252. init_mm.brk = (unsigned long)&_end;
  253. #ifdef CONFIG_BLK_DEV_INITRD
  254. initrd_start = (unsigned long)&__initrd_start;
  255. initrd_end = (unsigned long)&__initrd_end;
  256. if (initrd_start == initrd_end) {
  257. initrd_start = 0;
  258. initrd_end = 0;
  259. }
  260. initrd_below_start_ok = 1;
  261. #endif
  262. /* setup bootmem allocator */
  263. max_low_pfn = setup_memory();
  264. /* paging_init() sets up the MMU and marks all pages as reserved */
  265. paging_init();
  266. #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
  267. if (!conswitchp)
  268. conswitchp = &dummy_con;
  269. #endif
  270. *cmdline_p = cmd_line;
  271. printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
  272. }
  273. static int show_cpuinfo(struct seq_file *m, void *v)
  274. {
  275. unsigned long vr;
  276. int version, revision;
  277. vr = mfspr(SPR_VR);
  278. version = (vr & SPR_VR_VER) >> 24;
  279. revision = vr & SPR_VR_REV;
  280. return seq_printf(m,
  281. "cpu\t\t: OpenRISC-%x\n"
  282. "revision\t: %d\n"
  283. "frequency\t: %ld\n"
  284. "dcache size\t: %d bytes\n"
  285. "dcache block size\t: %d bytes\n"
  286. "icache size\t: %d bytes\n"
  287. "icache block size\t: %d bytes\n"
  288. "immu\t\t: %d entries, %lu ways\n"
  289. "dmmu\t\t: %d entries, %lu ways\n"
  290. "bogomips\t: %lu.%02lu\n",
  291. version,
  292. revision,
  293. loops_per_jiffy * HZ,
  294. cpuinfo.dcache_size,
  295. cpuinfo.dcache_block_size,
  296. cpuinfo.icache_size,
  297. cpuinfo.icache_block_size,
  298. 1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
  299. 1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
  300. 1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
  301. 1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
  302. (loops_per_jiffy * HZ) / 500000,
  303. ((loops_per_jiffy * HZ) / 5000) % 100);
  304. }
  305. static void *c_start(struct seq_file *m, loff_t * pos)
  306. {
  307. /* We only have one CPU... */
  308. return *pos < 1 ? (void *)1 : NULL;
  309. }
  310. static void *c_next(struct seq_file *m, void *v, loff_t * pos)
  311. {
  312. ++*pos;
  313. return NULL;
  314. }
  315. static void c_stop(struct seq_file *m, void *v)
  316. {
  317. }
  318. const struct seq_operations cpuinfo_op = {
  319. .start = c_start,
  320. .next = c_next,
  321. .stop = c_stop,
  322. .show = show_cpuinfo,
  323. };