lantiq.h 1.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263
  1. /*
  2. * This program is free software; you can redistribute it and/or modify it
  3. * under the terms of the GNU General Public License version 2 as published
  4. * by the Free Software Foundation.
  5. *
  6. * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  7. */
  8. #ifndef _LANTIQ_H__
  9. #define _LANTIQ_H__
  10. #include <linux/irq.h>
  11. /* generic reg access functions */
  12. #define ltq_r32(reg) __raw_readl(reg)
  13. #define ltq_w32(val, reg) __raw_writel(val, reg)
  14. #define ltq_w32_mask(clear, set, reg) \
  15. ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
  16. #define ltq_r8(reg) __raw_readb(reg)
  17. #define ltq_w8(val, reg) __raw_writeb(val, reg)
  18. /* register access macros for EBU and CGU */
  19. #define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y))
  20. #define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x))
  21. #define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y))
  22. #define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x))
  23. extern __iomem void *ltq_ebu_membase;
  24. extern __iomem void *ltq_cgu_membase;
  25. extern unsigned int ltq_get_cpu_ver(void);
  26. extern unsigned int ltq_get_soc_type(void);
  27. /* clock speeds */
  28. #define CLOCK_60M 60000000
  29. #define CLOCK_83M 83333333
  30. #define CLOCK_111M 111111111
  31. #define CLOCK_133M 133333333
  32. #define CLOCK_167M 166666667
  33. #define CLOCK_200M 200000000
  34. #define CLOCK_266M 266666666
  35. #define CLOCK_333M 333333333
  36. #define CLOCK_400M 400000000
  37. /* spinlock all ebu i/o */
  38. extern spinlock_t ebu_lock;
  39. /* some irq helpers */
  40. extern void ltq_disable_irq(struct irq_data *data);
  41. extern void ltq_mask_and_ack_irq(struct irq_data *data);
  42. extern void ltq_enable_irq(struct irq_data *data);
  43. /* find out what caused the last cpu reset */
  44. extern int ltq_reset_cause(void);
  45. #define LTQ_RST_CAUSE_WDTRST 0x20
  46. #define IOPORT_RESOURCE_START 0x10000000
  47. #define IOPORT_RESOURCE_END 0xffffffff
  48. #define IOMEM_RESOURCE_START 0x10000000
  49. #define IOMEM_RESOURCE_END 0xffffffff
  50. #define LTQ_FLASH_START 0x10000000
  51. #define LTQ_FLASH_MAX 0x04000000
  52. #endif