pio.c 10 KB

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  1. /*
  2. * Atmel PIO2 Port Multiplexer support
  3. *
  4. * Copyright (C) 2004-2006 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/fs.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/irq.h>
  15. #include <asm/gpio.h>
  16. #include <asm/io.h>
  17. #include <mach/portmux.h>
  18. #include "pio.h"
  19. #define MAX_NR_PIO_DEVICES 8
  20. struct pio_device {
  21. struct gpio_chip chip;
  22. void __iomem *regs;
  23. const struct platform_device *pdev;
  24. struct clk *clk;
  25. u32 pinmux_mask;
  26. char name[8];
  27. };
  28. static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
  29. static struct pio_device *gpio_to_pio(unsigned int gpio)
  30. {
  31. struct pio_device *pio;
  32. unsigned int index;
  33. index = gpio >> 5;
  34. if (index >= MAX_NR_PIO_DEVICES)
  35. return NULL;
  36. pio = &pio_dev[index];
  37. if (!pio->regs)
  38. return NULL;
  39. return pio;
  40. }
  41. /* Pin multiplexing API */
  42. static DEFINE_SPINLOCK(pio_lock);
  43. void __init at32_select_periph(unsigned int port, u32 pin_mask,
  44. unsigned int periph, unsigned long flags)
  45. {
  46. struct pio_device *pio;
  47. /* assign and verify pio */
  48. pio = gpio_to_pio(port);
  49. if (unlikely(!pio)) {
  50. printk(KERN_WARNING "pio: invalid port %u\n", port);
  51. goto fail;
  52. }
  53. /* Test if any of the requested pins is already muxed */
  54. spin_lock(&pio_lock);
  55. if (unlikely(pio->pinmux_mask & pin_mask)) {
  56. printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n",
  57. pio->name, pin_mask, pio->pinmux_mask & pin_mask);
  58. spin_unlock(&pio_lock);
  59. goto fail;
  60. }
  61. pio->pinmux_mask |= pin_mask;
  62. /* enable pull ups */
  63. pio_writel(pio, PUER, pin_mask);
  64. /* select either peripheral A or B */
  65. if (periph)
  66. pio_writel(pio, BSR, pin_mask);
  67. else
  68. pio_writel(pio, ASR, pin_mask);
  69. /* enable peripheral control */
  70. pio_writel(pio, PDR, pin_mask);
  71. /* Disable pull ups if not requested. */
  72. if (!(flags & AT32_GPIOF_PULLUP))
  73. pio_writel(pio, PUDR, pin_mask);
  74. spin_unlock(&pio_lock);
  75. return;
  76. fail:
  77. dump_stack();
  78. }
  79. void __init at32_select_gpio(unsigned int pin, unsigned long flags)
  80. {
  81. struct pio_device *pio;
  82. unsigned int pin_index = pin & 0x1f;
  83. u32 mask = 1 << pin_index;
  84. pio = gpio_to_pio(pin);
  85. if (unlikely(!pio)) {
  86. printk("pio: invalid pin %u\n", pin);
  87. goto fail;
  88. }
  89. if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
  90. printk("%s: pin %u is busy\n", pio->name, pin_index);
  91. goto fail;
  92. }
  93. if (flags & AT32_GPIOF_OUTPUT) {
  94. if (flags & AT32_GPIOF_HIGH)
  95. pio_writel(pio, SODR, mask);
  96. else
  97. pio_writel(pio, CODR, mask);
  98. if (flags & AT32_GPIOF_MULTIDRV)
  99. pio_writel(pio, MDER, mask);
  100. else
  101. pio_writel(pio, MDDR, mask);
  102. pio_writel(pio, PUDR, mask);
  103. pio_writel(pio, OER, mask);
  104. } else {
  105. if (flags & AT32_GPIOF_PULLUP)
  106. pio_writel(pio, PUER, mask);
  107. else
  108. pio_writel(pio, PUDR, mask);
  109. if (flags & AT32_GPIOF_DEGLITCH)
  110. pio_writel(pio, IFER, mask);
  111. else
  112. pio_writel(pio, IFDR, mask);
  113. pio_writel(pio, ODR, mask);
  114. }
  115. pio_writel(pio, PER, mask);
  116. return;
  117. fail:
  118. dump_stack();
  119. }
  120. /*
  121. * Undo a previous pin reservation. Will not affect the hardware
  122. * configuration.
  123. */
  124. void at32_deselect_pin(unsigned int pin)
  125. {
  126. struct pio_device *pio;
  127. unsigned int pin_index = pin & 0x1f;
  128. pio = gpio_to_pio(pin);
  129. if (unlikely(!pio)) {
  130. printk("pio: invalid pin %u\n", pin);
  131. dump_stack();
  132. return;
  133. }
  134. clear_bit(pin_index, &pio->pinmux_mask);
  135. }
  136. /* Reserve a pin, preventing anyone else from changing its configuration. */
  137. void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
  138. {
  139. struct pio_device *pio;
  140. /* assign and verify pio */
  141. pio = gpio_to_pio(port);
  142. if (unlikely(!pio)) {
  143. printk(KERN_WARNING "pio: invalid port %u\n", port);
  144. goto fail;
  145. }
  146. /* Test if any of the requested pins is already muxed */
  147. spin_lock(&pio_lock);
  148. if (unlikely(pio->pinmux_mask & pin_mask)) {
  149. printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
  150. pio->name, pin_mask, pio->pinmux_mask & pin_mask);
  151. spin_unlock(&pio_lock);
  152. goto fail;
  153. }
  154. /* Reserve pins */
  155. pio->pinmux_mask |= pin_mask;
  156. spin_unlock(&pio_lock);
  157. return;
  158. fail:
  159. dump_stack();
  160. }
  161. /*--------------------------------------------------------------------------*/
  162. /* GPIO API */
  163. static int direction_input(struct gpio_chip *chip, unsigned offset)
  164. {
  165. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  166. u32 mask = 1 << offset;
  167. if (!(pio_readl(pio, PSR) & mask))
  168. return -EINVAL;
  169. pio_writel(pio, ODR, mask);
  170. return 0;
  171. }
  172. static int gpio_get(struct gpio_chip *chip, unsigned offset)
  173. {
  174. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  175. return (pio_readl(pio, PDSR) >> offset) & 1;
  176. }
  177. static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
  178. static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
  179. {
  180. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  181. u32 mask = 1 << offset;
  182. if (!(pio_readl(pio, PSR) & mask))
  183. return -EINVAL;
  184. gpio_set(chip, offset, value);
  185. pio_writel(pio, OER, mask);
  186. return 0;
  187. }
  188. static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  189. {
  190. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  191. u32 mask = 1 << offset;
  192. if (value)
  193. pio_writel(pio, SODR, mask);
  194. else
  195. pio_writel(pio, CODR, mask);
  196. }
  197. /*--------------------------------------------------------------------------*/
  198. /* GPIO IRQ support */
  199. static void gpio_irq_mask(struct irq_data *d)
  200. {
  201. unsigned gpio = irq_to_gpio(d->irq);
  202. struct pio_device *pio = &pio_dev[gpio >> 5];
  203. pio_writel(pio, IDR, 1 << (gpio & 0x1f));
  204. }
  205. static void gpio_irq_unmask(struct irq_data *d)
  206. {
  207. unsigned gpio = irq_to_gpio(d->irq);
  208. struct pio_device *pio = &pio_dev[gpio >> 5];
  209. pio_writel(pio, IER, 1 << (gpio & 0x1f));
  210. }
  211. static int gpio_irq_type(struct irq_data *d, unsigned type)
  212. {
  213. if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
  214. return -EINVAL;
  215. return 0;
  216. }
  217. static struct irq_chip gpio_irqchip = {
  218. .name = "gpio",
  219. .irq_mask = gpio_irq_mask,
  220. .irq_unmask = gpio_irq_unmask,
  221. .irq_set_type = gpio_irq_type,
  222. };
  223. static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
  224. {
  225. struct pio_device *pio = irq_desc_get_chip_data(desc);
  226. unsigned gpio_irq;
  227. gpio_irq = (unsigned) irq_get_handler_data(irq);
  228. for (;;) {
  229. u32 isr;
  230. /* ack pending GPIO interrupts */
  231. isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
  232. if (!isr)
  233. break;
  234. do {
  235. int i;
  236. i = ffs(isr) - 1;
  237. isr &= ~(1 << i);
  238. i += gpio_irq;
  239. generic_handle_irq(i);
  240. } while (isr);
  241. }
  242. }
  243. static void __init
  244. gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
  245. {
  246. unsigned i;
  247. irq_set_chip_data(irq, pio);
  248. irq_set_handler_data(irq, (void *)gpio_irq);
  249. for (i = 0; i < 32; i++, gpio_irq++) {
  250. irq_set_chip_data(gpio_irq, pio);
  251. irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
  252. handle_simple_irq);
  253. }
  254. irq_set_chained_handler(irq, gpio_irq_handler);
  255. }
  256. /*--------------------------------------------------------------------------*/
  257. #ifdef CONFIG_DEBUG_FS
  258. #include <linux/seq_file.h>
  259. /*
  260. * This shows more info than the generic gpio dump code:
  261. * pullups, deglitching, open drain drive.
  262. */
  263. static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
  264. {
  265. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  266. u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr;
  267. unsigned i;
  268. u32 mask;
  269. char bank;
  270. psr = pio_readl(pio, PSR);
  271. osr = pio_readl(pio, OSR);
  272. imr = pio_readl(pio, IMR);
  273. pdsr = pio_readl(pio, PDSR);
  274. pusr = pio_readl(pio, PUSR);
  275. ifsr = pio_readl(pio, IFSR);
  276. mdsr = pio_readl(pio, MDSR);
  277. bank = 'A' + pio->pdev->id;
  278. for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
  279. const char *label;
  280. label = gpiochip_is_requested(chip, i);
  281. if (!label && (imr & mask))
  282. label = "[irq]";
  283. if (!label)
  284. continue;
  285. seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
  286. chip->base + i, bank, i,
  287. label,
  288. (osr & mask) ? "out" : "in ",
  289. (mask & pdsr) ? "hi" : "lo",
  290. (mask & pusr) ? " " : "up");
  291. if (ifsr & mask)
  292. seq_printf(s, " deglitch");
  293. if ((osr & mdsr) & mask)
  294. seq_printf(s, " open-drain");
  295. if (imr & mask)
  296. seq_printf(s, " irq-%d edge-both",
  297. gpio_to_irq(chip->base + i));
  298. seq_printf(s, "\n");
  299. }
  300. }
  301. #else
  302. #define pio_bank_show NULL
  303. #endif
  304. /*--------------------------------------------------------------------------*/
  305. static int __init pio_probe(struct platform_device *pdev)
  306. {
  307. struct pio_device *pio = NULL;
  308. int irq = platform_get_irq(pdev, 0);
  309. int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
  310. BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
  311. pio = &pio_dev[pdev->id];
  312. BUG_ON(!pio->regs);
  313. pio->chip.label = pio->name;
  314. pio->chip.base = pdev->id * 32;
  315. pio->chip.ngpio = 32;
  316. pio->chip.dev = &pdev->dev;
  317. pio->chip.owner = THIS_MODULE;
  318. pio->chip.direction_input = direction_input;
  319. pio->chip.get = gpio_get;
  320. pio->chip.direction_output = direction_output;
  321. pio->chip.set = gpio_set;
  322. pio->chip.dbg_show = pio_bank_show;
  323. gpiochip_add(&pio->chip);
  324. gpio_irq_setup(pio, irq, gpio_irq_base);
  325. platform_set_drvdata(pdev, pio);
  326. printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
  327. pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
  328. return 0;
  329. }
  330. static struct platform_driver pio_driver = {
  331. .driver = {
  332. .name = "pio",
  333. },
  334. };
  335. static int __init pio_init(void)
  336. {
  337. return platform_driver_probe(&pio_driver, pio_probe);
  338. }
  339. postcore_initcall(pio_init);
  340. void __init at32_init_pio(struct platform_device *pdev)
  341. {
  342. struct resource *regs;
  343. struct pio_device *pio;
  344. if (pdev->id > MAX_NR_PIO_DEVICES) {
  345. dev_err(&pdev->dev, "only %d PIO devices supported\n",
  346. MAX_NR_PIO_DEVICES);
  347. return;
  348. }
  349. pio = &pio_dev[pdev->id];
  350. snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
  351. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  352. if (!regs) {
  353. dev_err(&pdev->dev, "no mmio resource defined\n");
  354. return;
  355. }
  356. pio->clk = clk_get(&pdev->dev, "mck");
  357. if (IS_ERR(pio->clk))
  358. /*
  359. * This is a fatal error, but if we continue we might
  360. * be so lucky that we manage to initialize the
  361. * console and display this message...
  362. */
  363. dev_err(&pdev->dev, "no mck clock defined\n");
  364. else
  365. clk_enable(pio->clk);
  366. pio->pdev = pdev;
  367. pio->regs = ioremap(regs->start, resource_size(regs));
  368. /* start with irqs disabled and acked */
  369. pio_writel(pio, IDR, ~0UL);
  370. (void) pio_readl(pio, ISR);
  371. }