intc.c 4.1 KB

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  1. /*
  2. * Copyright (C) 2006, 2008 Atmel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/err.h>
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/syscore_ops.h>
  15. #include <asm/io.h>
  16. #include "intc.h"
  17. struct intc {
  18. void __iomem *regs;
  19. struct irq_chip chip;
  20. #ifdef CONFIG_PM
  21. unsigned long suspend_ipr;
  22. unsigned long saved_ipr[64];
  23. #endif
  24. };
  25. extern struct platform_device at32_intc0_device;
  26. /*
  27. * TODO: We may be able to implement mask/unmask by setting IxM flags
  28. * in the status register.
  29. */
  30. static void intc_mask_irq(struct irq_data *d)
  31. {
  32. }
  33. static void intc_unmask_irq(struct irq_data *d)
  34. {
  35. }
  36. static struct intc intc0 = {
  37. .chip = {
  38. .name = "intc",
  39. .irq_mask = intc_mask_irq,
  40. .irq_unmask = intc_unmask_irq,
  41. },
  42. };
  43. /*
  44. * All interrupts go via intc at some point.
  45. */
  46. asmlinkage void do_IRQ(int level, struct pt_regs *regs)
  47. {
  48. struct pt_regs *old_regs;
  49. unsigned int irq;
  50. unsigned long status_reg;
  51. local_irq_disable();
  52. old_regs = set_irq_regs(regs);
  53. irq_enter();
  54. irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
  55. generic_handle_irq(irq);
  56. /*
  57. * Clear all interrupt level masks so that we may handle
  58. * interrupts during softirq processing. If this is a nested
  59. * interrupt, interrupts must stay globally disabled until we
  60. * return.
  61. */
  62. status_reg = sysreg_read(SR);
  63. status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
  64. | SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
  65. sysreg_write(SR, status_reg);
  66. irq_exit();
  67. set_irq_regs(old_regs);
  68. }
  69. void __init init_IRQ(void)
  70. {
  71. extern void _evba(void);
  72. extern void irq_level0(void);
  73. struct resource *regs;
  74. struct clk *pclk;
  75. unsigned int i;
  76. u32 offset, readback;
  77. regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
  78. if (!regs) {
  79. printk(KERN_EMERG "intc: no mmio resource defined\n");
  80. goto fail;
  81. }
  82. pclk = clk_get(&at32_intc0_device.dev, "pclk");
  83. if (IS_ERR(pclk)) {
  84. printk(KERN_EMERG "intc: no clock defined\n");
  85. goto fail;
  86. }
  87. clk_enable(pclk);
  88. intc0.regs = ioremap(regs->start, resource_size(regs));
  89. if (!intc0.regs) {
  90. printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
  91. (unsigned long)regs->start);
  92. goto fail;
  93. }
  94. /*
  95. * Initialize all interrupts to level 0 (lowest priority). The
  96. * priority level may be changed by calling
  97. * irq_set_priority().
  98. *
  99. */
  100. offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
  101. for (i = 0; i < NR_INTERNAL_IRQS; i++) {
  102. intc_writel(&intc0, INTPR0 + 4 * i, offset);
  103. readback = intc_readl(&intc0, INTPR0 + 4 * i);
  104. if (readback == offset)
  105. irq_set_chip_and_handler(i, &intc0.chip,
  106. handle_simple_irq);
  107. }
  108. /* Unmask all interrupt levels */
  109. sysreg_write(SR, (sysreg_read(SR)
  110. & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
  111. return;
  112. fail:
  113. panic("Interrupt controller initialization failed!\n");
  114. }
  115. #ifdef CONFIG_PM
  116. void intc_set_suspend_handler(unsigned long offset)
  117. {
  118. intc0.suspend_ipr = offset;
  119. }
  120. static int intc_suspend(void)
  121. {
  122. int i;
  123. if (unlikely(!irqs_disabled())) {
  124. pr_err("intc_suspend: called with interrupts enabled\n");
  125. return -EINVAL;
  126. }
  127. if (unlikely(!intc0.suspend_ipr)) {
  128. pr_err("intc_suspend: suspend_ipr not initialized\n");
  129. return -EINVAL;
  130. }
  131. for (i = 0; i < 64; i++) {
  132. intc0.saved_ipr[i] = intc_readl(&intc0, INTPR0 + 4 * i);
  133. intc_writel(&intc0, INTPR0 + 4 * i, intc0.suspend_ipr);
  134. }
  135. return 0;
  136. }
  137. static void intc_resume(void)
  138. {
  139. int i;
  140. for (i = 0; i < 64; i++)
  141. intc_writel(&intc0, INTPR0 + 4 * i, intc0.saved_ipr[i]);
  142. }
  143. #else
  144. #define intc_suspend NULL
  145. #define intc_resume NULL
  146. #endif
  147. static struct syscore_ops intc_syscore_ops = {
  148. .suspend = intc_suspend,
  149. .resume = intc_resume,
  150. };
  151. static int __init intc_init_syscore(void)
  152. {
  153. register_syscore_ops(&intc_syscore_ops);
  154. return 0;
  155. }
  156. device_initcall(intc_init_syscore);
  157. unsigned long intc_get_pending(unsigned int group)
  158. {
  159. return intc_readl(&intc0, INTREQ0 + 4 * group);
  160. }
  161. EXPORT_SYMBOL_GPL(intc_get_pending);