clock.c 9.1 KB

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  1. /* linux/arch/arm/plat-s3c24xx/clock.c
  2. *
  3. * Copyright 2004-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C24XX Core clock control support
  7. *
  8. * Based on, and code from linux/arch/arm/mach-versatile/clock.c
  9. **
  10. ** Copyright (C) 2004 ARM Limited.
  11. ** Written by Deep Blue Solutions Limited.
  12. *
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  27. */
  28. #include <linux/init.h>
  29. #include <linux/module.h>
  30. #include <linux/kernel.h>
  31. #include <linux/list.h>
  32. #include <linux/errno.h>
  33. #include <linux/err.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/sysdev.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/ioport.h>
  38. #include <linux/clk.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/io.h>
  41. #if defined(CONFIG_DEBUG_FS)
  42. #include <linux/debugfs.h>
  43. #endif
  44. #include <mach/hardware.h>
  45. #include <asm/irq.h>
  46. #include <plat/cpu-freq.h>
  47. #include <plat/clock.h>
  48. #include <plat/cpu.h>
  49. #include <linux/serial_core.h>
  50. #include <plat/regs-serial.h> /* for s3c24xx_uart_devs */
  51. /* clock information */
  52. static LIST_HEAD(clocks);
  53. /* We originally used an mutex here, but some contexts (see resume)
  54. * are calling functions such as clk_set_parent() with IRQs disabled
  55. * causing an BUG to be triggered.
  56. */
  57. DEFINE_SPINLOCK(clocks_lock);
  58. /* enable and disable calls for use with the clk struct */
  59. static int clk_null_enable(struct clk *clk, int enable)
  60. {
  61. return 0;
  62. }
  63. int clk_enable(struct clk *clk)
  64. {
  65. if (IS_ERR(clk) || clk == NULL)
  66. return -EINVAL;
  67. clk_enable(clk->parent);
  68. spin_lock(&clocks_lock);
  69. if ((clk->usage++) == 0)
  70. (clk->enable)(clk, 1);
  71. spin_unlock(&clocks_lock);
  72. return 0;
  73. }
  74. void clk_disable(struct clk *clk)
  75. {
  76. if (IS_ERR(clk) || clk == NULL)
  77. return;
  78. spin_lock(&clocks_lock);
  79. if ((--clk->usage) == 0)
  80. (clk->enable)(clk, 0);
  81. spin_unlock(&clocks_lock);
  82. clk_disable(clk->parent);
  83. }
  84. unsigned long clk_get_rate(struct clk *clk)
  85. {
  86. if (IS_ERR(clk))
  87. return 0;
  88. if (clk->rate != 0)
  89. return clk->rate;
  90. if (clk->ops != NULL && clk->ops->get_rate != NULL)
  91. return (clk->ops->get_rate)(clk);
  92. if (clk->parent != NULL)
  93. return clk_get_rate(clk->parent);
  94. return clk->rate;
  95. }
  96. long clk_round_rate(struct clk *clk, unsigned long rate)
  97. {
  98. if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
  99. return (clk->ops->round_rate)(clk, rate);
  100. return rate;
  101. }
  102. int clk_set_rate(struct clk *clk, unsigned long rate)
  103. {
  104. int ret;
  105. if (IS_ERR(clk))
  106. return -EINVAL;
  107. /* We do not default just do a clk->rate = rate as
  108. * the clock may have been made this way by choice.
  109. */
  110. WARN_ON(clk->ops == NULL);
  111. WARN_ON(clk->ops && clk->ops->set_rate == NULL);
  112. if (clk->ops == NULL || clk->ops->set_rate == NULL)
  113. return -EINVAL;
  114. spin_lock(&clocks_lock);
  115. ret = (clk->ops->set_rate)(clk, rate);
  116. spin_unlock(&clocks_lock);
  117. return ret;
  118. }
  119. struct clk *clk_get_parent(struct clk *clk)
  120. {
  121. return clk->parent;
  122. }
  123. int clk_set_parent(struct clk *clk, struct clk *parent)
  124. {
  125. int ret = 0;
  126. if (IS_ERR(clk))
  127. return -EINVAL;
  128. spin_lock(&clocks_lock);
  129. if (clk->ops && clk->ops->set_parent)
  130. ret = (clk->ops->set_parent)(clk, parent);
  131. spin_unlock(&clocks_lock);
  132. return ret;
  133. }
  134. EXPORT_SYMBOL(clk_enable);
  135. EXPORT_SYMBOL(clk_disable);
  136. EXPORT_SYMBOL(clk_get_rate);
  137. EXPORT_SYMBOL(clk_round_rate);
  138. EXPORT_SYMBOL(clk_set_rate);
  139. EXPORT_SYMBOL(clk_get_parent);
  140. EXPORT_SYMBOL(clk_set_parent);
  141. /* base clocks */
  142. int clk_default_setrate(struct clk *clk, unsigned long rate)
  143. {
  144. clk->rate = rate;
  145. return 0;
  146. }
  147. struct clk_ops clk_ops_def_setrate = {
  148. .set_rate = clk_default_setrate,
  149. };
  150. struct clk clk_xtal = {
  151. .name = "xtal",
  152. .rate = 0,
  153. .parent = NULL,
  154. .ctrlbit = 0,
  155. };
  156. struct clk clk_ext = {
  157. .name = "ext",
  158. };
  159. struct clk clk_epll = {
  160. .name = "epll",
  161. };
  162. struct clk clk_mpll = {
  163. .name = "mpll",
  164. .ops = &clk_ops_def_setrate,
  165. };
  166. struct clk clk_upll = {
  167. .name = "upll",
  168. .parent = NULL,
  169. .ctrlbit = 0,
  170. };
  171. struct clk clk_f = {
  172. .name = "fclk",
  173. .rate = 0,
  174. .parent = &clk_mpll,
  175. .ctrlbit = 0,
  176. };
  177. struct clk clk_h = {
  178. .name = "hclk",
  179. .rate = 0,
  180. .parent = NULL,
  181. .ctrlbit = 0,
  182. .ops = &clk_ops_def_setrate,
  183. };
  184. struct clk clk_p = {
  185. .name = "pclk",
  186. .rate = 0,
  187. .parent = NULL,
  188. .ctrlbit = 0,
  189. .ops = &clk_ops_def_setrate,
  190. };
  191. struct clk clk_usb_bus = {
  192. .name = "usb-bus",
  193. .rate = 0,
  194. .parent = &clk_upll,
  195. };
  196. struct clk s3c24xx_uclk = {
  197. .name = "uclk",
  198. };
  199. /* initialise the clock system */
  200. /**
  201. * s3c24xx_register_clock() - register a clock
  202. * @clk: The clock to register
  203. *
  204. * Add the specified clock to the list of clocks known by the system.
  205. */
  206. int s3c24xx_register_clock(struct clk *clk)
  207. {
  208. if (clk->enable == NULL)
  209. clk->enable = clk_null_enable;
  210. /* fill up the clk_lookup structure and register it*/
  211. clk->lookup.dev_id = clk->devname;
  212. clk->lookup.con_id = clk->name;
  213. clk->lookup.clk = clk;
  214. clkdev_add(&clk->lookup);
  215. return 0;
  216. }
  217. /**
  218. * s3c24xx_register_clocks() - register an array of clock pointers
  219. * @clks: Pointer to an array of struct clk pointers
  220. * @nr_clks: The number of clocks in the @clks array.
  221. *
  222. * Call s3c24xx_register_clock() for all the clock pointers contained
  223. * in the @clks list. Returns the number of failures.
  224. */
  225. int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
  226. {
  227. int fails = 0;
  228. for (; nr_clks > 0; nr_clks--, clks++) {
  229. if (s3c24xx_register_clock(*clks) < 0) {
  230. struct clk *clk = *clks;
  231. printk(KERN_ERR "%s: failed to register %p: %s\n",
  232. __func__, clk, clk->name);
  233. fails++;
  234. }
  235. }
  236. return fails;
  237. }
  238. /**
  239. * s3c_register_clocks() - register an array of clocks
  240. * @clkp: Pointer to the first clock in the array.
  241. * @nr_clks: Number of clocks to register.
  242. *
  243. * Call s3c24xx_register_clock() on the @clkp array given, printing an
  244. * error if it fails to register the clock (unlikely).
  245. */
  246. void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
  247. {
  248. int ret;
  249. for (; nr_clks > 0; nr_clks--, clkp++) {
  250. ret = s3c24xx_register_clock(clkp);
  251. if (ret < 0) {
  252. printk(KERN_ERR "Failed to register clock %s (%d)\n",
  253. clkp->name, ret);
  254. }
  255. }
  256. }
  257. /**
  258. * s3c_disable_clocks() - disable an array of clocks
  259. * @clkp: Pointer to the first clock in the array.
  260. * @nr_clks: Number of clocks to register.
  261. *
  262. * for internal use only at initialisation time. disable the clocks in the
  263. * @clkp array.
  264. */
  265. void __init s3c_disable_clocks(struct clk *clkp, int nr_clks)
  266. {
  267. for (; nr_clks > 0; nr_clks--, clkp++)
  268. (clkp->enable)(clkp, 0);
  269. }
  270. /* initialise all the clocks */
  271. int __init s3c24xx_register_baseclocks(unsigned long xtal)
  272. {
  273. printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
  274. clk_xtal.rate = xtal;
  275. /* register our clocks */
  276. if (s3c24xx_register_clock(&clk_xtal) < 0)
  277. printk(KERN_ERR "failed to register master xtal\n");
  278. if (s3c24xx_register_clock(&clk_mpll) < 0)
  279. printk(KERN_ERR "failed to register mpll clock\n");
  280. if (s3c24xx_register_clock(&clk_upll) < 0)
  281. printk(KERN_ERR "failed to register upll clock\n");
  282. if (s3c24xx_register_clock(&clk_f) < 0)
  283. printk(KERN_ERR "failed to register cpu fclk\n");
  284. if (s3c24xx_register_clock(&clk_h) < 0)
  285. printk(KERN_ERR "failed to register cpu hclk\n");
  286. if (s3c24xx_register_clock(&clk_p) < 0)
  287. printk(KERN_ERR "failed to register cpu pclk\n");
  288. return 0;
  289. }
  290. #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
  291. /* debugfs support to trace clock tree hierarchy and attributes */
  292. static struct dentry *clk_debugfs_root;
  293. static int clk_debugfs_register_one(struct clk *c)
  294. {
  295. int err;
  296. struct dentry *d;
  297. struct clk *pa = c->parent;
  298. char s[255];
  299. char *p = s;
  300. p += sprintf(p, "%s", c->devname);
  301. d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
  302. if (!d)
  303. return -ENOMEM;
  304. c->dent = d;
  305. d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usage);
  306. if (!d) {
  307. err = -ENOMEM;
  308. goto err_out;
  309. }
  310. d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
  311. if (!d) {
  312. err = -ENOMEM;
  313. goto err_out;
  314. }
  315. return 0;
  316. err_out:
  317. debugfs_remove_recursive(c->dent);
  318. return err;
  319. }
  320. static int clk_debugfs_register(struct clk *c)
  321. {
  322. int err;
  323. struct clk *pa = c->parent;
  324. if (pa && !pa->dent) {
  325. err = clk_debugfs_register(pa);
  326. if (err)
  327. return err;
  328. }
  329. if (!c->dent) {
  330. err = clk_debugfs_register_one(c);
  331. if (err)
  332. return err;
  333. }
  334. return 0;
  335. }
  336. static int __init clk_debugfs_init(void)
  337. {
  338. struct clk *c;
  339. struct dentry *d;
  340. int err;
  341. d = debugfs_create_dir("clock", NULL);
  342. if (!d)
  343. return -ENOMEM;
  344. clk_debugfs_root = d;
  345. list_for_each_entry(c, &clocks, list) {
  346. err = clk_debugfs_register(c);
  347. if (err)
  348. goto err_out;
  349. }
  350. return 0;
  351. err_out:
  352. debugfs_remove_recursive(clk_debugfs_root);
  353. return err;
  354. }
  355. late_initcall(clk_debugfs_init);
  356. #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */