zynq_soc.h 1.4 KB

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  1. /* arch/arm/mach-zynq/include/mach/zynq_soc.h
  2. *
  3. * Copyright (C) 2011 Xilinx
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #ifndef __MACH_XILINX_SOC_H__
  15. #define __MACH_XILINX_SOC_H__
  16. #define PERIPHERAL_CLOCK_RATE 2500000
  17. /* For now, all mappings are flat (physical = virtual)
  18. */
  19. #define UART0_PHYS 0xE0000000
  20. #define UART0_VIRT UART0_PHYS
  21. #define TTC0_PHYS 0xF8001000
  22. #define TTC0_VIRT TTC0_PHYS
  23. #define PL310_L2CC_PHYS 0xF8F02000
  24. #define PL310_L2CC_VIRT PL310_L2CC_PHYS
  25. #define SCU_PERIPH_PHYS 0xF8F00000
  26. #define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
  27. /* The following are intended for the devices that are mapped early */
  28. #define TTC0_BASE IOMEM(TTC0_VIRT)
  29. #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
  30. #define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100)
  31. #define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000)
  32. #define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
  33. /*
  34. * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
  35. */
  36. #define LL_UART_PADDR UART0_PHYS
  37. #define LL_UART_VADDR UART0_VIRT
  38. #endif