devices.c 13 KB

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  1. /*
  2. * Copyright (C) 2010,2011 Google, Inc.
  3. *
  4. * Author:
  5. * Colin Cross <ccross@android.com>
  6. * Erik Gilling <ccross@android.com>
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/resource.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/i2c-tegra.h>
  24. #include <linux/platform_data/tegra_usb.h>
  25. #include <asm/pmu.h>
  26. #include <mach/irqs.h>
  27. #include <mach/iomap.h>
  28. #include <mach/dma.h>
  29. #include <mach/usb_phy.h>
  30. #include "gpio-names.h"
  31. static struct resource i2c_resource1[] = {
  32. [0] = {
  33. .start = INT_I2C,
  34. .end = INT_I2C,
  35. .flags = IORESOURCE_IRQ,
  36. },
  37. [1] = {
  38. .start = TEGRA_I2C_BASE,
  39. .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
  40. .flags = IORESOURCE_MEM,
  41. },
  42. };
  43. static struct resource i2c_resource2[] = {
  44. [0] = {
  45. .start = INT_I2C2,
  46. .end = INT_I2C2,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. [1] = {
  50. .start = TEGRA_I2C2_BASE,
  51. .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
  52. .flags = IORESOURCE_MEM,
  53. },
  54. };
  55. static struct resource i2c_resource3[] = {
  56. [0] = {
  57. .start = INT_I2C3,
  58. .end = INT_I2C3,
  59. .flags = IORESOURCE_IRQ,
  60. },
  61. [1] = {
  62. .start = TEGRA_I2C3_BASE,
  63. .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
  64. .flags = IORESOURCE_MEM,
  65. },
  66. };
  67. static struct resource i2c_resource4[] = {
  68. [0] = {
  69. .start = INT_DVC,
  70. .end = INT_DVC,
  71. .flags = IORESOURCE_IRQ,
  72. },
  73. [1] = {
  74. .start = TEGRA_DVC_BASE,
  75. .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. };
  79. static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
  80. .bus_clk_rate = 400000,
  81. };
  82. static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
  83. .bus_clk_rate = 400000,
  84. };
  85. static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
  86. .bus_clk_rate = 400000,
  87. };
  88. static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
  89. .bus_clk_rate = 400000,
  90. };
  91. struct platform_device tegra_i2c_device1 = {
  92. .name = "tegra-i2c",
  93. .id = 0,
  94. .resource = i2c_resource1,
  95. .num_resources = ARRAY_SIZE(i2c_resource1),
  96. .dev = {
  97. .platform_data = &tegra_i2c1_platform_data,
  98. },
  99. };
  100. struct platform_device tegra_i2c_device2 = {
  101. .name = "tegra-i2c",
  102. .id = 1,
  103. .resource = i2c_resource2,
  104. .num_resources = ARRAY_SIZE(i2c_resource2),
  105. .dev = {
  106. .platform_data = &tegra_i2c2_platform_data,
  107. },
  108. };
  109. struct platform_device tegra_i2c_device3 = {
  110. .name = "tegra-i2c",
  111. .id = 2,
  112. .resource = i2c_resource3,
  113. .num_resources = ARRAY_SIZE(i2c_resource3),
  114. .dev = {
  115. .platform_data = &tegra_i2c3_platform_data,
  116. },
  117. };
  118. struct platform_device tegra_i2c_device4 = {
  119. .name = "tegra-i2c",
  120. .id = 3,
  121. .resource = i2c_resource4,
  122. .num_resources = ARRAY_SIZE(i2c_resource4),
  123. .dev = {
  124. .platform_data = &tegra_dvc_platform_data,
  125. },
  126. };
  127. static struct resource spi_resource1[] = {
  128. [0] = {
  129. .start = INT_S_LINK1,
  130. .end = INT_S_LINK1,
  131. .flags = IORESOURCE_IRQ,
  132. },
  133. [1] = {
  134. .start = TEGRA_SPI1_BASE,
  135. .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. };
  139. static struct resource spi_resource2[] = {
  140. [0] = {
  141. .start = INT_SPI_2,
  142. .end = INT_SPI_2,
  143. .flags = IORESOURCE_IRQ,
  144. },
  145. [1] = {
  146. .start = TEGRA_SPI2_BASE,
  147. .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
  148. .flags = IORESOURCE_MEM,
  149. },
  150. };
  151. static struct resource spi_resource3[] = {
  152. [0] = {
  153. .start = INT_SPI_3,
  154. .end = INT_SPI_3,
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. [1] = {
  158. .start = TEGRA_SPI3_BASE,
  159. .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
  160. .flags = IORESOURCE_MEM,
  161. },
  162. };
  163. static struct resource spi_resource4[] = {
  164. [0] = {
  165. .start = INT_SPI_4,
  166. .end = INT_SPI_4,
  167. .flags = IORESOURCE_IRQ,
  168. },
  169. [1] = {
  170. .start = TEGRA_SPI4_BASE,
  171. .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
  172. .flags = IORESOURCE_MEM,
  173. },
  174. };
  175. struct platform_device tegra_spi_device1 = {
  176. .name = "spi_tegra",
  177. .id = 0,
  178. .resource = spi_resource1,
  179. .num_resources = ARRAY_SIZE(spi_resource1),
  180. .dev = {
  181. .coherent_dma_mask = 0xffffffff,
  182. },
  183. };
  184. struct platform_device tegra_spi_device2 = {
  185. .name = "spi_tegra",
  186. .id = 1,
  187. .resource = spi_resource2,
  188. .num_resources = ARRAY_SIZE(spi_resource2),
  189. .dev = {
  190. .coherent_dma_mask = 0xffffffff,
  191. },
  192. };
  193. struct platform_device tegra_spi_device3 = {
  194. .name = "spi_tegra",
  195. .id = 2,
  196. .resource = spi_resource3,
  197. .num_resources = ARRAY_SIZE(spi_resource3),
  198. .dev = {
  199. .coherent_dma_mask = 0xffffffff,
  200. },
  201. };
  202. struct platform_device tegra_spi_device4 = {
  203. .name = "spi_tegra",
  204. .id = 3,
  205. .resource = spi_resource4,
  206. .num_resources = ARRAY_SIZE(spi_resource4),
  207. .dev = {
  208. .coherent_dma_mask = 0xffffffff,
  209. },
  210. };
  211. static struct resource sdhci_resource1[] = {
  212. [0] = {
  213. .start = INT_SDMMC1,
  214. .end = INT_SDMMC1,
  215. .flags = IORESOURCE_IRQ,
  216. },
  217. [1] = {
  218. .start = TEGRA_SDMMC1_BASE,
  219. .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. };
  223. static struct resource sdhci_resource2[] = {
  224. [0] = {
  225. .start = INT_SDMMC2,
  226. .end = INT_SDMMC2,
  227. .flags = IORESOURCE_IRQ,
  228. },
  229. [1] = {
  230. .start = TEGRA_SDMMC2_BASE,
  231. .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. };
  235. static struct resource sdhci_resource3[] = {
  236. [0] = {
  237. .start = INT_SDMMC3,
  238. .end = INT_SDMMC3,
  239. .flags = IORESOURCE_IRQ,
  240. },
  241. [1] = {
  242. .start = TEGRA_SDMMC3_BASE,
  243. .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
  244. .flags = IORESOURCE_MEM,
  245. },
  246. };
  247. static struct resource sdhci_resource4[] = {
  248. [0] = {
  249. .start = INT_SDMMC4,
  250. .end = INT_SDMMC4,
  251. .flags = IORESOURCE_IRQ,
  252. },
  253. [1] = {
  254. .start = TEGRA_SDMMC4_BASE,
  255. .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
  256. .flags = IORESOURCE_MEM,
  257. },
  258. };
  259. /* board files should fill in platform_data register the devices themselvs.
  260. * See board-harmony.c for an example
  261. */
  262. struct platform_device tegra_sdhci_device1 = {
  263. .name = "sdhci-tegra",
  264. .id = 0,
  265. .resource = sdhci_resource1,
  266. .num_resources = ARRAY_SIZE(sdhci_resource1),
  267. };
  268. struct platform_device tegra_sdhci_device2 = {
  269. .name = "sdhci-tegra",
  270. .id = 1,
  271. .resource = sdhci_resource2,
  272. .num_resources = ARRAY_SIZE(sdhci_resource2),
  273. };
  274. struct platform_device tegra_sdhci_device3 = {
  275. .name = "sdhci-tegra",
  276. .id = 2,
  277. .resource = sdhci_resource3,
  278. .num_resources = ARRAY_SIZE(sdhci_resource3),
  279. };
  280. struct platform_device tegra_sdhci_device4 = {
  281. .name = "sdhci-tegra",
  282. .id = 3,
  283. .resource = sdhci_resource4,
  284. .num_resources = ARRAY_SIZE(sdhci_resource4),
  285. };
  286. static struct resource tegra_usb1_resources[] = {
  287. [0] = {
  288. .start = TEGRA_USB_BASE,
  289. .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. [1] = {
  293. .start = INT_USB,
  294. .end = INT_USB,
  295. .flags = IORESOURCE_IRQ,
  296. },
  297. };
  298. static struct resource tegra_usb2_resources[] = {
  299. [0] = {
  300. .start = TEGRA_USB2_BASE,
  301. .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
  302. .flags = IORESOURCE_MEM,
  303. },
  304. [1] = {
  305. .start = INT_USB2,
  306. .end = INT_USB2,
  307. .flags = IORESOURCE_IRQ,
  308. },
  309. };
  310. static struct resource tegra_usb3_resources[] = {
  311. [0] = {
  312. .start = TEGRA_USB3_BASE,
  313. .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
  314. .flags = IORESOURCE_MEM,
  315. },
  316. [1] = {
  317. .start = INT_USB3,
  318. .end = INT_USB3,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. };
  322. static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
  323. /* All existing boards use GPIO PV0 for phy reset */
  324. .reset_gpio = TEGRA_GPIO_PV0,
  325. .clk = "cdev2",
  326. };
  327. static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
  328. .operating_mode = TEGRA_USB_OTG,
  329. .power_down_on_bus_suspend = 1,
  330. };
  331. static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
  332. .phy_config = &tegra_ehci2_ulpi_phy_config,
  333. .operating_mode = TEGRA_USB_HOST,
  334. .power_down_on_bus_suspend = 1,
  335. };
  336. static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
  337. .operating_mode = TEGRA_USB_HOST,
  338. .power_down_on_bus_suspend = 1,
  339. };
  340. static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
  341. struct platform_device tegra_ehci1_device = {
  342. .name = "tegra-ehci",
  343. .id = 0,
  344. .dev = {
  345. .dma_mask = &tegra_ehci_dmamask,
  346. .coherent_dma_mask = DMA_BIT_MASK(32),
  347. .platform_data = &tegra_ehci1_pdata,
  348. },
  349. .resource = tegra_usb1_resources,
  350. .num_resources = ARRAY_SIZE(tegra_usb1_resources),
  351. };
  352. struct platform_device tegra_ehci2_device = {
  353. .name = "tegra-ehci",
  354. .id = 1,
  355. .dev = {
  356. .dma_mask = &tegra_ehci_dmamask,
  357. .coherent_dma_mask = DMA_BIT_MASK(32),
  358. .platform_data = &tegra_ehci2_pdata,
  359. },
  360. .resource = tegra_usb2_resources,
  361. .num_resources = ARRAY_SIZE(tegra_usb2_resources),
  362. };
  363. struct platform_device tegra_ehci3_device = {
  364. .name = "tegra-ehci",
  365. .id = 2,
  366. .dev = {
  367. .dma_mask = &tegra_ehci_dmamask,
  368. .coherent_dma_mask = DMA_BIT_MASK(32),
  369. .platform_data = &tegra_ehci3_pdata,
  370. },
  371. .resource = tegra_usb3_resources,
  372. .num_resources = ARRAY_SIZE(tegra_usb3_resources),
  373. };
  374. static struct resource tegra_pmu_resources[] = {
  375. [0] = {
  376. .start = INT_CPU0_PMU_INTR,
  377. .end = INT_CPU0_PMU_INTR,
  378. .flags = IORESOURCE_IRQ,
  379. },
  380. [1] = {
  381. .start = INT_CPU1_PMU_INTR,
  382. .end = INT_CPU1_PMU_INTR,
  383. .flags = IORESOURCE_IRQ,
  384. },
  385. };
  386. struct platform_device tegra_pmu_device = {
  387. .name = "arm-pmu",
  388. .id = ARM_PMU_DEVICE_CPU,
  389. .num_resources = ARRAY_SIZE(tegra_pmu_resources),
  390. .resource = tegra_pmu_resources,
  391. };
  392. static struct resource tegra_uarta_resources[] = {
  393. [0] = {
  394. .start = TEGRA_UARTA_BASE,
  395. .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
  396. .flags = IORESOURCE_MEM,
  397. },
  398. [1] = {
  399. .start = INT_UARTA,
  400. .end = INT_UARTA,
  401. .flags = IORESOURCE_IRQ,
  402. },
  403. };
  404. static struct resource tegra_uartb_resources[] = {
  405. [0] = {
  406. .start = TEGRA_UARTB_BASE,
  407. .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
  408. .flags = IORESOURCE_MEM,
  409. },
  410. [1] = {
  411. .start = INT_UARTB,
  412. .end = INT_UARTB,
  413. .flags = IORESOURCE_IRQ,
  414. },
  415. };
  416. static struct resource tegra_uartc_resources[] = {
  417. [0] = {
  418. .start = TEGRA_UARTC_BASE,
  419. .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
  420. .flags = IORESOURCE_MEM,
  421. },
  422. [1] = {
  423. .start = INT_UARTC,
  424. .end = INT_UARTC,
  425. .flags = IORESOURCE_IRQ,
  426. },
  427. };
  428. static struct resource tegra_uartd_resources[] = {
  429. [0] = {
  430. .start = TEGRA_UARTD_BASE,
  431. .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
  432. .flags = IORESOURCE_MEM,
  433. },
  434. [1] = {
  435. .start = INT_UARTD,
  436. .end = INT_UARTD,
  437. .flags = IORESOURCE_IRQ,
  438. },
  439. };
  440. static struct resource tegra_uarte_resources[] = {
  441. [0] = {
  442. .start = TEGRA_UARTE_BASE,
  443. .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
  444. .flags = IORESOURCE_MEM,
  445. },
  446. [1] = {
  447. .start = INT_UARTE,
  448. .end = INT_UARTE,
  449. .flags = IORESOURCE_IRQ,
  450. },
  451. };
  452. struct platform_device tegra_uarta_device = {
  453. .name = "tegra_uart",
  454. .id = 0,
  455. .num_resources = ARRAY_SIZE(tegra_uarta_resources),
  456. .resource = tegra_uarta_resources,
  457. .dev = {
  458. .coherent_dma_mask = DMA_BIT_MASK(32),
  459. },
  460. };
  461. struct platform_device tegra_uartb_device = {
  462. .name = "tegra_uart",
  463. .id = 1,
  464. .num_resources = ARRAY_SIZE(tegra_uartb_resources),
  465. .resource = tegra_uartb_resources,
  466. .dev = {
  467. .coherent_dma_mask = DMA_BIT_MASK(32),
  468. },
  469. };
  470. struct platform_device tegra_uartc_device = {
  471. .name = "tegra_uart",
  472. .id = 2,
  473. .num_resources = ARRAY_SIZE(tegra_uartc_resources),
  474. .resource = tegra_uartc_resources,
  475. .dev = {
  476. .coherent_dma_mask = DMA_BIT_MASK(32),
  477. },
  478. };
  479. struct platform_device tegra_uartd_device = {
  480. .name = "tegra_uart",
  481. .id = 3,
  482. .num_resources = ARRAY_SIZE(tegra_uartd_resources),
  483. .resource = tegra_uartd_resources,
  484. .dev = {
  485. .coherent_dma_mask = DMA_BIT_MASK(32),
  486. },
  487. };
  488. struct platform_device tegra_uarte_device = {
  489. .name = "tegra_uart",
  490. .id = 4,
  491. .num_resources = ARRAY_SIZE(tegra_uarte_resources),
  492. .resource = tegra_uarte_resources,
  493. .dev = {
  494. .coherent_dma_mask = DMA_BIT_MASK(32),
  495. },
  496. };
  497. static struct resource i2s_resource1[] = {
  498. [0] = {
  499. .start = INT_I2S1,
  500. .end = INT_I2S1,
  501. .flags = IORESOURCE_IRQ
  502. },
  503. [1] = {
  504. .start = TEGRA_DMA_REQ_SEL_I2S_1,
  505. .end = TEGRA_DMA_REQ_SEL_I2S_1,
  506. .flags = IORESOURCE_DMA
  507. },
  508. [2] = {
  509. .start = TEGRA_I2S1_BASE,
  510. .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
  511. .flags = IORESOURCE_MEM
  512. }
  513. };
  514. static struct resource i2s_resource2[] = {
  515. [0] = {
  516. .start = INT_I2S2,
  517. .end = INT_I2S2,
  518. .flags = IORESOURCE_IRQ
  519. },
  520. [1] = {
  521. .start = TEGRA_DMA_REQ_SEL_I2S2_1,
  522. .end = TEGRA_DMA_REQ_SEL_I2S2_1,
  523. .flags = IORESOURCE_DMA
  524. },
  525. [2] = {
  526. .start = TEGRA_I2S2_BASE,
  527. .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
  528. .flags = IORESOURCE_MEM
  529. }
  530. };
  531. struct platform_device tegra_i2s_device1 = {
  532. .name = "tegra-i2s",
  533. .id = 0,
  534. .resource = i2s_resource1,
  535. .num_resources = ARRAY_SIZE(i2s_resource1),
  536. };
  537. struct platform_device tegra_i2s_device2 = {
  538. .name = "tegra-i2s",
  539. .id = 1,
  540. .resource = i2s_resource2,
  541. .num_resources = ARRAY_SIZE(i2s_resource2),
  542. };
  543. static struct resource tegra_das_resources[] = {
  544. [0] = {
  545. .start = TEGRA_APB_MISC_DAS_BASE,
  546. .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
  547. .flags = IORESOURCE_MEM,
  548. },
  549. };
  550. struct platform_device tegra_das_device = {
  551. .name = "tegra-das",
  552. .id = -1,
  553. .num_resources = ARRAY_SIZE(tegra_das_resources),
  554. .resource = tegra_das_resources,
  555. };
  556. struct platform_device tegra_pcm_device = {
  557. .name = "tegra-pcm-audio",
  558. .id = -1,
  559. };