realview_eb.c 13 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_eb.c
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/sysdev.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/amba/pl022.h>
  28. #include <linux/io.h>
  29. #include <mach/hardware.h>
  30. #include <asm/irq.h>
  31. #include <asm/leds.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/pmu.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/hardware/gic.h>
  36. #include <asm/hardware/cache-l2x0.h>
  37. #include <asm/localtimer.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/mach/time.h>
  41. #include <mach/board-eb.h>
  42. #include <mach/irqs.h>
  43. #include "core.h"
  44. static struct map_desc realview_eb_io_desc[] __initdata = {
  45. {
  46. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  47. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  48. .length = SZ_4K,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
  52. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
  53. .length = SZ_4K,
  54. .type = MT_DEVICE,
  55. }, {
  56. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
  57. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
  58. .length = SZ_4K,
  59. .type = MT_DEVICE,
  60. }, {
  61. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  62. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  63. .length = SZ_4K,
  64. .type = MT_DEVICE,
  65. }, {
  66. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
  67. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
  68. .length = SZ_4K,
  69. .type = MT_DEVICE,
  70. }, {
  71. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
  72. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
  73. .length = SZ_4K,
  74. .type = MT_DEVICE,
  75. },
  76. #ifdef CONFIG_DEBUG_LL
  77. {
  78. .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
  79. .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
  80. .length = SZ_4K,
  81. .type = MT_DEVICE,
  82. }
  83. #endif
  84. };
  85. static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  86. {
  87. .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
  88. .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
  89. .length = SZ_4K,
  90. .type = MT_DEVICE,
  91. }, {
  92. .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
  93. .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
  94. .length = SZ_4K,
  95. .type = MT_DEVICE,
  96. }, {
  97. .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
  98. .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
  99. .length = SZ_8K,
  100. .type = MT_DEVICE,
  101. }
  102. };
  103. static void __init realview_eb_map_io(void)
  104. {
  105. iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
  106. if (core_tile_eb11mp() || core_tile_a9mp())
  107. iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
  108. }
  109. static struct pl061_platform_data gpio0_plat_data = {
  110. .gpio_base = 0,
  111. .irq_base = -1,
  112. };
  113. static struct pl061_platform_data gpio1_plat_data = {
  114. .gpio_base = 8,
  115. .irq_base = -1,
  116. };
  117. static struct pl061_platform_data gpio2_plat_data = {
  118. .gpio_base = 16,
  119. .irq_base = -1,
  120. };
  121. static struct pl022_ssp_controller ssp0_plat_data = {
  122. .bus_id = 0,
  123. .enable_dma = 0,
  124. .num_chipselect = 1,
  125. };
  126. /*
  127. * RealView EB AMBA devices
  128. */
  129. /*
  130. * These devices are connected via the core APB bridge
  131. */
  132. #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
  133. #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
  134. #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
  135. #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
  136. #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
  137. #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
  138. /*
  139. * These devices are connected directly to the multi-layer AHB switch
  140. */
  141. #define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
  142. #define MPMC_IRQ { NO_IRQ, NO_IRQ }
  143. #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
  144. #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
  145. /*
  146. * These devices are connected via the core APB bridge
  147. */
  148. #define SCTL_IRQ { NO_IRQ, NO_IRQ }
  149. #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
  150. #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
  151. #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
  152. #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
  153. /*
  154. * These devices are connected via the DMA APB bridge
  155. */
  156. #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
  157. #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
  158. #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
  159. #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
  160. #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
  161. #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
  162. /* FPGA Primecells */
  163. AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  164. AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  165. AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  166. AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  167. AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
  168. /* DevChip Primecells */
  169. AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL);
  170. AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
  171. AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL);
  172. AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  173. AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
  174. AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
  175. AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  176. AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  177. AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
  178. AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
  179. AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
  180. AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
  181. AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
  182. AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
  183. static struct amba_device *amba_devs[] __initdata = {
  184. &dmac_device,
  185. &uart0_device,
  186. &uart1_device,
  187. &uart2_device,
  188. &uart3_device,
  189. &smc_device,
  190. &clcd_device,
  191. &sctl_device,
  192. &wdog_device,
  193. &gpio0_device,
  194. &gpio1_device,
  195. &gpio2_device,
  196. &rtc_device,
  197. &sci0_device,
  198. &ssp0_device,
  199. &aaci_device,
  200. &mmc0_device,
  201. &kmi0_device,
  202. &kmi1_device,
  203. };
  204. /*
  205. * RealView EB platform devices
  206. */
  207. static struct resource realview_eb_flash_resource = {
  208. .start = REALVIEW_EB_FLASH_BASE,
  209. .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
  210. .flags = IORESOURCE_MEM,
  211. };
  212. static struct resource realview_eb_eth_resources[] = {
  213. [0] = {
  214. .start = REALVIEW_EB_ETH_BASE,
  215. .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. [1] = {
  219. .start = IRQ_EB_ETH,
  220. .end = IRQ_EB_ETH,
  221. .flags = IORESOURCE_IRQ,
  222. },
  223. };
  224. /*
  225. * Detect and register the correct Ethernet device. RealView/EB rev D
  226. * platforms use the newer SMSC LAN9118 Ethernet chip
  227. */
  228. static int eth_device_register(void)
  229. {
  230. void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
  231. const char *name = NULL;
  232. u32 idrev;
  233. if (!eth_addr)
  234. return -ENOMEM;
  235. idrev = readl(eth_addr + 0x50);
  236. if ((idrev & 0xFFFF0000) != 0x01180000)
  237. /* SMSC LAN9118 not present, use LAN91C111 instead */
  238. name = "smc91x";
  239. iounmap(eth_addr);
  240. return realview_eth_register(name, realview_eb_eth_resources);
  241. }
  242. static struct resource realview_eb_isp1761_resources[] = {
  243. [0] = {
  244. .start = REALVIEW_EB_USB_BASE,
  245. .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
  246. .flags = IORESOURCE_MEM,
  247. },
  248. [1] = {
  249. .start = IRQ_EB_USB,
  250. .end = IRQ_EB_USB,
  251. .flags = IORESOURCE_IRQ,
  252. },
  253. };
  254. static struct resource pmu_resources[] = {
  255. [0] = {
  256. .start = IRQ_EB11MP_PMU_CPU0,
  257. .end = IRQ_EB11MP_PMU_CPU0,
  258. .flags = IORESOURCE_IRQ,
  259. },
  260. [1] = {
  261. .start = IRQ_EB11MP_PMU_CPU1,
  262. .end = IRQ_EB11MP_PMU_CPU1,
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. [2] = {
  266. .start = IRQ_EB11MP_PMU_CPU2,
  267. .end = IRQ_EB11MP_PMU_CPU2,
  268. .flags = IORESOURCE_IRQ,
  269. },
  270. [3] = {
  271. .start = IRQ_EB11MP_PMU_CPU3,
  272. .end = IRQ_EB11MP_PMU_CPU3,
  273. .flags = IORESOURCE_IRQ,
  274. },
  275. };
  276. static struct platform_device pmu_device = {
  277. .name = "arm-pmu",
  278. .id = ARM_PMU_DEVICE_CPU,
  279. .num_resources = ARRAY_SIZE(pmu_resources),
  280. .resource = pmu_resources,
  281. };
  282. static struct resource char_lcd_resources[] = {
  283. {
  284. .start = REALVIEW_CHAR_LCD_BASE,
  285. .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
  286. .flags = IORESOURCE_MEM,
  287. },
  288. {
  289. .start = IRQ_EB_CHARLCD,
  290. .end = IRQ_EB_CHARLCD,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. };
  294. static struct platform_device char_lcd_device = {
  295. .name = "arm-charlcd",
  296. .id = -1,
  297. .num_resources = ARRAY_SIZE(char_lcd_resources),
  298. .resource = char_lcd_resources,
  299. };
  300. static void __init gic_init_irq(void)
  301. {
  302. if (core_tile_eb11mp() || core_tile_a9mp()) {
  303. unsigned int pldctrl;
  304. /* new irq mode */
  305. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  306. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  307. pldctrl |= 0x00800000;
  308. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  309. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  310. /* core tile GIC, primary */
  311. gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
  312. __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
  313. #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
  314. /* board GIC, secondary */
  315. gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  316. __io_address(REALVIEW_EB_GIC_CPU_BASE));
  317. gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
  318. #endif
  319. } else {
  320. /* board GIC, primary */
  321. gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  322. __io_address(REALVIEW_EB_GIC_CPU_BASE));
  323. }
  324. }
  325. /*
  326. * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
  327. */
  328. static void realview_eb11mp_fixup(void)
  329. {
  330. /* AMBA devices */
  331. dmac_device.irq[0] = IRQ_EB11MP_DMA;
  332. uart0_device.irq[0] = IRQ_EB11MP_UART0;
  333. uart1_device.irq[0] = IRQ_EB11MP_UART1;
  334. uart2_device.irq[0] = IRQ_EB11MP_UART2;
  335. uart3_device.irq[0] = IRQ_EB11MP_UART3;
  336. clcd_device.irq[0] = IRQ_EB11MP_CLCD;
  337. wdog_device.irq[0] = IRQ_EB11MP_WDOG;
  338. gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
  339. gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
  340. gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
  341. rtc_device.irq[0] = IRQ_EB11MP_RTC;
  342. sci0_device.irq[0] = IRQ_EB11MP_SCI;
  343. ssp0_device.irq[0] = IRQ_EB11MP_SSP;
  344. aaci_device.irq[0] = IRQ_EB11MP_AACI;
  345. mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
  346. mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
  347. kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
  348. kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
  349. /* platform devices */
  350. realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
  351. realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
  352. realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
  353. realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
  354. }
  355. static void __init realview_eb_timer_init(void)
  356. {
  357. unsigned int timer_irq;
  358. timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
  359. timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
  360. timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
  361. timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
  362. if (core_tile_eb11mp() || core_tile_a9mp()) {
  363. #ifdef CONFIG_LOCAL_TIMERS
  364. twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
  365. #endif
  366. timer_irq = IRQ_EB11MP_TIMER0_1;
  367. } else
  368. timer_irq = IRQ_EB_TIMER0_1;
  369. realview_timer_init(timer_irq);
  370. }
  371. static struct sys_timer realview_eb_timer = {
  372. .init = realview_eb_timer_init,
  373. };
  374. static void realview_eb_reset(char mode)
  375. {
  376. void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
  377. void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
  378. /*
  379. * To reset, we hit the on-board reset register
  380. * in the system FPGA
  381. */
  382. __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
  383. if (core_tile_eb11mp())
  384. __raw_writel(0x0008, reset_ctrl);
  385. }
  386. static void __init realview_eb_init(void)
  387. {
  388. int i;
  389. if (core_tile_eb11mp() || core_tile_a9mp()) {
  390. realview_eb11mp_fixup();
  391. #ifdef CONFIG_CACHE_L2X0
  392. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  393. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  394. l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
  395. #endif
  396. platform_device_register(&pmu_device);
  397. }
  398. realview_flash_register(&realview_eb_flash_resource, 1);
  399. platform_device_register(&realview_i2c_device);
  400. platform_device_register(&char_lcd_device);
  401. eth_device_register();
  402. realview_usb_register(realview_eb_isp1761_resources);
  403. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  404. struct amba_device *d = amba_devs[i];
  405. amba_device_register(d, &iomem_resource);
  406. }
  407. #ifdef CONFIG_LEDS
  408. leds_event = realview_leds_event;
  409. #endif
  410. realview_reset = realview_eb_reset;
  411. }
  412. MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
  413. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  414. .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
  415. .fixup = realview_fixup,
  416. .map_io = realview_eb_map_io,
  417. .init_early = realview_init_early,
  418. .init_irq = gic_init_irq,
  419. .timer = &realview_eb_timer,
  420. .init_machine = realview_eb_init,
  421. #ifdef CONFIG_ZONE_DMA
  422. .dma_zone_size = SZ_256M,
  423. #endif
  424. MACHINE_END