viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/major.h>
  32. #include <linux/module.h>
  33. #include <linux/pm.h>
  34. #include <linux/sched.h>
  35. #include <linux/gpio.h>
  36. #include <linux/jiffies.h>
  37. #include <linux/i2c-gpio.h>
  38. #include <linux/i2c/pxa-i2c.h>
  39. #include <linux/serial_8250.h>
  40. #include <linux/smc91x.h>
  41. #include <linux/pwm_backlight.h>
  42. #include <linux/usb/isp116x.h>
  43. #include <linux/mtd/mtd.h>
  44. #include <linux/mtd/partitions.h>
  45. #include <linux/mtd/physmap.h>
  46. #include <linux/syscore_ops.h>
  47. #include <mach/pxa25x.h>
  48. #include <mach/audio.h>
  49. #include <mach/pxafb.h>
  50. #include <mach/regs-uart.h>
  51. #include <mach/arcom-pcmcia.h>
  52. #include <mach/viper.h>
  53. #include <asm/setup.h>
  54. #include <asm/mach-types.h>
  55. #include <asm/irq.h>
  56. #include <asm/sizes.h>
  57. #include <asm/mach/arch.h>
  58. #include <asm/mach/map.h>
  59. #include <asm/mach/irq.h>
  60. #include "generic.h"
  61. #include "devices.h"
  62. static unsigned int icr;
  63. static void viper_icr_set_bit(unsigned int bit)
  64. {
  65. icr |= bit;
  66. VIPER_ICR = icr;
  67. }
  68. static void viper_icr_clear_bit(unsigned int bit)
  69. {
  70. icr &= ~bit;
  71. VIPER_ICR = icr;
  72. }
  73. /* This function is used from the pcmcia module to reset the CF */
  74. static void viper_cf_reset(int state)
  75. {
  76. if (state)
  77. viper_icr_set_bit(VIPER_ICR_CF_RST);
  78. else
  79. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  80. }
  81. static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  82. .cd_gpio = VIPER_CF_CD_GPIO,
  83. .rdy_gpio = VIPER_CF_RDY_GPIO,
  84. .pwr_gpio = VIPER_CF_POWER_GPIO,
  85. .reset = viper_cf_reset,
  86. };
  87. static struct platform_device viper_pcmcia_device = {
  88. .name = "viper-pcmcia",
  89. .id = -1,
  90. .dev = {
  91. .platform_data = &viper_pcmcia_info,
  92. },
  93. };
  94. /*
  95. * The CPLD version register was not present on VIPER boards prior to
  96. * v2i1. On v1 boards where the version register is not present we
  97. * will just read back the previous value from the databus.
  98. *
  99. * Therefore we do two reads. The first time we write 0 to the
  100. * (read-only) register before reading and the second time we write
  101. * 0xff first. If the two reads do not match or they read back as 0xff
  102. * or 0x00 then we have version 1 hardware.
  103. */
  104. static u8 viper_hw_version(void)
  105. {
  106. u8 v1, v2;
  107. unsigned long flags;
  108. local_irq_save(flags);
  109. VIPER_VERSION = 0;
  110. v1 = VIPER_VERSION;
  111. VIPER_VERSION = 0xff;
  112. v2 = VIPER_VERSION;
  113. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  114. local_irq_restore(flags);
  115. return v1;
  116. }
  117. /* CPU system core operations. */
  118. static int viper_cpu_suspend(void)
  119. {
  120. viper_icr_set_bit(VIPER_ICR_R_DIS);
  121. return 0;
  122. }
  123. static void viper_cpu_resume(void)
  124. {
  125. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  126. }
  127. static struct syscore_ops viper_cpu_syscore_ops = {
  128. .suspend = viper_cpu_suspend,
  129. .resume = viper_cpu_resume,
  130. };
  131. static unsigned int current_voltage_divisor;
  132. /*
  133. * If force is not true then step from existing to new divisor. If
  134. * force is true then jump straight to the new divisor. Stepping is
  135. * used because if the jump in voltage is too large, the VCC can dip
  136. * too low and the regulator cuts out.
  137. *
  138. * force can be used to initialize the divisor to a know state by
  139. * setting the value for the current clock speed, since we are already
  140. * running at that speed we know the voltage should be pretty close so
  141. * the jump won't be too large
  142. */
  143. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  144. {
  145. int i = 0;
  146. unsigned int divisor = 0;
  147. const char *v;
  148. if (khz < 200000) {
  149. v = "1.0"; divisor = 0xfff;
  150. } else if (khz < 300000) {
  151. v = "1.1"; divisor = 0xde5;
  152. } else {
  153. v = "1.3"; divisor = 0x325;
  154. }
  155. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  156. v, (int)khz / 1000, (int)khz % 1000);
  157. #define STEP 0x100
  158. do {
  159. int step;
  160. if (force)
  161. step = divisor;
  162. else if (current_voltage_divisor < divisor - STEP)
  163. step = current_voltage_divisor + STEP;
  164. else if (current_voltage_divisor > divisor + STEP)
  165. step = current_voltage_divisor - STEP;
  166. else
  167. step = divisor;
  168. force = 0;
  169. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  170. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  171. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  172. udelay(1);
  173. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  174. udelay(1);
  175. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  176. udelay(1);
  177. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  178. }
  179. udelay(1);
  180. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  181. udelay(1);
  182. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  183. current_voltage_divisor = step;
  184. } while (current_voltage_divisor != divisor);
  185. }
  186. /* Interrupt handling */
  187. static unsigned long viper_irq_enabled_mask;
  188. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  189. static const int viper_isa_irq_map[] = {
  190. 0, /* ISA irq #0, invalid */
  191. 0, /* ISA irq #1, invalid */
  192. 0, /* ISA irq #2, invalid */
  193. 1 << 0, /* ISA irq #3 */
  194. 1 << 1, /* ISA irq #4 */
  195. 1 << 2, /* ISA irq #5 */
  196. 1 << 3, /* ISA irq #6 */
  197. 1 << 4, /* ISA irq #7 */
  198. 0, /* ISA irq #8, invalid */
  199. 1 << 8, /* ISA irq #9 */
  200. 1 << 5, /* ISA irq #10 */
  201. 1 << 6, /* ISA irq #11 */
  202. 1 << 7, /* ISA irq #12 */
  203. 0, /* ISA irq #13, invalid */
  204. 1 << 9, /* ISA irq #14 */
  205. 1 << 10, /* ISA irq #15 */
  206. };
  207. static inline int viper_irq_to_bitmask(unsigned int irq)
  208. {
  209. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  210. }
  211. static inline int viper_bit_to_irq(int bit)
  212. {
  213. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  214. }
  215. static void viper_ack_irq(struct irq_data *d)
  216. {
  217. int viper_irq = viper_irq_to_bitmask(d->irq);
  218. if (viper_irq & 0xff)
  219. VIPER_LO_IRQ_STATUS = viper_irq;
  220. else
  221. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  222. }
  223. static void viper_mask_irq(struct irq_data *d)
  224. {
  225. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
  226. }
  227. static void viper_unmask_irq(struct irq_data *d)
  228. {
  229. viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
  230. }
  231. static inline unsigned long viper_irq_pending(void)
  232. {
  233. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  234. viper_irq_enabled_mask;
  235. }
  236. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  237. {
  238. unsigned long pending;
  239. pending = viper_irq_pending();
  240. do {
  241. /* we're in a chained irq handler,
  242. * so ack the interrupt by hand */
  243. desc->irq_data.chip->irq_ack(&desc->irq_data);
  244. if (likely(pending)) {
  245. irq = viper_bit_to_irq(__ffs(pending));
  246. generic_handle_irq(irq);
  247. }
  248. pending = viper_irq_pending();
  249. } while (pending);
  250. }
  251. static struct irq_chip viper_irq_chip = {
  252. .name = "ISA",
  253. .irq_ack = viper_ack_irq,
  254. .irq_mask = viper_mask_irq,
  255. .irq_unmask = viper_unmask_irq
  256. };
  257. static void __init viper_init_irq(void)
  258. {
  259. int level;
  260. int isa_irq;
  261. pxa25x_init_irq();
  262. /* setup ISA IRQs */
  263. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  264. isa_irq = viper_bit_to_irq(level);
  265. irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
  266. handle_edge_irq);
  267. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  268. }
  269. irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  270. viper_irq_handler);
  271. irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  272. }
  273. /* Flat Panel */
  274. static struct pxafb_mode_info fb_mode_info[] = {
  275. {
  276. .pixclock = 157500,
  277. .xres = 320,
  278. .yres = 240,
  279. .bpp = 16,
  280. .hsync_len = 63,
  281. .left_margin = 7,
  282. .right_margin = 13,
  283. .vsync_len = 20,
  284. .upper_margin = 0,
  285. .lower_margin = 0,
  286. .sync = 0,
  287. },
  288. };
  289. static struct pxafb_mach_info fb_info = {
  290. .modes = fb_mode_info,
  291. .num_modes = 1,
  292. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  293. };
  294. static int viper_backlight_init(struct device *dev)
  295. {
  296. int ret;
  297. /* GPIO9 and 10 control FB backlight. Initialise to off */
  298. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  299. if (ret)
  300. goto err_request_bckl;
  301. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  302. if (ret)
  303. goto err_request_lcd;
  304. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  305. if (ret)
  306. goto err_dir;
  307. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  308. if (ret)
  309. goto err_dir;
  310. return 0;
  311. err_dir:
  312. gpio_free(VIPER_LCD_EN_GPIO);
  313. err_request_lcd:
  314. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  315. err_request_bckl:
  316. dev_err(dev, "Failed to setup LCD GPIOs\n");
  317. return ret;
  318. }
  319. static int viper_backlight_notify(struct device *dev, int brightness)
  320. {
  321. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  322. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  323. return brightness;
  324. }
  325. static void viper_backlight_exit(struct device *dev)
  326. {
  327. gpio_free(VIPER_LCD_EN_GPIO);
  328. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  329. }
  330. static struct platform_pwm_backlight_data viper_backlight_data = {
  331. .pwm_id = 0,
  332. .max_brightness = 100,
  333. .dft_brightness = 100,
  334. .pwm_period_ns = 1000000,
  335. .init = viper_backlight_init,
  336. .notify = viper_backlight_notify,
  337. .exit = viper_backlight_exit,
  338. };
  339. static struct platform_device viper_backlight_device = {
  340. .name = "pwm-backlight",
  341. .dev = {
  342. .parent = &pxa25x_device_pwm0.dev,
  343. .platform_data = &viper_backlight_data,
  344. },
  345. };
  346. /* Ethernet */
  347. static struct resource smc91x_resources[] = {
  348. [0] = {
  349. .name = "smc91x-regs",
  350. .start = VIPER_ETH_PHYS + 0x300,
  351. .end = VIPER_ETH_PHYS + 0x30f,
  352. .flags = IORESOURCE_MEM,
  353. },
  354. [1] = {
  355. .start = gpio_to_irq(VIPER_ETH_GPIO),
  356. .end = gpio_to_irq(VIPER_ETH_GPIO),
  357. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  358. },
  359. [2] = {
  360. .name = "smc91x-data32",
  361. .start = VIPER_ETH_DATA_PHYS,
  362. .end = VIPER_ETH_DATA_PHYS + 3,
  363. .flags = IORESOURCE_MEM,
  364. },
  365. };
  366. static struct smc91x_platdata viper_smc91x_info = {
  367. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  368. .leda = RPC_LED_100_10,
  369. .ledb = RPC_LED_TX_RX,
  370. };
  371. static struct platform_device smc91x_device = {
  372. .name = "smc91x",
  373. .id = -1,
  374. .num_resources = ARRAY_SIZE(smc91x_resources),
  375. .resource = smc91x_resources,
  376. .dev = {
  377. .platform_data = &viper_smc91x_info,
  378. },
  379. };
  380. /* i2c */
  381. static struct i2c_gpio_platform_data i2c_bus_data = {
  382. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  383. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  384. .udelay = 10,
  385. .timeout = HZ,
  386. };
  387. static struct platform_device i2c_bus_device = {
  388. .name = "i2c-gpio",
  389. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  390. .dev = {
  391. .platform_data = &i2c_bus_data,
  392. }
  393. };
  394. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  395. {
  396. I2C_BOARD_INFO("ds1338", 0x68),
  397. },
  398. };
  399. /*
  400. * Serial configuration:
  401. * You can either have the standard PXA ports driven by the PXA driver,
  402. * or all the ports (PXA + 16850) driven by the 8250 driver.
  403. * Choose your poison.
  404. */
  405. static struct resource viper_serial_resources[] = {
  406. #ifndef CONFIG_SERIAL_PXA
  407. {
  408. .start = 0x40100000,
  409. .end = 0x4010001f,
  410. .flags = IORESOURCE_MEM,
  411. },
  412. {
  413. .start = 0x40200000,
  414. .end = 0x4020001f,
  415. .flags = IORESOURCE_MEM,
  416. },
  417. {
  418. .start = 0x40700000,
  419. .end = 0x4070001f,
  420. .flags = IORESOURCE_MEM,
  421. },
  422. {
  423. .start = VIPER_UARTA_PHYS,
  424. .end = VIPER_UARTA_PHYS + 0xf,
  425. .flags = IORESOURCE_MEM,
  426. },
  427. {
  428. .start = VIPER_UARTB_PHYS,
  429. .end = VIPER_UARTB_PHYS + 0xf,
  430. .flags = IORESOURCE_MEM,
  431. },
  432. #else
  433. {
  434. 0,
  435. },
  436. #endif
  437. };
  438. static struct plat_serial8250_port serial_platform_data[] = {
  439. #ifndef CONFIG_SERIAL_PXA
  440. /* Internal UARTs */
  441. {
  442. .membase = (void *)&FFUART,
  443. .mapbase = __PREG(FFUART),
  444. .irq = IRQ_FFUART,
  445. .uartclk = 921600 * 16,
  446. .regshift = 2,
  447. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  448. .iotype = UPIO_MEM,
  449. },
  450. {
  451. .membase = (void *)&BTUART,
  452. .mapbase = __PREG(BTUART),
  453. .irq = IRQ_BTUART,
  454. .uartclk = 921600 * 16,
  455. .regshift = 2,
  456. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  457. .iotype = UPIO_MEM,
  458. },
  459. {
  460. .membase = (void *)&STUART,
  461. .mapbase = __PREG(STUART),
  462. .irq = IRQ_STUART,
  463. .uartclk = 921600 * 16,
  464. .regshift = 2,
  465. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  466. .iotype = UPIO_MEM,
  467. },
  468. /* External UARTs */
  469. {
  470. .mapbase = VIPER_UARTA_PHYS,
  471. .irq = gpio_to_irq(VIPER_UARTA_GPIO),
  472. .irqflags = IRQF_TRIGGER_RISING,
  473. .uartclk = 1843200,
  474. .regshift = 1,
  475. .iotype = UPIO_MEM,
  476. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  477. UPF_SKIP_TEST,
  478. },
  479. {
  480. .mapbase = VIPER_UARTB_PHYS,
  481. .irq = gpio_to_irq(VIPER_UARTB_GPIO),
  482. .irqflags = IRQF_TRIGGER_RISING,
  483. .uartclk = 1843200,
  484. .regshift = 1,
  485. .iotype = UPIO_MEM,
  486. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  487. UPF_SKIP_TEST,
  488. },
  489. #endif
  490. { },
  491. };
  492. static struct platform_device serial_device = {
  493. .name = "serial8250",
  494. .id = 0,
  495. .dev = {
  496. .platform_data = serial_platform_data,
  497. },
  498. .num_resources = ARRAY_SIZE(viper_serial_resources),
  499. .resource = viper_serial_resources,
  500. };
  501. /* USB */
  502. static void isp116x_delay(struct device *dev, int delay)
  503. {
  504. ndelay(delay);
  505. }
  506. static struct resource isp116x_resources[] = {
  507. [0] = { /* DATA */
  508. .start = VIPER_USB_PHYS + 0,
  509. .end = VIPER_USB_PHYS + 1,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. [1] = { /* ADDR */
  513. .start = VIPER_USB_PHYS + 2,
  514. .end = VIPER_USB_PHYS + 3,
  515. .flags = IORESOURCE_MEM,
  516. },
  517. [2] = {
  518. .start = gpio_to_irq(VIPER_USB_GPIO),
  519. .end = gpio_to_irq(VIPER_USB_GPIO),
  520. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  521. },
  522. };
  523. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  524. static struct isp116x_platform_data isp116x_platform_data = {
  525. /* Enable internal resistors on downstream ports */
  526. .sel15Kres = 1,
  527. /* On-chip overcurrent protection */
  528. .oc_enable = 1,
  529. /* INT output polarity */
  530. .int_act_high = 1,
  531. /* INT edge or level triggered */
  532. .int_edge_triggered = 0,
  533. /* WAKEUP pin connected - NOT SUPPORTED */
  534. /* .remote_wakeup_connected = 0, */
  535. /* Wakeup by devices on usb bus enabled */
  536. .remote_wakeup_enable = 0,
  537. .delay = isp116x_delay,
  538. };
  539. static struct platform_device isp116x_device = {
  540. .name = "isp116x-hcd",
  541. .id = -1,
  542. .num_resources = ARRAY_SIZE(isp116x_resources),
  543. .resource = isp116x_resources,
  544. .dev = {
  545. .platform_data = &isp116x_platform_data,
  546. },
  547. };
  548. /* MTD */
  549. static struct resource mtd_resources[] = {
  550. [0] = { /* RedBoot config + filesystem flash */
  551. .start = VIPER_FLASH_PHYS,
  552. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  553. .flags = IORESOURCE_MEM,
  554. },
  555. [1] = { /* Boot flash */
  556. .start = VIPER_BOOT_PHYS,
  557. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  558. .flags = IORESOURCE_MEM,
  559. },
  560. [2] = { /*
  561. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  562. * (each byte is on a 16bit boundary).
  563. */
  564. .start = _VIPER_SRAM_BASE,
  565. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  566. .flags = IORESOURCE_MEM,
  567. },
  568. };
  569. static struct mtd_partition viper_boot_flash_partition = {
  570. .name = "RedBoot",
  571. .size = SZ_1M,
  572. .offset = 0,
  573. .mask_flags = MTD_WRITEABLE, /* force R/O */
  574. };
  575. static struct physmap_flash_data viper_flash_data[] = {
  576. [0] = {
  577. .width = 2,
  578. .parts = NULL,
  579. .nr_parts = 0,
  580. },
  581. [1] = {
  582. .width = 2,
  583. .parts = &viper_boot_flash_partition,
  584. .nr_parts = 1,
  585. },
  586. };
  587. static struct platform_device viper_mtd_devices[] = {
  588. [0] = {
  589. .name = "physmap-flash",
  590. .id = 0,
  591. .dev = {
  592. .platform_data = &viper_flash_data[0],
  593. },
  594. .resource = &mtd_resources[0],
  595. .num_resources = 1,
  596. },
  597. [1] = {
  598. .name = "physmap-flash",
  599. .id = 1,
  600. .dev = {
  601. .platform_data = &viper_flash_data[1],
  602. },
  603. .resource = &mtd_resources[1],
  604. .num_resources = 1,
  605. },
  606. };
  607. static struct platform_device *viper_devs[] __initdata = {
  608. &smc91x_device,
  609. &i2c_bus_device,
  610. &serial_device,
  611. &isp116x_device,
  612. &viper_mtd_devices[0],
  613. &viper_mtd_devices[1],
  614. &viper_backlight_device,
  615. &viper_pcmcia_device,
  616. };
  617. static mfp_cfg_t viper_pin_config[] __initdata = {
  618. /* Chip selects */
  619. GPIO15_nCS_1,
  620. GPIO78_nCS_2,
  621. GPIO79_nCS_3,
  622. GPIO80_nCS_4,
  623. GPIO33_nCS_5,
  624. /* AC97 */
  625. GPIO28_AC97_BITCLK,
  626. GPIO29_AC97_SDATA_IN_0,
  627. GPIO30_AC97_SDATA_OUT,
  628. GPIO31_AC97_SYNC,
  629. /* FP Backlight */
  630. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  631. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  632. GPIO16_PWM0_OUT,
  633. /* Ethernet PHY Ready */
  634. GPIO18_RDY,
  635. /* Serial shutdown */
  636. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  637. /* Compact-Flash / PC104 */
  638. GPIO48_nPOE,
  639. GPIO49_nPWE,
  640. GPIO50_nPIOR,
  641. GPIO51_nPIOW,
  642. GPIO52_nPCE_1,
  643. GPIO53_nPCE_2,
  644. GPIO54_nPSKTSEL,
  645. GPIO55_nPREG,
  646. GPIO56_nPWAIT,
  647. GPIO57_nIOIS16,
  648. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  649. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  650. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  651. /* Integrated UPS control */
  652. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  653. /* Vcc regulator control */
  654. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  655. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  656. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  657. /* i2c busses */
  658. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  659. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  660. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  661. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  662. /* PC/104 Interrupt */
  663. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  664. };
  665. static unsigned long viper_tpm;
  666. static int __init viper_tpm_setup(char *str)
  667. {
  668. strict_strtoul(str, 10, &viper_tpm);
  669. return 1;
  670. }
  671. __setup("tpm=", viper_tpm_setup);
  672. static void __init viper_tpm_init(void)
  673. {
  674. struct platform_device *tpm_device;
  675. struct i2c_gpio_platform_data i2c_tpm_data = {
  676. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  677. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  678. .udelay = 10,
  679. .timeout = HZ,
  680. };
  681. char *errstr;
  682. /* Allocate TPM i2c bus if requested */
  683. if (!viper_tpm)
  684. return;
  685. tpm_device = platform_device_alloc("i2c-gpio", 2);
  686. if (tpm_device) {
  687. if (!platform_device_add_data(tpm_device,
  688. &i2c_tpm_data,
  689. sizeof(i2c_tpm_data))) {
  690. if (platform_device_add(tpm_device)) {
  691. errstr = "register TPM i2c bus";
  692. goto error_free_tpm;
  693. }
  694. } else {
  695. errstr = "allocate TPM i2c bus data";
  696. goto error_free_tpm;
  697. }
  698. } else {
  699. errstr = "allocate TPM i2c device";
  700. goto error_tpm;
  701. }
  702. return;
  703. error_free_tpm:
  704. kfree(tpm_device);
  705. error_tpm:
  706. pr_err("viper: Couldn't %s, giving up\n", errstr);
  707. }
  708. static void __init viper_init_vcore_gpios(void)
  709. {
  710. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  711. goto err_request_data;
  712. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  713. goto err_request_clk;
  714. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  715. goto err_request_cs;
  716. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  717. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  718. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  719. goto err_dir;
  720. /* c/should assume redboot set the correct level ??? */
  721. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  722. return;
  723. err_dir:
  724. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  725. err_request_cs:
  726. gpio_free(VIPER_PSU_CLK_GPIO);
  727. err_request_clk:
  728. gpio_free(VIPER_PSU_DATA_GPIO);
  729. err_request_data:
  730. pr_err("viper: Failed to setup vcore control GPIOs\n");
  731. }
  732. static void __init viper_init_serial_gpio(void)
  733. {
  734. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  735. goto err_request;
  736. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  737. goto err_dir;
  738. return;
  739. err_dir:
  740. gpio_free(VIPER_UART_SHDN_GPIO);
  741. err_request:
  742. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  743. }
  744. #ifdef CONFIG_CPU_FREQ
  745. static int viper_cpufreq_notifier(struct notifier_block *nb,
  746. unsigned long val, void *data)
  747. {
  748. struct cpufreq_freqs *freq = data;
  749. /* TODO: Adjust timings??? */
  750. switch (val) {
  751. case CPUFREQ_PRECHANGE:
  752. if (freq->old < freq->new) {
  753. /* we are getting faster so raise the voltage
  754. * before we change freq */
  755. viper_set_core_cpu_voltage(freq->new, 0);
  756. }
  757. break;
  758. case CPUFREQ_POSTCHANGE:
  759. if (freq->old > freq->new) {
  760. /* we are slowing down so drop the power
  761. * after we change freq */
  762. viper_set_core_cpu_voltage(freq->new, 0);
  763. }
  764. break;
  765. case CPUFREQ_RESUMECHANGE:
  766. viper_set_core_cpu_voltage(freq->new, 0);
  767. break;
  768. default:
  769. /* ignore */
  770. break;
  771. }
  772. return 0;
  773. }
  774. static struct notifier_block viper_cpufreq_notifier_block = {
  775. .notifier_call = viper_cpufreq_notifier
  776. };
  777. static void __init viper_init_cpufreq(void)
  778. {
  779. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  780. CPUFREQ_TRANSITION_NOTIFIER))
  781. pr_err("viper: Failed to setup cpufreq notifier\n");
  782. }
  783. #else
  784. static inline void viper_init_cpufreq(void) {}
  785. #endif
  786. static void viper_power_off(void)
  787. {
  788. pr_notice("Shutting off UPS\n");
  789. gpio_set_value(VIPER_UPS_GPIO, 1);
  790. /* Spin to death... */
  791. while (1);
  792. }
  793. static void __init viper_init(void)
  794. {
  795. u8 version;
  796. pm_power_off = viper_power_off;
  797. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  798. pxa_set_ffuart_info(NULL);
  799. pxa_set_btuart_info(NULL);
  800. pxa_set_stuart_info(NULL);
  801. /* Wake-up serial console */
  802. viper_init_serial_gpio();
  803. pxa_set_fb_info(NULL, &fb_info);
  804. /* v1 hardware cannot use the datacs line */
  805. version = viper_hw_version();
  806. if (version == 0)
  807. smc91x_device.num_resources--;
  808. pxa_set_i2c_info(NULL);
  809. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  810. viper_init_vcore_gpios();
  811. viper_init_cpufreq();
  812. register_syscore_ops(&viper_cpu_syscore_ops);
  813. if (version) {
  814. pr_info("viper: hardware v%di%d detected. "
  815. "CPLD revision %d.\n",
  816. VIPER_BOARD_VERSION(version),
  817. VIPER_BOARD_ISSUE(version),
  818. VIPER_CPLD_REVISION(version));
  819. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  820. (VIPER_BOARD_ISSUE(version) << 4) |
  821. VIPER_CPLD_REVISION(version);
  822. } else {
  823. pr_info("viper: No version register.\n");
  824. }
  825. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  826. viper_tpm_init();
  827. pxa_set_ac97_info(NULL);
  828. }
  829. static struct map_desc viper_io_desc[] __initdata = {
  830. {
  831. .virtual = VIPER_CPLD_BASE,
  832. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  833. .length = 0x00300000,
  834. .type = MT_DEVICE,
  835. },
  836. {
  837. .virtual = VIPER_PC104IO_BASE,
  838. .pfn = __phys_to_pfn(0x30000000),
  839. .length = 0x00800000,
  840. .type = MT_DEVICE,
  841. },
  842. };
  843. static void __init viper_map_io(void)
  844. {
  845. pxa25x_map_io();
  846. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  847. PCFR |= PCFR_OPDE;
  848. }
  849. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  850. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  851. .boot_params = 0xa0000100,
  852. .map_io = viper_map_io,
  853. .init_irq = viper_init_irq,
  854. .handle_irq = pxa25x_handle_irq,
  855. .timer = &pxa_timer,
  856. .init_machine = viper_init,
  857. MACHINE_END