time.c 4.2 KB

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  1. /*
  2. * arch/arm/mach-pxa/time.c
  3. *
  4. * PXA clocksource, clockevents, and OST interrupt handlers.
  5. * Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>.
  6. *
  7. * Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001
  8. * by MontaVista Software, Inc. (Nico, your code rocks!)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/clockchips.h>
  18. #include <linux/sched.h>
  19. #include <asm/div64.h>
  20. #include <asm/mach/irq.h>
  21. #include <asm/mach/time.h>
  22. #include <asm/sched_clock.h>
  23. #include <mach/regs-ost.h>
  24. /*
  25. * This is PXA's sched_clock implementation. This has a resolution
  26. * of at least 308 ns and a maximum value of 208 days.
  27. *
  28. * The return value is guaranteed to be monotonic in that range as
  29. * long as there is always less than 582 seconds between successive
  30. * calls to sched_clock() which should always be the case in practice.
  31. */
  32. static DEFINE_CLOCK_DATA(cd);
  33. unsigned long long notrace sched_clock(void)
  34. {
  35. u32 cyc = OSCR;
  36. return cyc_to_sched_clock(&cd, cyc, (u32)~0);
  37. }
  38. static void notrace pxa_update_sched_clock(void)
  39. {
  40. u32 cyc = OSCR;
  41. update_sched_clock(&cd, cyc, (u32)~0);
  42. }
  43. #define MIN_OSCR_DELTA 16
  44. static irqreturn_t
  45. pxa_ost0_interrupt(int irq, void *dev_id)
  46. {
  47. struct clock_event_device *c = dev_id;
  48. /* Disarm the compare/match, signal the event. */
  49. OIER &= ~OIER_E0;
  50. OSSR = OSSR_M0;
  51. c->event_handler(c);
  52. return IRQ_HANDLED;
  53. }
  54. static int
  55. pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
  56. {
  57. unsigned long next, oscr;
  58. OIER |= OIER_E0;
  59. next = OSCR + delta;
  60. OSMR0 = next;
  61. oscr = OSCR;
  62. return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
  63. }
  64. static void
  65. pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
  66. {
  67. switch (mode) {
  68. case CLOCK_EVT_MODE_ONESHOT:
  69. OIER &= ~OIER_E0;
  70. OSSR = OSSR_M0;
  71. break;
  72. case CLOCK_EVT_MODE_UNUSED:
  73. case CLOCK_EVT_MODE_SHUTDOWN:
  74. /* initializing, released, or preparing for suspend */
  75. OIER &= ~OIER_E0;
  76. OSSR = OSSR_M0;
  77. break;
  78. case CLOCK_EVT_MODE_RESUME:
  79. case CLOCK_EVT_MODE_PERIODIC:
  80. break;
  81. }
  82. }
  83. static struct clock_event_device ckevt_pxa_osmr0 = {
  84. .name = "osmr0",
  85. .features = CLOCK_EVT_FEAT_ONESHOT,
  86. .rating = 200,
  87. .set_next_event = pxa_osmr0_set_next_event,
  88. .set_mode = pxa_osmr0_set_mode,
  89. };
  90. static struct irqaction pxa_ost0_irq = {
  91. .name = "ost0",
  92. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  93. .handler = pxa_ost0_interrupt,
  94. .dev_id = &ckevt_pxa_osmr0,
  95. };
  96. static void __init pxa_timer_init(void)
  97. {
  98. unsigned long clock_tick_rate = get_clock_tick_rate();
  99. OIER = 0;
  100. OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
  101. init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
  102. clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
  103. ckevt_pxa_osmr0.max_delta_ns =
  104. clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
  105. ckevt_pxa_osmr0.min_delta_ns =
  106. clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
  107. ckevt_pxa_osmr0.cpumask = cpumask_of(0);
  108. setup_irq(IRQ_OST0, &pxa_ost0_irq);
  109. clocksource_mmio_init(&OSCR, "oscr0", clock_tick_rate, 200, 32,
  110. clocksource_mmio_readl_up);
  111. clockevents_register_device(&ckevt_pxa_osmr0);
  112. }
  113. #ifdef CONFIG_PM
  114. static unsigned long osmr[4], oier, oscr;
  115. static void pxa_timer_suspend(void)
  116. {
  117. osmr[0] = OSMR0;
  118. osmr[1] = OSMR1;
  119. osmr[2] = OSMR2;
  120. osmr[3] = OSMR3;
  121. oier = OIER;
  122. oscr = OSCR;
  123. }
  124. static void pxa_timer_resume(void)
  125. {
  126. /*
  127. * Ensure that we have at least MIN_OSCR_DELTA between match
  128. * register 0 and the OSCR, to guarantee that we will receive
  129. * the one-shot timer interrupt. We adjust OSMR0 in preference
  130. * to OSCR to guarantee that OSCR is monotonically incrementing.
  131. */
  132. if (osmr[0] - oscr < MIN_OSCR_DELTA)
  133. osmr[0] += MIN_OSCR_DELTA;
  134. OSMR0 = osmr[0];
  135. OSMR1 = osmr[1];
  136. OSMR2 = osmr[2];
  137. OSMR3 = osmr[3];
  138. OIER = oier;
  139. OSCR = oscr;
  140. }
  141. #else
  142. #define pxa_timer_suspend NULL
  143. #define pxa_timer_resume NULL
  144. #endif
  145. struct sys_timer pxa_timer = {
  146. .init = pxa_timer_init,
  147. .suspend = pxa_timer_suspend,
  148. .resume = pxa_timer_resume,
  149. };