board-3430sdp.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739
  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/board.h>
  32. #include <plat/usb.h>
  33. #include <plat/common.h>
  34. #include <plat/dma.h>
  35. #include <plat/gpmc.h>
  36. #include <video/omapdss.h>
  37. #include <video/omap-panel-generic-dpi.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static struct gpio sdp3430_dss_gpios[] __initdata = {
  98. {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
  99. {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
  100. };
  101. static int lcd_enabled;
  102. static int dvi_enabled;
  103. static void __init sdp3430_display_init(void)
  104. {
  105. int r;
  106. r = gpio_request_array(sdp3430_dss_gpios,
  107. ARRAY_SIZE(sdp3430_dss_gpios));
  108. if (r)
  109. printk(KERN_ERR "failed to get LCD control GPIOs\n");
  110. }
  111. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  112. {
  113. if (dvi_enabled) {
  114. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  115. return -EINVAL;
  116. }
  117. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
  118. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
  119. lcd_enabled = 1;
  120. return 0;
  121. }
  122. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  123. {
  124. lcd_enabled = 0;
  125. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
  126. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
  127. }
  128. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  129. {
  130. if (lcd_enabled) {
  131. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  132. return -EINVAL;
  133. }
  134. dvi_enabled = 1;
  135. return 0;
  136. }
  137. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  138. {
  139. dvi_enabled = 0;
  140. }
  141. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  142. {
  143. return 0;
  144. }
  145. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  146. {
  147. }
  148. static struct omap_dss_device sdp3430_lcd_device = {
  149. .name = "lcd",
  150. .driver_name = "sharp_ls_panel",
  151. .type = OMAP_DISPLAY_TYPE_DPI,
  152. .phy.dpi.data_lines = 16,
  153. .platform_enable = sdp3430_panel_enable_lcd,
  154. .platform_disable = sdp3430_panel_disable_lcd,
  155. };
  156. static struct panel_generic_dpi_data dvi_panel = {
  157. .name = "generic",
  158. .platform_enable = sdp3430_panel_enable_dvi,
  159. .platform_disable = sdp3430_panel_disable_dvi,
  160. };
  161. static struct omap_dss_device sdp3430_dvi_device = {
  162. .name = "dvi",
  163. .type = OMAP_DISPLAY_TYPE_DPI,
  164. .driver_name = "generic_dpi_panel",
  165. .data = &dvi_panel,
  166. .phy.dpi.data_lines = 24,
  167. };
  168. static struct omap_dss_device sdp3430_tv_device = {
  169. .name = "tv",
  170. .driver_name = "venc",
  171. .type = OMAP_DISPLAY_TYPE_VENC,
  172. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  173. .platform_enable = sdp3430_panel_enable_tv,
  174. .platform_disable = sdp3430_panel_disable_tv,
  175. };
  176. static struct omap_dss_device *sdp3430_dss_devices[] = {
  177. &sdp3430_lcd_device,
  178. &sdp3430_dvi_device,
  179. &sdp3430_tv_device,
  180. };
  181. static struct omap_dss_board_info sdp3430_dss_data = {
  182. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  183. .devices = sdp3430_dss_devices,
  184. .default_device = &sdp3430_lcd_device,
  185. };
  186. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  187. };
  188. static void __init omap_3430sdp_init_early(void)
  189. {
  190. omap2_init_common_infrastructure();
  191. omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
  192. }
  193. static struct omap2_hsmmc_info mmc[] = {
  194. {
  195. .mmc = 1,
  196. /* 8 bits (default) requires S6.3 == ON,
  197. * so the SIM card isn't used; else 4 bits.
  198. */
  199. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  200. .gpio_wp = 4,
  201. },
  202. {
  203. .mmc = 2,
  204. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  205. .gpio_wp = 7,
  206. },
  207. {} /* Terminator */
  208. };
  209. static int sdp3430_twl_gpio_setup(struct device *dev,
  210. unsigned gpio, unsigned ngpio)
  211. {
  212. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  213. * gpio + 1 is "mmc1_cd" (input/IRQ)
  214. */
  215. mmc[0].gpio_cd = gpio + 0;
  216. mmc[1].gpio_cd = gpio + 1;
  217. omap2_hsmmc_init(mmc);
  218. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  219. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  220. /* gpio + 15 is "sub_lcd_nRST" (output) */
  221. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  222. return 0;
  223. }
  224. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  225. .gpio_base = OMAP_MAX_GPIO_LINES,
  226. .irq_base = TWL4030_GPIO_IRQ_BASE,
  227. .irq_end = TWL4030_GPIO_IRQ_END,
  228. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  229. | BIT(16) | BIT(17),
  230. .setup = sdp3430_twl_gpio_setup,
  231. };
  232. /* regulator consumer mappings */
  233. /* ads7846 on SPI */
  234. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  235. REGULATOR_SUPPLY("vcc", "spi1.0"),
  236. };
  237. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  238. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  239. };
  240. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  241. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  242. };
  243. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  244. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  245. };
  246. /*
  247. * Apply all the fixed voltages since most versions of U-Boot
  248. * don't bother with that initialization.
  249. */
  250. /* VAUX1 for mainboard (irda and sub-lcd) */
  251. static struct regulator_init_data sdp3430_vaux1 = {
  252. .constraints = {
  253. .min_uV = 2800000,
  254. .max_uV = 2800000,
  255. .apply_uV = true,
  256. .valid_modes_mask = REGULATOR_MODE_NORMAL
  257. | REGULATOR_MODE_STANDBY,
  258. .valid_ops_mask = REGULATOR_CHANGE_MODE
  259. | REGULATOR_CHANGE_STATUS,
  260. },
  261. };
  262. /* VAUX2 for camera module */
  263. static struct regulator_init_data sdp3430_vaux2 = {
  264. .constraints = {
  265. .min_uV = 2800000,
  266. .max_uV = 2800000,
  267. .apply_uV = true,
  268. .valid_modes_mask = REGULATOR_MODE_NORMAL
  269. | REGULATOR_MODE_STANDBY,
  270. .valid_ops_mask = REGULATOR_CHANGE_MODE
  271. | REGULATOR_CHANGE_STATUS,
  272. },
  273. };
  274. /* VAUX3 for LCD board */
  275. static struct regulator_init_data sdp3430_vaux3 = {
  276. .constraints = {
  277. .min_uV = 2800000,
  278. .max_uV = 2800000,
  279. .apply_uV = true,
  280. .valid_modes_mask = REGULATOR_MODE_NORMAL
  281. | REGULATOR_MODE_STANDBY,
  282. .valid_ops_mask = REGULATOR_CHANGE_MODE
  283. | REGULATOR_CHANGE_STATUS,
  284. },
  285. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  286. .consumer_supplies = sdp3430_vaux3_supplies,
  287. };
  288. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  289. static struct regulator_init_data sdp3430_vaux4 = {
  290. .constraints = {
  291. .min_uV = 1800000,
  292. .max_uV = 1800000,
  293. .apply_uV = true,
  294. .valid_modes_mask = REGULATOR_MODE_NORMAL
  295. | REGULATOR_MODE_STANDBY,
  296. .valid_ops_mask = REGULATOR_CHANGE_MODE
  297. | REGULATOR_CHANGE_STATUS,
  298. },
  299. };
  300. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  301. static struct regulator_init_data sdp3430_vmmc1 = {
  302. .constraints = {
  303. .min_uV = 1850000,
  304. .max_uV = 3150000,
  305. .valid_modes_mask = REGULATOR_MODE_NORMAL
  306. | REGULATOR_MODE_STANDBY,
  307. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  308. | REGULATOR_CHANGE_MODE
  309. | REGULATOR_CHANGE_STATUS,
  310. },
  311. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  312. .consumer_supplies = sdp3430_vmmc1_supplies,
  313. };
  314. /* VMMC2 for MMC2 card */
  315. static struct regulator_init_data sdp3430_vmmc2 = {
  316. .constraints = {
  317. .min_uV = 1850000,
  318. .max_uV = 1850000,
  319. .apply_uV = true,
  320. .valid_modes_mask = REGULATOR_MODE_NORMAL
  321. | REGULATOR_MODE_STANDBY,
  322. .valid_ops_mask = REGULATOR_CHANGE_MODE
  323. | REGULATOR_CHANGE_STATUS,
  324. },
  325. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  326. .consumer_supplies = sdp3430_vmmc2_supplies,
  327. };
  328. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  329. static struct regulator_init_data sdp3430_vsim = {
  330. .constraints = {
  331. .min_uV = 1800000,
  332. .max_uV = 3000000,
  333. .valid_modes_mask = REGULATOR_MODE_NORMAL
  334. | REGULATOR_MODE_STANDBY,
  335. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  336. | REGULATOR_CHANGE_MODE
  337. | REGULATOR_CHANGE_STATUS,
  338. },
  339. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  340. .consumer_supplies = sdp3430_vsim_supplies,
  341. };
  342. static struct twl4030_platform_data sdp3430_twldata = {
  343. /* platform_data for children goes here */
  344. .gpio = &sdp3430_gpio_data,
  345. .keypad = &sdp3430_kp_data,
  346. .vaux1 = &sdp3430_vaux1,
  347. .vaux2 = &sdp3430_vaux2,
  348. .vaux3 = &sdp3430_vaux3,
  349. .vaux4 = &sdp3430_vaux4,
  350. .vmmc1 = &sdp3430_vmmc1,
  351. .vmmc2 = &sdp3430_vmmc2,
  352. .vsim = &sdp3430_vsim,
  353. };
  354. static int __init omap3430_i2c_init(void)
  355. {
  356. /* i2c1 for PMIC only */
  357. omap3_pmic_get_config(&sdp3430_twldata,
  358. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  359. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  360. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  361. sdp3430_twldata.vdac->constraints.apply_uV = true;
  362. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  363. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  364. omap3_pmic_init("twl4030", &sdp3430_twldata);
  365. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  366. omap_register_i2c_bus(2, 400, NULL, 0);
  367. /* i2c3 on display connector (for DVI, tfp410) */
  368. omap_register_i2c_bus(3, 400, NULL, 0);
  369. return 0;
  370. }
  371. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  372. static struct omap_smc91x_platform_data board_smc91x_data = {
  373. .cs = 3,
  374. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  375. IORESOURCE_IRQ_LOWLEVEL,
  376. };
  377. static void __init board_smc91x_init(void)
  378. {
  379. if (omap_rev() > OMAP3430_REV_ES1_0)
  380. board_smc91x_data.gpio_irq = 6;
  381. else
  382. board_smc91x_data.gpio_irq = 29;
  383. gpmc_smc91x_init(&board_smc91x_data);
  384. }
  385. #else
  386. static inline void board_smc91x_init(void)
  387. {
  388. }
  389. #endif
  390. static void enable_board_wakeup_source(void)
  391. {
  392. /* T2 interrupt line (keypad) */
  393. omap_mux_init_signal("sys_nirq",
  394. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  395. }
  396. static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
  397. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  398. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  399. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  400. .phy_reset = true,
  401. .reset_gpio_port[0] = 57,
  402. .reset_gpio_port[1] = 61,
  403. .reset_gpio_port[2] = -EINVAL
  404. };
  405. #ifdef CONFIG_OMAP_MUX
  406. static struct omap_board_mux board_mux[] __initdata = {
  407. { .reg_offset = OMAP_MUX_TERMINATOR },
  408. };
  409. static struct omap_device_pad serial1_pads[] __initdata = {
  410. /*
  411. * Note that off output enable is an active low
  412. * signal. So setting this means pin is a
  413. * input enabled in off mode
  414. */
  415. OMAP_MUX_STATIC("uart1_cts.uart1_cts",
  416. OMAP_PIN_INPUT |
  417. OMAP_PIN_OFF_INPUT_PULLDOWN |
  418. OMAP_OFFOUT_EN |
  419. OMAP_MUX_MODE0),
  420. OMAP_MUX_STATIC("uart1_rts.uart1_rts",
  421. OMAP_PIN_OUTPUT |
  422. OMAP_OFF_EN |
  423. OMAP_MUX_MODE0),
  424. OMAP_MUX_STATIC("uart1_rx.uart1_rx",
  425. OMAP_PIN_INPUT |
  426. OMAP_PIN_OFF_INPUT_PULLDOWN |
  427. OMAP_OFFOUT_EN |
  428. OMAP_MUX_MODE0),
  429. OMAP_MUX_STATIC("uart1_tx.uart1_tx",
  430. OMAP_PIN_OUTPUT |
  431. OMAP_OFF_EN |
  432. OMAP_MUX_MODE0),
  433. };
  434. static struct omap_device_pad serial2_pads[] __initdata = {
  435. OMAP_MUX_STATIC("uart2_cts.uart2_cts",
  436. OMAP_PIN_INPUT_PULLUP |
  437. OMAP_PIN_OFF_INPUT_PULLDOWN |
  438. OMAP_OFFOUT_EN |
  439. OMAP_MUX_MODE0),
  440. OMAP_MUX_STATIC("uart2_rts.uart2_rts",
  441. OMAP_PIN_OUTPUT |
  442. OMAP_OFF_EN |
  443. OMAP_MUX_MODE0),
  444. OMAP_MUX_STATIC("uart2_rx.uart2_rx",
  445. OMAP_PIN_INPUT |
  446. OMAP_PIN_OFF_INPUT_PULLDOWN |
  447. OMAP_OFFOUT_EN |
  448. OMAP_MUX_MODE0),
  449. OMAP_MUX_STATIC("uart2_tx.uart2_tx",
  450. OMAP_PIN_OUTPUT |
  451. OMAP_OFF_EN |
  452. OMAP_MUX_MODE0),
  453. };
  454. static struct omap_device_pad serial3_pads[] __initdata = {
  455. OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
  456. OMAP_PIN_INPUT_PULLDOWN |
  457. OMAP_PIN_OFF_INPUT_PULLDOWN |
  458. OMAP_OFFOUT_EN |
  459. OMAP_MUX_MODE0),
  460. OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
  461. OMAP_PIN_OUTPUT |
  462. OMAP_OFF_EN |
  463. OMAP_MUX_MODE0),
  464. OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
  465. OMAP_PIN_INPUT |
  466. OMAP_PIN_OFF_INPUT_PULLDOWN |
  467. OMAP_OFFOUT_EN |
  468. OMAP_MUX_MODE0),
  469. OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
  470. OMAP_PIN_OUTPUT |
  471. OMAP_OFF_EN |
  472. OMAP_MUX_MODE0),
  473. };
  474. static struct omap_board_data serial1_data __initdata = {
  475. .id = 0,
  476. .pads = serial1_pads,
  477. .pads_cnt = ARRAY_SIZE(serial1_pads),
  478. };
  479. static struct omap_board_data serial2_data __initdata = {
  480. .id = 1,
  481. .pads = serial2_pads,
  482. .pads_cnt = ARRAY_SIZE(serial2_pads),
  483. };
  484. static struct omap_board_data serial3_data __initdata = {
  485. .id = 2,
  486. .pads = serial3_pads,
  487. .pads_cnt = ARRAY_SIZE(serial3_pads),
  488. };
  489. static inline void board_serial_init(void)
  490. {
  491. omap_serial_init_port(&serial1_data);
  492. omap_serial_init_port(&serial2_data);
  493. omap_serial_init_port(&serial3_data);
  494. }
  495. #else
  496. #define board_mux NULL
  497. static inline void board_serial_init(void)
  498. {
  499. omap_serial_init();
  500. }
  501. #endif
  502. /*
  503. * SDP3430 V2 Board CS organization
  504. * Different from SDP3430 V1. Now 4 switches used to specify CS
  505. *
  506. * See also the Switch S8 settings in the comments.
  507. */
  508. static char chip_sel_3430[][GPMC_CS_NUM] = {
  509. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  510. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  511. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  512. };
  513. static struct mtd_partition sdp_nor_partitions[] = {
  514. /* bootloader (U-Boot, etc) in first sector */
  515. {
  516. .name = "Bootloader-NOR",
  517. .offset = 0,
  518. .size = SZ_256K,
  519. .mask_flags = MTD_WRITEABLE, /* force read-only */
  520. },
  521. /* bootloader params in the next sector */
  522. {
  523. .name = "Params-NOR",
  524. .offset = MTDPART_OFS_APPEND,
  525. .size = SZ_256K,
  526. .mask_flags = 0,
  527. },
  528. /* kernel */
  529. {
  530. .name = "Kernel-NOR",
  531. .offset = MTDPART_OFS_APPEND,
  532. .size = SZ_2M,
  533. .mask_flags = 0
  534. },
  535. /* file system */
  536. {
  537. .name = "Filesystem-NOR",
  538. .offset = MTDPART_OFS_APPEND,
  539. .size = MTDPART_SIZ_FULL,
  540. .mask_flags = 0
  541. }
  542. };
  543. static struct mtd_partition sdp_onenand_partitions[] = {
  544. {
  545. .name = "X-Loader-OneNAND",
  546. .offset = 0,
  547. .size = 4 * (64 * 2048),
  548. .mask_flags = MTD_WRITEABLE /* force read-only */
  549. },
  550. {
  551. .name = "U-Boot-OneNAND",
  552. .offset = MTDPART_OFS_APPEND,
  553. .size = 2 * (64 * 2048),
  554. .mask_flags = MTD_WRITEABLE /* force read-only */
  555. },
  556. {
  557. .name = "U-Boot Environment-OneNAND",
  558. .offset = MTDPART_OFS_APPEND,
  559. .size = 1 * (64 * 2048),
  560. },
  561. {
  562. .name = "Kernel-OneNAND",
  563. .offset = MTDPART_OFS_APPEND,
  564. .size = 16 * (64 * 2048),
  565. },
  566. {
  567. .name = "File System-OneNAND",
  568. .offset = MTDPART_OFS_APPEND,
  569. .size = MTDPART_SIZ_FULL,
  570. },
  571. };
  572. static struct mtd_partition sdp_nand_partitions[] = {
  573. /* All the partition sizes are listed in terms of NAND block size */
  574. {
  575. .name = "X-Loader-NAND",
  576. .offset = 0,
  577. .size = 4 * (64 * 2048),
  578. .mask_flags = MTD_WRITEABLE, /* force read-only */
  579. },
  580. {
  581. .name = "U-Boot-NAND",
  582. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  583. .size = 10 * (64 * 2048),
  584. .mask_flags = MTD_WRITEABLE, /* force read-only */
  585. },
  586. {
  587. .name = "Boot Env-NAND",
  588. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  589. .size = 6 * (64 * 2048),
  590. },
  591. {
  592. .name = "Kernel-NAND",
  593. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  594. .size = 40 * (64 * 2048),
  595. },
  596. {
  597. .name = "File System - NAND",
  598. .size = MTDPART_SIZ_FULL,
  599. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  600. },
  601. };
  602. static struct flash_partitions sdp_flash_partitions[] = {
  603. {
  604. .parts = sdp_nor_partitions,
  605. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  606. },
  607. {
  608. .parts = sdp_onenand_partitions,
  609. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  610. },
  611. {
  612. .parts = sdp_nand_partitions,
  613. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  614. },
  615. };
  616. static void __init omap_3430sdp_init(void)
  617. {
  618. int gpio_pendown;
  619. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  620. omap_board_config = sdp3430_config;
  621. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  622. omap3430_i2c_init();
  623. omap_display_init(&sdp3430_dss_data);
  624. if (omap_rev() > OMAP3430_REV_ES1_0)
  625. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  626. else
  627. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  628. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  629. board_serial_init();
  630. usb_musb_init(NULL);
  631. board_smc91x_init();
  632. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  633. sdp3430_display_init();
  634. enable_board_wakeup_source();
  635. usbhs_init(&usbhs_bdata);
  636. }
  637. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  638. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  639. .boot_params = 0x80000100,
  640. .reserve = omap_reserve,
  641. .map_io = omap3_map_io,
  642. .init_early = omap_3430sdp_init_early,
  643. .init_irq = omap3_init_irq,
  644. .init_machine = omap_3430sdp_init,
  645. .timer = &omap3_timer,
  646. MACHINE_END